Browse Source

add crc32 check

yanhong.wang 3 years ago
parent
commit
9f3de5baca
5 changed files with 124 additions and 15 deletions
  1. 70 8
      boot/bootmain.c
  2. 5 3
      build/Makefile
  3. 12 4
      common/sys.h
  4. 29 0
      crc32/crc32.c
  5. 8 0
      crc32/crc32.h

+ 70 - 8
boot/bootmain.c

@@ -26,6 +26,9 @@
 #include "gpt.h"
 #include "clkgen_ctrl_macro.h"
 #include "syscon_sysmain_ctrl_macro.h"
+#include "rstgen_ctrl_macro.h"
+
+#include "crc32.h"
 
 extern void boot_sdio_init(void);
 extern int boot_load_gpt_partition(void* dst, const gpt_guid* partition_type_guid);
@@ -56,7 +59,7 @@ void start2run32(unsigned int start)
  *mode:flash work mode
 */
 
-static int load_data(struct spi_flash* spi_flash,unsigned int des_addr,unsigned int page_offset,int mode)
+static int load_data(struct spi_flash* spi_flash,void *des_addr,unsigned int page_offset,int mode)
 {
 	u8 dataBuf[260];
 	u32 startPage,endPage;
@@ -88,11 +91,51 @@ static int load_data(struct spi_flash* spi_flash,unsigned int des_addr,unsigned
 	/*copy the first page data*/
 	sys_memcpy(addr, &dataBuf[4], SPIBOOT_LOAD_ADDR_OFFSET);
 
+	//copy data from flash to des_addr, with crc check
+#if 1
+    uint32_t crc_org = 0, crc_ddr = 0;
+    uint32_t n_bytes_left = fileSize - SPIBOOT_LOAD_ADDR_OFFSET;
+    uint32_t once = 0;
+
+    crc32(dataBuf+4, SPIBOOT_LOAD_ADDR_OFFSET, &crc_org);
+    crc32(addr, SPIBOOT_LOAD_ADDR_OFFSET, &crc_ddr);
+
+    offset += pageSize;
+    addr += SPIBOOT_LOAD_ADDR_OFFSET;
+
+    /*read Remaining pages data*/
+    while (n_bytes_left) {
+        once = n_bytes_left > pageSize ? pageSize : n_bytes_left;
+        ret = spi_flash->read(spi_flash, offset, once, dataBuf, mode);
+        if(ret != 0)
+        {
+            printk("read 0x%x fail##\r\n", offset);
+            return -1;
+        }
+        sys_memcpy(addr, dataBuf, once);
+        crc32(dataBuf, once, &crc_org);
+        crc32(addr, once, &crc_ddr);
+
+        offset += once;
+        addr += once;
+        n_bytes_left -= once;
+    }
+
+    printk("crc flash: %08x, crc ddr: %08x\n", crc_org, crc_ddr);
+    if (crc_org != crc_ddr) {
+        printk("ERROR: crc check FAILED\n");
+        while (1) {
+            __asm__ ("wfi");
+        }
+    } else {
+        printk("crc check PASSED\n");
+    }
+#else
 	offset += pageSize;
 	addr += SPIBOOT_LOAD_ADDR_OFFSET;
-	/*read Remaining pages data*/
+
 	for(i=1; i<=endPage; i++)
-	{ 		
+	{
 		ret = spi_flash->read(spi_flash,offset,pageSize, addr, mode);
 		if(ret != 0)
         {
@@ -103,10 +146,12 @@ static int load_data(struct spi_flash* spi_flash,unsigned int des_addr,unsigned
 		offset += pageSize;
 		addr +=pageSize;
 	}
+#endif
+
 	return 0;
 }
 
-int updata_flash(struct spi_flash* spi_flash,u32 flash_addr,u32 load_addr,unsigned char mode)
+int updata_flash(struct spi_flash* spi_flash,u32 flash_addr,u32 flash_size_limit, u32 load_addr,unsigned char mode)
 {
     int ret = 0;
     u32 offset = 0;
@@ -125,6 +170,10 @@ int updata_flash(struct spi_flash* spi_flash,u32 flash_addr,u32 load_addr,unsign
 	if(ret <= 0)
 		return -1;
 
+	if ((u32)ret > flash_size_limit) {
+		printk("error: size %d exceeds the limit %d\n", ret, flash_size_limit);
+		return -1;
+	}
 	erase_block = (ret + blockSize - 1) / blockSize;
 	page_count = (ret + pageSize - 1) / pageSize;
 
@@ -169,13 +218,13 @@ static int updata_flash_code(struct spi_flash* spi_flash,unsigned int updata_num
     int ret = 0;
     switch (updata_num){
         case 0:
-            ret = updata_flash(spi_flash,FLASH_SECONDBOOT_START_ADDR,DEFAULT_SECONDBOOT_LOAD_ADDR,mode);
+            ret = updata_flash(spi_flash,FLASH_SECONDBOOT_START_ADDR,FLASH_SECONDBOOT_SIZE_LIMIT,DEFAULT_SECONDBOOT_LOAD_ADDR,mode);
             break;
         case 1:
-            ret = updata_flash(spi_flash,FLASH_DDRINIT_START_ADDR,DEFAULT_DDRINIT_LOAD_ADDR,mode);
+            ret = updata_flash(spi_flash,FLASH_DDRINIT_START_ADDR,FLASH_DDRINIT_SIZE_LIMIT,DEFAULT_DDRINIT_LOAD_ADDR,mode);
             break;
         case 2:
-            ret = updata_flash(spi_flash,FLASH_UBOOT_START_ADDR,DEFAULT_UBOOT_LOAD_ADDR,mode);
+            ret = updata_flash(spi_flash,FLASH_UBOOT_START_ADDR,FLASH_UBOOT_SIZE_LIMIT,DEFAULT_UBOOT_LOAD_ADDR,mode);
             break;
         default:
             break;
@@ -401,7 +450,7 @@ static int init_ddr(void)
     //`endif
   }
 
- #if 1   
+ #if 1
     //while(1)
     {
 
@@ -476,6 +525,19 @@ void BootMain(void)
 	else
 		printk("End init lpddr4, test ddr fail\r\n");
 
+#if (UBOOT_EXEC_AT_NBDLA_2M == 1)
+	printk("init nbdla 2M ram\r\n");
+	_SET_SYSCON_REG_register16_SCFG_nbdla_clkgating_en(1);
+	_ENABLE_CLOCK_clk_dla_axi_;
+	_ENABLE_CLOCK_clk_dlanoc_axi_;
+	_ENABLE_CLOCK_clk_dla_apb_;
+	_ENABLE_CLOCK_clk_dlaslv_axi_;
+	_CLEAR_RESET_rstgen_rstn_dla_axi_;
+	_CLEAR_RESET_rstgen_rstn_dlanoc_axi_;
+	_CLEAR_RESET_rstgen_rstn_dla_apb_;
+	_CLEAR_RESET_rstgen_rstn_dlaslv_axi_;
+#endif  /* UBOOT_EXEC_AT_NBDLA_2M */
+
 	boot_from_chiplink();
 	
 	boot_mode = get_boot_mode();

+ 5 - 3
build/Makefile

@@ -8,7 +8,7 @@ OBJCOPY=${CROSSCOMPILE}objcopy
 OBJDUMP=${CROSSCOMPILE}objdump
 
 #DDR_SPEED 1:1600. 2:2133 3:2800 4 :3200
-DDR_SPEED = 3200
+DDR_SPEED = 2133
 
 SUFFIX=$(shell date +%y%m%d)
 GIT_VERSION=$(shell git show -s --pretty=format:%h)
@@ -27,7 +27,8 @@ INCLUDE_DIR = -I. -I../boot\
 			-I../uart \
 			-I../timer \
 			-I../sdio\
-			-I../gpt
+			-I../gpt \
+			-I../crc32 \
 
 ifeq ($(strip $(DDR_SPEED)),1600)
 INCLUDE_DIR +=-I../ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_800_cl14_bl16
@@ -78,7 +79,8 @@ OBJECTLIST=../boot/start.o \
 		../sdio/sdio.o \
 		../gpt/gpt.o \
 		../ddrphy_cfg/regconfig.h.sim_PHY.o \
-		../ddrphy_cfg/regconfig.h.sim_PI.o 
+		../ddrphy_cfg/regconfig.h.sim_PI.o \
+		../crc32/crc32.o \
 
 ifeq ($(strip $(DDR_SPEED)),1600)
 OBJECTLIST +=../ddrc_cfg/lpddr4_800_cl14_bl16/orbit_boot_800.o

+ 12 - 4
common/sys.h

@@ -80,14 +80,21 @@
  *kernel:25M		0x130000 - 0x1a3ffff
 */
 
-
+#define UBOOT_EXEC_AT_NBDLA_2M  0
+#define UBOOT_EXEC_AT_SYS_PORT  0
 
 /*DDR bin file */
 #define DEFAULT_DDR_ADDR		0x18080000
 #define DEFAULT_DDR_OFFSET		0x100
 
 /*uboot bin file*/
+#if (UBOOT_EXEC_AT_NBDLA_2M == 1)
+#define DEFAULT_UBOOT_ADDR		0x19c00000
+#elif (UBOOT_EXEC_AT_SYS_PORT == 1)
+#define DEFAULT_UBOOT_ADDR      0x1000000000
+#else
 #define DEFAULT_UBOOT_ADDR		0x80000000
+#endif
 #define DEFAULT_UBOOT_OFFSET	0x400
 
 /*kernel image file*/
@@ -96,12 +103,13 @@
 
 
 #define FLASH_SECONDBOOT_START_ADDR     0
+#define FLASH_SECONDBOOT_SIZE_LIMIT     (64*1024)
 #define FLASH_DDRINIT_START_ADDR        0x10000
+#define FLASH_DDRINIT_SIZE_LIMIT        (192*1024)
 #define FLASH_UBOOT_START_ADDR          0x40000
+#define FLASH_UBOOT_SIZE_LIMIT          (896*1024)
 
-
-
-#define DEFAULT_UBOOT_LOAD_ADDR  0x80000000
+#define DEFAULT_UBOOT_LOAD_ADDR  DEFAULT_UBOOT_ADDR
 #define DEFAULT_SECONDBOOT_LOAD_ADDR	0x180a8000 /*32k*/
 #define DEFAULT_DDRINIT_LOAD_ADDR	0x18000000	/*128K*/
 

+ 29 - 0
crc32/crc32.c

@@ -0,0 +1,29 @@
+/* Simple public domain implementation of the standard CRC32 checksum.
+ * Outputs the checksum for each file given as a command line argument.
+ * Invalid file names and files that cause errors are silently skipped.
+ * The program reads from stdin if it is called with no arguments. */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+static uint32_t crc32_for_byte(uint32_t r) {
+  for(int j = 0; j < 8; ++j)
+    r = (r & 1? 0: (uint32_t)0xEDB88320L) ^ r >> 1;
+  return r ^ (uint32_t)0xFF000000L;
+}
+
+void crc32(const void *data, uint32_t n_bytes, uint32_t* crc) {
+  static uint32_t table[0x100];
+  if(!*table)
+    for(uint32_t i = 0; i < 0x100; ++i)
+      table[i] = crc32_for_byte(i);
+  for(uint32_t i = 0; i < n_bytes; ++i)
+    *crc = table[(uint8_t)*crc ^ ((uint8_t*)data)[i]] ^ *crc >> 8;
+}
+
+uint32_t crc32_buf(const void *buf, uint32_t n_bytes) {
+  uint32_t crc = 0;
+  crc32(buf, n_bytes, &crc);
+  return crc;
+}

+ 8 - 0
crc32/crc32.h

@@ -0,0 +1,8 @@
+#ifndef _CRC32_H
+#define _CRC32_H
+
+void crc32(const void *data, uint32_t n_bytes, uint32_t* crc);
+uint32_t crc32_buf(const void *buf, uint32_t n_bytes);
+
+#endif
+