makotokato-riscv64-support-and-zenithal-backported.patch 154 KB

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  1. diff --unified --recursive --text a/.cargo/config.in b/.cargo/config.in
  2. --- a/.cargo/config.in
  3. +++ b/.cargo/config.in
  4. @@ -22,11 +22,6 @@
  5. replace-with = "vendored-sources"
  6. rev = "3bfc47d9a571d0842676043ba60716318e946c06"
  7. -[source."https://github.com/mozilla/midir.git"]
  8. -git = "https://github.com/mozilla/midir.git"
  9. -replace-with = "vendored-sources"
  10. -rev = "e1b4dcb767f9e69afe95a860374aaa9635d81e3d"
  11. -
  12. [source."https://github.com/mozilla/cubeb-pulse-rs"]
  13. git = "https://github.com/mozilla/cubeb-pulse-rs"
  14. replace-with = "vendored-sources"
  15. @@ -37,6 +32,11 @@
  16. replace-with = "vendored-sources"
  17. rev = "44eca95823bb57e964cf7b6d9791ed2ccb4b2108"
  18. +[source."https://github.com/mozilla/authenticator-rs"]
  19. +git = "https://github.com/mozilla/authenticator-rs"
  20. +replace-with = "vendored-sources"
  21. +rev = "b85bccf0527e42c877573029e8d35ff13ef06f9d"
  22. +
  23. [source."https://github.com/mozilla/audioipc"]
  24. git = "https://github.com/mozilla/audioipc"
  25. replace-with = "vendored-sources"
  26. From a418c651c88cd2682c4cfe61e9f57b5389078c09 Mon Sep 17 00:00:00 2001
  27. From: Makoto Kato <m_kato@ga2.so-net.ne.jp>
  28. Date: Thu, 17 Jun 2021 21:50:49 +0900
  29. Subject: [PATCH] signal handler
  30. ---
  31. js/src/wasm/WasmSignalHandlers.cpp | 9 +++++++++
  32. 1 file changed, 9 insertions(+)
  33. --- a/js/src/wasm/WasmSignalHandlers.cpp 2022-02-12 19:29:33.566924464 +0800
  34. +++ b/js/src/wasm/WasmSignalHandlers.cpp 2022-02-12 19:50:29.499985612 +0800
  35. @@ -163,6 +163,11 @@
  36. # define R01_sig(p) ((p)->uc_mcontext.gp_regs[1])
  37. # define R32_sig(p) ((p)->uc_mcontext.gp_regs[32])
  38. # endif
  39. +# if defined(__linux__) && defined(__riscv) && __riscv_xlen == 64
  40. +# define EPC_sig(p) ((p)->uc_mcontext.__gregs[0])
  41. +# define X02_sig(p) ((p)->uc_mcontext.__gregs[2])
  42. +# define X08_sig(p) ((p)->uc_mcontext.__gregs[8])
  43. +# endif
  44. # elif defined(__NetBSD__)
  45. # define EIP_sig(p) ((p)->uc_mcontext.__gregs[_REG_EIP])
  46. # define EBP_sig(p) ((p)->uc_mcontext.__gregs[_REG_EBP])
  47. @@ -405,6 +410,10 @@
  48. # define FP_sig(p) RFP_sig(p)
  49. # define SP_sig(p) RSP_sig(p)
  50. # define LR_sig(p) RRA_sig(p)
  51. +#elif defined(__riscv) && __riscv_xlen == 64
  52. +# define PC_sig(p) EPC_sig(p)
  53. +# define SP_sig(p) X02_sig(p)
  54. +# define FP_sig(p) X08_sig(p)
  55. # endif
  56. static void SetContextPC(CONTEXT* context, uint8_t* pc) {
  57. diff --git a/Cargo.lock b/Cargo.lock
  58. index edc5ef5ff2d98..f6240163e1440 100644
  59. --- a/Cargo.lock 2022-08-29 14:41:23.089464305 +0800
  60. +++ b/Cargo.lock 2022-08-29 14:48:22.707351349 +0800
  61. @@ -30,14 +30,14 @@
  62. [[package]]
  63. name = "alsa"
  64. -version = "0.4.3"
  65. +version = "0.6.0"
  66. source = "registry+https://github.com/rust-lang/crates.io-index"
  67. -checksum = "eb213f6b3e4b1480a60931ca2035794aa67b73103d254715b1db7b70dcb3c934"
  68. +checksum = "5915f52fe2cf65e83924d037b6c5290b7cee097c6b5c8700746e6168a343fd6b"
  69. dependencies = [
  70. "alsa-sys",
  71. "bitflags",
  72. "libc",
  73. - "nix",
  74. + "nix 0.23.1",
  75. ]
  76. [[package]]
  77. @@ -368,9 +368,8 @@
  78. [[package]]
  79. name = "authenticator"
  80. -version = "0.3.1"
  81. -source = "registry+https://github.com/rust-lang/crates.io-index"
  82. -checksum = "08cee7a0952628fde958e149507c2bb321ab4fccfafd225da0b20adc956ef88a"
  83. +version = "0.3.2"
  84. +source = "git+https://github.com/mozilla/authenticator-rs?rev=b85bccf0527e42c877573029e8d35ff13ef06f9d#b85bccf0527e42c877573029e8d35ff13ef06f9d"
  85. dependencies = [
  86. "bitflags",
  87. "core-foundation",
  88. @@ -378,7 +377,7 @@
  89. "libc",
  90. "libudev",
  91. "log",
  92. - "rand 0.7.999",
  93. + "rand 0.8.5",
  94. "runloop",
  95. "winapi",
  96. ]
  97. @@ -2220,6 +2219,7 @@
  98. "log",
  99. "mapped_hyph",
  100. "mdns_service",
  101. + "midir",
  102. "midir_impl",
  103. "mio 0.8.0",
  104. "moz_asserts",
  105. @@ -3290,8 +3290,9 @@
  106. [[package]]
  107. name = "midir"
  108. -version = "0.7.0"
  109. -source = "git+https://github.com/mozilla/midir.git?rev=e1b4dcb767f9e69afe95a860374aaa9635d81e3d#e1b4dcb767f9e69afe95a860374aaa9635d81e3d"
  110. +version = "0.8.0"
  111. +source = "registry+https://github.com/rust-lang/crates.io-index"
  112. +checksum = "2c1c68e2b589cce71b14a10d7d1599a845673f9decde80fa9e8500fdccd50dca"
  113. dependencies = [
  114. "alsa",
  115. "bitflags",
  116. @@ -3299,10 +3300,9 @@
  117. "js-sys",
  118. "libc",
  119. "memalloc",
  120. - "nix",
  121. "wasm-bindgen",
  122. "web-sys",
  123. - "winapi",
  124. + "windows",
  125. ]
  126. [[package]]
  127. @@ -3341,7 +3341,7 @@
  128. "libc",
  129. "memmap2 0.2.999",
  130. "memoffset 0.5.6",
  131. - "nix",
  132. + "nix 0.15.0",
  133. "tempfile",
  134. "thiserror",
  135. ]
  136. @@ -3752,6 +3752,19 @@
  137. ]
  138. [[package]]
  139. +name = "nix"
  140. +version = "0.23.1"
  141. +source = "registry+https://github.com/rust-lang/crates.io-index"
  142. +checksum = "9f866317acbd3a240710c63f065ffb1e4fd466259045ccb504130b7f668f35c6"
  143. +dependencies = [
  144. + "bitflags",
  145. + "cc",
  146. + "cfg-if 1.0.0",
  147. + "libc",
  148. + "memoffset 0.6.5",
  149. +]
  150. +
  151. +[[package]]
  152. name = "nom"
  153. version = "6.1.2"
  154. source = "registry+https://github.com/rust-lang/crates.io-index"
  155. @@ -6238,6 +6251,49 @@
  156. checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f"
  157. [[package]]
  158. +name = "windows"
  159. +version = "0.32.0"
  160. +source = "registry+https://github.com/rust-lang/crates.io-index"
  161. +checksum = "fbedf6db9096bc2364adce0ae0aa636dcd89f3c3f2cd67947062aaf0ca2a10ec"
  162. +dependencies = [
  163. + "windows_aarch64_msvc",
  164. + "windows_i686_gnu",
  165. + "windows_i686_msvc",
  166. + "windows_x86_64_gnu",
  167. + "windows_x86_64_msvc",
  168. +]
  169. +
  170. +[[package]]
  171. +name = "windows_aarch64_msvc"
  172. +version = "0.32.0"
  173. +source = "registry+https://github.com/rust-lang/crates.io-index"
  174. +checksum = "d8e92753b1c443191654ec532f14c199742964a061be25d77d7a96f09db20bf5"
  175. +
  176. +[[package]]
  177. +name = "windows_i686_gnu"
  178. +version = "0.32.0"
  179. +source = "registry+https://github.com/rust-lang/crates.io-index"
  180. +checksum = "6a711c68811799e017b6038e0922cb27a5e2f43a2ddb609fe0b6f3eeda9de615"
  181. +
  182. +[[package]]
  183. +name = "windows_i686_msvc"
  184. +version = "0.32.0"
  185. +source = "registry+https://github.com/rust-lang/crates.io-index"
  186. +checksum = "146c11bb1a02615db74680b32a68e2d61f553cc24c4eb5b4ca10311740e44172"
  187. +
  188. +[[package]]
  189. +name = "windows_x86_64_gnu"
  190. +version = "0.32.0"
  191. +source = "registry+https://github.com/rust-lang/crates.io-index"
  192. +checksum = "c912b12f7454c6620635bbff3450962753834be2a594819bd5e945af18ec64bc"
  193. +
  194. +[[package]]
  195. +name = "windows_x86_64_msvc"
  196. +version = "0.32.0"
  197. +source = "registry+https://github.com/rust-lang/crates.io-index"
  198. +checksum = "504a2476202769977a040c6364301a3f65d0cc9e3fb08600b2bda150a0488316"
  199. +
  200. +[[package]]
  201. name = "wineventlog"
  202. version = "0.1.0"
  203. dependencies = [
  204. diff --git a/Cargo.toml b/Cargo.toml
  205. index 1c2437f1f5675..2923c7e5ea9bf 100644
  206. --- a/Cargo.toml 2022-05-31 11:15:47.681941501 +0800
  207. +++ b/Cargo.toml 2022-05-31 11:26:35.076132533 +0800
  208. @@ -149,7 +149,6 @@
  209. fog = { path = "toolkit/components/glean/api" }
  210. libudev-sys = { path = "dom/webauthn/libudev-sys" }
  211. packed_simd = { package = "packed_simd_2", git = "https://github.com/hsivonen/packed_simd", rev="412f9a0aa556611de021bde89dee8fefe6e0fbbd" }
  212. -midir = { git = "https://github.com/mozilla/midir.git", rev = "e1b4dcb767f9e69afe95a860374aaa9635d81e3d" }
  213. minidump_writer_linux = { git = "https://github.com/rust-minidump/minidump-writer.git", rev = "75ada456c92a429704691a85e1cb42fef8cafc0d" }
  214. # application-services overrides to make updating them all simpler.
  215. diff --git a/python/mozbuild/mozbuild/vendor/vendor_rust.py b/python/mozbuild/mozbuild/vendor/vendor_rust.py
  216. index 31baea4290..7394ccaf40 100644
  217. --- a/python/mozbuild/mozbuild/vendor/vendor_rust.py
  218. +++ b/python/mozbuild/mozbuild/vendor/vendor_rust.py
  219. @@ -98,6 +98,7 @@ TOLERATED_DUPES = {
  220. "libloading": 2,
  221. "memoffset": 2,
  222. "mio": 2,
  223. + "nix": 2,
  224. # Transition from time 0.1 to 0.3 underway, but chrono is stuck on 0.1
  225. # and hasn't been updated in 1.5 years (an hypothetical update is
  226. # expected to remove the dependency on time altogether).
  227. --- a/dom/midi/midir_impl/Cargo.toml 2022-08-30 01:32:46.905420566 +0800
  228. +++ b/dom/midi/midir_impl/Cargo.toml 2022-08-30 01:33:08.125466847 +0800
  229. @@ -7,7 +7,7 @@
  230. # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
  231. [dependencies]
  232. -midir = "0.7.0"
  233. +midir = "0.8.0"
  234. nsstring = { path = "../../../xpcom/rust/nsstring/" }
  235. uuid = { version = "0.8", features = ["v4"] }
  236. thin-vec = { version = "0.2.1", features = ["gecko-ffi"] }
  237. --- a/toolkit/library/rust/shared/Cargo.toml 2022-08-30 01:32:51.372097505 +0800
  238. +++ b/toolkit/library/rust/shared/Cargo.toml 2022-08-30 01:33:57.192217018 +0800
  239. @@ -39,7 +39,7 @@
  240. # audioipc2-client and audioipc2-server.
  241. tokio-threadpool = { version = "=0.1.17", optional = true }
  242. encoding_glue = { path = "../../../../intl/encoding_glue" }
  243. -authenticator = "0.3.1"
  244. +authenticator = { git = "https://github.com/mozilla/authenticator-rs", rev = "b85bccf0527e42c877573029e8d35ff13ef06f9d" }
  245. gkrust_utils = { path = "../../../../xpcom/rust/gkrust_utils" }
  246. gecko_logger = { path = "../../../../xpcom/rust/gecko_logger" }
  247. rsdparsa_capi = { path = "../../../../dom/media/webrtc/sdp/rsdparsa_capi" }
  248. @@ -75,6 +75,7 @@
  249. jog = { path = "../../../components/glean/bindings/jog" }
  250. dap_ffi = { path = "../../../components/telemetry/dap/ffi" }
  251. data-encoding-ffi = { path = "../../../../dom/fs/parent/rust/data-encoding-ffi" }
  252. +midir = { version = "0.8.0" }
  253. uniffi-example-arithmetic = { git = "https://github.com/mozilla/uniffi-rs.git", rev = "bb2039f077a29dba0879372a67e764e6ace8e33f", optional = true }
  254. uniffi-example-geometry = { git = "https://github.com/mozilla/uniffi-rs.git", rev = "bb2039f077a29dba0879372a67e764e6ace8e33f", optional = true }
  255. uniffi-example-rondpoint = { git = "https://github.com/mozilla/uniffi-rs.git", rev = "bb2039f077a29dba0879372a67e764e6ace8e33f", optional = true }
  256. # Note: `modern_sqlite` means rusqlite's bindings file be for a sqlite with
  257. # version less than or equal to what we link to. This isn't a problem because we
  258. From 0475f4a69df2437d4809ae7419b221f54b554f71 Mon Sep 17 00:00:00 2001
  259. From: Makoto Kato <m_kato@ga2.so-net.ne.jp>
  260. Date: Wed, 16 Feb 2022 23:41:23 +0900
  261. Subject: [PATCH] Add JIT skelton
  262. ---
  263. js/moz.configure | 2 +
  264. js/src/jit/Assembler.h | 2 +
  265. js/src/jit/CodeGenerator.h | 2 +
  266. js/src/jit/LIR.h | 2 +
  267. js/src/jit/Lowering.h | 2 +
  268. js/src/jit/MacroAssembler.h | 2 +
  269. js/src/jit/MoveEmitter.h | 2 +
  270. js/src/jit/Registers.h | 2 +
  271. js/src/jit/SharedICHelpers-inl.h | 2 +
  272. js/src/jit/SharedICHelpers.h | 2 +
  273. js/src/jit/SharedICRegisters.h | 2 +
  274. js/src/jit/moz.build | 2 +
  275. js/src/jit/riscv64/Architecture-riscv64.h | 171 +++++++
  276. js/src/jit/riscv64/Assembler-riscv64.h | 200 ++++++++
  277. js/src/jit/riscv64/CodeGenerator-riscv64.h | 78 +++
  278. js/src/jit/riscv64/LIR-riscv64.h | 111 +++++
  279. js/src/jit/riscv64/Lowering-riscv64.h | 130 +++++
  280. js/src/jit/riscv64/MacroAssembler-riscv64.h | 458 ++++++++++++++++++
  281. js/src/jit/riscv64/MoveEmitter-riscv64.h | 32 ++
  282. .../jit/riscv64/SharedICHelpers-riscv64-inl.h | 34 ++
  283. js/src/jit/riscv64/SharedICHelpers-riscv64.h | 32 ++
  284. .../jit/riscv64/SharedICRegisters-riscv64.h | 38 ++
  285. js/src/jit/riscv64/Trampoline-riscv64.cpp | 67 +++
  286. 23 files changed, 1375 insertions(+)
  287. create mode 100644 js/src/jit/riscv64/Architecture-riscv64.h
  288. create mode 100644 js/src/jit/riscv64/Assembler-riscv64.h
  289. create mode 100644 js/src/jit/riscv64/CodeGenerator-riscv64.h
  290. create mode 100644 js/src/jit/riscv64/LIR-riscv64.h
  291. create mode 100644 js/src/jit/riscv64/Lowering-riscv64.h
  292. create mode 100644 js/src/jit/riscv64/MacroAssembler-riscv64.h
  293. create mode 100644 js/src/jit/riscv64/MoveEmitter-riscv64.h
  294. create mode 100644 js/src/jit/riscv64/SharedICHelpers-riscv64-inl.h
  295. create mode 100644 js/src/jit/riscv64/SharedICHelpers-riscv64.h
  296. create mode 100644 js/src/jit/riscv64/SharedICRegisters-riscv64.h
  297. create mode 100644 js/src/jit/riscv64/Trampoline-riscv64.cpp
  298. diff --git a/js/moz.configure b/js/moz.configure
  299. index 0213f0b4b2718..42184e9358f38 100644
  300. --- a/js/moz.configure 2022-09-19 14:47:19.124047241 +0800
  301. +++ b/js/moz.configure 2022-09-19 15:03:42.545608473 +0800
  302. @@ -262,6 +262,7 @@
  303. set_config("JS_CODEGEN_MIPS32", jit_codegen.mips32)
  304. set_config("JS_CODEGEN_MIPS64", jit_codegen.mips64)
  305. set_config("JS_CODEGEN_LOONG64", jit_codegen.loong64)
  306. +set_config("JS_CODEGEN_RISCV64", jit_codegen.riscv64)
  307. set_config("JS_CODEGEN_X86", jit_codegen.x86)
  308. set_config("JS_CODEGEN_X64", jit_codegen.x64)
  309. set_config("JS_CODEGEN_WASM32", jit_codegen.wasm32)
  310. @@ -271,6 +272,7 @@
  311. set_define("JS_CODEGEN_MIPS32", jit_codegen.mips32)
  312. set_define("JS_CODEGEN_MIPS64", jit_codegen.mips64)
  313. set_define("JS_CODEGEN_LOONG64", jit_codegen.loong64)
  314. +set_define("JS_CODEGEN_RISCV64", jit_codegen.riscv64)
  315. set_define("JS_CODEGEN_X86", jit_codegen.x86)
  316. set_define("JS_CODEGEN_X64", jit_codegen.x64)
  317. set_define("JS_CODEGEN_WASM32", jit_codegen.wasm32)
  318. diff --git a/js/src/jit/Assembler.h b/js/src/jit/Assembler.h
  319. index 5f80e658f923e..65c0eb48bd393 100644
  320. --- a/js/src/jit/Assembler.h
  321. +++ b/js/src/jit/Assembler.h
  322. @@ -21,6 +21,8 @@
  323. # include "jit/mips64/Assembler-mips64.h"
  324. #elif defined(JS_CODEGEN_LOONG64)
  325. # include "jit/loong64/Assembler-loong64.h"
  326. +#elif defined(JS_CODEGEN_RISCV64)
  327. +# include "jit/riscv64/Assembler-riscv64.h"
  328. #elif defined(JS_CODEGEN_WASM32)
  329. # include "jit/wasm32/Assembler-wasm32.h"
  330. #elif defined(JS_CODEGEN_NONE)
  331. diff --git a/js/src/jit/CodeGenerator.h b/js/src/jit/CodeGenerator.h
  332. index a1c58acd0a174..8338f5fc1f95d 100644
  333. --- a/js/src/jit/CodeGenerator.h
  334. +++ b/js/src/jit/CodeGenerator.h
  335. @@ -26,6 +26,8 @@
  336. # include "jit/mips64/CodeGenerator-mips64.h"
  337. #elif defined(JS_CODEGEN_LOONG64)
  338. # include "jit/loong64/CodeGenerator-loong64.h"
  339. +#elif defined(JS_CODEGEN_RISCV64)
  340. +# include "jit/riscv64/CodeGenerator-riscv64.h"
  341. #elif defined(JS_CODEGEN_WASM32)
  342. # include "jit/wasm32/CodeGenerator-wasm32.h"
  343. #elif defined(JS_CODEGEN_NONE)
  344. diff --git a/js/src/jit/LIR.h b/js/src/jit/LIR.h
  345. index c7946d6bef4ae..33baec8cb685f 100644
  346. --- a/js/src/jit/LIR.h
  347. +++ b/js/src/jit/LIR.h
  348. @@ -1933,6 +1933,8 @@
  349. # include "jit/mips64/LIR-mips64.h"
  350. # endif
  351. # include "jit/mips-shared/LIR-mips-shared.h"
  352. +#elif defined(JS_CODEGEN_RISCV64)
  353. +# include "jit/riscv64/LIR-riscv64.h"
  354. #elif defined(JS_CODEGEN_WASM32)
  355. # include "jit/wasm32/LIR-wasm32.h"
  356. #elif defined(JS_CODEGEN_NONE)
  357. diff --git a/js/src/jit/Lowering.h b/js/src/jit/Lowering.h
  358. index 079f57d97db06..a13805e648d87 100644
  359. --- a/js/src/jit/Lowering.h
  360. +++ b/js/src/jit/Lowering.h
  361. @@ -25,6 +25,8 @@
  362. # include "jit/mips64/Lowering-mips64.h"
  363. #elif defined(JS_CODEGEN_LOONG64)
  364. # include "jit/loong64/Lowering-loong64.h"
  365. +#elif defined(JS_CODEGEN_RISCV64)
  366. +# include "jit/riscv64/Lowering-riscv64.h"
  367. #elif defined(JS_CODEGEN_WASM32)
  368. # include "jit/wasm32/Lowering-wasm32.h"
  369. #elif defined(JS_CODEGEN_NONE)
  370. diff --git a/js/src/jit/MacroAssembler.h b/js/src/jit/MacroAssembler.h
  371. index d6953919a8c19..b7f1947430eae 100644
  372. --- a/js/src/jit/MacroAssembler.h
  373. +++ b/js/src/jit/MacroAssembler.h
  374. @@ -27,6 +27,8 @@
  375. # include "jit/mips64/MacroAssembler-mips64.h"
  376. #elif defined(JS_CODEGEN_LOONG64)
  377. # include "jit/loong64/MacroAssembler-loong64.h"
  378. +#elif defined(JS_CODEGEN_RISCV64)
  379. +# include "jit/riscv64/MacroAssembler-riscv64.h"
  380. #elif defined(JS_CODEGEN_WASM32)
  381. # include "jit/wasm32/MacroAssembler-wasm32.h"
  382. #elif defined(JS_CODEGEN_NONE)
  383. diff --git a/js/src/jit/MoveEmitter.h b/js/src/jit/MoveEmitter.h
  384. index 6c62c0561a5b1..256ec8a15ac2b 100644
  385. --- a/js/src/jit/MoveEmitter.h
  386. +++ b/js/src/jit/MoveEmitter.h
  387. @@ -19,6 +19,8 @@
  388. # include "jit/mips64/MoveEmitter-mips64.h"
  389. #elif defined(JS_CODEGEN_LOONG64)
  390. # include "jit/loong64/MoveEmitter-loong64.h"
  391. +#elif defined(JS_CODEGEN_RISCV64)
  392. +# include "jit/riscv64/MoveEmitter-riscv64.h"
  393. #elif defined(JS_CODEGEN_WASM32)
  394. # include "jit/wasm32/MoveEmitter-wasm32.h"
  395. #elif defined(JS_CODEGEN_NONE)
  396. diff --git a/js/src/jit/Registers.h b/js/src/jit/Registers.h
  397. index 67c8661004d4e..70b73ecb556b0 100644
  398. --- a/js/src/jit/Registers.h
  399. +++ b/js/src/jit/Registers.h
  400. @@ -22,6 +22,8 @@
  401. # include "jit/mips64/Architecture-mips64.h"
  402. #elif defined(JS_CODEGEN_LOONG64)
  403. # include "jit/loong64/Architecture-loong64.h"
  404. +#elif defined(JS_CODEGEN_RISCV64)
  405. +# include "jit/riscv64/Architecture-riscv64.h"
  406. #elif defined(JS_CODEGEN_WASM32)
  407. # include "jit/wasm32/Architecture-wasm32.h"
  408. #elif defined(JS_CODEGEN_NONE)
  409. diff --git a/js/src/jit/SharedICHelpers-inl.h b/js/src/jit/SharedICHelpers-inl.h
  410. index 901c80cdd8591..d62c17bc2a9d4 100644
  411. --- a/js/src/jit/SharedICHelpers-inl.h
  412. +++ b/js/src/jit/SharedICHelpers-inl.h
  413. @@ -20,6 +20,8 @@
  414. #elif defined(JS_CODEGEN_LOONG64)
  415. # include "jit/loong64/SharedICHelpers-loong64-inl.h"
  416. #elif defined(JS_CODEGEN_WASM32)
  417. +#elif defined(JS_CODEGEN_RISCV64)
  418. +# include "jit/riscv64/SharedICHelpers-riscv64-inl.h"
  419. # include "jit/wasm32/SharedICHelpers-wasm32-inl.h"
  420. #elif defined(JS_CODEGEN_NONE)
  421. # include "jit/none/SharedICHelpers-none-inl.h"
  422. diff --git a/js/src/jit/SharedICHelpers.h b/js/src/jit/SharedICHelpers.h
  423. index 563cae3ccfe4e..0d95439a10d96 100644
  424. --- a/js/src/jit/SharedICHelpers.h
  425. +++ b/js/src/jit/SharedICHelpers.h
  426. @@ -19,6 +19,8 @@
  427. # include "jit/mips-shared/SharedICHelpers-mips-shared.h"
  428. #elif defined(JS_CODEGEN_LOONG64)
  429. # include "jit/loong64/SharedICHelpers-loong64.h"
  430. +#elif defined(JS_CODEGEN_RISCV64)
  431. +# include "jit/riscv64/SharedICHelpers-riscv64.h"
  432. #elif defined(JS_CODEGEN_WASM32)
  433. # include "jit/wasm32/SharedICHelpers-wasm32.h"
  434. #elif defined(JS_CODEGEN_NONE)
  435. diff --git a/js/src/jit/SharedICRegisters.h b/js/src/jit/SharedICRegisters.h
  436. index c87e5f8408959..aee2f54602285 100644
  437. --- a/js/src/jit/SharedICRegisters.h
  438. +++ b/js/src/jit/SharedICRegisters.h
  439. @@ -21,6 +21,8 @@
  440. # include "jit/mips64/SharedICRegisters-mips64.h"
  441. #elif defined(JS_CODEGEN_LOONG64)
  442. # include "jit/loong64/SharedICRegisters-loong64.h"
  443. +#elif defined(JS_CODEGEN_RISCV64)
  444. +# include "jit/riscv64/SharedICRegisters-riscv64.h"
  445. #elif defined(JS_CODEGEN_WASM32)
  446. # include "jit/wasm32/SharedICRegisters-wasm32.h"
  447. #elif defined(JS_CODEGEN_NONE)
  448. diff --git a/js/src/jit/moz.build b/js/src/jit/moz.build
  449. index 60f6a4674ab92..ebb8f18b50d26 100644
  450. --- a/js/src/jit/moz.build
  451. +++ b/js/src/jit/moz.build
  452. @@ -212,6 +212,13 @@
  453. ]
  454. if CONFIG["JS_SIMULATOR_MIPS64"]:
  455. UNIFIED_SOURCES += ["mips64/Simulator-mips64.cpp"]
  456. +elif CONFIG["JS_CODEGEN_RISCV64"]:
  457. + UNIFIED_SOURCES += [
  458. + "riscv64/Assembler-riscv64.cpp",
  459. + "riscv64/Trampoline-riscv64.cpp",
  460. + ]
  461. + if CONFIG["JS_SIMULATOR_RISC64"]:
  462. + UNIFIED_SOURCES += ["riscv64/Simulator-riscv64.cpp"]
  463. elif CONFIG["JS_CODEGEN_LOONG64"]:
  464. UNIFIED_SOURCES += [
  465. "loong64/Architecture-loong64.cpp",
  466. diff --git a/js/src/jit/riscv64/Architecture-riscv64.h b/js/src/jit/riscv64/Architecture-riscv64.h
  467. new file mode 100644
  468. index 0000000000000..3a4a25205bcd1
  469. --- /dev/null
  470. +++ b/js/src/jit/riscv64/Architecture-riscv64.h
  471. @@ -0,0 +1,171 @@
  472. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  473. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  474. + * This Source Code Form is subject to the terms of the Mozilla Public
  475. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  476. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  477. +
  478. +#ifndef jit_riscv64_Architecture_riscv64_h
  479. +#define jit_riscv64_Architecture_riscv64_h
  480. +
  481. +// JitSpewer.h is included through MacroAssembler implementations for other
  482. +// platforms, so include it here to avoid inadvertent build bustage.
  483. +#include "jit/JitSpewer.h"
  484. +
  485. +#include "jit/shared/Architecture-shared.h"
  486. +
  487. +namespace js {
  488. +namespace jit {
  489. +
  490. +static const uint32_t SimdMemoryAlignment =
  491. + 4; // Make it 4 to avoid a bunch of div-by-zero warnings
  492. +static const uint32_t WasmStackAlignment = 8;
  493. +static const uint32_t WasmTrapInstructionLength = 0;
  494. +
  495. +// See comments in wasm::GenerateFunctionPrologue.
  496. +static constexpr uint32_t WasmCheckedCallEntryOffset = 0u;
  497. +static constexpr uint32_t WasmCheckedTailEntryOffset = 1u;
  498. +
  499. +class Registers {
  500. + public:
  501. + enum RegisterID {
  502. + r0 = 0,
  503. + invalid_reg,
  504. + invalid_reg2, // To avoid silly static_assert failures.
  505. + };
  506. + typedef uint8_t Code;
  507. + typedef RegisterID Encoding;
  508. + union RegisterContent {
  509. + uintptr_t r;
  510. + };
  511. +
  512. + typedef uint8_t SetType;
  513. +
  514. + static uint32_t SetSize(SetType) { MOZ_CRASH(); }
  515. + static uint32_t FirstBit(SetType) { MOZ_CRASH(); }
  516. + static uint32_t LastBit(SetType) { MOZ_CRASH(); }
  517. + static const char* GetName(Code) { MOZ_CRASH(); }
  518. + static Code FromName(const char*) { MOZ_CRASH(); }
  519. +
  520. + static const Encoding StackPointer = invalid_reg;
  521. + static const Encoding Invalid = invalid_reg;
  522. + static const uint32_t Total = 1;
  523. + static const uint32_t TotalPhys = 0;
  524. + static const uint32_t Allocatable = 0;
  525. + static const SetType AllMask = 0;
  526. + static const SetType ArgRegMask = 0;
  527. + static const SetType VolatileMask = 0;
  528. + static const SetType NonVolatileMask = 0;
  529. + static const SetType NonAllocatableMask = 0;
  530. + static const SetType AllocatableMask = 0;
  531. + static const SetType JSCallMask = 0;
  532. + static const SetType CallMask = 0;
  533. +};
  534. +
  535. +typedef uint8_t PackedRegisterMask;
  536. +
  537. +class FloatRegisters {
  538. + public:
  539. + enum FPRegisterID { f0 = 0, invalid_reg };
  540. + typedef FPRegisterID Code;
  541. + typedef FPRegisterID Encoding;
  542. + union RegisterContent {
  543. + double d;
  544. + };
  545. +
  546. + typedef uint32_t SetType;
  547. +
  548. + static const char* GetName(Code) { MOZ_CRASH(); }
  549. + static Code FromName(const char*) { MOZ_CRASH(); }
  550. +
  551. + static const Code Invalid = invalid_reg;
  552. + static const uint32_t Total = 0;
  553. + static const uint32_t TotalPhys = 0;
  554. + static const uint32_t Allocatable = 0;
  555. + static const SetType AllMask = 0;
  556. + static const SetType AllDoubleMask = 0;
  557. + static const SetType AllSingleMask = 0;
  558. + static const SetType VolatileMask = 0;
  559. + static const SetType NonVolatileMask = 0;
  560. + static const SetType NonAllocatableMask = 0;
  561. + static const SetType AllocatableMask = 0;
  562. +};
  563. +
  564. +template <typename T>
  565. +class TypedRegisterSet;
  566. +
  567. +struct FloatRegister {
  568. + typedef FloatRegisters Codes;
  569. + typedef Codes::Code Code;
  570. + typedef Codes::Encoding Encoding;
  571. + typedef Codes::SetType SetType;
  572. +
  573. + Code _;
  574. +
  575. + static uint32_t FirstBit(SetType) { MOZ_CRASH(); }
  576. + static uint32_t LastBit(SetType) { MOZ_CRASH(); }
  577. + static FloatRegister FromCode(uint32_t) { MOZ_CRASH(); }
  578. + bool isSingle() const { MOZ_CRASH(); }
  579. + bool isDouble() const { MOZ_CRASH(); }
  580. + bool isSimd128() const { MOZ_CRASH(); }
  581. + bool isInvalid() const { MOZ_CRASH(); }
  582. + FloatRegister asSingle() const { MOZ_CRASH(); }
  583. + FloatRegister asDouble() const { MOZ_CRASH(); }
  584. + FloatRegister asSimd128() const { MOZ_CRASH(); }
  585. + Code code() const { MOZ_CRASH(); }
  586. + Encoding encoding() const { MOZ_CRASH(); }
  587. + const char* name() const { MOZ_CRASH(); }
  588. + bool volatile_() const { MOZ_CRASH(); }
  589. + bool operator!=(FloatRegister) const { MOZ_CRASH(); }
  590. + bool operator==(FloatRegister) const { MOZ_CRASH(); }
  591. + bool aliases(FloatRegister) const { MOZ_CRASH(); }
  592. + uint32_t numAliased() const { MOZ_CRASH(); }
  593. + FloatRegister aliased(uint32_t) { MOZ_CRASH(); }
  594. + bool equiv(FloatRegister) const { MOZ_CRASH(); }
  595. + uint32_t size() const { MOZ_CRASH(); }
  596. + uint32_t numAlignedAliased() const { MOZ_CRASH(); }
  597. + FloatRegister alignedAliased(uint32_t) { MOZ_CRASH(); }
  598. + SetType alignedOrDominatedAliasedSet() const { MOZ_CRASH(); }
  599. +
  600. + static constexpr RegTypeName DefaultType = RegTypeName::Float64;
  601. +
  602. + template <RegTypeName = DefaultType>
  603. + static SetType LiveAsIndexableSet(SetType s) {
  604. + return SetType(0);
  605. + }
  606. +
  607. + template <RegTypeName Name = DefaultType>
  608. + static SetType AllocatableAsIndexableSet(SetType s) {
  609. + static_assert(Name != RegTypeName::Any, "Allocatable set are not iterable");
  610. + return SetType(0);
  611. + }
  612. +
  613. + template <typename T>
  614. + static T ReduceSetForPush(T) {
  615. + MOZ_CRASH();
  616. + }
  617. + uint32_t getRegisterDumpOffsetInBytes() { MOZ_CRASH(); }
  618. + static uint32_t SetSize(SetType x) { MOZ_CRASH(); }
  619. + static Code FromName(const char* name) { MOZ_CRASH(); }
  620. +
  621. + // This is used in static initializers, so produce a bogus value instead of
  622. + // crashing.
  623. + static uint32_t GetPushSizeInBytes(const TypedRegisterSet<FloatRegister>&) {
  624. + return 0;
  625. + }
  626. +};
  627. +
  628. +inline bool hasUnaliasedDouble() { MOZ_CRASH(); }
  629. +inline bool hasMultiAlias() { MOZ_CRASH(); }
  630. +
  631. +static const uint32_t ShadowStackSpace = 0;
  632. +static const uint32_t JumpImmediateRange = INT32_MAX;
  633. +
  634. +#ifdef JS_NUNBOX32
  635. +static const int32_t NUNBOX32_TYPE_OFFSET = 4;
  636. +static const int32_t NUNBOX32_PAYLOAD_OFFSET = 0;
  637. +#endif
  638. +
  639. +} // namespace jit
  640. +} // namespace js
  641. +
  642. +#endif /* jit_riscv64_Architecture_riscv64_h */
  643. diff --git a/js/src/jit/riscv64/Assembler-riscv64.h b/js/src/jit/riscv64/Assembler-riscv64.h
  644. new file mode 100644
  645. index 0000000000000..55b0d3436b3d6
  646. --- /dev/null
  647. +++ b/js/src/jit/riscv64/Assembler-riscv64.h
  648. @@ -0,0 +1,200 @@
  649. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  650. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  651. + * This Source Code Form is subject to the terms of the Mozilla Public
  652. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  653. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  654. +
  655. +#ifndef jit_riscv64_Assembler_riscv64_h
  656. +#define jit_riscv64_Assembler_riscv64_h
  657. +
  658. +#include "mozilla/Assertions.h"
  659. +
  660. +#include <stdint.h>
  661. +
  662. +#include "jit/riscv64/Architecture-riscv64.h"
  663. +#include "jit/Registers.h"
  664. +#include "jit/RegisterSets.h"
  665. +#include "jit/shared/Assembler-shared.h"
  666. +
  667. +namespace js {
  668. +namespace jit {
  669. +
  670. +class MacroAssembler;
  671. +
  672. +static constexpr Register StackPointer{Registers::invalid_reg};
  673. +static constexpr Register FramePointer{Registers::invalid_reg};
  674. +static constexpr Register ReturnReg{Registers::invalid_reg2};
  675. +static constexpr FloatRegister ReturnFloat32Reg = {FloatRegisters::invalid_reg};
  676. +static constexpr FloatRegister ReturnDoubleReg = {FloatRegisters::invalid_reg};
  677. +static constexpr FloatRegister ReturnSimd128Reg = {FloatRegisters::invalid_reg};
  678. +static constexpr FloatRegister ScratchSimd128Reg = {
  679. + FloatRegisters::invalid_reg};
  680. +static constexpr FloatRegister InvalidFloatReg = {FloatRegisters::invalid_reg};
  681. +
  682. +struct ScratchFloat32Scope : FloatRegister {
  683. + explicit ScratchFloat32Scope(MacroAssembler& masm) {}
  684. +};
  685. +
  686. +struct ScratchDoubleScope : FloatRegister {
  687. + explicit ScratchDoubleScope(MacroAssembler& masm) {}
  688. +};
  689. +
  690. +static constexpr Register OsrFrameReg{Registers::invalid_reg};
  691. +static constexpr Register PreBarrierReg{Registers::invalid_reg};
  692. +static constexpr Register InterpreterPCReg{Registers::invalid_reg};
  693. +static constexpr Register CallTempReg0{Registers::invalid_reg};
  694. +static constexpr Register CallTempReg1{Registers::invalid_reg};
  695. +static constexpr Register CallTempReg2{Registers::invalid_reg};
  696. +static constexpr Register CallTempReg3{Registers::invalid_reg};
  697. +static constexpr Register CallTempReg4{Registers::invalid_reg};
  698. +static constexpr Register CallTempReg5{Registers::invalid_reg};
  699. +static constexpr Register InvalidReg{Registers::invalid_reg};
  700. +static constexpr Register CallTempNonArgRegs[] = {InvalidReg, InvalidReg};
  701. +static const uint32_t NumCallTempNonArgRegs = std::size(CallTempNonArgRegs);
  702. +
  703. +static constexpr Register IntArgReg0{Registers::invalid_reg};
  704. +static constexpr Register IntArgReg1{Registers::invalid_reg};
  705. +static constexpr Register IntArgReg2{Registers::invalid_reg};
  706. +static constexpr Register IntArgReg3{Registers::invalid_reg};
  707. +static constexpr Register HeapReg{Registers::invalid_reg};
  708. +
  709. +static constexpr Register RegExpTesterRegExpReg{Registers::invalid_reg};
  710. +static constexpr Register RegExpTesterStringReg{Registers::invalid_reg};
  711. +static constexpr Register RegExpTesterLastIndexReg{Registers::invalid_reg};
  712. +static constexpr Register RegExpTesterStickyReg{Registers::invalid_reg};
  713. +
  714. +static constexpr Register RegExpMatcherRegExpReg{Registers::invalid_reg};
  715. +static constexpr Register RegExpMatcherStringReg{Registers::invalid_reg};
  716. +static constexpr Register RegExpMatcherLastIndexReg{Registers::invalid_reg};
  717. +static constexpr Register RegExpMatcherStickyReg{Registers::invalid_reg};
  718. +
  719. +// Uses |invalid_reg2| to avoid static_assert failures.
  720. +static constexpr Register JSReturnReg_Type{Registers::invalid_reg2};
  721. +static constexpr Register JSReturnReg_Data{Registers::invalid_reg2};
  722. +static constexpr Register JSReturnReg{Registers::invalid_reg2};
  723. +
  724. +static constexpr ValueOperand JSReturnOperand(InvalidReg);
  725. +static constexpr Register64 ReturnReg64(InvalidReg);
  726. +
  727. +static constexpr Register ABINonArgReg0{Registers::invalid_reg};
  728. +static constexpr Register ABINonArgReg1{Registers::invalid_reg};
  729. +static constexpr Register ABINonArgReg2{Registers::invalid_reg};
  730. +static constexpr Register ABINonArgReg3{Registers::invalid_reg};
  731. +static constexpr Register ABINonArgReturnReg0{Registers::invalid_reg};
  732. +static constexpr Register ABINonArgReturnReg1{Registers::invalid_reg};
  733. +static constexpr Register ABINonVolatileReg{Registers::invalid_reg};
  734. +static constexpr Register ABINonArgReturnVolatileReg{Registers::invalid_reg};
  735. +
  736. +static constexpr FloatRegister ABINonArgDoubleReg = {
  737. + FloatRegisters::invalid_reg};
  738. +
  739. +static constexpr Register WasmTableCallScratchReg0{Registers::invalid_reg};
  740. +static constexpr Register WasmTableCallScratchReg1{Registers::invalid_reg};
  741. +static constexpr Register WasmTableCallSigReg{Registers::invalid_reg};
  742. +static constexpr Register WasmTableCallIndexReg{Registers::invalid_reg};
  743. +static constexpr Register WasmTlsReg{Registers::invalid_reg};
  744. +static constexpr Register WasmJitEntryReturnScratch{Registers::invalid_reg};
  745. +
  746. +static constexpr uint32_t ABIStackAlignment = 4;
  747. +static constexpr uint32_t CodeAlignment = 16;
  748. +static constexpr uint32_t JitStackAlignment = 8;
  749. +static constexpr uint32_t JitStackValueAlignment =
  750. + JitStackAlignment / sizeof(Value);
  751. +
  752. +static const Scale ScalePointer = TimesOne;
  753. +
  754. +class Assembler : public AssemblerShared {
  755. + public:
  756. + enum Condition {
  757. + Equal,
  758. + NotEqual,
  759. + Above,
  760. + AboveOrEqual,
  761. + Below,
  762. + BelowOrEqual,
  763. + GreaterThan,
  764. + GreaterThanOrEqual,
  765. + LessThan,
  766. + LessThanOrEqual,
  767. + Overflow,
  768. + CarrySet,
  769. + CarryClear,
  770. + Signed,
  771. + NotSigned,
  772. + Zero,
  773. + NonZero,
  774. + Always,
  775. + };
  776. +
  777. + enum DoubleCondition {
  778. + DoubleOrdered,
  779. + DoubleEqual,
  780. + DoubleNotEqual,
  781. + DoubleGreaterThan,
  782. + DoubleGreaterThanOrEqual,
  783. + DoubleLessThan,
  784. + DoubleLessThanOrEqual,
  785. + DoubleUnordered,
  786. + DoubleEqualOrUnordered,
  787. + DoubleNotEqualOrUnordered,
  788. + DoubleGreaterThanOrUnordered,
  789. + DoubleGreaterThanOrEqualOrUnordered,
  790. + DoubleLessThanOrUnordered,
  791. + DoubleLessThanOrEqualOrUnordered
  792. + };
  793. +
  794. + static Condition InvertCondition(Condition) { MOZ_CRASH(); }
  795. +
  796. + static DoubleCondition InvertCondition(DoubleCondition) { MOZ_CRASH(); }
  797. +
  798. + template <typename T, typename S>
  799. + static void PatchDataWithValueCheck(CodeLocationLabel, T, S) {
  800. + MOZ_CRASH();
  801. + }
  802. + static void PatchWrite_Imm32(CodeLocationLabel, Imm32) { MOZ_CRASH(); }
  803. +
  804. + static void PatchWrite_NearCall(CodeLocationLabel, CodeLocationLabel) {
  805. + MOZ_CRASH();
  806. + }
  807. + static uint32_t PatchWrite_NearCallSize() { MOZ_CRASH(); }
  808. +
  809. + static void ToggleToJmp(CodeLocationLabel) { MOZ_CRASH(); }
  810. + static void ToggleToCmp(CodeLocationLabel) { MOZ_CRASH(); }
  811. + static void ToggleCall(CodeLocationLabel, bool) { MOZ_CRASH(); }
  812. +
  813. + static void Bind(uint8_t*, const CodeLabel&) { MOZ_CRASH(); }
  814. +
  815. + static uintptr_t GetPointer(uint8_t*) { MOZ_CRASH(); }
  816. +
  817. + static bool HasRoundInstruction(RoundingMode) { return false; }
  818. +
  819. + void verifyHeapAccessDisassembly(uint32_t begin, uint32_t end,
  820. + const Disassembler::HeapAccess& heapAccess) {
  821. + MOZ_CRASH();
  822. + }
  823. +
  824. + void setUnlimitedBuffer() { MOZ_CRASH(); }
  825. +};
  826. +
  827. +class Operand {
  828. + public:
  829. + explicit Operand(const Address&) { MOZ_CRASH(); }
  830. + explicit Operand(const Register) { MOZ_CRASH(); }
  831. + explicit Operand(const FloatRegister) { MOZ_CRASH(); }
  832. + explicit Operand(Register, Imm32) { MOZ_CRASH(); }
  833. + explicit Operand(Register, int32_t) { MOZ_CRASH(); }
  834. +};
  835. +
  836. +class ABIArgGenerator {
  837. + public:
  838. + ABIArgGenerator() { MOZ_CRASH(); }
  839. + ABIArg next(MIRType) { MOZ_CRASH(); }
  840. + ABIArg& current() { MOZ_CRASH(); }
  841. + uint32_t stackBytesConsumedSoFar() const { MOZ_CRASH(); }
  842. + void increaseStackOffset(uint32_t) { MOZ_CRASH(); }
  843. +};
  844. +
  845. +} // namespace jit
  846. +} // namespace js
  847. +
  848. +#endif /* jit_riscv64_Assembler_riscv64_h */
  849. diff --git a/js/src/jit/riscv64/CodeGenerator-riscv64.h b/js/src/jit/riscv64/CodeGenerator-riscv64.h
  850. new file mode 100644
  851. index 0000000000000..db30b32283e42
  852. --- /dev/null
  853. +++ b/js/src/jit/riscv64/CodeGenerator-riscv64.h
  854. @@ -0,0 +1,78 @@
  855. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  856. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  857. + * This Source Code Form is subject to the terms of the Mozilla Public
  858. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  859. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  860. +
  861. +#ifndef jit_riscv64_CodeGenerator_riscv64_h
  862. +#define jit_riscv64_CodeGenerator_riscv64_h
  863. +
  864. +#include "jit/shared/CodeGenerator-shared.h"
  865. +
  866. +namespace js {
  867. +namespace jit {
  868. +
  869. +class CodeGeneratorRiscv64 : public CodeGeneratorShared {
  870. + protected:
  871. + CodeGeneratorRiscv64(MIRGenerator* gen, LIRGraph* graph, MacroAssembler* masm)
  872. + : CodeGeneratorShared(gen, graph, masm) {
  873. + MOZ_CRASH();
  874. + }
  875. +
  876. + MoveOperand toMoveOperand(LAllocation) const { MOZ_CRASH(); }
  877. + template <typename T1, typename T2>
  878. + void bailoutCmp32(Assembler::Condition, T1, T2, LSnapshot*) {
  879. + MOZ_CRASH();
  880. + }
  881. + template <typename T1, typename T2>
  882. + void bailoutTest32(Assembler::Condition, T1, T2, LSnapshot*) {
  883. + MOZ_CRASH();
  884. + }
  885. + template <typename T1, typename T2>
  886. + void bailoutCmpPtr(Assembler::Condition, T1, T2, LSnapshot*) {
  887. + MOZ_CRASH();
  888. + }
  889. + void bailoutTestPtr(Assembler::Condition, Register, Register, LSnapshot*) {
  890. + MOZ_CRASH();
  891. + }
  892. + void bailoutIfFalseBool(Register, LSnapshot*) { MOZ_CRASH(); }
  893. + void bailoutFrom(Label*, LSnapshot*) { MOZ_CRASH(); }
  894. + void bailout(LSnapshot*) { MOZ_CRASH(); }
  895. + void bailoutIf(Assembler::Condition, LSnapshot*) { MOZ_CRASH(); }
  896. + bool generateOutOfLineCode() { MOZ_CRASH(); }
  897. + void testNullEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*,
  898. + MBasicBlock*) {
  899. + MOZ_CRASH();
  900. + }
  901. + void testUndefinedEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*,
  902. + MBasicBlock*) {
  903. + MOZ_CRASH();
  904. + }
  905. + void testObjectEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*,
  906. + MBasicBlock*) {
  907. + MOZ_CRASH();
  908. + }
  909. + void testZeroEmitBranch(Assembler::Condition, Register, MBasicBlock*,
  910. + MBasicBlock*) {
  911. + MOZ_CRASH();
  912. + }
  913. + void emitTableSwitchDispatch(MTableSwitch*, Register, Register) {
  914. + MOZ_CRASH();
  915. + }
  916. + void emitBigIntDiv(LBigIntDiv*, Register, Register, Register, Label*) {
  917. + MOZ_CRASH();
  918. + }
  919. + void emitBigIntMod(LBigIntMod*, Register, Register, Register, Label*) {
  920. + MOZ_CRASH();
  921. + }
  922. + ValueOperand ToValue(LInstruction*, size_t) { MOZ_CRASH(); }
  923. + ValueOperand ToTempValue(LInstruction*, size_t) { MOZ_CRASH(); }
  924. + void generateInvalidateEpilogue() { MOZ_CRASH(); }
  925. +};
  926. +
  927. +typedef CodeGeneratorRiscv64 CodeGeneratorSpecific;
  928. +
  929. +} // namespace jit
  930. +} // namespace js
  931. +
  932. +#endif /* jit_riscv64_CodeGenerator_riscv64_h */
  933. diff --git a/js/src/jit/riscv64/LIR-riscv64.h b/js/src/jit/riscv64/LIR-riscv64.h
  934. new file mode 100644
  935. index 0000000000000..59d42c6c75094
  936. --- /dev/null
  937. +++ b/js/src/jit/riscv64/LIR-riscv64.h
  938. @@ -0,0 +1,111 @@
  939. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  940. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  941. + * This Source Code Form is subject to the terms of the Mozilla Public
  942. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  943. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  944. +
  945. +#ifndef jit_riscv64_LIR_riscv64_h
  946. +#define jit_riscv64_LIR_riscv64_h
  947. +
  948. +namespace js {
  949. +namespace jit {
  950. +
  951. +class LUnboxFloatingPoint : public LInstruction {
  952. + public:
  953. + LIR_HEADER(UnboxFloatingPoint)
  954. + static const size_t Input = 0;
  955. +
  956. + MUnbox* mir() const { MOZ_CRASH(); }
  957. +
  958. + const LDefinition* output() const { MOZ_CRASH(); }
  959. + MIRType type() const { MOZ_CRASH(); }
  960. +};
  961. +
  962. +class LTableSwitch : public LInstruction {
  963. + public:
  964. + LIR_HEADER(TableSwitch)
  965. + MTableSwitch* mir() { MOZ_CRASH(); }
  966. +
  967. + const LAllocation* index() { MOZ_CRASH(); }
  968. + const LDefinition* tempInt() { MOZ_CRASH(); }
  969. + const LDefinition* tempPointer() { MOZ_CRASH(); }
  970. +};
  971. +
  972. +class LTableSwitchV : public LInstruction {
  973. + public:
  974. + LIR_HEADER(TableSwitchV)
  975. + MTableSwitch* mir() { MOZ_CRASH(); }
  976. +
  977. + const LDefinition* tempInt() { MOZ_CRASH(); }
  978. + const LDefinition* tempFloat() { MOZ_CRASH(); }
  979. + const LDefinition* tempPointer() { MOZ_CRASH(); }
  980. +
  981. + static const size_t InputValue = 0;
  982. +};
  983. +
  984. +class LWasmUint32ToFloat32 : public LInstructionHelper<1, 1, 0> {
  985. + public:
  986. + explicit LWasmUint32ToFloat32(const LAllocation&)
  987. + : LInstructionHelper(Opcode::Invalid) {
  988. + MOZ_CRASH();
  989. + }
  990. +};
  991. +
  992. +class LUnbox : public LInstructionHelper<1, 2, 0> {
  993. + public:
  994. + MUnbox* mir() const { MOZ_CRASH(); }
  995. + const LAllocation* payload() { MOZ_CRASH(); }
  996. + const LAllocation* type() { MOZ_CRASH(); }
  997. + const char* extraName() const { MOZ_CRASH(); }
  998. +};
  999. +class LDivI : public LBinaryMath<1> {
  1000. + public:
  1001. + LDivI(const LAllocation&, const LAllocation&, const LDefinition&)
  1002. + : LBinaryMath(Opcode::Invalid) {
  1003. + MOZ_CRASH();
  1004. + }
  1005. + MDiv* mir() const { MOZ_CRASH(); }
  1006. +};
  1007. +class LDivPowTwoI : public LInstructionHelper<1, 1, 0> {
  1008. + public:
  1009. + LDivPowTwoI(const LAllocation&, int32_t)
  1010. + : LInstructionHelper(Opcode::Invalid) {
  1011. + MOZ_CRASH();
  1012. + }
  1013. + const LAllocation* numerator() { MOZ_CRASH(); }
  1014. + int32_t shift() { MOZ_CRASH(); }
  1015. + MDiv* mir() const { MOZ_CRASH(); }
  1016. +};
  1017. +class LModI : public LBinaryMath<1> {
  1018. + public:
  1019. + LModI(const LAllocation&, const LAllocation&, const LDefinition&)
  1020. + : LBinaryMath(Opcode::Invalid) {
  1021. + MOZ_CRASH();
  1022. + }
  1023. +
  1024. + const LDefinition* callTemp() { MOZ_CRASH(); }
  1025. + MMod* mir() const { MOZ_CRASH(); }
  1026. +};
  1027. +class LWasmUint32ToDouble : public LInstructionHelper<1, 1, 0> {
  1028. + public:
  1029. + explicit LWasmUint32ToDouble(const LAllocation&)
  1030. + : LInstructionHelper(Opcode::Invalid) {
  1031. + MOZ_CRASH();
  1032. + }
  1033. +};
  1034. +class LModPowTwoI : public LInstructionHelper<1, 1, 0> {
  1035. + public:
  1036. + int32_t shift() { MOZ_CRASH(); }
  1037. + LModPowTwoI(const LAllocation& lhs, int32_t shift)
  1038. + : LInstructionHelper(Opcode::Invalid) {
  1039. + MOZ_CRASH();
  1040. + }
  1041. + MMod* mir() const { MOZ_CRASH(); }
  1042. +};
  1043. +
  1044. +class LMulI : public LInstruction {};
  1045. +
  1046. +} // namespace jit
  1047. +} // namespace js
  1048. +
  1049. +#endif /* jit_riscv64_LIR_riscv64_h */
  1050. diff --git a/js/src/jit/riscv64/Lowering-riscv64.h b/js/src/jit/riscv64/Lowering-riscv64.h
  1051. new file mode 100644
  1052. index 0000000000000..a68e52b87243f
  1053. --- /dev/null
  1054. +++ b/js/src/jit/riscv64/Lowering-riscv64.h
  1055. @@ -0,0 +1,130 @@
  1056. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  1057. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  1058. + * This Source Code Form is subject to the terms of the Mozilla Public
  1059. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  1060. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  1061. +
  1062. +#ifndef jit_riscv64_Lowering_riscv64_h
  1063. +#define jit_riscv64_Lowering_riscv64_h
  1064. +
  1065. +#include "jit/shared/Lowering-shared.h"
  1066. +
  1067. +namespace js {
  1068. +namespace jit {
  1069. +
  1070. +class LIRGeneratorRiscv64 : public LIRGeneratorShared {
  1071. + protected:
  1072. + LIRGeneratorRiscv64(MIRGenerator* gen, MIRGraph& graph, LIRGraph& lirGraph)
  1073. + : LIRGeneratorShared(gen, graph, lirGraph) {
  1074. + MOZ_CRASH();
  1075. + }
  1076. +
  1077. + LBoxAllocation useBoxFixed(MDefinition*, Register, Register,
  1078. + bool useAtStart = false) {
  1079. + MOZ_CRASH();
  1080. + }
  1081. +
  1082. + LAllocation useByteOpRegister(MDefinition*) { MOZ_CRASH(); }
  1083. + LAllocation useByteOpRegisterAtStart(MDefinition*) { MOZ_CRASH(); }
  1084. + LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition*) {
  1085. + MOZ_CRASH();
  1086. + }
  1087. + LDefinition tempByteOpRegister() { MOZ_CRASH(); }
  1088. + LDefinition tempToUnbox() { MOZ_CRASH(); }
  1089. + bool needTempForPostBarrier() { MOZ_CRASH(); }
  1090. + void lowerUntypedPhiInput(MPhi*, uint32_t, LBlock*, size_t) { MOZ_CRASH(); }
  1091. + void lowerInt64PhiInput(MPhi*, uint32_t, LBlock*, size_t) { MOZ_CRASH(); }
  1092. + void defineInt64Phi(MPhi*, size_t) { MOZ_CRASH(); }
  1093. + void lowerForShift(LInstructionHelper<1, 2, 0>*, MDefinition*, MDefinition*,
  1094. + MDefinition*) {
  1095. + MOZ_CRASH();
  1096. + }
  1097. + void lowerUrshD(MUrsh*) { MOZ_CRASH(); }
  1098. + void lowerPowOfTwoI(MPow*) { MOZ_CRASH(); }
  1099. + template <typename T>
  1100. + void lowerForALU(T, MDefinition*, MDefinition*, MDefinition* v = nullptr) {
  1101. + MOZ_CRASH();
  1102. + }
  1103. + template <typename T>
  1104. + void lowerForFPU(T, MDefinition*, MDefinition*, MDefinition* v = nullptr) {
  1105. + MOZ_CRASH();
  1106. + }
  1107. + template <typename T>
  1108. + void lowerForALUInt64(T, MDefinition*, MDefinition*,
  1109. + MDefinition* v = nullptr) {
  1110. + MOZ_CRASH();
  1111. + }
  1112. + void lowerForMulInt64(LMulI64*, MMul*, MDefinition*,
  1113. + MDefinition* v = nullptr) {
  1114. + MOZ_CRASH();
  1115. + }
  1116. + template <typename T>
  1117. + void lowerForShiftInt64(T, MDefinition*, MDefinition*,
  1118. + MDefinition* v = nullptr) {
  1119. + MOZ_CRASH();
  1120. + }
  1121. + void lowerForBitAndAndBranch(LBitAndAndBranch*, MInstruction*, MDefinition*,
  1122. + MDefinition*) {
  1123. + MOZ_CRASH();
  1124. + }
  1125. + void lowerForCompareI64AndBranch(MTest*, MCompare*, JSOp, MDefinition*,
  1126. + MDefinition*, MBasicBlock*, MBasicBlock*) {
  1127. + MOZ_CRASH();
  1128. + }
  1129. +
  1130. + void lowerConstantDouble(double, MInstruction*) { MOZ_CRASH(); }
  1131. + void lowerConstantFloat32(float, MInstruction*) { MOZ_CRASH(); }
  1132. + void lowerTruncateDToInt32(MTruncateToInt32*) { MOZ_CRASH(); }
  1133. + void lowerTruncateFToInt32(MTruncateToInt32*) { MOZ_CRASH(); }
  1134. + void lowerBuiltinInt64ToFloatingPoint(MBuiltinInt64ToFloatingPoint* ins) {
  1135. + MOZ_CRASH();
  1136. + }
  1137. + void lowerWasmBuiltinTruncateToInt64(MWasmBuiltinTruncateToInt64* ins) {
  1138. + MOZ_CRASH();
  1139. + }
  1140. + void lowerWasmBuiltinTruncateToInt32(MWasmBuiltinTruncateToInt32* ins) {
  1141. + MOZ_CRASH();
  1142. + }
  1143. + void lowerDivI(MDiv*) { MOZ_CRASH(); }
  1144. + void lowerModI(MMod*) { MOZ_CRASH(); }
  1145. + void lowerDivI64(MDiv*) { MOZ_CRASH(); }
  1146. + void lowerWasmBuiltinDivI64(MWasmBuiltinDivI64* div) { MOZ_CRASH(); }
  1147. + void lowerModI64(MMod*) { MOZ_CRASH(); }
  1148. + void lowerWasmBuiltinModI64(MWasmBuiltinModI64* mod) { MOZ_CRASH(); }
  1149. + void lowerNegI(MInstruction*, MDefinition*) { MOZ_CRASH(); }
  1150. + void lowerNegI64(MInstruction*, MDefinition*) { MOZ_CRASH(); }
  1151. + void lowerMulI(MMul*, MDefinition*, MDefinition*) { MOZ_CRASH(); }
  1152. + void lowerUDiv(MDiv*) { MOZ_CRASH(); }
  1153. + void lowerUMod(MMod*) { MOZ_CRASH(); }
  1154. + void lowerWasmSelectI(MWasmSelect* select) { MOZ_CRASH(); }
  1155. + void lowerWasmSelectI64(MWasmSelect* select) { MOZ_CRASH(); }
  1156. + void lowerWasmCompareAndSelect(MWasmSelect* ins, MDefinition* lhs,
  1157. + MDefinition* rhs, MCompare::CompareType compTy,
  1158. + JSOp jsop) {
  1159. + MOZ_CRASH();
  1160. + }
  1161. + bool canSpecializeWasmCompareAndSelect(MCompare::CompareType compTy,
  1162. + MIRType insTy) {
  1163. + MOZ_CRASH();
  1164. + }
  1165. +
  1166. + void lowerBigIntLsh(MBigIntLsh*) { MOZ_CRASH(); }
  1167. + void lowerBigIntRsh(MBigIntRsh*) { MOZ_CRASH(); }
  1168. + void lowerBigIntDiv(MBigIntDiv*) { MOZ_CRASH(); }
  1169. + void lowerBigIntMod(MBigIntMod*) { MOZ_CRASH(); }
  1170. +
  1171. + void lowerAtomicLoad64(MLoadUnboxedScalar*) { MOZ_CRASH(); }
  1172. + void lowerAtomicStore64(MStoreUnboxedScalar*) { MOZ_CRASH(); }
  1173. +
  1174. + LTableSwitch* newLTableSwitch(LAllocation, LDefinition, MTableSwitch*) {
  1175. + MOZ_CRASH();
  1176. + }
  1177. + LTableSwitchV* newLTableSwitchV(MTableSwitch*) { MOZ_CRASH(); }
  1178. +};
  1179. +
  1180. +typedef LIRGeneratorRiscv64 LIRGeneratorSpecific;
  1181. +
  1182. +} // namespace jit
  1183. +} // namespace js
  1184. +
  1185. +#endif /* jit_riscv64_Lowering_riscv64_h */
  1186. diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.h b/js/src/jit/riscv64/MacroAssembler-riscv64.h
  1187. new file mode 100644
  1188. index 0000000000000..a9265bb7bd44b
  1189. --- /dev/null
  1190. +++ b/js/src/jit/riscv64/MacroAssembler-riscv64.h
  1191. @@ -0,0 +1,458 @@
  1192. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  1193. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  1194. + * This Source Code Form is subject to the terms of the Mozilla Public
  1195. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  1196. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  1197. +
  1198. +#ifndef jit_riscv64_MacroAssembler_riscv64_h
  1199. +#define jit_riscv64_MacroAssembler_riscv64_h
  1200. +
  1201. +#include <iterator>
  1202. +
  1203. +#include "jit/MoveResolver.h"
  1204. +#include "jit/riscv64/Assembler-riscv64.h"
  1205. +#include "wasm/WasmTypeDecls.h"
  1206. +
  1207. +namespace js {
  1208. +namespace jit {
  1209. +
  1210. +class CompactBufferReader;
  1211. +
  1212. +class ScratchTagScope {
  1213. + public:
  1214. + ScratchTagScope(MacroAssembler&, const ValueOperand) {}
  1215. + operator Register() { MOZ_CRASH(); }
  1216. + void release() { MOZ_CRASH(); }
  1217. + void reacquire() { MOZ_CRASH(); }
  1218. +};
  1219. +
  1220. +class ScratchTagScopeRelease {
  1221. + public:
  1222. + explicit ScratchTagScopeRelease(ScratchTagScope*) {}
  1223. +};
  1224. +
  1225. +class MacroAssemblerRiscv64 : public Assembler {
  1226. + public:
  1227. + MacroAssemblerRiscv64() { MOZ_CRASH(); }
  1228. +
  1229. + MoveResolver moveResolver_;
  1230. +
  1231. + size_t size() const { MOZ_CRASH(); }
  1232. + size_t bytesNeeded() const { MOZ_CRASH(); }
  1233. + size_t jumpRelocationTableBytes() const { MOZ_CRASH(); }
  1234. + size_t dataRelocationTableBytes() const { MOZ_CRASH(); }
  1235. + size_t preBarrierTableBytes() const { MOZ_CRASH(); }
  1236. +
  1237. + size_t numCodeLabels() const { MOZ_CRASH(); }
  1238. + CodeLabel codeLabel(size_t) { MOZ_CRASH(); }
  1239. +
  1240. + bool reserve(size_t size) { MOZ_CRASH(); }
  1241. + bool appendRawCode(const uint8_t* code, size_t numBytes) { MOZ_CRASH(); }
  1242. + bool swapBuffer(wasm::Bytes& bytes) { MOZ_CRASH(); }
  1243. +
  1244. + void assertNoGCThings() const { MOZ_CRASH(); }
  1245. +
  1246. + static void TraceJumpRelocations(JSTracer*, JitCode*, CompactBufferReader&) {
  1247. + MOZ_CRASH();
  1248. + }
  1249. + static void TraceDataRelocations(JSTracer*, JitCode*, CompactBufferReader&) {
  1250. + MOZ_CRASH();
  1251. + }
  1252. +
  1253. + static bool SupportsFloatingPoint() { return false; }
  1254. + static bool SupportsUnalignedAccesses() { return false; }
  1255. + static bool SupportsFastUnalignedFPAccesses() { return false; }
  1256. +
  1257. + void executableCopy(void*, bool = true) { MOZ_CRASH(); }
  1258. + void copyJumpRelocationTable(uint8_t*) { MOZ_CRASH(); }
  1259. + void copyDataRelocationTable(uint8_t*) { MOZ_CRASH(); }
  1260. + void copyPreBarrierTable(uint8_t*) { MOZ_CRASH(); }
  1261. + void processCodeLabels(uint8_t*) { MOZ_CRASH(); }
  1262. +
  1263. + void flushBuffer() { MOZ_CRASH(); }
  1264. +
  1265. + template <typename T>
  1266. + void bind(T) {
  1267. + MOZ_CRASH();
  1268. + }
  1269. + template <typename T>
  1270. + void j(Condition, T) {
  1271. + MOZ_CRASH();
  1272. + }
  1273. + template <typename T>
  1274. + void jump(T) {
  1275. + MOZ_CRASH();
  1276. + }
  1277. + void writeCodePointer(CodeLabel* label) { MOZ_CRASH(); }
  1278. + void haltingAlign(size_t) { MOZ_CRASH(); }
  1279. + void nopAlign(size_t) { MOZ_CRASH(); }
  1280. + void checkStackAlignment() { MOZ_CRASH(); }
  1281. + uint32_t currentOffset() { MOZ_CRASH(); }
  1282. +
  1283. + void nop() { MOZ_CRASH(); }
  1284. + void breakpoint() { MOZ_CRASH(); }
  1285. + void abiret() { MOZ_CRASH(); }
  1286. + void ret() { MOZ_CRASH(); }
  1287. +
  1288. + CodeOffset toggledJump(Label*) { MOZ_CRASH(); }
  1289. + CodeOffset toggledCall(JitCode*, bool) { MOZ_CRASH(); }
  1290. + static size_t ToggledCallSize(uint8_t*) { MOZ_CRASH(); }
  1291. +
  1292. + void finish() { MOZ_CRASH(); }
  1293. +
  1294. + template <typename T, typename S>
  1295. + void moveValue(T, S) {
  1296. + MOZ_CRASH();
  1297. + }
  1298. + template <typename T, typename S, typename U>
  1299. + void moveValue(T, S, U) {
  1300. + MOZ_CRASH();
  1301. + }
  1302. + template <typename T, typename S>
  1303. + void storeValue(const T&, const S&) {
  1304. + MOZ_CRASH();
  1305. + }
  1306. + template <typename T, typename S, typename U>
  1307. + void storeValue(T, S, U) {
  1308. + MOZ_CRASH();
  1309. + }
  1310. + template <typename T, typename S>
  1311. + void storePrivateValue(const T&, const S&) {
  1312. + MOZ_CRASH();
  1313. + }
  1314. + template <typename T, typename S>
  1315. + void loadValue(T, S) {
  1316. + MOZ_CRASH();
  1317. + }
  1318. + template <typename T, typename S>
  1319. + void loadUnalignedValue(T, S) {
  1320. + MOZ_CRASH();
  1321. + }
  1322. + template <typename T>
  1323. + void pushValue(const T&) {
  1324. + MOZ_CRASH();
  1325. + }
  1326. + template <typename T, typename S>
  1327. + void pushValue(T, S) {
  1328. + MOZ_CRASH();
  1329. + }
  1330. + void popValue(ValueOperand) { MOZ_CRASH(); }
  1331. + void tagValue(JSValueType, Register, ValueOperand) { MOZ_CRASH(); }
  1332. + void retn(Imm32 n) { MOZ_CRASH(); }
  1333. + template <typename T>
  1334. + void push(const T&) {
  1335. + MOZ_CRASH();
  1336. + }
  1337. + template <typename T>
  1338. + void Push(T) {
  1339. + MOZ_CRASH();
  1340. + }
  1341. + template <typename T>
  1342. + void pop(T) {
  1343. + MOZ_CRASH();
  1344. + }
  1345. + template <typename T>
  1346. + void Pop(T) {
  1347. + MOZ_CRASH();
  1348. + }
  1349. + template <typename T>
  1350. + CodeOffset pushWithPatch(T) {
  1351. + MOZ_CRASH();
  1352. + }
  1353. +
  1354. + void testNullSet(Condition, ValueOperand, Register) { MOZ_CRASH(); }
  1355. + void testObjectSet(Condition, ValueOperand, Register) { MOZ_CRASH(); }
  1356. + void testUndefinedSet(Condition, ValueOperand, Register) { MOZ_CRASH(); }
  1357. +
  1358. + template <typename T, typename S>
  1359. + void cmpPtrSet(Condition, T, S, Register) {
  1360. + MOZ_CRASH();
  1361. + }
  1362. + void cmp8Set(Condition, Address, Imm32, Register) { MOZ_CRASH(); }
  1363. + void cmp16Set(Condition, Address, Imm32, Register) { MOZ_CRASH(); }
  1364. + template <typename T, typename S>
  1365. + void cmp32Set(Condition, T, S, Register) {
  1366. + MOZ_CRASH();
  1367. + }
  1368. + void cmp64Set(Condition, Address, Imm64, Register) { MOZ_CRASH(); }
  1369. +
  1370. + template <typename T>
  1371. + void mov(T, Register) {
  1372. + MOZ_CRASH();
  1373. + }
  1374. + template <typename T>
  1375. + void movePtr(T, Register) {
  1376. + MOZ_CRASH();
  1377. + }
  1378. + template <typename T>
  1379. + void move32(const T&, Register) {
  1380. + MOZ_CRASH();
  1381. + }
  1382. + template <typename T, typename S>
  1383. + void movq(T, S) {
  1384. + MOZ_CRASH();
  1385. + }
  1386. + template <typename T, typename S>
  1387. + void moveFloat32(T, S) {
  1388. + MOZ_CRASH();
  1389. + }
  1390. + template <typename T, typename S>
  1391. + void moveDouble(T, S) {
  1392. + MOZ_CRASH();
  1393. + }
  1394. + template <typename T, typename S>
  1395. + void move64(T, S) {
  1396. + MOZ_CRASH();
  1397. + }
  1398. + template <typename T>
  1399. + CodeOffset movWithPatch(T, Register) {
  1400. + MOZ_CRASH();
  1401. + }
  1402. +
  1403. + template <typename T>
  1404. + void loadPtr(T, Register) {
  1405. + MOZ_CRASH();
  1406. + }
  1407. + template <typename T>
  1408. + void load32(T, Register) {
  1409. + MOZ_CRASH();
  1410. + }
  1411. + template <typename T>
  1412. + void load32Unaligned(T, Register) {
  1413. + MOZ_CRASH();
  1414. + }
  1415. + template <typename T>
  1416. + void loadFloat32(T, FloatRegister) {
  1417. + MOZ_CRASH();
  1418. + }
  1419. + template <typename T>
  1420. + void loadDouble(T, FloatRegister) {
  1421. + MOZ_CRASH();
  1422. + }
  1423. + template <typename T>
  1424. + void loadPrivate(T, Register) {
  1425. + MOZ_CRASH();
  1426. + }
  1427. + template <typename T>
  1428. + void load8SignExtend(T, Register) {
  1429. + MOZ_CRASH();
  1430. + }
  1431. + template <typename T>
  1432. + void load8ZeroExtend(T, Register) {
  1433. + MOZ_CRASH();
  1434. + }
  1435. + template <typename T>
  1436. + void load16SignExtend(T, Register) {
  1437. + MOZ_CRASH();
  1438. + }
  1439. + template <typename T>
  1440. + void load16UnalignedSignExtend(T, Register) {
  1441. + MOZ_CRASH();
  1442. + }
  1443. + template <typename T>
  1444. + void load16ZeroExtend(T, Register) {
  1445. + MOZ_CRASH();
  1446. + }
  1447. + template <typename T>
  1448. + void load16UnalignedZeroExtend(T, Register) {
  1449. + MOZ_CRASH();
  1450. + }
  1451. + template <typename T>
  1452. + void load64(T, Register64) {
  1453. + MOZ_CRASH();
  1454. + }
  1455. + template <typename T>
  1456. + void load64Unaligned(T, Register64) {
  1457. + MOZ_CRASH();
  1458. + }
  1459. +
  1460. + template <typename T, typename S>
  1461. + void storePtr(const T&, S) {
  1462. + MOZ_CRASH();
  1463. + }
  1464. + template <typename T, typename S>
  1465. + void store32(T, S) {
  1466. + MOZ_CRASH();
  1467. + }
  1468. + template <typename T, typename S>
  1469. + void store32_NoSecondScratch(T, S) {
  1470. + MOZ_CRASH();
  1471. + }
  1472. + template <typename T, typename S>
  1473. + void store32Unaligned(T, S) {
  1474. + MOZ_CRASH();
  1475. + }
  1476. + template <typename T, typename S>
  1477. + void storeFloat32(T, S) {
  1478. + MOZ_CRASH();
  1479. + }
  1480. + template <typename T, typename S>
  1481. + void storeDouble(T, S) {
  1482. + MOZ_CRASH();
  1483. + }
  1484. + template <typename T, typename S>
  1485. + void store8(T, S) {
  1486. + MOZ_CRASH();
  1487. + }
  1488. + template <typename T, typename S>
  1489. + void store16(T, S) {
  1490. + MOZ_CRASH();
  1491. + }
  1492. + template <typename T, typename S>
  1493. + void store16Unaligned(T, S) {
  1494. + MOZ_CRASH();
  1495. + }
  1496. + template <typename T, typename S>
  1497. + void store64(T, S) {
  1498. + MOZ_CRASH();
  1499. + }
  1500. + template <typename T, typename S>
  1501. + void store64Unaligned(T, S) {
  1502. + MOZ_CRASH();
  1503. + }
  1504. +
  1505. + template <typename T>
  1506. + void computeEffectiveAddress(T, Register) {
  1507. + MOZ_CRASH();
  1508. + }
  1509. +
  1510. + void splitTagForTest(ValueOperand, ScratchTagScope&) { MOZ_CRASH(); }
  1511. +
  1512. + void boxDouble(FloatRegister, ValueOperand, FloatRegister) { MOZ_CRASH(); }
  1513. + void boxNonDouble(JSValueType, Register, ValueOperand) { MOZ_CRASH(); }
  1514. + template <typename T>
  1515. + void boxDouble(FloatRegister src, const T& dest) {
  1516. + MOZ_CRASH();
  1517. + }
  1518. + template <typename T>
  1519. + void unboxInt32(T, Register) {
  1520. + MOZ_CRASH();
  1521. + }
  1522. + template <typename T>
  1523. + void unboxBoolean(T, Register) {
  1524. + MOZ_CRASH();
  1525. + }
  1526. + template <typename T>
  1527. + void unboxString(T, Register) {
  1528. + MOZ_CRASH();
  1529. + }
  1530. + template <typename T>
  1531. + void unboxSymbol(T, Register) {
  1532. + MOZ_CRASH();
  1533. + }
  1534. + template <typename T>
  1535. + void unboxBigInt(T, Register) {
  1536. + MOZ_CRASH();
  1537. + }
  1538. + template <typename T>
  1539. + void unboxObject(T, Register) {
  1540. + MOZ_CRASH();
  1541. + }
  1542. + template <typename T>
  1543. + void unboxDouble(T, FloatRegister) {
  1544. + MOZ_CRASH();
  1545. + }
  1546. + void unboxValue(const ValueOperand&, AnyRegister, JSValueType) {
  1547. + MOZ_CRASH();
  1548. + }
  1549. + void unboxNonDouble(const ValueOperand&, Register, JSValueType) {
  1550. + MOZ_CRASH();
  1551. + }
  1552. + void unboxNonDouble(const Address&, Register, JSValueType) { MOZ_CRASH(); }
  1553. + template <typename T>
  1554. + void unboxGCThingForGCBarrier(const T&, Register) {
  1555. + MOZ_CRASH();
  1556. + }
  1557. + template <typename T>
  1558. + void unboxObjectOrNull(const T& src, Register dest) {
  1559. + MOZ_CRASH();
  1560. + }
  1561. + void notBoolean(ValueOperand) { MOZ_CRASH(); }
  1562. + [[nodiscard]] Register extractObject(Address, Register) { MOZ_CRASH(); }
  1563. + [[nodiscard]] Register extractObject(ValueOperand, Register) { MOZ_CRASH(); }
  1564. + [[nodiscard]] Register extractSymbol(ValueOperand, Register) { MOZ_CRASH(); }
  1565. + [[nodiscard]] Register extractInt32(ValueOperand, Register) { MOZ_CRASH(); }
  1566. + [[nodiscard]] Register extractBoolean(ValueOperand, Register) { MOZ_CRASH(); }
  1567. + template <typename T>
  1568. + [[nodiscard]] Register extractTag(T, Register) {
  1569. + MOZ_CRASH();
  1570. + }
  1571. +
  1572. + void convertFloat32ToInt32(FloatRegister, Register, Label*, bool v = true) {
  1573. + MOZ_CRASH();
  1574. + }
  1575. + void convertDoubleToInt32(FloatRegister, Register, Label*, bool v = true) {
  1576. + MOZ_CRASH();
  1577. + }
  1578. + void convertDoubleToPtr(FloatRegister, Register, Label*, bool v = true) {
  1579. + MOZ_CRASH();
  1580. + }
  1581. + void convertBoolToInt32(Register, Register) { MOZ_CRASH(); }
  1582. +
  1583. + void convertDoubleToFloat32(FloatRegister, FloatRegister) { MOZ_CRASH(); }
  1584. + void convertInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); }
  1585. +
  1586. + template <typename T>
  1587. + void convertInt32ToDouble(T, FloatRegister) {
  1588. + MOZ_CRASH();
  1589. + }
  1590. + void convertFloat32ToDouble(FloatRegister, FloatRegister) { MOZ_CRASH(); }
  1591. +
  1592. + void boolValueToDouble(ValueOperand, FloatRegister) { MOZ_CRASH(); }
  1593. + void boolValueToFloat32(ValueOperand, FloatRegister) { MOZ_CRASH(); }
  1594. + void int32ValueToDouble(ValueOperand, FloatRegister) { MOZ_CRASH(); }
  1595. + void int32ValueToFloat32(ValueOperand, FloatRegister) { MOZ_CRASH(); }
  1596. +
  1597. + void loadConstantDouble(double, FloatRegister) { MOZ_CRASH(); }
  1598. + void loadConstantFloat32(float, FloatRegister) { MOZ_CRASH(); }
  1599. + Condition testInt32Truthy(bool, ValueOperand) { MOZ_CRASH(); }
  1600. + Condition testStringTruthy(bool, ValueOperand) { MOZ_CRASH(); }
  1601. + Condition testBigIntTruthy(bool, ValueOperand) { MOZ_CRASH(); }
  1602. +
  1603. + template <typename T>
  1604. + void loadUnboxedValue(T, MIRType, AnyRegister) {
  1605. + MOZ_CRASH();
  1606. + }
  1607. + template <typename T>
  1608. + void storeUnboxedValue(const ConstantOrRegister&, MIRType, T, MIRType) {
  1609. + MOZ_CRASH();
  1610. + }
  1611. + template <typename T>
  1612. + void storeUnboxedPayload(ValueOperand value, T, size_t, JSValueType) {
  1613. + MOZ_CRASH();
  1614. + }
  1615. +
  1616. + void convertUInt32ToDouble(Register, FloatRegister) { MOZ_CRASH(); }
  1617. + void convertUInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); }
  1618. + void incrementInt32Value(Address) { MOZ_CRASH(); }
  1619. + void ensureDouble(ValueOperand, FloatRegister, Label*) { MOZ_CRASH(); }
  1620. + void handleFailureWithHandlerTail(Label*) { MOZ_CRASH(); }
  1621. +
  1622. + void buildFakeExitFrame(Register, uint32_t*) { MOZ_CRASH(); }
  1623. + bool buildOOLFakeExitFrame(void*) { MOZ_CRASH(); }
  1624. +
  1625. + void setPrinter(Sprinter*) { MOZ_CRASH(); }
  1626. + Operand ToPayload(Operand base) { MOZ_CRASH(); }
  1627. + Address ToPayload(Address) { MOZ_CRASH(); }
  1628. +
  1629. + Register getStackPointer() const { MOZ_CRASH(); }
  1630. +
  1631. + // Instrumentation for entering and leaving the profiler.
  1632. + void profilerEnterFrame(Register, Register) { MOZ_CRASH(); }
  1633. + void profilerExitFrame() { MOZ_CRASH(); }
  1634. +
  1635. +#ifdef JS_NUNBOX32
  1636. + Address ToType(Address) { MOZ_CRASH(); }
  1637. +#endif
  1638. +};
  1639. +
  1640. +typedef MacroAssemblerRiscv64 MacroAssemblerSpecific;
  1641. +
  1642. +static inline bool GetTempRegForIntArg(uint32_t, uint32_t, Register*) {
  1643. + MOZ_CRASH();
  1644. +}
  1645. +
  1646. +} // namespace jit
  1647. +} // namespace js
  1648. +
  1649. +#endif /* jit_riscv64_MacroAssembler_riscv64_h */
  1650. diff --git a/js/src/jit/riscv64/MoveEmitter-riscv64.h b/js/src/jit/riscv64/MoveEmitter-riscv64.h
  1651. new file mode 100644
  1652. index 0000000000000..24ca3aebb26a4
  1653. --- /dev/null
  1654. +++ b/js/src/jit/riscv64/MoveEmitter-riscv64.h
  1655. @@ -0,0 +1,32 @@
  1656. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  1657. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  1658. + * This Source Code Form is subject to the terms of the Mozilla Public
  1659. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  1660. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  1661. +
  1662. +#ifndef jit_riscv64_MoveEmitter_riscv64_h
  1663. +#define jit_riscv64_MoveEmitter_riscv64_h
  1664. +
  1665. +#include "mozilla/Assertions.h"
  1666. +
  1667. +namespace js {
  1668. +namespace jit {
  1669. +
  1670. +class MacroAssemblerRiscv64;
  1671. +class MoveResolver;
  1672. +struct Register;
  1673. +
  1674. +class MoveEmitterRiscv64 {
  1675. + public:
  1676. + explicit MoveEmitterRiscv64(MacroAssemblerRiscv64&) { MOZ_CRASH(); }
  1677. + void emit(const MoveResolver&) { MOZ_CRASH(); }
  1678. + void finish() { MOZ_CRASH(); }
  1679. + void setScratchRegister(Register) { MOZ_CRASH(); }
  1680. +};
  1681. +
  1682. +typedef MoveEmitterRiscv64 MoveEmitter;
  1683. +
  1684. +} // namespace jit
  1685. +} // namespace js
  1686. +
  1687. +#endif /* jit_riscv64_MoveEmitter_riscv64_h */
  1688. diff --git a/js/src/jit/riscv64/SharedICHelpers-riscv64-inl.h b/js/src/jit/riscv64/SharedICHelpers-riscv64-inl.h
  1689. new file mode 100644
  1690. index 0000000000000..7c6f7b7c20d7b
  1691. --- /dev/null
  1692. +++ b/js/src/jit/riscv64/SharedICHelpers-riscv64-inl.h
  1693. @@ -0,0 +1,34 @@
  1694. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  1695. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  1696. + * This Source Code Form is subject to the terms of the Mozilla Public
  1697. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  1698. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  1699. +
  1700. +#ifndef jit_riscv64_SharedICHelpers_riscv64_inl_h
  1701. +#define jit_riscv64_SharedICHelpers_riscv64_inl_h
  1702. +
  1703. +#include "jit/SharedICHelpers.h"
  1704. +
  1705. +namespace js {
  1706. +namespace jit {
  1707. +
  1708. +inline void EmitBaselineTailCallVM(TrampolinePtr, MacroAssembler&, uint32_t) {
  1709. + MOZ_CRASH();
  1710. +}
  1711. +inline void EmitBaselineCreateStubFrameDescriptor(MacroAssembler&, Register,
  1712. + uint32_t) {
  1713. + MOZ_CRASH();
  1714. +}
  1715. +inline void EmitBaselineCallVM(TrampolinePtr, MacroAssembler&) { MOZ_CRASH(); }
  1716. +
  1717. +static const uint32_t STUB_FRAME_SIZE = 0;
  1718. +static const uint32_t STUB_FRAME_SAVED_STUB_OFFSET = 0;
  1719. +
  1720. +inline void EmitBaselineEnterStubFrame(MacroAssembler&, Register) {
  1721. + MOZ_CRASH();
  1722. +}
  1723. +
  1724. +} // namespace jit
  1725. +} // namespace js
  1726. +
  1727. +#endif /* jit_riscv64_SharedICHelpers_riscv64_inl_h */
  1728. diff --git a/js/src/jit/riscv64/SharedICHelpers-riscv64.h b/js/src/jit/riscv64/SharedICHelpers-riscv64.h
  1729. new file mode 100644
  1730. index 0000000000000..15734c11f5738
  1731. --- /dev/null
  1732. +++ b/js/src/jit/riscv64/SharedICHelpers-riscv64.h
  1733. @@ -0,0 +1,32 @@
  1734. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  1735. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  1736. + * This Source Code Form is subject to the terms of the Mozilla Public
  1737. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  1738. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  1739. +
  1740. +#ifndef jit_riscv64_SharedICHelpers_riscv64_h
  1741. +#define jit_riscv64_SharedICHelpers_riscv64_h
  1742. +
  1743. +namespace js {
  1744. +namespace jit {
  1745. +
  1746. +static const size_t ICStackValueOffset = 0;
  1747. +
  1748. +inline void EmitRestoreTailCallReg(MacroAssembler&) { MOZ_CRASH(); }
  1749. +inline void EmitRepushTailCallReg(MacroAssembler&) { MOZ_CRASH(); }
  1750. +inline void EmitCallIC(MacroAssembler&, CodeOffset*) { MOZ_CRASH(); }
  1751. +inline void EmitReturnFromIC(MacroAssembler&) { MOZ_CRASH(); }
  1752. +inline void EmitBaselineLeaveStubFrame(MacroAssembler&, bool v = false) {
  1753. + MOZ_CRASH();
  1754. +}
  1755. +inline void EmitStubGuardFailure(MacroAssembler&) { MOZ_CRASH(); }
  1756. +
  1757. +template <typename T>
  1758. +inline void EmitPreBarrier(MacroAssembler&, T, MIRType) {
  1759. + MOZ_CRASH();
  1760. +}
  1761. +
  1762. +} // namespace jit
  1763. +} // namespace js
  1764. +
  1765. +#endif /* jit_riscv64_SharedICHelpers_riscv64_h */
  1766. diff --git a/js/src/jit/riscv64/SharedICRegisters-riscv64.h b/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  1767. new file mode 100644
  1768. index 0000000000000..72183cb02c2c0
  1769. --- /dev/null
  1770. +++ b/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  1771. @@ -0,0 +1,38 @@
  1772. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  1773. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  1774. + * This Source Code Form is subject to the terms of the Mozilla Public
  1775. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  1776. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  1777. +
  1778. +#ifndef jit_riscv64_SharedICRegisters_riscv64_h
  1779. +#define jit_riscv64_SharedICRegisters_riscv64_h
  1780. +
  1781. +#include "jit/riscv64/MacroAssembler-riscv64.h"
  1782. +#include "jit/Registers.h"
  1783. +#include "jit/RegisterSets.h"
  1784. +
  1785. +namespace js {
  1786. +namespace jit {
  1787. +
  1788. +static constexpr Register BaselineFrameReg{Registers::invalid_reg};
  1789. +static constexpr Register BaselineStackReg{Registers::invalid_reg};
  1790. +
  1791. +static constexpr ValueOperand R0 = JSReturnOperand;
  1792. +static constexpr ValueOperand R1 = JSReturnOperand;
  1793. +static constexpr ValueOperand R2 = JSReturnOperand;
  1794. +
  1795. +static constexpr Register ICTailCallReg{Registers::invalid_reg};
  1796. +static constexpr Register ICStubReg{Registers::invalid_reg};
  1797. +
  1798. +static constexpr Register ExtractTemp0{Registers::invalid_reg};
  1799. +static constexpr Register ExtractTemp1{Registers::invalid_reg};
  1800. +
  1801. +static constexpr FloatRegister FloatReg0 = {FloatRegisters::invalid_reg};
  1802. +static constexpr FloatRegister FloatReg1 = {FloatRegisters::invalid_reg};
  1803. +static constexpr FloatRegister FloatReg2 = {FloatRegisters::invalid_reg};
  1804. +static constexpr FloatRegister FloatReg3 = {FloatRegisters::invalid_reg};
  1805. +
  1806. +} // namespace jit
  1807. +} // namespace js
  1808. +
  1809. +#endif /* jit_riscv64_SharedICRegisters_riscv64_h */
  1810. diff --git a/js/src/jit/riscv64/Trampoline-riscv64.cpp b/js/src/jit/riscv64/Trampoline-riscv64.cpp
  1811. new file mode 100644
  1812. index 0000000000000..0774254cf4cf5
  1813. --- /dev/null
  1814. +++ b/js/src/jit/riscv64/Trampoline-riscv64.cpp
  1815. @@ -0,0 +1,67 @@
  1816. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  1817. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  1818. + * This Source Code Form is subject to the terms of the Mozilla Public
  1819. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  1820. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  1821. +
  1822. +#include "jit/Bailouts.h"
  1823. +#include "jit/BaselineIC.h"
  1824. +#include "jit/JitRuntime.h"
  1825. +#include "vm/Realm.h"
  1826. +
  1827. +using namespace js;
  1828. +using namespace js::jit;
  1829. +
  1830. +// This file includes stubs for generating the JIT trampolines when there is no
  1831. +// JIT backend, and also includes implementations for assorted random things
  1832. +// which can't be implemented in headers.
  1833. +
  1834. +void JitRuntime::generateEnterJIT(JSContext*, MacroAssembler&) { MOZ_CRASH(); }
  1835. +// static
  1836. +mozilla::Maybe<::JS::ProfilingFrameIterator::RegisterState>
  1837. +JitRuntime::getCppEntryRegisters(JitFrameLayout* frameStackAddress) {
  1838. + return mozilla::Nothing{};
  1839. +}
  1840. +void JitRuntime::generateInvalidator(MacroAssembler&, Label*) { MOZ_CRASH(); }
  1841. +void JitRuntime::generateArgumentsRectifier(MacroAssembler&,
  1842. + ArgumentsRectifierKind kind) {
  1843. + MOZ_CRASH();
  1844. +}
  1845. +JitRuntime::BailoutTable JitRuntime::generateBailoutTable(MacroAssembler&,
  1846. + Label*, uint32_t) {
  1847. + MOZ_CRASH();
  1848. +}
  1849. +void JitRuntime::generateBailoutHandler(MacroAssembler&, Label*) {
  1850. + MOZ_CRASH();
  1851. +}
  1852. +uint32_t JitRuntime::generatePreBarrier(JSContext*, MacroAssembler&, MIRType) {
  1853. + MOZ_CRASH();
  1854. +}
  1855. +void JitRuntime::generateExceptionTailStub(MacroAssembler&, Label*) {
  1856. + MOZ_CRASH();
  1857. +}
  1858. +void JitRuntime::generateBailoutTailStub(MacroAssembler&, Label*) {
  1859. + MOZ_CRASH();
  1860. +}
  1861. +void JitRuntime::generateProfilerExitFrameTailStub(MacroAssembler&, Label*) {
  1862. + MOZ_CRASH();
  1863. +}
  1864. +
  1865. +bool JitRuntime::generateVMWrapper(JSContext*, MacroAssembler&,
  1866. + const VMFunctionData&, DynFn, uint32_t*) {
  1867. + MOZ_CRASH();
  1868. +}
  1869. +
  1870. +FrameSizeClass FrameSizeClass::FromDepth(uint32_t) { MOZ_CRASH(); }
  1871. +FrameSizeClass FrameSizeClass::ClassLimit() { MOZ_CRASH(); }
  1872. +uint32_t FrameSizeClass::frameSize() const { MOZ_CRASH(); }
  1873. +
  1874. +BailoutFrameInfo::BailoutFrameInfo(const JitActivationIterator& iter,
  1875. + BailoutStack* bailout) {
  1876. + MOZ_CRASH();
  1877. +}
  1878. +
  1879. +BailoutFrameInfo::BailoutFrameInfo(const JitActivationIterator& iter,
  1880. + InvalidationBailoutStack* bailout) {
  1881. + MOZ_CRASH();
  1882. +}
  1883. From ef48b82e6e70ae569d2f401b54148c2c9535f0cf Mon Sep 17 00:00:00 2001
  1884. From: Makoto Kato <m_kato@ga2.so-net.ne.jp>
  1885. Date: Thu, 17 Feb 2022 00:05:54 +0900
  1886. Subject: [PATCH] Add registers.
  1887. ---
  1888. js/src/jit/riscv64/Architecture-riscv64.h | 291 +++++++++++++++++---
  1889. js/src/jit/riscv64/Assembler-riscv64.cpp | 42 +++
  1890. js/src/jit/riscv64/Assembler-riscv64.h | 186 +++++++++----
  1891. js/src/jit/riscv64/MacroAssembler-riscv64.h | 15 +-
  1892. 5 files changed, 433 insertions(+), 107 deletions(-)
  1893. create mode 100644 js/src/jit/riscv64/Assembler-riscv64.cpp
  1894. diff --git a/js/src/jit/riscv64/Architecture-riscv64.h b/js/src/jit/riscv64/Architecture-riscv64.h
  1895. index 3a4a25205bcd1..2b5495ce5f3d8 100644
  1896. --- a/js/src/jit/riscv64/Architecture-riscv64.h
  1897. +++ b/js/src/jit/riscv64/Architecture-riscv64.h
  1898. @@ -28,9 +28,72 @@ static constexpr uint32_t WasmCheckedTailEntryOffset = 1u;
  1899. class Registers {
  1900. public:
  1901. enum RegisterID {
  1902. - r0 = 0,
  1903. - invalid_reg,
  1904. - invalid_reg2, // To avoid silly static_assert failures.
  1905. + x0 = 0,
  1906. + zero = 0,
  1907. + x1 = 1,
  1908. + ra = 1,
  1909. + x2 = 2,
  1910. + sp = 2,
  1911. + x3 = 3,
  1912. + gp = 3,
  1913. + x4 = 4,
  1914. + tp = 4,
  1915. + x5 = 5,
  1916. + t0 = 5,
  1917. + x6 = 6,
  1918. + t1 = 6,
  1919. + x7 = 7,
  1920. + t2 = 7,
  1921. + x8 = 8,
  1922. + fp = 8,
  1923. + s0 = 8,
  1924. + x9 = 9,
  1925. + s1 = 9,
  1926. + x10 = 10,
  1927. + a0 = 10,
  1928. + x11 = 11,
  1929. + a1 = 11,
  1930. + x12 = 12,
  1931. + a2 = 12,
  1932. + x13 = 13,
  1933. + a3 = 13,
  1934. + x14 = 14,
  1935. + a4 = 14,
  1936. + x15 = 15,
  1937. + a5 = 15,
  1938. + x16 = 16,
  1939. + a6 = 16,
  1940. + x17 = 17,
  1941. + a7 = 17,
  1942. + x18 = 18,
  1943. + s2 = 18,
  1944. + x19 = 19,
  1945. + s3 = 19,
  1946. + x20 = 20,
  1947. + s4 = 20,
  1948. + x21 = 21,
  1949. + s5 = 21,
  1950. + x22 = 22,
  1951. + s6 = 22,
  1952. + x23 = 23,
  1953. + s7 = 23,
  1954. + x24 = 24,
  1955. + s8 = 24,
  1956. + x25 = 25,
  1957. + s9 = 25,
  1958. + x26 = 26,
  1959. + s10 = 26,
  1960. + x27 = 27,
  1961. + s11 = 27,
  1962. + x28 = 28,
  1963. + t3 = 28,
  1964. + x29 = 29,
  1965. + t4 = 29,
  1966. + x30 = 30,
  1967. + t5 = 30,
  1968. + x31 = 31,
  1969. + t6 = 31,
  1970. + invalid_reg
  1971. };
  1972. typedef uint8_t Code;
  1973. typedef RegisterID Encoding;
  1974. @@ -38,25 +101,69 @@ class Registers {
  1975. uintptr_t r;
  1976. };
  1977. - typedef uint8_t SetType;
  1978. + typedef uint32_t SetType;
  1979. - static uint32_t SetSize(SetType) { MOZ_CRASH(); }
  1980. - static uint32_t FirstBit(SetType) { MOZ_CRASH(); }
  1981. - static uint32_t LastBit(SetType) { MOZ_CRASH(); }
  1982. - static const char* GetName(Code) { MOZ_CRASH(); }
  1983. - static Code FromName(const char*) { MOZ_CRASH(); }
  1984. + static uint32_t SetSize(SetType x) {
  1985. + static_assert(sizeof(SetType) == 4, "SetType must be 32 bits");
  1986. + return mozilla::CountPopulation32(x);
  1987. + }
  1988. + static uint32_t FirstBit(SetType) {
  1989. + return mozilla::CountTrailingZeroes32(x);
  1990. + }
  1991. + static uint32_t LastBit(SetType) {
  1992. + return 31 - mozilla::CountLeadingZeroes32(x);
  1993. + }
  1994. +
  1995. + static const char* GetName(uint32_t code) {
  1996. + // clang-format off
  1997. + static const char* const Names[] = {
  1998. + "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2",
  1999. + "fp", "s1", "a0", "a1", "a2", "a3", "a4", "a5",
  2000. + "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7",
  2001. + "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6"};
  2002. + // clang-format on
  2003. + static_assert(Total == sizeof(Names) / sizeof(Names[0]),
  2004. + "Table is the correct size");
  2005. + if (code >= Total) {
  2006. + return "invalid";
  2007. + }
  2008. + return Names[code];
  2009. + }
  2010. - static const Encoding StackPointer = invalid_reg;
  2011. + static Code FromName(const char* name) {
  2012. + for (size_t i = 0; i < Total; i++) {
  2013. + if (strcmp(GetName(Code(i)), name) == 0) {
  2014. + return Code(i);
  2015. + }
  2016. + }
  2017. + return Invalid;
  2018. + }
  2019. +
  2020. + static const Encoding StackPointer = sp;
  2021. static const Encoding Invalid = invalid_reg;
  2022. - static const uint32_t Total = 1;
  2023. - static const uint32_t TotalPhys = 0;
  2024. - static const uint32_t Allocatable = 0;
  2025. - static const SetType AllMask = 0;
  2026. - static const SetType ArgRegMask = 0;
  2027. - static const SetType VolatileMask = 0;
  2028. - static const SetType NonVolatileMask = 0;
  2029. - static const SetType NonAllocatableMask = 0;
  2030. - static const SetType AllocatableMask = 0;
  2031. + static const uint32_t Total = 32;
  2032. + static const uint32_t TotalPhys = 32;
  2033. + static const uint32_t Allocatable = 28;
  2034. + static const SetType AllMask = 0xffffffff;
  2035. + static const SetType ArgRegMask =
  2036. + (1 << Registers::a0) | (1 << Registers::a1) | (1 << Registers::a2) |
  2037. + (1 << Registers::a3) | (1 << Registers::a4) | (1 << Registers::a5) |
  2038. + (1 << Registers::a6) | (1 << Registers::a7);
  2039. + static const SetType VolatileMask =
  2040. + (1 << Registers::a0) | (1 << Registers::a1) | (1 << Registers::a2) |
  2041. + (1 << Registers::a3) | (1 << Registers::a4) | (1 << Registers::a5) |
  2042. + (1 << Registers::a6) | (1 << Registers::a7) | (1 << Registers::t0) |
  2043. + (1 << Registers::t1) | (1 << Registers::t2) | (1 << Registers::t3) |
  2044. + (1 << Registers::t4) | (1 << Registers::t5) | (1 << Registers::t6);
  2045. + static const SetType NonVolatileMask =
  2046. + (1 << Registers::s0) | (1 << Registers::s1) | (1 << Registers::s2) |
  2047. + (1 << Registers::s3) | (1 << Registers::s4) | (1 << Registers::s5) |
  2048. + (1 << Registers::s6) | (1 << Registers::s7) | (1 << Registers::s8) |
  2049. + (1 << Registers::s9) | (1 << Registers::s10) | (1 << Registers::s11);
  2050. + static const SetType NonAllocatableMask =
  2051. + (1 << Registers::zero) | (1 << Registers::sp) | (1 << Registers::tp) |
  2052. + (1 << Registers::gp);
  2053. + static const SetType AllocatableMask = AllMask & ~NonAllocatableMask;
  2054. static const SetType JSCallMask = 0;
  2055. static const SetType CallMask = 0;
  2056. };
  2057. @@ -65,29 +172,134 @@ typedef uint8_t PackedRegisterMask;
  2058. class FloatRegisters {
  2059. public:
  2060. - enum FPRegisterID { f0 = 0, invalid_reg };
  2061. + enum FPRegisterID {
  2062. + f0 = 0,
  2063. + ft0 = 0,
  2064. + f1 = 1,
  2065. + ft1 = 1,
  2066. + f2 = 2,
  2067. + ft2 = 2,
  2068. + f3 = 3,
  2069. + ft3 = 3,
  2070. + f4 = 4,
  2071. + ft4 = 4,
  2072. + f5 = 5,
  2073. + ft5 = 5,
  2074. + f6 = 6,
  2075. + ft6 = 6,
  2076. + f7 = 7,
  2077. + ft7 = 7,
  2078. + f8 = 8,
  2079. + fs0 = 8,
  2080. + f9 = 9,
  2081. + fs1 = 9,
  2082. + f10 = 10,
  2083. + fa0 = 10,
  2084. + f11 = 11,
  2085. + fa1 = 11,
  2086. + f12 = 12,
  2087. + fa2 = 12,
  2088. + f13 = 13,
  2089. + fa3 = 13,
  2090. + f14 = 14,
  2091. + fa4 = 14,
  2092. + f15 = 15,
  2093. + fa5 = 15,
  2094. + f16 = 16,
  2095. + fa6 = 16,
  2096. + f17 = 17,
  2097. + fa7 = 17,
  2098. + f18 = 18,
  2099. + fs2 = 18,
  2100. + f19 = 19,
  2101. + fs3 = 19,
  2102. + f20 = 20,
  2103. + fs4 = 20,
  2104. + f21 = 21,
  2105. + fs5 = 21,
  2106. + f22 = 22,
  2107. + fs6 = 22,
  2108. + f23 = 23,
  2109. + fs7 = 23,
  2110. + f24 = 24,
  2111. + fs8 = 24,
  2112. + f25 = 25,
  2113. + fs9 = 25,
  2114. + f26 = 26,
  2115. + fs10 = 26,
  2116. + f27 = 27,
  2117. + fs11 = 27,
  2118. + f28 = 28,
  2119. + ft8 = 28,
  2120. + f29 = 29,
  2121. + ft9 = 29,
  2122. + f30 = 30,
  2123. + ft10 = 30,
  2124. + f31 = 31,
  2125. + ft11 = 31,
  2126. + invalid_reg
  2127. + };
  2128. typedef FPRegisterID Code;
  2129. typedef FPRegisterID Encoding;
  2130. union RegisterContent {
  2131. + float s;
  2132. double d;
  2133. };
  2134. typedef uint32_t SetType;
  2135. - static const char* GetName(Code) { MOZ_CRASH(); }
  2136. - static Code FromName(const char*) { MOZ_CRASH(); }
  2137. + static const char* GetName(uint32_t code) {
  2138. + // clang-format off
  2139. + static const char* const Names[] = {
  2140. + "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7",
  2141. + "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5",
  2142. + "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
  2143. + "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11",
  2144. + };
  2145. + // clang-format on
  2146. + static_assert(Total == sizeof(Names) / sizeof(Names[0]),
  2147. + "Table is the correct size");
  2148. + if (code >= Total) {
  2149. + return "invalid";
  2150. + }
  2151. + return Names[code];
  2152. + }
  2153. + static Code FromName(const char*) {
  2154. + for (size_t i = 0; i < Total; i++) {
  2155. + if (strcmp(GetName(Code(i)), name) == 0) {
  2156. + return Code(i);
  2157. + }
  2158. + }
  2159. + return Invalid;
  2160. + }
  2161. static const Code Invalid = invalid_reg;
  2162. - static const uint32_t Total = 0;
  2163. - static const uint32_t TotalPhys = 0;
  2164. - static const uint32_t Allocatable = 0;
  2165. - static const SetType AllMask = 0;
  2166. + static const uint32_t Total = 32;
  2167. + static const uint32_t TotalPhys = 32;
  2168. + static const uint32_t Allocatable = 32;
  2169. + static const SetType AllMask = 0xffffffff;
  2170. static const SetType AllDoubleMask = 0;
  2171. static const SetType AllSingleMask = 0;
  2172. - static const SetType VolatileMask = 0;
  2173. - static const SetType NonVolatileMask = 0;
  2174. + static const SetType VolatileMask =
  2175. + (1 << FloatRegisters::ft0) | (1 << FloatRegisters::ft1) |
  2176. + (1 << FloatRegisters::ft2) | (1 << FloatRegisters::ft3) |
  2177. + (1 << FloastRegisters::ft4) | (1 << FloatRegisters::ft5) |
  2178. + (1 << FloatRegisters::ft6) | (1 << FloatRegisters::ft7) |
  2179. + (1 << FloatRegisters::ft8) | (1 << FloatRegisters::ft9) |
  2180. + (1 << FloatRegisters::ft10) | (1 << FloatRegisters::ft11) |
  2181. + (1 << FloatRegisters::fa0) | (1 << FloatRegisters::fa1) |
  2182. + (1 << FloatRegisters::fa2) | (1 << FloatRegisters::fa3) |
  2183. + (1 << FloatRegisters::fa4) | (1 << FloatRegisters::fa5) |
  2184. + (1 << FloatRegisters::fa6) | (1 << FloatRegisters::fa7);
  2185. + static const SetType NonVolatileMask =
  2186. + (1 << FloatRegisters::fs0) | (1 << FloatRegisters::fs1) |
  2187. + (1 << FloatRegisters::fs2) | (1 << FloatRegisters::fs3) |
  2188. + (1 << FloatRegisters::fs4) | (1 << FloatRegisters::fs5) |
  2189. + (1 << FloatRegisters::fs6) | (1 << FloatRegisters::fs7) |
  2190. + (1 << FloatRegisters::fs8) | (1 << FloatRegisters::fs9) |
  2191. + (1 << FloatRegisters::fs10) | (1 << FloatRegisters::fs11);
  2192. static const SetType NonAllocatableMask = 0;
  2193. - static const SetType AllocatableMask = 0;
  2194. + static const SetType AllocatableMask = AllMask & ~NonAllocatableMask;
  2195. };
  2196. template <typename T>
  2197. @@ -99,19 +311,25 @@ struct FloatRegister {
  2198. typedef Codes::Encoding Encoding;
  2199. typedef Codes::SetType SetType;
  2200. - Code _;
  2201. + enum RegType { Single, Double };
  2202. +
  2203. + Code code_ : 5;
  2204. + uint32_t kind_ : 2;
  2205. +
  2206. + FloatRegister(uint32_t r) : code_(r), kind_(Double) {}
  2207. + FloatRegister(uint32_t r, RegType k) : code_(r), kind_(k) {}
  2208. static uint32_t FirstBit(SetType) { MOZ_CRASH(); }
  2209. static uint32_t LastBit(SetType) { MOZ_CRASH(); }
  2210. static FloatRegister FromCode(uint32_t) { MOZ_CRASH(); }
  2211. - bool isSingle() const { MOZ_CRASH(); }
  2212. - bool isDouble() const { MOZ_CRASH(); }
  2213. - bool isSimd128() const { MOZ_CRASH(); }
  2214. + bool isSingle() const { return kind_ == Single; }
  2215. + bool isDouble() const { return kind_ == Double; }
  2216. + bool isSimd128() const { return false; }
  2217. bool isInvalid() const { MOZ_CRASH(); }
  2218. FloatRegister asSingle() const { MOZ_CRASH(); }
  2219. FloatRegister asDouble() const { MOZ_CRASH(); }
  2220. FloatRegister asSimd128() const { MOZ_CRASH(); }
  2221. - Code code() const { MOZ_CRASH(); }
  2222. + Code code() const { return code_; }
  2223. Encoding encoding() const { MOZ_CRASH(); }
  2224. const char* name() const { MOZ_CRASH(); }
  2225. bool volatile_() const { MOZ_CRASH(); }
  2226. @@ -160,11 +378,6 @@ inline bool hasMultiAlias() { MOZ_CRASH(); }
  2227. static const uint32_t ShadowStackSpace = 0;
  2228. static const uint32_t JumpImmediateRange = INT32_MAX;
  2229. -#ifdef JS_NUNBOX32
  2230. -static const int32_t NUNBOX32_TYPE_OFFSET = 4;
  2231. -static const int32_t NUNBOX32_PAYLOAD_OFFSET = 0;
  2232. -#endif
  2233. -
  2234. } // namespace jit
  2235. } // namespace js
  2236. diff --git a/js/src/jit/riscv64/Assembler-riscv64.cpp b/js/src/jit/riscv64/Assembler-riscv64.cpp
  2237. new file mode 100644
  2238. index 0000000000000..0e9cf05fcc111
  2239. --- /dev/null
  2240. +++ b/js/src/jit/riscv64/Assembler-riscv64.cpp
  2241. @@ -0,0 +1,42 @@
  2242. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  2243. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  2244. + * This Source Code Form is subject to the terms of the Mozilla Public
  2245. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  2246. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  2247. +
  2248. +#include "jit/riscv64/Assembler-riscv64.h"
  2249. +
  2250. +using namespace js;
  2251. +using namespace js::jit;
  2252. +
  2253. +ABIArg ABIArgGenerator::next(MIRType type) {
  2254. + switch (type) {
  2255. + case MIRType::Int32:
  2256. + case MIRType::Int64:
  2257. + case MIRType::Pointer:
  2258. + case MIRType::RefOrNull:
  2259. + case MIRType::StackResults:
  2260. + if (intRegIndex_ == NumIntArgRegs) {
  2261. + current_ = ABIArg(stackOffset_);
  2262. + stackOffset_ += sizeof(uintptr_t);
  2263. + break;
  2264. + }
  2265. + current_ = ABIArg(IntArgRegs[intRegIndex_++]);
  2266. + break;
  2267. +
  2268. + case MIRType::Double:
  2269. + if (floatRegIndex_ == NumFloatArgRegs) {
  2270. + current_ = ABIArg(stackOffset_);
  2271. + stackOffset_ += sizeof(double);
  2272. + break;
  2273. + }
  2274. + current_ = ABIArg(FloatArgReg[floatRegIndex_++]);
  2275. + break;
  2276. +
  2277. + case MIRType::Float32:
  2278. + case MIRType::Simd128:
  2279. + default:
  2280. + MOZ_CRASH("Unexpected argument type");
  2281. + }
  2282. + return current_;
  2283. +}
  2284. diff --git a/js/src/jit/riscv64/Assembler-riscv64.h b/js/src/jit/riscv64/Assembler-riscv64.h
  2285. index 55b0d3436b3d6..e1a4e0f3c7790 100644
  2286. --- a/js/src/jit/riscv64/Assembler-riscv64.h
  2287. +++ b/js/src/jit/riscv64/Assembler-riscv64.h
  2288. @@ -21,72 +21,82 @@ namespace jit {
  2289. class MacroAssembler;
  2290. -static constexpr Register StackPointer{Registers::invalid_reg};
  2291. -static constexpr Register FramePointer{Registers::invalid_reg};
  2292. -static constexpr Register ReturnReg{Registers::invalid_reg2};
  2293. -static constexpr FloatRegister ReturnFloat32Reg = {FloatRegisters::invalid_reg};
  2294. -static constexpr FloatRegister ReturnDoubleReg = {FloatRegisters::invalid_reg};
  2295. -static constexpr FloatRegister ReturnSimd128Reg = {FloatRegisters::invalid_reg};
  2296. -static constexpr FloatRegister ScratchSimd128Reg = {
  2297. - FloatRegisters::invalid_reg};
  2298. +static constexpr Register StackPointer{Registers::sp};
  2299. +static constexpr Register FramePointer{Registers::fp};
  2300. +static constexpr Register ReturnReg{Registers::a0};
  2301. static constexpr FloatRegister InvalidFloatReg = {FloatRegisters::invalid_reg};
  2302. -
  2303. -struct ScratchFloat32Scope : FloatRegister {
  2304. - explicit ScratchFloat32Scope(MacroAssembler& masm) {}
  2305. +static constexpr FloatRegister ReturnFloat32Reg = {FloatRegisters::fa0, Single};
  2306. +static constexpr FloatRegister ReturnDoubleReg = {FloatRegisters::fa0, Double};
  2307. +static constexpr FloatRegister ReturnSimd128Reg = InvalidFloatReg;
  2308. +static constexpr FloatRegister ScratchSimd128Reg = InvalidFloatReg;
  2309. +static constexpr FloatRegister ScratchFloat32Reg_ =
  2310. + FloatRegister(FloatRegisters::ft0, FloatRegisters::Single);
  2311. +static constexpr FloatRegister ScratchDoubleReg_ = {FloatResgisters::ft0,
  2312. + FloatRegisters::Double};
  2313. +
  2314. +struct ScratchFloat32Scope : AutoFloatRegisterScope {
  2315. + explicit ScratchFloat32Scope(MacroAssembler& masm)
  2316. + : AutoFloatRegisterScope(masm, ScratchFloat32Reg_) {}
  2317. };
  2318. -struct ScratchDoubleScope : FloatRegister {
  2319. - explicit ScratchDoubleScope(MacroAssembler& masm) {}
  2320. +struct ScratchDoubleScope : AutoFloatRegisterScope {
  2321. + explicit ScratchDoubleScope(MacroAssembler& masm)
  2322. + : AutoFloatRegisterScope(masm, ScratchDoubleReg_) {}
  2323. };
  2324. static constexpr Register OsrFrameReg{Registers::invalid_reg};
  2325. static constexpr Register PreBarrierReg{Registers::invalid_reg};
  2326. static constexpr Register InterpreterPCReg{Registers::invalid_reg};
  2327. -static constexpr Register CallTempReg0{Registers::invalid_reg};
  2328. -static constexpr Register CallTempReg1{Registers::invalid_reg};
  2329. -static constexpr Register CallTempReg2{Registers::invalid_reg};
  2330. -static constexpr Register CallTempReg3{Registers::invalid_reg};
  2331. -static constexpr Register CallTempReg4{Registers::invalid_reg};
  2332. -static constexpr Register CallTempReg5{Registers::invalid_reg};
  2333. +static constexpr Register CallTempReg0{Registers::t0};
  2334. +static constexpr Register CallTempReg1{Registers::t1};
  2335. +static constexpr Register CallTempReg2{Registers::t2};
  2336. +static constexpr Register CallTempReg3{Registers::t3};
  2337. +static constexpr Register CallTempReg4{Registers::t4};
  2338. +static constexpr Register CallTempReg5{Registers::t5};
  2339. +static constexpr Register CallTempReg6{Registers::t6};
  2340. static constexpr Register InvalidReg{Registers::invalid_reg};
  2341. -static constexpr Register CallTempNonArgRegs[] = {InvalidReg, InvalidReg};
  2342. +static constexpr Register CallTempNonArgRegs[] = {
  2343. + Registers::t0, Registers::t1, Registers::t2, Registers::t3,
  2344. + Registers::t4, Registers::t5, Registers::t6};
  2345. static const uint32_t NumCallTempNonArgRegs = std::size(CallTempNonArgRegs);
  2346. -static constexpr Register IntArgReg0{Registers::invalid_reg};
  2347. -static constexpr Register IntArgReg1{Registers::invalid_reg};
  2348. -static constexpr Register IntArgReg2{Registers::invalid_reg};
  2349. -static constexpr Register IntArgReg3{Registers::invalid_reg};
  2350. +static constexpr Register IntArgReg0{Registers::a0};
  2351. +static constexpr Register IntArgReg1{Registers::a1};
  2352. +static constexpr Register IntArgReg2{Registers::a2};
  2353. +static constexpr Register IntArgReg3{Registers::a3};
  2354. +static constexpr Register IntArgReg4{Registers::a4};
  2355. +static constexpr Register IntArgReg5{Registers::a5};
  2356. +static constexpr Register IntArgReg6{Registers::a6};
  2357. +static constexpr Register IntArgReg7{Registers::a7};
  2358. static constexpr Register HeapReg{Registers::invalid_reg};
  2359. -static constexpr Register RegExpTesterRegExpReg{Registers::invalid_reg};
  2360. -static constexpr Register RegExpTesterStringReg{Registers::invalid_reg};
  2361. -static constexpr Register RegExpTesterLastIndexReg{Registers::invalid_reg};
  2362. -static constexpr Register RegExpTesterStickyReg{Registers::invalid_reg};
  2363. +// Registerd used in RegExpTester instruction (do not use ReturnReg).
  2364. +static constexpr Register RegExpTesterRegExpReg = CallTempReg0;
  2365. +static constexpr Register RegExpTesterStringReg = CallTempReg1;
  2366. +static constexpr Register RegExpTesterLastIndexReg = CallTempReg2;
  2367. -static constexpr Register RegExpMatcherRegExpReg{Registers::invalid_reg};
  2368. -static constexpr Register RegExpMatcherStringReg{Registers::invalid_reg};
  2369. -static constexpr Register RegExpMatcherLastIndexReg{Registers::invalid_reg};
  2370. -static constexpr Register RegExpMatcherStickyReg{Registers::invalid_reg};
  2371. +// Registerd used in RegExpMatcher instruction (do not use JSReturnOperand).
  2372. +static constexpr Register RegExpMatcherRegExpReg = CallTempReg0;
  2373. +static constexpr Register RegExpMatcherStringReg = CallTempReg1;
  2374. +static constexpr Register RegExpMatcherLastIndexReg = CallTempReg2;
  2375. -// Uses |invalid_reg2| to avoid static_assert failures.
  2376. -static constexpr Register JSReturnReg_Type{Registers::invalid_reg2};
  2377. -static constexpr Register JSReturnReg_Data{Registers::invalid_reg2};
  2378. -static constexpr Register JSReturnReg{Registers::invalid_reg2};
  2379. +static constexpr Register JSReturnReg_Type{Registers::a3};
  2380. +static constexpr Register JSReturnReg_Data{Registers::a2};
  2381. +static constexpr Register JSReturnReg{Registers::a2};
  2382. -static constexpr ValueOperand JSReturnOperand(InvalidReg);
  2383. -static constexpr Register64 ReturnReg64(InvalidReg);
  2384. +static constexpr ValueOperand ValueOperand(JSReturnReg);
  2385. +static constexpr Register64 ReturnReg64(a0);
  2386. -static constexpr Register ABINonArgReg0{Registers::invalid_reg};
  2387. -static constexpr Register ABINonArgReg1{Registers::invalid_reg};
  2388. -static constexpr Register ABINonArgReg2{Registers::invalid_reg};
  2389. -static constexpr Register ABINonArgReg3{Registers::invalid_reg};
  2390. -static constexpr Register ABINonArgReturnReg0{Registers::invalid_reg};
  2391. -static constexpr Register ABINonArgReturnReg1{Registers::invalid_reg};
  2392. -static constexpr Register ABINonVolatileReg{Registers::invalid_reg};
  2393. -static constexpr Register ABINonArgReturnVolatileReg{Registers::invalid_reg};
  2394. +static constexpr Register ABINonArgReg0{Registers::s0};
  2395. +static constexpr Register ABINonArgReg1{Registers::s1};
  2396. +static constexpr Register ABINonArgReg2{Registers::s2};
  2397. +static constexpr Register ABINonArgReg3{Registers::s3};
  2398. +static constexpr Register ABINonArgReturnReg0{Registers::s0};
  2399. +static constexpr Register ABINonArgReturnReg1{Registers::s1};
  2400. +static constexpr Register ABINonVolatileReg{Registers::fp};
  2401. +static constexpr Register ABINonArgReturnVolatileReg{Registers::ra};
  2402. -static constexpr FloatRegister ABINonArgDoubleReg = {
  2403. - FloatRegisters::invalid_reg};
  2404. +static constexpr FloatRegister ABINonArgDoubleReg = {FloatRegisters::fs0, Double};
  2405. static constexpr Register WasmTableCallScratchReg0{Registers::invalid_reg};
  2406. static constexpr Register WasmTableCallScratchReg1{Registers::invalid_reg};
  2407. @@ -95,7 +105,7 @@ static constexpr Register WasmTableCallIndexReg{Registers::invalid_reg};
  2408. static constexpr Register WasmTlsReg{Registers::invalid_reg};
  2409. static constexpr Register WasmJitEntryReturnScratch{Registers::invalid_reg};
  2410. -static constexpr uint32_t ABIStackAlignment = 4;
  2411. +static constexpr uint32_t ABIStackAlignment = 16;
  2412. static constexpr uint32_t CodeAlignment = 16;
  2413. static constexpr uint32_t JitStackAlignment = 8;
  2414. static constexpr uint32_t JitStackValueAlignment =
  2415. @@ -103,8 +113,20 @@ static constexpr uint32_t JitStackValueAlignment =
  2416. static const Scale ScalePointer = TimesOne;
  2417. +class Instruction;
  2418. +typedef js::jit::AssemblerBuffer<1024, Instruction> RISCVBuffer;
  2419. +
  2420. class Assembler : public AssemblerShared {
  2421. public:
  2422. + enum RISCVCondition : uint32_t {
  2423. + EQ = 0b000,
  2424. + NE = 0b001,
  2425. + LT = 0b100,
  2426. + GE = 0b101,
  2427. + LTU = 0b110,
  2428. + GEU = 0b111,
  2429. + };
  2430. +
  2431. enum Condition {
  2432. Equal,
  2433. NotEqual,
  2434. @@ -143,6 +165,10 @@ class Assembler : public AssemblerShared {
  2435. DoubleLessThanOrEqualOrUnordered
  2436. };
  2437. + RISCVBuffer m_buffer;
  2438. +
  2439. + BufferOffset nextOffset() { return m_buffer.nextOffset(); }
  2440. +
  2441. static Condition InvertCondition(Condition) { MOZ_CRASH(); }
  2442. static DoubleCondition InvertCondition(DoubleCondition) { MOZ_CRASH(); }
  2443. @@ -162,7 +188,7 @@ class Assembler : public AssemblerShared {
  2444. static void ToggleToCmp(CodeLocationLabel) { MOZ_CRASH(); }
  2445. static void ToggleCall(CodeLocationLabel, bool) { MOZ_CRASH(); }
  2446. - static void Bind(uint8_t*, const CodeLabel&) { MOZ_CRASH(); }
  2447. + static void Bind(uint8_t* rawCode, const CodeLabel& label) { MOZ_CRASH(); }
  2448. static uintptr_t GetPointer(uint8_t*) { MOZ_CRASH(); }
  2449. @@ -174,24 +200,66 @@ class Assembler : public AssemblerShared {
  2450. }
  2451. void setUnlimitedBuffer() { MOZ_CRASH(); }
  2452. +
  2453. + MOZ_ALWAYS_INLINE BufferOffset writeInst(uint32_t x) {
  2454. + MOZ_ASSERT(hasCreator());
  2455. + return m_buffer.putInt(x);
  2456. + }
  2457. +};
  2458. +
  2459. +class Instruction {
  2460. + protected:
  2461. + uint32_t data;
  2462. +
  2463. + // Standard constructor
  2464. + Instruction(uint32_t data_) : data(data_) {}
  2465. +
  2466. + public:
  2467. + uint32_t encode() const { return data; }
  2468. +
  2469. + void setData(uint32_t data) { this->data = data; }
  2470. + Instruction* next();
  2471. + const uint32_t* raw() const { return &data; }
  2472. + uint32_t size() const { return sizeof(data); }
  2473. };
  2474. class Operand {
  2475. public:
  2476. - explicit Operand(const Address&) { MOZ_CRASH(); }
  2477. - explicit Operand(const Register) { MOZ_CRASH(); }
  2478. + enum Kind { REG };
  2479. +
  2480. + private
  2481. + Kind kind_ : 4;
  2482. + uint32_t reg_ : 5;
  2483. + int32_t offset_;
  2484. +
  2485. + public:
  2486. + explicit Operand(const Register reg)
  2487. + : kind_(REG), reg_(reg.code()), offset_(0) {}
  2488. explicit Operand(const FloatRegister) { MOZ_CRASH(); }
  2489. - explicit Operand(Register, Imm32) { MOZ_CRASH(); }
  2490. - explicit Operand(Register, int32_t) { MOZ_CRASH(); }
  2491. + explicit Operand(const Address& adress) { MOZ_CRASH(); }
  2492. + explicit Operand(Register reg, Imm32 offset)
  2493. + : kind_(REG), reg_(reg.code()), offset_(offset.value) {}
  2494. + explicit Operand(Register reg, int32_t offset)
  2495. + : kind_(REG), reg_(reg.code()), offset_(offset) {}
  2496. +
  2497. + Kind kind() const { return kind_; }
  2498. };
  2499. class ABIArgGenerator {
  2500. public:
  2501. - ABIArgGenerator() { MOZ_CRASH(); }
  2502. - ABIArg next(MIRType) { MOZ_CRASH(); }
  2503. - ABIArg& current() { MOZ_CRASH(); }
  2504. - uint32_t stackBytesConsumedSoFar() const { MOZ_CRASH(); }
  2505. - void increaseStackOffset(uint32_t) { MOZ_CRASH(); }
  2506. + ABIArgGenerator()
  2507. + : intRegIndex_(0), floatRegIndex_(0), stackOffset_(0), current_() {}
  2508. +
  2509. + ABIArg next(MIRType);
  2510. + ABIArg& current() { return current_; }
  2511. + uint32_t stackBytesConsumedSoFar() const { return stackOffset_; }
  2512. + void increaseStackOffset(uint32_t bytes) { stackOffset_ += bytes; }
  2513. +
  2514. + private:
  2515. + unsigned intRegIndex_;
  2516. + unsigned floatRegIndex_;
  2517. + uint32_t stackOffset_;
  2518. + ABIArg current_;
  2519. };
  2520. } // namespace jit
  2521. diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.h b/js/src/jit/riscv64/MacroAssembler-riscv64.h
  2522. index a9265bb7bd44b..94c9fe75a438a 100644
  2523. --- a/js/src/jit/riscv64/MacroAssembler-riscv64.h
  2524. +++ b/js/src/jit/riscv64/MacroAssembler-riscv64.h
  2525. @@ -69,7 +69,7 @@ class MacroAssemblerRiscv64 : public Assembler {
  2526. void copyPreBarrierTable(uint8_t*) { MOZ_CRASH(); }
  2527. void processCodeLabels(uint8_t*) { MOZ_CRASH(); }
  2528. - void flushBuffer() { MOZ_CRASH(); }
  2529. + void flushBuffer() { m_buffer.flushPool(); }
  2530. template <typename T>
  2531. void bind(T) {
  2532. @@ -83,11 +83,16 @@ class MacroAssemblerRiscv64 : public Assembler {
  2533. void jump(T) {
  2534. MOZ_CRASH();
  2535. }
  2536. - void writeCodePointer(CodeLabel* label) { MOZ_CRASH(); }
  2537. + void writeCodePointer(CodeLabel* label) {
  2538. + MOZ_ASSERT(hasCreator());
  2539. + m_buffer.ensureSpace(sizeof(uintptr_t));
  2540. + BufferOffset off = m_buffer.putInt64Unchecked(-1);
  2541. + label->patchAt()->bind(off.getOffset());
  2542. + }
  2543. void haltingAlign(size_t) { MOZ_CRASH(); }
  2544. void nopAlign(size_t) { MOZ_CRASH(); }
  2545. void checkStackAlignment() { MOZ_CRASH(); }
  2546. - uint32_t currentOffset() { MOZ_CRASH(); }
  2547. + uint32_t currentOffset() { return nextOffset().getOffset(); }
  2548. void nop() { MOZ_CRASH(); }
  2549. void breakpoint() { MOZ_CRASH(); }
  2550. @@ -440,10 +445,6 @@ class MacroAssemblerRiscv64 : public Assembler {
  2551. // Instrumentation for entering and leaving the profiler.
  2552. void profilerEnterFrame(Register, Register) { MOZ_CRASH(); }
  2553. void profilerExitFrame() { MOZ_CRASH(); }
  2554. -
  2555. -#ifdef JS_NUNBOX32
  2556. - Address ToType(Address) { MOZ_CRASH(); }
  2557. -#endif
  2558. };
  2559. typedef MacroAssemblerRiscv64 MacroAssemblerSpecific;
  2560. From 5c74e6bed2ed7f68c8ef30c0967aaea41b169476 Mon Sep 17 00:00:00 2001
  2561. From: Makoto Kato <m_kato@ga2.so-net.ne.jp>
  2562. Date: Fri, 10 Jun 2022 12:52:42 +0900
  2563. Subject: [PATCH] Fix spidermonkey
  2564. ---
  2565. js/src/jit/riscv64/Assembler-riscv64.h | 2 +-
  2566. js/src/jit/riscv64/MacroAssembler-riscv64-inl.h | 12 ++++++++++++
  2567. js/src/jit/riscv64/SharedICHelpers-riscv64.h | 3 +++
  2568. js/src/jit/riscv64/SharedICRegisters-riscv64.h | 2 +-
  2569. 4 files changed, 17 insertions(+), 2 deletions(-)
  2570. create mode 100644 js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
  2571. diff --git a/js/src/jit/riscv64/Assembler-riscv64.h b/js/src/jit/riscv64/Assembler-riscv64.h
  2572. index e1a4e0f3c7790..2cea8373d2246 100644
  2573. --- a/js/src/jit/riscv64/Assembler-riscv64.h
  2574. +++ b/js/src/jit/riscv64/Assembler-riscv64.h
  2575. @@ -11,9 +11,9 @@
  2576. #include <stdint.h>
  2577. -#include "jit/riscv64/Architecture-riscv64.h"
  2578. #include "jit/Registers.h"
  2579. #include "jit/RegisterSets.h"
  2580. +#include "jit/riscv64/Architecture-riscv64.h"
  2581. #include "jit/shared/Assembler-shared.h"
  2582. namespace js {
  2583. diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h b/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
  2584. new file mode 100644
  2585. index 0000000000000..fa5ef6e87d0a9
  2586. --- /dev/null
  2587. +++ b/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
  2588. @@ -0,0 +1,12 @@
  2589. +/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
  2590. + * vim: set ts=8 sts=2 et sw=2 tw=80:
  2591. + * This Source Code Form is subject to the terms of the Mozilla Public
  2592. + * License, v. 2.0. If a copy of the MPL was not distributed with this
  2593. + * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
  2594. +
  2595. +#ifndef jit_riscv64_MacroAssembler_riscv64_inl_h
  2596. +#define jit_riscv64_MacroAssembler_riscv64_inl_h
  2597. +
  2598. +#include "jit/riscv64/MacroAssembler-riscv64.h"
  2599. +
  2600. +#endif
  2601. diff --git a/js/src/jit/riscv64/SharedICHelpers-riscv64.h b/js/src/jit/riscv64/SharedICHelpers-riscv64.h
  2602. index 15734c11f5738..205b6615dad5f 100644
  2603. --- a/js/src/jit/riscv64/SharedICHelpers-riscv64.h
  2604. +++ b/js/src/jit/riscv64/SharedICHelpers-riscv64.h
  2605. @@ -7,6 +7,9 @@
  2606. #ifndef jit_riscv64_SharedICHelpers_riscv64_h
  2607. #define jit_riscv64_SharedICHelpers_riscv64_h
  2608. +#include "jit/MacroAssembler.h"
  2609. +#include "jit/SharedICRegisters.h"
  2610. +
  2611. namespace js {
  2612. namespace jit {
  2613. diff --git a/js/src/jit/riscv64/SharedICRegisters-riscv64.h b/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  2614. index 72183cb02c2c0..29b8c71fa3386 100644
  2615. --- a/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  2616. +++ b/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  2617. @@ -7,9 +7,9 @@
  2618. #ifndef jit_riscv64_SharedICRegisters_riscv64_h
  2619. #define jit_riscv64_SharedICRegisters_riscv64_h
  2620. -#include "jit/riscv64/MacroAssembler-riscv64.h"
  2621. #include "jit/Registers.h"
  2622. #include "jit/RegisterSets.h"
  2623. +#include "jit/riscv64/MacroAssembler-riscv64.h"
  2624. namespace js {
  2625. namespace jit {
  2626. From b33c1094612da3623ae23f9ddbe23976fdcbe1f0 Mon Sep 17 00:00:00 2001
  2627. From: Makoto Kato <m_kato@ga2.so-net.ne.jp>
  2628. Date: Sun, 26 Jun 2022 11:32:25 +0900
  2629. Subject: [PATCH] ...
  2630. ---
  2631. js/src/jit/MacroAssembler-inl.h | 2 +
  2632. js/src/jit/MacroAssembler.h | 8 ++-
  2633. js/src/jit/moz.build | 2 +-
  2634. js/src/jit/riscv64/Architecture-riscv64.h | 72 ++++++++++++-------
  2635. js/src/jit/riscv64/Assembler-riscv64.h | 56 +++++++++------
  2636. js/src/jit/riscv64/MacroAssembler-riscv64.h | 38 +++++-----
  2637. .../jit/riscv64/SharedICRegisters-riscv64.h | 8 +--
  2638. js/src/util/Poison.h | 2 +
  2639. js/src/wasm/WasmCompile.cpp | 2 +
  2640. js/src/wasm/WasmFrameIter.cpp | 6 ++
  2641. 10 files changed, 120 insertions(+), 76 deletions(-)
  2642. diff --git a/js/src/jit/MacroAssembler-inl.h b/js/src/jit/MacroAssembler-inl.h
  2643. index 5ed4ac74589e3..1c208e676de57 100644
  2644. --- a/js/src/jit/MacroAssembler-inl.h
  2645. +++ b/js/src/jit/MacroAssembler-inl.h
  2646. @@ -39,6 +39,8 @@
  2647. # include "jit/mips64/MacroAssembler-mips64-inl.h"
  2648. #elif defined(JS_CODEGEN_LOONG64)
  2649. # include "jit/loong64/MacroAssembler-loong64-inl.h"
  2650. +#elif defined(JS_CODEGEN_RISCV64)
  2651. +# include "jit/riscv64/MacroAssembler-riscv64-inl.h"
  2652. #elif defined(JS_CODEGEN_WASM32)
  2653. # include "jit/wasm32/MacroAssembler-wasm32-inl.h"
  2654. #elif !defined(JS_CODEGEN_NONE)
  2655. diff --git a/js/src/jit/MacroAssembler.h b/js/src/jit/MacroAssembler.h
  2656. index a7d4800328690..0737468991181 100644
  2657. --- a/js/src/jit/MacroAssembler.h
  2658. +++ b/js/src/jit/MacroAssembler.h
  2659. @@ -96,8 +98,8 @@
  2660. // }
  2661. // ////}}} check_macroassembler_style
  2662. -#define ALL_ARCH mips32, mips64, arm, arm64, x86, x64, loong64, wasm32
  2663. -#define ALL_SHARED_ARCH arm, arm64, loong64, x86_shared, mips_shared, wasm32
  2664. +#define ALL_ARCH mips32, mips64, arm, arm64, x86, x64, loong64, riscv64, wasm32
  2665. +#define ALL_SHARED_ARCH arm, arm64, loong64, riscv64, x86_shared, mips_shared, wasm32
  2666. // * How this macro works:
  2667. //
  2668. @@ -144,6 +146,7 @@
  2669. #define DEFINED_ON_mips64
  2670. #define DEFINED_ON_mips_shared
  2671. #define DEFINED_ON_loong64
  2672. +#define DEFINED_ON_riscv64
  2673. #define DEFINED_ON_wasm32
  2674. #define DEFINED_ON_none
  2675. @@ -177,6 +180,9 @@
  2676. #elif defined(JS_CODEGEN_LOONG64)
  2677. # undef DEFINED_ON_loong64
  2678. # define DEFINED_ON_loong64 define
  2679. +#elif defined(JS_CODEGEN_RISCV64)
  2680. +# undef DEFINED_ON_riscv64
  2681. +# define DEFINED_ON_riscv64 define
  2682. #elif defined(JS_CODEGEN_WASM32)
  2683. # undef DEFINED_ON_wasm32
  2684. # define DEFINED_ON_wasm32 define
  2685. diff --git a/js/src/jit/riscv64/Architecture-riscv64.h b/js/src/jit/riscv64/Architecture-riscv64.h
  2686. index 2b5495ce5f3d8..a676dc142ec7e 100644
  2687. --- a/js/src/jit/riscv64/Architecture-riscv64.h
  2688. +++ b/js/src/jit/riscv64/Architecture-riscv64.h
  2689. @@ -107,10 +107,10 @@ class Registers {
  2690. static_assert(sizeof(SetType) == 4, "SetType must be 32 bits");
  2691. return mozilla::CountPopulation32(x);
  2692. }
  2693. - static uint32_t FirstBit(SetType) {
  2694. + static uint32_t FirstBit(SetType x) {
  2695. return mozilla::CountTrailingZeroes32(x);
  2696. }
  2697. - static uint32_t LastBit(SetType) {
  2698. + static uint32_t LastBit(SetType x) {
  2699. return 31 - mozilla::CountLeadingZeroes32(x);
  2700. }
  2701. @@ -239,15 +239,18 @@ class FloatRegisters {
  2702. ft11 = 31,
  2703. invalid_reg
  2704. };
  2705. - typedef FPRegisterID Code;
  2706. +
  2707. + typedef uint8_t Code;
  2708. typedef FPRegisterID Encoding;
  2709. + typedef uint32_t SetType;
  2710. +
  2711. + enum Kind : uint8_t { Double, Single };
  2712. +
  2713. union RegisterContent {
  2714. float s;
  2715. double d;
  2716. };
  2717. - typedef uint32_t SetType;
  2718. -
  2719. static const char* GetName(uint32_t code) {
  2720. // clang-format off
  2721. static const char* const Names[] = {
  2722. @@ -264,16 +267,19 @@ class FloatRegisters {
  2723. }
  2724. return Names[code];
  2725. }
  2726. - static Code FromName(const char*) {
  2727. + static Code FromName(const char* name) {
  2728. for (size_t i = 0; i < Total; i++) {
  2729. - if (strcmp(GetName(Code(i)), name) == 0) {
  2730. + if (strcmp(GetName(i), name) == 0) {
  2731. return Code(i);
  2732. }
  2733. }
  2734. +
  2735. return Invalid;
  2736. }
  2737. - static const Code Invalid = invalid_reg;
  2738. + static constexpr Encoding encoding(Code c) { return Encoding(c & 31); }
  2739. +
  2740. + static const Encoding Invalid = invalid_reg;
  2741. static const uint32_t Total = 32;
  2742. static const uint32_t TotalPhys = 32;
  2743. static const uint32_t Allocatable = 32;
  2744. @@ -283,7 +289,7 @@ class FloatRegisters {
  2745. static const SetType VolatileMask =
  2746. (1 << FloatRegisters::ft0) | (1 << FloatRegisters::ft1) |
  2747. (1 << FloatRegisters::ft2) | (1 << FloatRegisters::ft3) |
  2748. - (1 << FloastRegisters::ft4) | (1 << FloatRegisters::ft5) |
  2749. + (1 << FloatRegisters::ft4) | (1 << FloatRegisters::ft5) |
  2750. (1 << FloatRegisters::ft6) | (1 << FloatRegisters::ft7) |
  2751. (1 << FloatRegisters::ft8) | (1 << FloatRegisters::ft9) |
  2752. (1 << FloatRegisters::ft10) | (1 << FloatRegisters::ft11) |
  2753. @@ -307,31 +313,39 @@ class TypedRegisterSet;
  2754. struct FloatRegister {
  2755. typedef FloatRegisters Codes;
  2756. - typedef Codes::Code Code;
  2757. + typedef size_t Code;
  2758. typedef Codes::Encoding Encoding;
  2759. typedef Codes::SetType SetType;
  2760. + typedef Codes::Kind Kind;
  2761. - enum RegType { Single, Double };
  2762. -
  2763. - Code code_ : 5;
  2764. - uint32_t kind_ : 2;
  2765. + private:
  2766. + uint8_t encoding_;
  2767. + uint8_t kind_;
  2768. + bool invalid_;
  2769. - FloatRegister(uint32_t r) : code_(r), kind_(Double) {}
  2770. - FloatRegister(uint32_t r, RegType k) : code_(r), kind_(k) {}
  2771. + public:
  2772. + constexpr FloatRegister(Encoding encoding)
  2773. + : encoding_(encoding), kind_(FloatRegisters::Double), invalid_(false) {}
  2774. + constexpr FloatRegister(Encoding encoding, Kind kind)
  2775. + : encoding_(encoding), kind_(kind), invalid_(false) {}
  2776. + constexpr FloatRegister()
  2777. + : encoding_(0), kind_(FloatRegisters::Double), invalid_(true) {}
  2778. static uint32_t FirstBit(SetType) { MOZ_CRASH(); }
  2779. static uint32_t LastBit(SetType) { MOZ_CRASH(); }
  2780. - static FloatRegister FromCode(uint32_t) { MOZ_CRASH(); }
  2781. - bool isSingle() const { return kind_ == Single; }
  2782. - bool isDouble() const { return kind_ == Double; }
  2783. + static FloatRegister FromCode(uint32_t i) {
  2784. + return FloatRegister(FloatRegisters::encoding(i), FloatRegisters::Double);
  2785. + }
  2786. + bool isSingle() const { return kind_ == FloatRegisters::Single; }
  2787. + bool isDouble() const { return kind_ == FloatRegisters::Double; }
  2788. bool isSimd128() const { return false; }
  2789. - bool isInvalid() const { MOZ_CRASH(); }
  2790. + bool isInvalid() const { return invalid_; }
  2791. FloatRegister asSingle() const { MOZ_CRASH(); }
  2792. FloatRegister asDouble() const { MOZ_CRASH(); }
  2793. FloatRegister asSimd128() const { MOZ_CRASH(); }
  2794. - Code code() const { return code_; }
  2795. - Encoding encoding() const { MOZ_CRASH(); }
  2796. - const char* name() const { MOZ_CRASH(); }
  2797. + Code code() const { MOZ_CRASH(); }
  2798. + Encoding encoding() const { return Encoding(encoding_); }
  2799. + const char* name() const { return FloatRegisters::GetName(code()); }
  2800. bool volatile_() const { MOZ_CRASH(); }
  2801. bool operator!=(FloatRegister) const { MOZ_CRASH(); }
  2802. bool operator==(FloatRegister) const { MOZ_CRASH(); }
  2803. @@ -361,9 +375,15 @@ struct FloatRegister {
  2804. static T ReduceSetForPush(T) {
  2805. MOZ_CRASH();
  2806. }
  2807. - uint32_t getRegisterDumpOffsetInBytes() { MOZ_CRASH(); }
  2808. - static uint32_t SetSize(SetType x) { MOZ_CRASH(); }
  2809. - static Code FromName(const char* name) { MOZ_CRASH(); }
  2810. + uint32_t getRegisterDumpOffsetInBytes() {
  2811. + MOZ_CRASH();
  2812. + return 0;
  2813. + }
  2814. + static uint32_t SetSize(SetType x) {
  2815. + MOZ_CRASH();
  2816. + return 0;
  2817. + }
  2818. + static Code FromName(const char* name) { return 0; }
  2819. // This is used in static initializers, so produce a bogus value instead of
  2820. // crashing.
  2821. diff --git a/js/src/jit/riscv64/Assembler-riscv64.h b/js/src/jit/riscv64/Assembler-riscv64.h
  2822. index 2cea8373d2246..e695662be5cba 100644
  2823. --- a/js/src/jit/riscv64/Assembler-riscv64.h
  2824. +++ b/js/src/jit/riscv64/Assembler-riscv64.h
  2825. @@ -7,32 +7,45 @@
  2826. #ifndef jit_riscv64_Assembler_riscv64_h
  2827. #define jit_riscv64_Assembler_riscv64_h
  2828. -#include "mozilla/Assertions.h"
  2829. -
  2830. -#include <stdint.h>
  2831. +#include "mozilla/Sprintf.h"
  2832. +#include <iterator>
  2833. +#include "jit/CompactBuffer.h"
  2834. +#include "jit/JitCode.h"
  2835. +#include "jit/JitSpewer.h"
  2836. #include "jit/Registers.h"
  2837. #include "jit/RegisterSets.h"
  2838. #include "jit/riscv64/Architecture-riscv64.h"
  2839. #include "jit/shared/Assembler-shared.h"
  2840. +#include "jit/shared/Disassembler-shared.h"
  2841. +#include "jit/shared/IonAssemblerBuffer.h"
  2842. +#include "wasm/WasmTypeDecls.h"
  2843. namespace js {
  2844. namespace jit {
  2845. class MacroAssembler;
  2846. +static constexpr Register t0{Registers::t0};
  2847. +static constexpr Register t1{Registers::t1};
  2848. +static constexpr Register t2{Registers::t2};
  2849. +static constexpr Register t3{Registers::t3};
  2850. +static constexpr Register t4{Registers::t4};
  2851. +static constexpr Register t5{Registers::t5};
  2852. +static constexpr Register t6{Registers::t6};
  2853. +
  2854. static constexpr Register StackPointer{Registers::sp};
  2855. static constexpr Register FramePointer{Registers::fp};
  2856. static constexpr Register ReturnReg{Registers::a0};
  2857. -static constexpr FloatRegister InvalidFloatReg = {FloatRegisters::invalid_reg};
  2858. -static constexpr FloatRegister ReturnFloat32Reg = {FloatRegisters::fa0, Single};
  2859. -static constexpr FloatRegister ReturnDoubleReg = {FloatRegisters::fa0, Double};
  2860. +static constexpr FloatRegister InvalidFloatReg;
  2861. +static constexpr FloatRegister ReturnFloat32Reg{FloatRegisters::fa0,
  2862. + FloatRegisters::Single};
  2863. +static constexpr FloatRegister ReturnDoubleReg{FloatRegisters::fa0,
  2864. + FloatRegisters::Double};
  2865. static constexpr FloatRegister ReturnSimd128Reg = InvalidFloatReg;
  2866. static constexpr FloatRegister ScratchSimd128Reg = InvalidFloatReg;
  2867. -static constexpr FloatRegister ScratchFloat32Reg_ =
  2868. - FloatRegister(FloatRegisters::ft0, FloatRegisters::Single);
  2869. -static constexpr FloatRegister ScratchDoubleReg_ = {FloatResgisters::ft0,
  2870. - FloatRegisters::Double};
  2871. +static constexpr FloatRegister ScratchFloat32Reg_ = InvalidFloatReg;
  2872. +static constexpr FloatRegister ScratchDoubleReg_ = InvalidFloatReg;
  2873. struct ScratchFloat32Scope : AutoFloatRegisterScope {
  2874. explicit ScratchFloat32Scope(MacroAssembler& masm)
  2875. @@ -47,17 +60,14 @@ struct ScratchDoubleScope : AutoFloatRegisterScope {
  2876. static constexpr Register OsrFrameReg{Registers::invalid_reg};
  2877. static constexpr Register PreBarrierReg{Registers::invalid_reg};
  2878. static constexpr Register InterpreterPCReg{Registers::invalid_reg};
  2879. -static constexpr Register CallTempReg0{Registers::t0};
  2880. -static constexpr Register CallTempReg1{Registers::t1};
  2881. -static constexpr Register CallTempReg2{Registers::t2};
  2882. -static constexpr Register CallTempReg3{Registers::t3};
  2883. -static constexpr Register CallTempReg4{Registers::t4};
  2884. -static constexpr Register CallTempReg5{Registers::t5};
  2885. -static constexpr Register CallTempReg6{Registers::t6};
  2886. +static constexpr Register CallTempReg0 = t0;
  2887. +static constexpr Register CallTempReg1 = t1;
  2888. +static constexpr Register CallTempReg2 = t2;
  2889. +static constexpr Register CallTempReg3 = t3;
  2890. +static constexpr Register CallTempReg4 = t4;
  2891. +static constexpr Register CallTempReg5 = t5;
  2892. static constexpr Register InvalidReg{Registers::invalid_reg};
  2893. -static constexpr Register CallTempNonArgRegs[] = {
  2894. - Registers::t0, Registers::t1, Registers::t2, Registers::t3,
  2895. - Registers::t4, Registers::t5, Registers::t6};
  2896. +static constexpr Register CallTempNonArgRegs[] = {t0, t1, t2, t3, t4, t5, t6};
  2897. static const uint32_t NumCallTempNonArgRegs = std::size(CallTempNonArgRegs);
  2898. static constexpr Register IntArgReg0{Registers::a0};
  2899. @@ -85,7 +95,7 @@ static constexpr Register JSReturnReg_Data{Registers::a2};
  2900. static constexpr Register JSReturnReg{Registers::a2};
  2901. static constexpr ValueOperand ValueOperand(JSReturnReg);
  2902. -static constexpr Register64 ReturnReg64(a0);
  2903. +static constexpr Register64 ReturnReg64(ReturnReg);
  2904. static constexpr Register ABINonArgReg0{Registers::s0};
  2905. static constexpr Register ABINonArgReg1{Registers::s1};
  2906. @@ -96,7 +106,7 @@ static constexpr Register ABINonArgReturnReg1{Registers::s1};
  2907. static constexpr Register ABINonVolatileReg{Registers::fp};
  2908. static constexpr Register ABINonArgReturnVolatileReg{Registers::ra};
  2909. -static constexpr FloatRegister ABINonArgDoubleReg = {FloatRegisters::fs0, Double};
  2910. +static constexpr FloatRegister ABINonArgDoubleReg = InvalidFloatReg;
  2911. static constexpr Register WasmTableCallScratchReg0{Registers::invalid_reg};
  2912. static constexpr Register WasmTableCallScratchReg1{Registers::invalid_reg};
  2913. @@ -227,7 +237,7 @@ class Operand {
  2914. public:
  2915. enum Kind { REG };
  2916. - private
  2917. + private:
  2918. Kind kind_ : 4;
  2919. uint32_t reg_ : 5;
  2920. int32_t offset_;
  2921. diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.h b/js/src/jit/riscv64/MacroAssembler-riscv64.h
  2922. index 94c9fe75a438a..6466946454e4f 100644
  2923. --- a/js/src/jit/riscv64/MacroAssembler-riscv64.h
  2924. +++ b/js/src/jit/riscv64/MacroAssembler-riscv64.h
  2925. @@ -7,31 +7,36 @@
  2926. #ifndef jit_riscv64_MacroAssembler_riscv64_h
  2927. #define jit_riscv64_MacroAssembler_riscv64_h
  2928. -#include <iterator>
  2929. -
  2930. -#include "jit/MoveResolver.h"
  2931. #include "jit/riscv64/Assembler-riscv64.h"
  2932. -#include "wasm/WasmTypeDecls.h"
  2933. +#include "jit/MoveResolver.h"
  2934. +#include "wasm/WasmBuiltins.h"
  2935. namespace js {
  2936. namespace jit {
  2937. -class CompactBufferReader;
  2938. -
  2939. -class ScratchTagScope {
  2940. +class ScratchTagScope : public SecondScratchRegisterScope {
  2941. public:
  2942. - ScratchTagScope(MacroAssembler&, const ValueOperand) {}
  2943. - operator Register() { MOZ_CRASH(); }
  2944. - void release() { MOZ_CRASH(); }
  2945. - void reacquire() { MOZ_CRASH(); }
  2946. + ScratchTagScope(MacroAssembler& masm, const ValueOperand&)
  2947. + : SecondScratchRegisterScope(masm) {}
  2948. };
  2949. class ScratchTagScopeRelease {
  2950. + ScratchTagScope* ts_;
  2951. +
  2952. public:
  2953. - explicit ScratchTagScopeRelease(ScratchTagScope*) {}
  2954. + explicit ScratchTagScopeRelease(ScratchTagScope* ts) : ts_(ts) {
  2955. + ts_->release();
  2956. + }
  2957. +
  2958. + ~ScratchTagScopeRelease() { ts_->reacquire(); }
  2959. };
  2960. class MacroAssemblerRiscv64 : public Assembler {
  2961. + protected:
  2962. + // Perform a downcast. Should be removed by Bug 996602.
  2963. + MacroAssembler& asMasm();
  2964. + const MacroAssembler& asMasm() const;
  2965. +
  2966. public:
  2967. MacroAssemblerRiscv64() { MOZ_CRASH(); }
  2968. @@ -52,13 +57,6 @@ class MacroAssemblerRiscv64 : public Assembler {
  2969. void assertNoGCThings() const { MOZ_CRASH(); }
  2970. - static void TraceJumpRelocations(JSTracer*, JitCode*, CompactBufferReader&) {
  2971. - MOZ_CRASH();
  2972. - }
  2973. - static void TraceDataRelocations(JSTracer*, JitCode*, CompactBufferReader&) {
  2974. - MOZ_CRASH();
  2975. - }
  2976. -
  2977. static bool SupportsFloatingPoint() { return false; }
  2978. static bool SupportsUnalignedAccesses() { return false; }
  2979. static bool SupportsFastUnalignedFPAccesses() { return false; }
  2980. @@ -69,7 +67,7 @@ class MacroAssemblerRiscv64 : public Assembler {
  2981. void copyPreBarrierTable(uint8_t*) { MOZ_CRASH(); }
  2982. void processCodeLabels(uint8_t*) { MOZ_CRASH(); }
  2983. - void flushBuffer() { m_buffer.flushPool(); }
  2984. + void flushBuffer() {}
  2985. template <typename T>
  2986. void bind(T) {
  2987. diff --git a/js/src/jit/riscv64/SharedICRegisters-riscv64.h b/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  2988. index 29b8c71fa3386..87e14461f65ba 100644
  2989. --- a/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  2990. +++ b/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  2991. @@ -27,10 +27,10 @@ static constexpr Register ICStubReg{Registers::invalid_reg};
  2992. static constexpr Register ExtractTemp0{Registers::invalid_reg};
  2993. static constexpr Register ExtractTemp1{Registers::invalid_reg};
  2994. -static constexpr FloatRegister FloatReg0 = {FloatRegisters::invalid_reg};
  2995. -static constexpr FloatRegister FloatReg1 = {FloatRegisters::invalid_reg};
  2996. -static constexpr FloatRegister FloatReg2 = {FloatRegisters::invalid_reg};
  2997. -static constexpr FloatRegister FloatReg3 = {FloatRegisters::invalid_reg};
  2998. +static constexpr FloatRegister FloatReg0;
  2999. +static constexpr FloatRegister FloatReg1;
  3000. +static constexpr FloatRegister FloatReg2;
  3001. +static constexpr FloatRegister FloatReg3;
  3002. } // namespace jit
  3003. } // namespace js
  3004. diff --git a/js/src/util/Poison.h b/js/src/util/Poison.h
  3005. index cb8e1abc64b12..a6a2d2f12b80f 100644
  3006. --- a/js/src/util/Poison.h
  3007. +++ b/js/src/util/Poison.h
  3008. @@ -95,6 +95,8 @@ const uint8_t JS_SCOPE_DATA_TRAILING_NAMES_PATTERN = 0xCC;
  3009. # define JS_SWEPT_CODE_PATTERN 0x01 // undefined instruction
  3010. #elif defined(JS_CODEGEN_LOONG64)
  3011. # define JS_SWEPT_CODE_PATTERN 0x01 // undefined instruction
  3012. +#elif defined(JS_CODEGEN_RISCV64)
  3013. +# define JS_SWEPT_CODE_PATTERN 0x01 // undefined instruction
  3014. #else
  3015. # error "JS_SWEPT_CODE_PATTERN not defined for this platform"
  3016. #endif
  3017. diff --git a/js/src/wasm/WasmCompile.cpp b/js/src/wasm/WasmCompile.cpp
  3018. index 26534bca4ea47..403e26414bbf1 100644
  3019. --- a/js/src/wasm/WasmCompile.cpp
  3020. +++ b/js/src/wasm/WasmCompile.cpp
  3021. @@ -74,6 +74,8 @@
  3022. #elif defined(JS_CODEGEN_LOONG64)
  3023. MOZ_ASSERT(jit::GetLOONG64Flags() <= (UINT32_MAX >> ARCH_BITS));
  3024. return LOONG64 | (jit::GetLOONG64Flags() << ARCH_BITS);
  3025. +#elif defined(JS_CODEGEN_RISCV64)
  3026. + return 0;
  3027. #elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32)
  3028. return 0;
  3029. #else
  3030. diff --git a/js/src/wasm/WasmFrameIter.cpp b/js/src/wasm/WasmFrameIter.cpp
  3031. index e612e057049c0..0ce345328713a 100644
  3032. --- a/js/src/wasm/WasmFrameIter.cpp
  3033. +++ b/js/src/wasm/WasmFrameIter.cpp
  3034. @@ -397,6 +397,12 @@
  3035. static const unsigned SetFP = 20;
  3036. static const unsigned PoppedFP = 4;
  3037. static const unsigned PoppedFPJitEntry = 0;
  3038. +#elif defined(JS_CODEGEN_RISCV64)
  3039. +static const unsigned PushedRetAddr = 0;
  3040. +static const unsigned PushedFP = 1;
  3041. +static const unsigned SetFP = 2;
  3042. +static const unsigned PoppedFP = 3;
  3043. +static const unsigned PoppedFPJitEntry = 4;
  3044. #elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32)
  3045. // Synthetic values to satisfy asserts and avoid compiler warnings.
  3046. static const unsigned PushedRetAddr = 0;
  3047. From 8356d013017edc7c71e95bba73a054e6d2e44e28 Mon Sep 17 00:00:00 2001
  3048. From: Makoto Kato <m_kato@ga2.so-net.ne.jp>
  3049. Date: Mon, 27 Jun 2022 21:33:34 +0900
  3050. Subject: [PATCH] ...
  3051. ---
  3052. js/src/jit/FlushICache.h | 2 +-
  3053. js/src/jit/MacroAssembler.cpp | 2 +
  3054. js/src/jit/MacroAssembler.h | 174 +++++++++---------
  3055. js/src/jit/riscv64/Assembler-riscv64.cpp | 11 +-
  3056. js/src/jit/riscv64/Assembler-riscv64.h | 31 +++-
  3057. .../jit/riscv64/MacroAssembler-riscv64-inl.h | 6 +
  3058. js/src/jit/riscv64/MacroAssembler-riscv64.h | 13 +-
  3059. .../jit/riscv64/SharedICRegisters-riscv64.h | 2 +-
  3060. js/src/jit/shared/Assembler-shared.h | 5 +-
  3061. js/src/wasm/WasmBCMemory.cpp | 27 +++
  3062. js/src/wasm/WasmSignalHandlers.cpp | 11 +-
  3063. 11 files changed, 175 insertions(+), 109 deletions(-)
  3064. diff --git a/js/src/jit/FlushICache.h b/js/src/jit/FlushICache.h
  3065. index 42b1fb045ce6d..feeae3c793c23 100644
  3066. --- a/js/src/jit/FlushICache.h
  3067. +++ b/js/src/jit/FlushICache.h
  3068. @@ -25,7 +25,7 @@ inline void FlushICache(void* code, size_t size,
  3069. #elif (defined(JS_CODEGEN_ARM) || defined(JS_CODEGEN_ARM64)) || \
  3070. (defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64)) || \
  3071. - defined(JS_CODEGEN_LOONG64)
  3072. + defined(JS_CODEGEN_LOONG64) || defined(JS_CODEGEN_RISCV64)
  3073. extern void FlushICache(void* code, size_t size, bool codeIsThreadLocal = true);
  3074. diff --git a/js/src/jit/MacroAssembler.cpp b/js/src/jit/MacroAssembler.cpp
  3075. index 3abc601bec090..066560150924b 100644
  3076. --- a/js/src/jit/MacroAssembler.cpp
  3077. +++ b/js/src/jit/MacroAssembler.cpp
  3078. @@ -4068,6 +4068,8 @@
  3079. ma_dsll(temp1, temp1, temp3);
  3080. #elif JS_CODEGEN_LOONG64
  3081. as_sll_d(temp1, temp1, temp3);
  3082. +#elif JS_CODEGEN_RISCV64
  3083. + MOZ_CRASH();
  3084. #elif JS_CODEGEN_WASM32
  3085. MOZ_CRASH();
  3086. #elif JS_CODEGEN_NONE
  3087. diff --git a/js/src/jit/MacroAssembler.h b/js/src/jit/MacroAssembler.h
  3088. index 0737468991181..3395a139d36c7 100644
  3089. --- a/js/src/jit/MacroAssembler.h
  3090. +++ b/js/src/jit/MacroAssembler.h
  3091. @@ -497,10 +503,10 @@
  3092. // The size of the area used by PushRegsInMask.
  3093. size_t PushRegsInMaskSizeInBytes(LiveRegisterSet set)
  3094. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3095. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared, riscv64);
  3096. void PushRegsInMask(LiveRegisterSet set)
  3097. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3098. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared, riscv64);
  3099. void PushRegsInMask(LiveGeneralRegisterSet set);
  3100. // Like PushRegsInMask, but instead of pushing the registers, store them to
  3101. @@ -511,12 +517,12 @@
  3102. // must point to either the lowest address in the save area, or some address
  3103. // below that.
  3104. void storeRegsInMask(LiveRegisterSet set, Address dest, Register scratch)
  3105. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3106. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared, riscv64);
  3107. void PopRegsInMask(LiveRegisterSet set);
  3108. void PopRegsInMask(LiveGeneralRegisterSet set);
  3109. void PopRegsInMaskIgnore(LiveRegisterSet set, LiveRegisterSet ignore)
  3110. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3111. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared, riscv64);
  3112. // ===============================================================
  3113. // Stack manipulation functions -- single registers/values.
  3114. @@ -549,7 +555,7 @@
  3115. void Pop(FloatRegister t) PER_SHARED_ARCH;
  3116. void Pop(const ValueOperand& val) PER_SHARED_ARCH;
  3117. void PopFlags() DEFINED_ON(x86_shared);
  3118. - void PopStackPtr() DEFINED_ON(arm, mips_shared, x86_shared, loong64, wasm32);
  3119. + void PopStackPtr() DEFINED_ON(arm, mips_shared, x86_shared, loong64, riscv64, wasm32);
  3120. void popRooted(VMFunctionData::RootType rootType, Register cellReg,
  3121. const ValueOperand& valueReg);
  3122. @@ -607,8 +613,8 @@
  3123. void callAndPushReturnAddress(Label* label) DEFINED_ON(x86_shared);
  3124. // These do not adjust framePushed().
  3125. - void pushReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64, wasm32);
  3126. - void popReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64, wasm32);
  3127. + void pushReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64, riscv64, wasm32);
  3128. + void popReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64, riscv64, wasm32);
  3129. // Useful for dealing with two-valued returns.
  3130. void moveRegPair(Register src0, Register src1, Register dst0, Register dst1,
  3131. @@ -639,10 +645,10 @@
  3132. // Note: "Near" applies to ARM64 where the target must be within 1 MB (this is
  3133. // release-asserted).
  3134. CodeOffset moveNearAddressWithPatch(Register dest)
  3135. - DEFINED_ON(x86, x64, arm, arm64, loong64, wasm32, mips_shared);
  3136. + DEFINED_ON(x86, x64, arm, arm64, loong64, riscv64, wasm32, mips_shared);
  3137. static void patchNearAddressMove(CodeLocationLabel loc,
  3138. CodeLocationLabel target)
  3139. - DEFINED_ON(x86, x64, arm, arm64, loong64, wasm32, mips_shared);
  3140. + DEFINED_ON(x86, x64, arm, arm64, loong64, riscv64, wasm32, mips_shared);
  3141. public:
  3142. // ===============================================================
  3143. @@ -1051,17 +1057,17 @@
  3144. inline void addPtr(ImmWord imm, Register dest) PER_ARCH;
  3145. inline void addPtr(ImmPtr imm, Register dest);
  3146. inline void addPtr(Imm32 imm, const Address& dest)
  3147. - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32);
  3148. + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64, wasm32);
  3149. inline void addPtr(Imm32 imm, const AbsoluteAddress& dest)
  3150. DEFINED_ON(x86, x64);
  3151. inline void addPtr(const Address& src, Register dest)
  3152. - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32);
  3153. + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64, wasm32);
  3154. inline void add64(Register64 src, Register64 dest) PER_ARCH;
  3155. inline void add64(Imm32 imm, Register64 dest) PER_ARCH;
  3156. inline void add64(Imm64 imm, Register64 dest) PER_ARCH;
  3157. inline void add64(const Operand& src, Register64 dest)
  3158. - DEFINED_ON(x64, mips64, loong64);
  3159. + DEFINED_ON(x64, mips64, loong64, riscv64);
  3160. inline void addFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
  3161. @@ -1080,16 +1086,16 @@
  3162. inline void subPtr(Register src, Register dest) PER_ARCH;
  3163. inline void subPtr(Register src, const Address& dest)
  3164. - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32);
  3165. + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64, wasm32);
  3166. inline void subPtr(Imm32 imm, Register dest) PER_ARCH;
  3167. inline void subPtr(ImmWord imm, Register dest) DEFINED_ON(x64);
  3168. inline void subPtr(const Address& addr, Register dest)
  3169. - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32);
  3170. + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64, wasm32);
  3171. inline void sub64(Register64 src, Register64 dest) PER_ARCH;
  3172. inline void sub64(Imm64 imm, Register64 dest) PER_ARCH;
  3173. inline void sub64(const Operand& src, Register64 dest)
  3174. - DEFINED_ON(x64, mips64, loong64);
  3175. + DEFINED_ON(x64, mips64, loong64, riscv64);
  3176. inline void subFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
  3177. @@ -1105,10 +1111,11 @@
  3178. inline void mul64(const Operand& src, const Register64& dest) DEFINED_ON(x64);
  3179. inline void mul64(const Operand& src, const Register64& dest,
  3180. - const Register temp) DEFINED_ON(x64, mips64, loong64);
  3181. + const Register temp)
  3182. + DEFINED_ON(x64, mips64, loong64, riscv64);
  3183. inline void mul64(Imm64 imm, const Register64& dest) PER_ARCH;
  3184. inline void mul64(Imm64 imm, const Register64& dest, const Register temp)
  3185. - DEFINED_ON(x86, x64, arm, mips32, mips64, loong64);
  3186. + DEFINED_ON(x86, x64, arm, mips32, mips64, loong64, riscv64);
  3187. inline void mul64(const Register64& src, const Register64& dest,
  3188. const Register temp) PER_ARCH;
  3189. inline void mul64(const Register64& src1, const Register64& src2,
  3190. @@ -1122,14 +1129,14 @@
  3191. inline void mulDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
  3192. inline void mulDoublePtr(ImmPtr imm, Register temp, FloatRegister dest)
  3193. - DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, wasm32);
  3194. + DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64, wasm32);
  3195. // Perform an integer division, returning the integer part rounded toward
  3196. // zero. rhs must not be zero, and the division must not overflow.
  3197. //
  3198. // On ARM, the chip must have hardware division instructions.
  3199. inline void quotient32(Register rhs, Register srcDest, bool isUnsigned)
  3200. - DEFINED_ON(mips_shared, arm, arm64, loong64, wasm32);
  3201. + DEFINED_ON(mips_shared, arm, arm64, loong64, riscv64, wasm32);
  3202. // As above, but srcDest must be eax and tempEdx must be edx.
  3203. inline void quotient32(Register rhs, Register srcDest, Register tempEdx,
  3204. @@ -1140,7 +1147,7 @@
  3205. //
  3206. // On ARM, the chip must have hardware division instructions.
  3207. inline void remainder32(Register rhs, Register srcDest, bool isUnsigned)
  3208. - DEFINED_ON(mips_shared, arm, arm64, loong64, wasm32);
  3209. + DEFINED_ON(mips_shared, arm, arm64, loong64, riscv64, wasm32);
  3210. // As above, but srcDest must be eax and tempEdx must be edx.
  3211. inline void remainder32(Register rhs, Register srcDest, Register tempEdx,
  3212. @@ -1155,7 +1162,7 @@
  3213. // rhs is preserved, srdDest is clobbered.
  3214. void flexibleRemainder32(Register rhs, Register srcDest, bool isUnsigned,
  3215. const LiveRegisterSet& volatileLiveRegs)
  3216. - DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, wasm32);
  3217. + DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, riscv64, wasm32);
  3218. // Perform an integer division, returning the integer part rounded toward
  3219. // zero. rhs must not be zero, and the division must not overflow.
  3220. @@ -1166,7 +1173,7 @@
  3221. // rhs is preserved, srdDest is clobbered.
  3222. void flexibleQuotient32(Register rhs, Register srcDest, bool isUnsigned,
  3223. const LiveRegisterSet& volatileLiveRegs)
  3224. - DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64);
  3225. + DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, riscv64);
  3226. // Perform an integer division, returning the integer part rounded toward
  3227. // zero. rhs must not be zero, and the division must not overflow. The
  3228. @@ -1179,7 +1186,7 @@
  3229. void flexibleDivMod32(Register rhs, Register srcDest, Register remOutput,
  3230. bool isUnsigned,
  3231. const LiveRegisterSet& volatileLiveRegs)
  3232. - DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, wasm32);
  3233. + DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, riscv64, wasm32);
  3234. inline void divFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
  3235. inline void divDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
  3236. @@ -1386,7 +1393,7 @@
  3237. template <typename T1, typename T2>
  3238. inline void cmp32Set(Condition cond, T1 lhs, T2 rhs, Register dest)
  3239. - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32);
  3240. + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64, wasm32);
  3241. // Only the NotEqual and Equal conditions are allowed.
  3242. inline void cmp64Set(Condition cond, Address lhs, Imm64 rhs,
  3243. @@ -1421,10 +1428,10 @@
  3244. inline void branch32(Condition cond, const AbsoluteAddress& lhs, Register rhs,
  3245. Label* label)
  3246. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3247. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3248. inline void branch32(Condition cond, const AbsoluteAddress& lhs, Imm32 rhs,
  3249. Label* label)
  3250. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3251. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3252. inline void branch32(Condition cond, const BaseIndex& lhs, Register rhs,
  3253. Label* label) DEFINED_ON(arm, x86_shared);
  3254. @@ -1438,7 +1445,7 @@
  3255. inline void branch32(Condition cond, wasm::SymbolicAddress lhs, Imm32 rhs,
  3256. Label* label)
  3257. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3258. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3259. // The supported condition are Equal, NotEqual, LessThan(orEqual),
  3260. // GreaterThan(orEqual), Below(orEqual) and Above(orEqual). When a fail label
  3261. @@ -1489,14 +1496,14 @@
  3262. inline void branchPtr(Condition cond, const AbsoluteAddress& lhs,
  3263. Register rhs, Label* label)
  3264. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3265. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3266. inline void branchPtr(Condition cond, const AbsoluteAddress& lhs, ImmWord rhs,
  3267. Label* label)
  3268. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3269. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3270. inline void branchPtr(Condition cond, wasm::SymbolicAddress lhs, Register rhs,
  3271. Label* label)
  3272. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3273. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3274. // Given a pointer to a GC Cell, retrieve the StoreBuffer pointer from its
  3275. // chunk header, or nullptr if it is in the tenured heap.
  3276. @@ -1504,7 +1511,7 @@
  3277. void branchPtrInNurseryChunk(Condition cond, Register ptr, Register temp,
  3278. Label* label)
  3279. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3280. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3281. void branchPtrInNurseryChunk(Condition cond, const Address& address,
  3282. Register temp, Label* label) DEFINED_ON(x86);
  3283. void branchValueIsNurseryCell(Condition cond, const Address& address,
  3284. @@ -1526,10 +1533,10 @@
  3285. // x64 variants will do this only in the int64_t range.
  3286. inline void branchTruncateFloat32MaybeModUint32(FloatRegister src,
  3287. Register dest, Label* fail)
  3288. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3289. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3290. inline void branchTruncateDoubleMaybeModUint32(FloatRegister src,
  3291. Register dest, Label* fail)
  3292. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3293. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3294. // Truncate a double/float32 to intptr and when it doesn't fit jump to the
  3295. // failure label.
  3296. @@ -1542,10 +1549,10 @@
  3297. // failure label.
  3298. inline void branchTruncateFloat32ToInt32(FloatRegister src, Register dest,
  3299. Label* fail)
  3300. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3301. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3302. inline void branchTruncateDoubleToInt32(FloatRegister src, Register dest,
  3303. Label* fail)
  3304. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3305. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3306. inline void branchDouble(DoubleCondition cond, FloatRegister lhs,
  3307. FloatRegister rhs, Label* label) PER_SHARED_ARCH;
  3308. @@ -1602,7 +1609,7 @@
  3309. Label* label) PER_SHARED_ARCH;
  3310. inline void branchTest32(Condition cond, const AbsoluteAddress& lhs,
  3311. Imm32 rhs, Label* label)
  3312. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3313. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3314. template <class L>
  3315. inline void branchTestPtr(Condition cond, Register lhs, Register rhs,
  3316. @@ -1763,7 +1770,7 @@
  3317. inline void branchTestInt32(Condition cond, Register tag,
  3318. Label* label) PER_SHARED_ARCH;
  3319. inline void branchTestDouble(Condition cond, Register tag, Label* label)
  3320. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3321. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3322. inline void branchTestNumber(Condition cond, Register tag,
  3323. Label* label) PER_SHARED_ARCH;
  3324. inline void branchTestBoolean(Condition cond, Register tag,
  3325. @@ -1795,7 +1802,7 @@
  3326. Label* label) PER_SHARED_ARCH;
  3327. inline void branchTestUndefined(Condition cond, const ValueOperand& value,
  3328. Label* label)
  3329. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3330. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3331. inline void branchTestInt32(Condition cond, const Address& address,
  3332. Label* label) PER_SHARED_ARCH;
  3333. @@ -1803,7 +1810,7 @@
  3334. Label* label) PER_SHARED_ARCH;
  3335. inline void branchTestInt32(Condition cond, const ValueOperand& value,
  3336. Label* label)
  3337. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3338. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3339. inline void branchTestDouble(Condition cond, const Address& address,
  3340. Label* label) PER_SHARED_ARCH;
  3341. @@ -1811,11 +1818,11 @@
  3342. Label* label) PER_SHARED_ARCH;
  3343. inline void branchTestDouble(Condition cond, const ValueOperand& value,
  3344. Label* label)
  3345. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3346. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3347. inline void branchTestNumber(Condition cond, const ValueOperand& value,
  3348. Label* label)
  3349. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3350. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3351. inline void branchTestBoolean(Condition cond, const Address& address,
  3352. Label* label) PER_SHARED_ARCH;
  3353. @@ -1823,7 +1830,7 @@
  3354. Label* label) PER_SHARED_ARCH;
  3355. inline void branchTestBoolean(Condition cond, const ValueOperand& value,
  3356. Label* label)
  3357. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3358. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3359. inline void branchTestString(Condition cond, const Address& address,
  3360. Label* label) PER_SHARED_ARCH;
  3361. @@ -1831,7 +1838,7 @@
  3362. Label* label) PER_SHARED_ARCH;
  3363. inline void branchTestString(Condition cond, const ValueOperand& value,
  3364. Label* label)
  3365. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3366. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3367. inline void branchTestSymbol(Condition cond, const Address& address,
  3368. Label* label) PER_SHARED_ARCH;
  3369. @@ -1839,7 +1846,7 @@
  3370. Label* label) PER_SHARED_ARCH;
  3371. inline void branchTestSymbol(Condition cond, const ValueOperand& value,
  3372. Label* label)
  3373. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3374. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3375. inline void branchTestBigInt(Condition cond, const Address& address,
  3376. Label* label) PER_SHARED_ARCH;
  3377. @@ -1847,7 +1854,7 @@
  3378. Label* label) PER_SHARED_ARCH;
  3379. inline void branchTestBigInt(Condition cond, const ValueOperand& value,
  3380. Label* label)
  3381. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3382. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3383. inline void branchTestNull(Condition cond, const Address& address,
  3384. Label* label) PER_SHARED_ARCH;
  3385. @@ -1855,7 +1862,7 @@
  3386. Label* label) PER_SHARED_ARCH;
  3387. inline void branchTestNull(Condition cond, const ValueOperand& value,
  3388. Label* label)
  3389. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3390. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3391. // Clobbers the ScratchReg on x64.
  3392. inline void branchTestObject(Condition cond, const Address& address,
  3393. @@ -1864,7 +1871,7 @@
  3394. Label* label) PER_SHARED_ARCH;
  3395. inline void branchTestObject(Condition cond, const ValueOperand& value,
  3396. Label* label)
  3397. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3398. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3399. inline void branchTestGCThing(Condition cond, const Address& address,
  3400. Label* label) PER_SHARED_ARCH;
  3401. @@ -1875,7 +1882,7 @@
  3402. inline void branchTestPrimitive(Condition cond, const ValueOperand& value,
  3403. Label* label)
  3404. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3405. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3406. inline void branchTestMagic(Condition cond, const Address& address,
  3407. Label* label) PER_SHARED_ARCH;
  3408. @@ -1884,7 +1891,7 @@
  3409. template <class L>
  3410. inline void branchTestMagic(Condition cond, const ValueOperand& value,
  3411. L label)
  3412. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3413. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3414. inline void branchTestMagic(Condition cond, const Address& valaddr,
  3415. JSWhyMagic why, Label* label) PER_ARCH;
  3416. @@ -1902,17 +1909,17 @@
  3417. // The type of the value should match the type of the method.
  3418. inline void branchTestInt32Truthy(bool truthy, const ValueOperand& value,
  3419. Label* label)
  3420. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, wasm32);
  3421. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64, wasm32);
  3422. inline void branchTestDoubleTruthy(bool truthy, FloatRegister reg,
  3423. Label* label) PER_SHARED_ARCH;
  3424. inline void branchTestBooleanTruthy(bool truthy, const ValueOperand& value,
  3425. Label* label) PER_ARCH;
  3426. inline void branchTestStringTruthy(bool truthy, const ValueOperand& value,
  3427. Label* label)
  3428. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3429. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3430. inline void branchTestBigIntTruthy(bool truthy, const ValueOperand& value,
  3431. Label* label)
  3432. - DEFINED_ON(arm, arm64, mips32, mips64, loong64, wasm32, x86_shared);
  3433. + DEFINED_ON(arm, arm64, mips32, mips64, loong64, riscv64, wasm32, x86_shared);
  3434. // Create an unconditional branch to the address given as argument.
  3435. inline void branchToComputedAddress(const BaseIndex& address) PER_ARCH;
  3436. @@ -2014,11 +2021,11 @@
  3437. inline void cmp32Move32(Condition cond, Register lhs, Register rhs,
  3438. Register src, Register dest)
  3439. - DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86_shared);
  3440. + DEFINED_ON(arm, arm64, loong64, riscv64, wasm32, mips_shared, x86_shared);
  3441. inline void cmp32Move32(Condition cond, Register lhs, const Address& rhs,
  3442. Register src, Register dest)
  3443. - DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86_shared);
  3444. + DEFINED_ON(arm, arm64, loong64, riscv64, wasm32, mips_shared, x86_shared);
  3445. inline void cmpPtrMovePtr(Condition cond, Register lhs, Register rhs,
  3446. Register src, Register dest) PER_ARCH;
  3447. @@ -2028,36 +2035,36 @@
  3448. inline void cmp32Load32(Condition cond, Register lhs, const Address& rhs,
  3449. const Address& src, Register dest)
  3450. - DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared);
  3451. + DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared, riscv64);
  3452. inline void cmp32Load32(Condition cond, Register lhs, Register rhs,
  3453. const Address& src, Register dest)
  3454. - DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared);
  3455. + DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared, riscv64);
  3456. inline void cmp32LoadPtr(Condition cond, const Address& lhs, Imm32 rhs,
  3457. const Address& src, Register dest)
  3458. - DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86, x64);
  3459. + DEFINED_ON(arm, arm64, loong64, riscv64, wasm32, mips_shared, x86, x64);
  3460. inline void cmp32MovePtr(Condition cond, Register lhs, Imm32 rhs,
  3461. Register src, Register dest)
  3462. - DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86, x64);
  3463. + DEFINED_ON(arm, arm64, loong64, riscv64, wasm32, mips_shared, x86, x64);
  3464. inline void test32LoadPtr(Condition cond, const Address& addr, Imm32 mask,
  3465. const Address& src, Register dest)
  3466. - DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86, x64);
  3467. + DEFINED_ON(arm, arm64, loong64, riscv64, wasm32, mips_shared, x86, x64);
  3468. inline void test32MovePtr(Condition cond, const Address& addr, Imm32 mask,
  3469. Register src, Register dest)
  3470. - DEFINED_ON(arm, arm64, loong64, wasm32, mips_shared, x86, x64);
  3471. + DEFINED_ON(arm, arm64, loong64, riscv64, wasm32, mips_shared, x86, x64);
  3472. // Conditional move for Spectre mitigations.
  3473. inline void spectreMovePtr(Condition cond, Register src, Register dest)
  3474. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3475. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3476. // Zeroes dest if the condition is true.
  3477. inline void spectreZeroRegister(Condition cond, Register scratch,
  3478. Register dest)
  3479. - DEFINED_ON(arm, arm64, mips_shared, x86_shared, loong64, wasm32);
  3480. + DEFINED_ON(arm, arm64, mips_shared, x86_shared, loong64, riscv64, wasm32);
  3481. // Performs a bounds check and zeroes the index register if out-of-bounds
  3482. // (to mitigate Spectre).
  3483. @@ -2069,17 +2076,17 @@
  3484. public:
  3485. inline void spectreBoundsCheck32(Register index, Register length,
  3486. Register maybeScratch, Label* failure)
  3487. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3488. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3489. inline void spectreBoundsCheck32(Register index, const Address& length,
  3490. Register maybeScratch, Label* failure)
  3491. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3492. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3493. inline void spectreBoundsCheckPtr(Register index, Register length,
  3494. Register maybeScratch, Label* failure)
  3495. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3496. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3497. inline void spectreBoundsCheckPtr(Register index, const Address& length,
  3498. Register maybeScratch, Label* failure)
  3499. - DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, wasm32);
  3500. + DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64, wasm32);
  3501. // ========================================================================
  3502. // Canonicalization primitives.
  3503. @@ -2093,10 +2100,10 @@
  3504. // ========================================================================
  3505. // Memory access primitives.
  3506. inline void storeUncanonicalizedDouble(FloatRegister src, const Address& dest)
  3507. - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32);
  3508. + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64, wasm32);
  3509. inline void storeUncanonicalizedDouble(FloatRegister src,
  3510. const BaseIndex& dest)
  3511. - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32);
  3512. + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64, wasm32);
  3513. inline void storeUncanonicalizedDouble(FloatRegister src, const Operand& dest)
  3514. DEFINED_ON(x86_shared);
  3515. @@ -2110,10 +2117,10 @@
  3516. inline void storeUncanonicalizedFloat32(FloatRegister src,
  3517. const Address& dest)
  3518. - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32);
  3519. + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64, wasm32);
  3520. inline void storeUncanonicalizedFloat32(FloatRegister src,
  3521. const BaseIndex& dest)
  3522. - DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, wasm32);
  3523. + DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64, wasm32);
  3524. inline void storeUncanonicalizedFloat32(FloatRegister src,
  3525. const Operand& dest)
  3526. DEFINED_ON(x86_shared);
  3527. @@ -3514,10 +3521,10 @@
  3528. // temp required on x86 and x64; must be undefined on mips64 and loong64.
  3529. void convertUInt64ToFloat32(Register64 src, FloatRegister dest, Register temp)
  3530. - DEFINED_ON(arm64, mips64, loong64, wasm32, x64, x86);
  3531. + DEFINED_ON(arm64, mips64, loong64, riscv64, wasm32, x64, x86);
  3532. void convertInt64ToFloat32(Register64 src, FloatRegister dest)
  3533. - DEFINED_ON(arm64, mips64, loong64, wasm32, x64, x86);
  3534. + DEFINED_ON(arm64, mips64, loong64, riscv64, wasm32, x64, x86);
  3535. bool convertUInt64ToDoubleNeedsTemp() PER_ARCH;
  3536. @@ -3569,19 +3576,19 @@
  3537. void wasmBoundsCheck32(Condition cond, Register index,
  3538. Register boundsCheckLimit, Label* ok)
  3539. - DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64, wasm32);
  3540. + DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64, riscv64, wasm32);
  3541. void wasmBoundsCheck32(Condition cond, Register index,
  3542. Address boundsCheckLimit, Label* ok)
  3543. - DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64, wasm32);
  3544. + DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64, riscv64, wasm32);
  3545. void wasmBoundsCheck64(Condition cond, Register64 index,
  3546. Register64 boundsCheckLimit, Label* ok)
  3547. - DEFINED_ON(arm64, mips64, x64, x86, arm, loong64, wasm32);
  3548. + DEFINED_ON(arm64, mips64, x64, x86, arm, loong64, riscv64, wasm32);
  3549. void wasmBoundsCheck64(Condition cond, Register64 index,
  3550. Address boundsCheckLimit, Label* ok)
  3551. - DEFINED_ON(arm64, mips64, x64, x86, arm, loong64, wasm32);
  3552. + DEFINED_ON(arm64, mips64, x64, x86, arm, loong64, riscv64, wasm32);
  3553. // Each wasm load/store instruction appends its own wasm::Trap::OutOfBounds.
  3554. void wasmLoad(const wasm::MemoryAccessDesc& access, Operand srcAddr,
  3555. @@ -3674,7 +3681,7 @@
  3556. void oolWasmTruncateCheckF64ToI32(FloatRegister input, Register output,
  3557. TruncFlags flags, wasm::BytecodeOffset off,
  3558. Label* rejoin)
  3559. - DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, wasm32);
  3560. + DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, riscv64, wasm32);
  3561. void wasmTruncateFloat32ToUInt32(FloatRegister input, Register output,
  3562. bool isSaturating, Label* oolEntry) PER_ARCH;
  3563. @@ -3684,35 +3691,35 @@
  3564. void oolWasmTruncateCheckF32ToI32(FloatRegister input, Register output,
  3565. TruncFlags flags, wasm::BytecodeOffset off,
  3566. Label* rejoin)
  3567. - DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, wasm32);
  3568. + DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, riscv64, wasm32);
  3569. // The truncate-to-int64 methods will always bind the `oolRejoin` label
  3570. // after the last emitted instruction.
  3571. void wasmTruncateDoubleToInt64(FloatRegister input, Register64 output,
  3572. bool isSaturating, Label* oolEntry,
  3573. Label* oolRejoin, FloatRegister tempDouble)
  3574. - DEFINED_ON(arm64, x86, x64, mips64, loong64, wasm32);
  3575. + DEFINED_ON(arm64, x86, x64, mips64, loong64, riscv64, wasm32);
  3576. void wasmTruncateDoubleToUInt64(FloatRegister input, Register64 output,
  3577. bool isSaturating, Label* oolEntry,
  3578. Label* oolRejoin, FloatRegister tempDouble)
  3579. - DEFINED_ON(arm64, x86, x64, mips64, loong64, wasm32);
  3580. + DEFINED_ON(arm64, x86, x64, mips64, loong64, riscv64, wasm32);
  3581. void oolWasmTruncateCheckF64ToI64(FloatRegister input, Register64 output,
  3582. TruncFlags flags, wasm::BytecodeOffset off,
  3583. Label* rejoin)
  3584. - DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, wasm32);
  3585. + DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, riscv64, wasm32);
  3586. void wasmTruncateFloat32ToInt64(FloatRegister input, Register64 output,
  3587. bool isSaturating, Label* oolEntry,
  3588. Label* oolRejoin, FloatRegister tempDouble)
  3589. - DEFINED_ON(arm64, x86, x64, mips64, loong64, wasm32);
  3590. + DEFINED_ON(arm64, x86, x64, mips64, loong64, riscv64, wasm32);
  3591. void wasmTruncateFloat32ToUInt64(FloatRegister input, Register64 output,
  3592. bool isSaturating, Label* oolEntry,
  3593. Label* oolRejoin, FloatRegister tempDouble)
  3594. - DEFINED_ON(arm64, x86, x64, mips64, loong64, wasm32);
  3595. + DEFINED_ON(arm64, x86, x64, mips64, loong64, riscv64, wasm32);
  3596. void oolWasmTruncateCheckF32ToI64(FloatRegister input, Register64 output,
  3597. TruncFlags flags, wasm::BytecodeOffset off,
  3598. Label* rejoin)
  3599. - DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, wasm32);
  3600. + DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, riscv64, wasm32);
  3601. void loadWasmGlobalPtr(uint32_t globalDataOffset, Register dest);
  3602. @@ -3775,7 +3782,7 @@
  3603. // convention, which requires predictable high bits. In practice, this means
  3604. // that the 32-bit value will be zero-extended or sign-extended to 64 bits as
  3605. // appropriate for the platform.
  3606. - void widenInt32(Register r) DEFINED_ON(arm64, x64, mips64, loong64);
  3607. + void widenInt32(Register r) DEFINED_ON(arm64, x64, mips64, loong64, riscv64);
  3608. // As enterFakeExitFrame(), but using register conventions appropriate for
  3609. // wasm stubs.
  3610. @@ -5017,7 +5024,7 @@
  3611. inline void addStackPtrTo(T t);
  3612. void subFromStackPtr(Imm32 imm32)
  3613. - DEFINED_ON(mips32, mips64, loong64, wasm32, arm, x86, x64);
  3614. + DEFINED_ON(mips32, mips64, loong64, riscv64, wasm32, arm, x86, x64);
  3615. void subFromStackPtr(Register reg);
  3616. template <typename T>
  3617. diff --git a/js/src/jit/riscv64/Assembler-riscv64.cpp b/js/src/jit/riscv64/Assembler-riscv64.cpp
  3618. index 0e9cf05fcc111..90fa6d87a83d4 100644
  3619. --- a/js/src/jit/riscv64/Assembler-riscv64.cpp
  3620. +++ b/js/src/jit/riscv64/Assembler-riscv64.cpp
  3621. @@ -21,19 +21,24 @@ ABIArg ABIArgGenerator::next(MIRType type) {
  3622. stackOffset_ += sizeof(uintptr_t);
  3623. break;
  3624. }
  3625. - current_ = ABIArg(IntArgRegs[intRegIndex_++]);
  3626. + current_ = ABIArg(Register::FromCode(intRegIndex_));
  3627. + intRegIndex_++;
  3628. break;
  3629. + case MIRType::Float32:
  3630. case MIRType::Double:
  3631. if (floatRegIndex_ == NumFloatArgRegs) {
  3632. current_ = ABIArg(stackOffset_);
  3633. stackOffset_ += sizeof(double);
  3634. break;
  3635. }
  3636. - current_ = ABIArg(FloatArgReg[floatRegIndex_++]);
  3637. + current_ = ABIArg(FloatRegister(FloatRegisters::Encoding(floatRegIndex_),
  3638. + type == MIRType::Double
  3639. + ? FloatRegisters::Double
  3640. + : FloatRegisters::Single));
  3641. + floatRegIndex_++;
  3642. break;
  3643. - case MIRType::Float32:
  3644. case MIRType::Simd128:
  3645. default:
  3646. MOZ_CRASH("Unexpected argument type");
  3647. diff --git a/js/src/jit/riscv64/Assembler-riscv64.h b/js/src/jit/riscv64/Assembler-riscv64.h
  3648. index e695662be5cba..a58e6c4aff222 100644
  3649. --- a/js/src/jit/riscv64/Assembler-riscv64.h
  3650. +++ b/js/src/jit/riscv64/Assembler-riscv64.h
  3651. @@ -13,8 +13,6 @@
  3652. #include "jit/CompactBuffer.h"
  3653. #include "jit/JitCode.h"
  3654. #include "jit/JitSpewer.h"
  3655. -#include "jit/Registers.h"
  3656. -#include "jit/RegisterSets.h"
  3657. #include "jit/riscv64/Architecture-riscv64.h"
  3658. #include "jit/shared/Assembler-shared.h"
  3659. #include "jit/shared/Disassembler-shared.h"
  3660. @@ -33,6 +31,8 @@ static constexpr Register t3{Registers::t3};
  3661. static constexpr Register t4{Registers::t4};
  3662. static constexpr Register t5{Registers::t5};
  3663. static constexpr Register t6{Registers::t6};
  3664. +static constexpr Register s0{Registers::s0};
  3665. +static constexpr Register s4{Registers::s4};
  3666. static constexpr Register StackPointer{Registers::sp};
  3667. static constexpr Register FramePointer{Registers::fp};
  3668. @@ -47,6 +47,19 @@ static constexpr FloatRegister ScratchSimd128Reg = InvalidFloatReg;
  3669. static constexpr FloatRegister ScratchFloat32Reg_ = InvalidFloatReg;
  3670. static constexpr FloatRegister ScratchDoubleReg_ = InvalidFloatReg;
  3671. +static constexpr Register ScratchRegister = t6;
  3672. +
  3673. +// Helper class for ScratchRegister usage. Asserts that only one piece
  3674. +// of code thinks it has exclusive ownership of the scratch register.
  3675. +struct ScratchRegisterScope : public AutoRegisterScope {
  3676. + explicit ScratchRegisterScope(MacroAssembler& masm)
  3677. + : AutoRegisterScope(masm, ScratchRegister) {}
  3678. +};
  3679. +
  3680. +struct SecondScratchRegisterScope : public AutoRegisterScope {
  3681. + explicit SecondScratchRegisterScope(MacroAssembler& masm);
  3682. +};
  3683. +
  3684. struct ScratchFloat32Scope : AutoFloatRegisterScope {
  3685. explicit ScratchFloat32Scope(MacroAssembler& masm)
  3686. : AutoFloatRegisterScope(masm, ScratchFloat32Reg_) {}
  3687. @@ -94,7 +107,6 @@ static constexpr Register JSReturnReg_Type{Registers::a3};
  3688. static constexpr Register JSReturnReg_Data{Registers::a2};
  3689. static constexpr Register JSReturnReg{Registers::a2};
  3690. -static constexpr ValueOperand ValueOperand(JSReturnReg);
  3691. static constexpr Register64 ReturnReg64(ReturnReg);
  3692. static constexpr Register ABINonArgReg0{Registers::s0};
  3693. @@ -108,6 +120,11 @@ static constexpr Register ABINonArgReturnVolatileReg{Registers::ra};
  3694. static constexpr FloatRegister ABINonArgDoubleReg = InvalidFloatReg;
  3695. +// Instance pointer argument register for WebAssembly functions. This must not
  3696. +// alias any other register used for passing function arguments or return
  3697. +// values. Preserved by WebAssembly functions.
  3698. +static constexpr Register InstanceReg = s4;
  3699. +
  3700. static constexpr Register WasmTableCallScratchReg0{Registers::invalid_reg};
  3701. static constexpr Register WasmTableCallScratchReg1{Registers::invalid_reg};
  3702. static constexpr Register WasmTableCallSigReg{Registers::invalid_reg};
  3703. @@ -183,6 +200,11 @@ class Assembler : public AssemblerShared {
  3704. static DoubleCondition InvertCondition(DoubleCondition) { MOZ_CRASH(); }
  3705. + static void TraceJumpRelocations(JSTracer* trc, JitCode* code,
  3706. + CompactBufferReader& reader);
  3707. + static void TraceDataRelocations(JSTracer* trc, JitCode* code,
  3708. + CompactBufferReader& reader);
  3709. +
  3710. template <typename T, typename S>
  3711. static void PatchDataWithValueCheck(CodeLocationLabel, T, S) {
  3712. MOZ_CRASH();
  3713. @@ -255,6 +277,9 @@ class Operand {
  3714. Kind kind() const { return kind_; }
  3715. };
  3716. +static const uint32_t NumIntArgRegs = 8;
  3717. +static const uint32_t NumFloatArgRegs = 8;
  3718. +
  3719. class ABIArgGenerator {
  3720. public:
  3721. ABIArgGenerator()
  3722. diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h b/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
  3723. index fa5ef6e87d0a9..3dd6273d0f01b 100644
  3724. --- a/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
  3725. +++ b/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h
  3726. @@ -9,4 +9,10 @@
  3727. #include "jit/riscv64/MacroAssembler-riscv64.h"
  3728. +namespace js {
  3729. +namespace jit {
  3730. +
  3731. +} // namespace jit
  3732. +} // namespace js
  3733. +
  3734. #endif
  3735. diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.h b/js/src/jit/riscv64/MacroAssembler-riscv64.h
  3736. index 6466946454e4f..30ca17d359d4d 100644
  3737. --- a/js/src/jit/riscv64/MacroAssembler-riscv64.h
  3738. +++ b/js/src/jit/riscv64/MacroAssembler-riscv64.h
  3739. @@ -14,9 +14,11 @@
  3740. namespace js {
  3741. namespace jit {
  3742. +static constexpr ValueOperand JSReturnOperand{JSReturnReg};
  3743. +
  3744. class ScratchTagScope : public SecondScratchRegisterScope {
  3745. public:
  3746. - ScratchTagScope(MacroAssembler& masm, const ValueOperand&)
  3747. + ScratchTagScope(MacroAssembler& masm, const js::jit::ValueOperand&)
  3748. : SecondScratchRegisterScope(masm) {}
  3749. };
  3750. @@ -82,10 +84,7 @@ class MacroAssemblerRiscv64 : public Assembler {
  3751. MOZ_CRASH();
  3752. }
  3753. void writeCodePointer(CodeLabel* label) {
  3754. - MOZ_ASSERT(hasCreator());
  3755. - m_buffer.ensureSpace(sizeof(uintptr_t));
  3756. - BufferOffset off = m_buffer.putInt64Unchecked(-1);
  3757. - label->patchAt()->bind(off.getOffset());
  3758. + MOZ_CRASH();
  3759. }
  3760. void haltingAlign(size_t) { MOZ_CRASH(); }
  3761. void nopAlign(size_t) { MOZ_CRASH(); }
  3762. @@ -429,7 +428,6 @@ class MacroAssemblerRiscv64 : public Assembler {
  3763. void convertUInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); }
  3764. void incrementInt32Value(Address) { MOZ_CRASH(); }
  3765. void ensureDouble(ValueOperand, FloatRegister, Label*) { MOZ_CRASH(); }
  3766. - void handleFailureWithHandlerTail(Label*) { MOZ_CRASH(); }
  3767. void buildFakeExitFrame(Register, uint32_t*) { MOZ_CRASH(); }
  3768. bool buildOOLFakeExitFrame(void*) { MOZ_CRASH(); }
  3769. @@ -440,6 +438,9 @@ class MacroAssemblerRiscv64 : public Assembler {
  3770. Register getStackPointer() const { MOZ_CRASH(); }
  3771. + void handleFailureWithHandlerTail(Label* profilerExitTail,
  3772. + Label* bailoutTail) { MOZ_CRASH(); }
  3773. +
  3774. // Instrumentation for entering and leaving the profiler.
  3775. void profilerEnterFrame(Register, Register) { MOZ_CRASH(); }
  3776. void profilerExitFrame() { MOZ_CRASH(); }
  3777. diff --git a/js/src/jit/riscv64/SharedICRegisters-riscv64.h b/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  3778. index 87e14461f65ba..f1d5f165d8adb 100644
  3779. --- a/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  3780. +++ b/js/src/jit/riscv64/SharedICRegisters-riscv64.h
  3781. @@ -7,9 +7,9 @@
  3782. #ifndef jit_riscv64_SharedICRegisters_riscv64_h
  3783. #define jit_riscv64_SharedICRegisters_riscv64_h
  3784. +#include "jit/riscv64/Assembler-riscv64.h"
  3785. #include "jit/Registers.h"
  3786. #include "jit/RegisterSets.h"
  3787. -#include "jit/riscv64/MacroAssembler-riscv64.h"
  3788. namespace js {
  3789. namespace jit {
  3790. diff --git a/js/src/jit/shared/Assembler-shared.h b/js/src/jit/shared/Assembler-shared.h
  3791. index fcabddd98b611..19cf397df1473 100644
  3792. --- a/js/src/jit/shared/Assembler-shared.h
  3793. +++ b/js/src/jit/shared/Assembler-shared.h
  3794. @@ -26,13 +26,15 @@
  3795. #if defined(JS_CODEGEN_ARM) || defined(JS_CODEGEN_ARM64) || \
  3796. defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64) || \
  3797. - defined(JS_CODEGEN_LOONG64) || defined(JS_CODEGEN_WASM32)
  3798. + defined(JS_CODEGEN_LOONG64) || defined(JS_CODEGEN_WASM32) || \
  3799. + defined(JS_CODEGEN_RISCV64)
  3800. // Push return addresses callee-side.
  3801. # define JS_USE_LINK_REGISTER
  3802. #endif
  3803. #if defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64) || \
  3804. - defined(JS_CODEGEN_ARM64) || defined(JS_CODEGEN_LOONG64)
  3805. + defined(JS_CODEGEN_ARM64) || defined(JS_CODEGEN_LOONG64) || \
  3806. + defined(JS_CODEGEN_RISCV64)
  3807. // JS_CODELABEL_LINKMODE gives labels additional metadata
  3808. // describing how Bind() should patch them.
  3809. # define JS_CODELABEL_LINKMODE
  3810. diff --git a/js/src/wasm/WasmBCMemory.cpp b/js/src/wasm/WasmBCMemory.cpp
  3811. index 94e739090b130..2c226dadd5f2d 100644
  3812. --- a/js/src/wasm/WasmBCMemory.cpp
  3813. +++ b/js/src/wasm/WasmBCMemory.cpp
  3814. @@ -1214,6 +1214,22 @@
  3815. bc->maybeFree(temps.t2);
  3816. }
  3817. +#elif defined(JS_CODEGEN_RISCV64)
  3818. +
  3819. +struct Temps {
  3820. + RegI32 t0;
  3821. +};
  3822. +
  3823. +static void PopAndAllocate(BaseCompiler* bc, ValType type,
  3824. + Scalar::Type viewType, AtomicOp op, RegI32* rd,
  3825. + RegI32* rv, Temps* temps) {}
  3826. +
  3827. +static void Perform(BaseCompiler* bc, const MemoryAccessDesc& access,
  3828. + BaseIndex srcAddr, AtomicOp op, RegI32 rv, RegI32 rd,
  3829. + const Temps& temps) {}
  3830. +
  3831. +static void Deallocate(BaseCompiler*, RegI32, const Temps&) {}
  3832. +
  3833. #elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32)
  3834. using Temps = Nothing;
  3835. @@ -1375,6 +1391,17 @@
  3836. bc->freeI64(temp);
  3837. }
  3838. +#elif defined(JS_CODEGEN_RISCV64)
  3839. +
  3840. +static void PopAndAllocate(BaseCompiler* bc, AtomicOp op, RegI64* rd,
  3841. + RegI64* rv, RegI64* temp) {}
  3842. +
  3843. +static void Perform(BaseCompiler* bc, const MemoryAccessDesc& access,
  3844. + BaseIndex srcAddr, AtomicOp op, RegI64 rv, RegI64 temp,
  3845. + RegI64 rd) {}
  3846. +
  3847. +static void Deallocate(BaseCompiler* bc, AtomicOp op, RegI64 rv, RegI64 temp) {}
  3848. +
  3849. #elif defined(JS_CODEGEN_NONE) || defined(JS_CODEGEN_WASM32)
  3850. static void PopAndAllocate(BaseCompiler*, AtomicOp, RegI64*, RegI64*, RegI64*) {