bincode_branch.hss 1.1 KB

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  1. [Main]
  2. Title=Branch Fixup and Optimization
  3. Subsections=bincode_branch_fline
  4. [Top]
  5. On some architectures, certain branches are not permitted. For example, on
  6. the MC68000 processor, it is not possible to branch to the next instruction
  7. using a short branch. While the assembler usually detects such invalid
  8. situations, they may still occur if the branch target is in a different
  9. section or file. The TIGCC linker detects such invalid situations and tries
  10. to resolve them as well as possible: If it is invalid for a branch at the end
  11. of a section to point to the beginning of the next section, it is removed
  12. unless it is a subroutine branch. For subroutine branches, a NOP instruction
  13. is inserted instead.
  14. <BR><BR>
  15. In addition to fixing invalid branches, the TIGCC linker can optimize branch
  16. instructions to reduce the number of absolute relocations needed. If an
  17. absolute branch (jump or subroutine branch) can be converted to a relative
  18. branch, the operating system does not need to insert the destination address
  19. at run time; therefore this will save space. Moreover, if range-cutting is
  20. enabled, optimizing branches can reduce the size of the code.