wm8990.h 38 KB

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  1. /*
  2. * wm8753.h -- audio driver for WM8753
  3. *
  4. * Copyright 2007 Wolfson Microelectronics PLC.
  5. * Author: Graeme Gregory
  6. * graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #ifndef __WM8990REGISTERDEFS_H__
  15. #define __WM8990REGISTERDEFS_H__
  16. /*
  17. * Register values.
  18. */
  19. #define WM8990_RESET 0x00
  20. #define WM8990_POWER_MANAGEMENT_1 0x01
  21. #define WM8990_POWER_MANAGEMENT_2 0x02
  22. #define WM8990_POWER_MANAGEMENT_3 0x03
  23. #define WM8990_AUDIO_INTERFACE_1 0x04
  24. #define WM8990_AUDIO_INTERFACE_2 0x05
  25. #define WM8990_CLOCKING_1 0x06
  26. #define WM8990_CLOCKING_2 0x07
  27. #define WM8990_AUDIO_INTERFACE_3 0x08
  28. #define WM8990_AUDIO_INTERFACE_4 0x09
  29. #define WM8990_DAC_CTRL 0x0A
  30. #define WM8990_LEFT_DAC_DIGITAL_VOLUME 0x0B
  31. #define WM8990_RIGHT_DAC_DIGITAL_VOLUME 0x0C
  32. #define WM8990_DIGITAL_SIDE_TONE 0x0D
  33. #define WM8990_ADC_CTRL 0x0E
  34. #define WM8990_LEFT_ADC_DIGITAL_VOLUME 0x0F
  35. #define WM8990_RIGHT_ADC_DIGITAL_VOLUME 0x10
  36. #define WM8990_GPIO_CTRL_1 0x12
  37. #define WM8990_GPIO1_GPIO2 0x13
  38. #define WM8990_GPIO3_GPIO4 0x14
  39. #define WM8990_GPIO5_GPIO6 0x15
  40. #define WM8990_GPIOCTRL_2 0x16
  41. #define WM8990_GPIO_POL 0x17
  42. #define WM8990_LEFT_LINE_INPUT_1_2_VOLUME 0x18
  43. #define WM8990_LEFT_LINE_INPUT_3_4_VOLUME 0x19
  44. #define WM8990_RIGHT_LINE_INPUT_1_2_VOLUME 0x1A
  45. #define WM8990_RIGHT_LINE_INPUT_3_4_VOLUME 0x1B
  46. #define WM8990_LEFT_OUTPUT_VOLUME 0x1C
  47. #define WM8990_RIGHT_OUTPUT_VOLUME 0x1D
  48. #define WM8990_LINE_OUTPUTS_VOLUME 0x1E
  49. #define WM8990_OUT3_4_VOLUME 0x1F
  50. #define WM8990_LEFT_OPGA_VOLUME 0x20
  51. #define WM8990_RIGHT_OPGA_VOLUME 0x21
  52. #define WM8990_SPEAKER_VOLUME 0x22
  53. #define WM8990_CLASSD1 0x23
  54. #define WM8990_CLASSD3 0x25
  55. #define WM8990_INPUT_MIXER1 0x27
  56. #define WM8990_INPUT_MIXER2 0x28
  57. #define WM8990_INPUT_MIXER3 0x29
  58. #define WM8990_INPUT_MIXER4 0x2A
  59. #define WM8990_INPUT_MIXER5 0x2B
  60. #define WM8990_INPUT_MIXER6 0x2C
  61. #define WM8990_OUTPUT_MIXER1 0x2D
  62. #define WM8990_OUTPUT_MIXER2 0x2E
  63. #define WM8990_OUTPUT_MIXER3 0x2F
  64. #define WM8990_OUTPUT_MIXER4 0x30
  65. #define WM8990_OUTPUT_MIXER5 0x31
  66. #define WM8990_OUTPUT_MIXER6 0x32
  67. #define WM8990_OUT3_4_MIXER 0x33
  68. #define WM8990_LINE_MIXER1 0x34
  69. #define WM8990_LINE_MIXER2 0x35
  70. #define WM8990_SPEAKER_MIXER 0x36
  71. #define WM8990_ADDITIONAL_CONTROL 0x37
  72. #define WM8990_ANTIPOP1 0x38
  73. #define WM8990_ANTIPOP2 0x39
  74. #define WM8990_MICBIAS 0x3A
  75. #define WM8990_PLL1 0x3C
  76. #define WM8990_PLL2 0x3D
  77. #define WM8990_PLL3 0x3E
  78. #define WM8990_INTDRIVBITS 0x3F
  79. #define WM8990_REGISTER_COUNT 60
  80. #define WM8990_MAX_REGISTER 0x3F
  81. /*
  82. * Field Definitions.
  83. */
  84. /*
  85. * R0 (0x00) - Reset
  86. */
  87. #define WM8990_SW_RESET_CHIP_ID_MASK 0xFFFF /* SW_RESET_CHIP_ID - [15:0] */
  88. /*
  89. * R1 (0x01) - Power Management (1)
  90. */
  91. #define WM8990_SPK_ENA 0x1000 /* SPK_ENA */
  92. #define WM8990_SPK_ENA_BIT 12
  93. #define WM8990_OUT3_ENA 0x0800 /* OUT3_ENA */
  94. #define WM8990_OUT3_ENA_BIT 11
  95. #define WM8990_OUT4_ENA 0x0400 /* OUT4_ENA */
  96. #define WM8990_OUT4_ENA_BIT 10
  97. #define WM8990_LOUT_ENA 0x0200 /* LOUT_ENA */
  98. #define WM8990_LOUT_ENA_BIT 9
  99. #define WM8990_ROUT_ENA 0x0100 /* ROUT_ENA */
  100. #define WM8990_ROUT_ENA_BIT 8
  101. #define WM8990_MICBIAS_ENA 0x0010 /* MICBIAS_ENA */
  102. #define WM8990_MICBIAS_ENA_BIT 4
  103. #define WM8990_VMID_MODE_MASK 0x0006 /* VMID_MODE - [2:1] */
  104. #define WM8990_VREF_ENA 0x0001 /* VREF_ENA */
  105. #define WM8990_VREF_ENA_BIT 0
  106. /*
  107. * R2 (0x02) - Power Management (2)
  108. */
  109. #define WM8990_PLL_ENA 0x8000 /* PLL_ENA */
  110. #define WM8990_PLL_ENA_BIT 15
  111. #define WM8990_TSHUT_ENA 0x4000 /* TSHUT_ENA */
  112. #define WM8990_TSHUT_ENA_BIT 14
  113. #define WM8990_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */
  114. #define WM8990_TSHUT_OPDIS_BIT 13
  115. #define WM8990_OPCLK_ENA 0x0800 /* OPCLK_ENA */
  116. #define WM8990_OPCLK_ENA_BIT 11
  117. #define WM8990_AINL_ENA 0x0200 /* AINL_ENA */
  118. #define WM8990_AINL_ENA_BIT 9
  119. #define WM8990_AINR_ENA 0x0100 /* AINR_ENA */
  120. #define WM8990_AINR_ENA_BIT 8
  121. #define WM8990_LIN34_ENA 0x0080 /* LIN34_ENA */
  122. #define WM8990_LIN34_ENA_BIT 7
  123. #define WM8990_LIN12_ENA 0x0040 /* LIN12_ENA */
  124. #define WM8990_LIN12_ENA_BIT 6
  125. #define WM8990_RIN34_ENA 0x0020 /* RIN34_ENA */
  126. #define WM8990_RIN34_ENA_BIT 5
  127. #define WM8990_RIN12_ENA 0x0010 /* RIN12_ENA */
  128. #define WM8990_RIN12_ENA_BIT 4
  129. #define WM8990_ADCL_ENA 0x0002 /* ADCL_ENA */
  130. #define WM8990_ADCL_ENA_BIT 1
  131. #define WM8990_ADCR_ENA 0x0001 /* ADCR_ENA */
  132. #define WM8990_ADCR_ENA_BIT 0
  133. /*
  134. * R3 (0x03) - Power Management (3)
  135. */
  136. #define WM8990_LON_ENA 0x2000 /* LON_ENA */
  137. #define WM8990_LON_ENA_BIT 13
  138. #define WM8990_LOP_ENA 0x1000 /* LOP_ENA */
  139. #define WM8990_LOP_ENA_BIT 12
  140. #define WM8990_RON_ENA 0x0800 /* RON_ENA */
  141. #define WM8990_RON_ENA_BIT 11
  142. #define WM8990_ROP_ENA 0x0400 /* ROP_ENA */
  143. #define WM8990_ROP_ENA_BIT 10
  144. #define WM8990_LOPGA_ENA 0x0080 /* LOPGA_ENA */
  145. #define WM8990_LOPGA_ENA_BIT 7
  146. #define WM8990_ROPGA_ENA 0x0040 /* ROPGA_ENA */
  147. #define WM8990_ROPGA_ENA_BIT 6
  148. #define WM8990_LOMIX_ENA 0x0020 /* LOMIX_ENA */
  149. #define WM8990_LOMIX_ENA_BIT 5
  150. #define WM8990_ROMIX_ENA 0x0010 /* ROMIX_ENA */
  151. #define WM8990_ROMIX_ENA_BIT 4
  152. #define WM8990_DACL_ENA 0x0002 /* DACL_ENA */
  153. #define WM8990_DACL_ENA_BIT 1
  154. #define WM8990_DACR_ENA 0x0001 /* DACR_ENA */
  155. #define WM8990_DACR_ENA_BIT 0
  156. /*
  157. * R4 (0x04) - Audio Interface (1)
  158. */
  159. #define WM8990_AIFADCL_SRC 0x8000 /* AIFADCL_SRC */
  160. #define WM8990_AIFADCR_SRC 0x4000 /* AIFADCR_SRC */
  161. #define WM8990_AIFADC_TDM 0x2000 /* AIFADC_TDM */
  162. #define WM8990_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */
  163. #define WM8990_AIF_BCLK_INV 0x0100 /* AIF_BCLK_INV */
  164. #define WM8990_AIF_LRCLK_INV 0x0080 /* AIF_LRCLK_INV */
  165. #define WM8990_AIF_WL_MASK 0x0060 /* AIF_WL - [6:5] */
  166. #define WM8990_AIF_WL_16BITS (0 << 5)
  167. #define WM8990_AIF_WL_20BITS (1 << 5)
  168. #define WM8990_AIF_WL_24BITS (2 << 5)
  169. #define WM8990_AIF_WL_32BITS (3 << 5)
  170. #define WM8990_AIF_FMT_MASK 0x0018 /* AIF_FMT - [4:3] */
  171. #define WM8990_AIF_TMF_RIGHTJ (0 << 3)
  172. #define WM8990_AIF_TMF_LEFTJ (1 << 3)
  173. #define WM8990_AIF_TMF_I2S (2 << 3)
  174. #define WM8990_AIF_TMF_DSP (3 << 3)
  175. /*
  176. * R5 (0x05) - Audio Interface (2)
  177. */
  178. #define WM8990_DACL_SRC 0x8000 /* DACL_SRC */
  179. #define WM8990_DACR_SRC 0x4000 /* DACR_SRC */
  180. #define WM8990_AIFDAC_TDM 0x2000 /* AIFDAC_TDM */
  181. #define WM8990_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */
  182. #define WM8990_DAC_BOOST_MASK 0x0C00 /* DAC_BOOST - [11:10] */
  183. #define WM8990_DAC_COMP 0x0010 /* DAC_COMP */
  184. #define WM8990_DAC_COMPMODE 0x0008 /* DAC_COMPMODE */
  185. #define WM8990_ADC_COMP 0x0004 /* ADC_COMP */
  186. #define WM8990_ADC_COMPMODE 0x0002 /* ADC_COMPMODE */
  187. #define WM8990_LOOPBACK 0x0001 /* LOOPBACK */
  188. /*
  189. * R6 (0x06) - Clocking (1)
  190. */
  191. #define WM8990_TOCLK_RATE 0x8000 /* TOCLK_RATE */
  192. #define WM8990_TOCLK_ENA 0x4000 /* TOCLK_ENA */
  193. #define WM8990_OPCLKDIV_MASK 0x1E00 /* OPCLKDIV - [12:9] */
  194. #define WM8990_DCLKDIV_MASK 0x01C0 /* DCLKDIV - [8:6] */
  195. #define WM8990_BCLK_DIV_MASK 0x001E /* BCLK_DIV - [4:1] */
  196. #define WM8990_BCLK_DIV_1 (0x0 << 1)
  197. #define WM8990_BCLK_DIV_1_5 (0x1 << 1)
  198. #define WM8990_BCLK_DIV_2 (0x2 << 1)
  199. #define WM8990_BCLK_DIV_3 (0x3 << 1)
  200. #define WM8990_BCLK_DIV_4 (0x4 << 1)
  201. #define WM8990_BCLK_DIV_5_5 (0x5 << 1)
  202. #define WM8990_BCLK_DIV_6 (0x6 << 1)
  203. #define WM8990_BCLK_DIV_8 (0x7 << 1)
  204. #define WM8990_BCLK_DIV_11 (0x8 << 1)
  205. #define WM8990_BCLK_DIV_12 (0x9 << 1)
  206. #define WM8990_BCLK_DIV_16 (0xA << 1)
  207. #define WM8990_BCLK_DIV_22 (0xB << 1)
  208. #define WM8990_BCLK_DIV_24 (0xC << 1)
  209. #define WM8990_BCLK_DIV_32 (0xD << 1)
  210. #define WM8990_BCLK_DIV_44 (0xE << 1)
  211. #define WM8990_BCLK_DIV_48 (0xF << 1)
  212. /*
  213. * R7 (0x07) - Clocking (2)
  214. */
  215. #define WM8990_MCLK_SRC 0x8000 /* MCLK_SRC */
  216. #define WM8990_SYSCLK_SRC 0x4000 /* SYSCLK_SRC */
  217. #define WM8990_CLK_FORCE 0x2000 /* CLK_FORCE */
  218. #define WM8990_MCLK_DIV_MASK 0x1800 /* MCLK_DIV - [12:11] */
  219. #define WM8990_MCLK_DIV_1 ( 0 << 11)
  220. #define WM8990_MCLK_DIV_2 ( 2 << 11)
  221. #define WM8990_MCLK_INV 0x0400 /* MCLK_INV */
  222. #define WM8990_ADC_CLKDIV_MASK 0x00E0 /* ADC_CLKDIV - [7:5] */
  223. #define WM8990_ADC_CLKDIV_1 ( 0 << 5)
  224. #define WM8990_ADC_CLKDIV_1_5 ( 1 << 5)
  225. #define WM8990_ADC_CLKDIV_2 ( 2 << 5)
  226. #define WM8990_ADC_CLKDIV_3 ( 3 << 5)
  227. #define WM8990_ADC_CLKDIV_4 ( 4 << 5)
  228. #define WM8990_ADC_CLKDIV_5_5 ( 5 << 5)
  229. #define WM8990_ADC_CLKDIV_6 ( 6 << 5)
  230. #define WM8990_DAC_CLKDIV_MASK 0x001C /* DAC_CLKDIV - [4:2] */
  231. #define WM8990_DAC_CLKDIV_1 ( 0 << 2)
  232. #define WM8990_DAC_CLKDIV_1_5 ( 1 << 2)
  233. #define WM8990_DAC_CLKDIV_2 ( 2 << 2)
  234. #define WM8990_DAC_CLKDIV_3 ( 3 << 2)
  235. #define WM8990_DAC_CLKDIV_4 ( 4 << 2)
  236. #define WM8990_DAC_CLKDIV_5_5 ( 5 << 2)
  237. #define WM8990_DAC_CLKDIV_6 ( 6 << 2)
  238. /*
  239. * R8 (0x08) - Audio Interface (3)
  240. */
  241. #define WM8990_AIF_MSTR1 0x8000 /* AIF_MSTR1 */
  242. #define WM8990_AIF_MSTR2 0x4000 /* AIF_MSTR2 */
  243. #define WM8990_AIF_SEL 0x2000 /* AIF_SEL */
  244. #define WM8990_ADCLRC_DIR 0x0800 /* ADCLRC_DIR */
  245. #define WM8990_ADCLRC_RATE_MASK 0x07FF /* ADCLRC_RATE - [10:0] */
  246. /*
  247. * R9 (0x09) - Audio Interface (4)
  248. */
  249. #define WM8990_ALRCGPIO1 0x8000 /* ALRCGPIO1 */
  250. #define WM8990_ALRCBGPIO6 0x4000 /* ALRCBGPIO6 */
  251. #define WM8990_AIF_TRIS 0x2000 /* AIF_TRIS */
  252. #define WM8990_DACLRC_DIR 0x0800 /* DACLRC_DIR */
  253. #define WM8990_DACLRC_RATE_MASK 0x07FF /* DACLRC_RATE - [10:0] */
  254. /*
  255. * R10 (0x0A) - DAC CTRL
  256. */
  257. #define WM8990_AIF_LRCLKRATE 0x0400 /* AIF_LRCLKRATE */
  258. #define WM8990_DAC_MONO 0x0200 /* DAC_MONO */
  259. #define WM8990_DAC_SB_FILT 0x0100 /* DAC_SB_FILT */
  260. #define WM8990_DAC_MUTERATE 0x0080 /* DAC_MUTERATE */
  261. #define WM8990_DAC_MUTEMODE 0x0040 /* DAC_MUTEMODE */
  262. #define WM8990_DEEMP_MASK 0x0030 /* DEEMP - [5:4] */
  263. #define WM8990_DAC_MUTE 0x0004 /* DAC_MUTE */
  264. #define WM8990_DACL_DATINV 0x0002 /* DACL_DATINV */
  265. #define WM8990_DACR_DATINV 0x0001 /* DACR_DATINV */
  266. /*
  267. * R11 (0x0B) - Left DAC Digital Volume
  268. */
  269. #define WM8990_DAC_VU 0x0100 /* DAC_VU */
  270. #define WM8990_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */
  271. #define WM8990_DACL_VOL_SHIFT 0
  272. /*
  273. * R12 (0x0C) - Right DAC Digital Volume
  274. */
  275. #define WM8990_DAC_VU 0x0100 /* DAC_VU */
  276. #define WM8990_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */
  277. #define WM8990_DACR_VOL_SHIFT 0
  278. /*
  279. * R13 (0x0D) - Digital Side Tone
  280. */
  281. #define WM8990_ADCL_DAC_SVOL_MASK 0x0F /* ADCL_DAC_SVOL - [12:9] */
  282. #define WM8990_ADCL_DAC_SVOL_SHIFT 9
  283. #define WM8990_ADCR_DAC_SVOL_MASK 0x0F /* ADCR_DAC_SVOL - [8:5] */
  284. #define WM8990_ADCR_DAC_SVOL_SHIFT 5
  285. #define WM8990_ADC_TO_DACL_MASK 0x03 /* ADC_TO_DACL - [3:2] */
  286. #define WM8990_ADC_TO_DACL_SHIFT 2
  287. #define WM8990_ADC_TO_DACR_MASK 0x03 /* ADC_TO_DACR - [1:0] */
  288. #define WM8990_ADC_TO_DACR_SHIFT 0
  289. /*
  290. * R14 (0x0E) - ADC CTRL
  291. */
  292. #define WM8990_ADC_HPF_ENA 0x0100 /* ADC_HPF_ENA */
  293. #define WM8990_ADC_HPF_ENA_BIT 8
  294. #define WM8990_ADC_HPF_CUT_MASK 0x03 /* ADC_HPF_CUT - [6:5] */
  295. #define WM8990_ADC_HPF_CUT_SHIFT 5
  296. #define WM8990_ADCL_DATINV 0x0002 /* ADCL_DATINV */
  297. #define WM8990_ADCL_DATINV_BIT 1
  298. #define WM8990_ADCR_DATINV 0x0001 /* ADCR_DATINV */
  299. #define WM8990_ADCR_DATINV_BIT 0
  300. /*
  301. * R15 (0x0F) - Left ADC Digital Volume
  302. */
  303. #define WM8990_ADC_VU 0x0100 /* ADC_VU */
  304. #define WM8990_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */
  305. #define WM8990_ADCL_VOL_SHIFT 0
  306. /*
  307. * R16 (0x10) - Right ADC Digital Volume
  308. */
  309. #define WM8990_ADC_VU 0x0100 /* ADC_VU */
  310. #define WM8990_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */
  311. #define WM8990_ADCR_VOL_SHIFT 0
  312. /*
  313. * R18 (0x12) - GPIO CTRL 1
  314. */
  315. #define WM8990_IRQ 0x1000 /* IRQ */
  316. #define WM8990_TEMPOK 0x0800 /* TEMPOK */
  317. #define WM8990_MICSHRT 0x0400 /* MICSHRT */
  318. #define WM8990_MICDET 0x0200 /* MICDET */
  319. #define WM8990_PLL_LCK 0x0100 /* PLL_LCK */
  320. #define WM8990_GPI8_STATUS 0x0080 /* GPI8_STATUS */
  321. #define WM8990_GPI7_STATUS 0x0040 /* GPI7_STATUS */
  322. #define WM8990_GPIO6_STATUS 0x0020 /* GPIO6_STATUS */
  323. #define WM8990_GPIO5_STATUS 0x0010 /* GPIO5_STATUS */
  324. #define WM8990_GPIO4_STATUS 0x0008 /* GPIO4_STATUS */
  325. #define WM8990_GPIO3_STATUS 0x0004 /* GPIO3_STATUS */
  326. #define WM8990_GPIO2_STATUS 0x0002 /* GPIO2_STATUS */
  327. #define WM8990_GPIO1_STATUS 0x0001 /* GPIO1_STATUS */
  328. /*
  329. * R19 (0x13) - GPIO1 & GPIO2
  330. */
  331. #define WM8990_GPIO2_DEB_ENA 0x8000 /* GPIO2_DEB_ENA */
  332. #define WM8990_GPIO2_IRQ_ENA 0x4000 /* GPIO2_IRQ_ENA */
  333. #define WM8990_GPIO2_PU 0x2000 /* GPIO2_PU */
  334. #define WM8990_GPIO2_PD 0x1000 /* GPIO2_PD */
  335. #define WM8990_GPIO2_SEL_MASK 0x0F00 /* GPIO2_SEL - [11:8] */
  336. #define WM8990_GPIO1_DEB_ENA 0x0080 /* GPIO1_DEB_ENA */
  337. #define WM8990_GPIO1_IRQ_ENA 0x0040 /* GPIO1_IRQ_ENA */
  338. #define WM8990_GPIO1_PU 0x0020 /* GPIO1_PU */
  339. #define WM8990_GPIO1_PD 0x0010 /* GPIO1_PD */
  340. #define WM8990_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */
  341. /*
  342. * R20 (0x14) - GPIO3 & GPIO4
  343. */
  344. #define WM8990_GPIO4_DEB_ENA 0x8000 /* GPIO4_DEB_ENA */
  345. #define WM8990_GPIO4_IRQ_ENA 0x4000 /* GPIO4_IRQ_ENA */
  346. #define WM8990_GPIO4_PU 0x2000 /* GPIO4_PU */
  347. #define WM8990_GPIO4_PD 0x1000 /* GPIO4_PD */
  348. #define WM8990_GPIO4_SEL_MASK 0x0F00 /* GPIO4_SEL - [11:8] */
  349. #define WM8990_GPIO3_DEB_ENA 0x0080 /* GPIO3_DEB_ENA */
  350. #define WM8990_GPIO3_IRQ_ENA 0x0040 /* GPIO3_IRQ_ENA */
  351. #define WM8990_GPIO3_PU 0x0020 /* GPIO3_PU */
  352. #define WM8990_GPIO3_PD 0x0010 /* GPIO3_PD */
  353. #define WM8990_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */
  354. /*
  355. * R21 (0x15) - GPIO5 & GPIO6
  356. */
  357. #define WM8990_GPIO6_DEB_ENA 0x8000 /* GPIO6_DEB_ENA */
  358. #define WM8990_GPIO6_IRQ_ENA 0x4000 /* GPIO6_IRQ_ENA */
  359. #define WM8990_GPIO6_PU 0x2000 /* GPIO6_PU */
  360. #define WM8990_GPIO6_PD 0x1000 /* GPIO6_PD */
  361. #define WM8990_GPIO6_SEL_MASK 0x0F00 /* GPIO6_SEL - [11:8] */
  362. #define WM8990_GPIO5_DEB_ENA 0x0080 /* GPIO5_DEB_ENA */
  363. #define WM8990_GPIO5_IRQ_ENA 0x0040 /* GPIO5_IRQ_ENA */
  364. #define WM8990_GPIO5_PU 0x0020 /* GPIO5_PU */
  365. #define WM8990_GPIO5_PD 0x0010 /* GPIO5_PD */
  366. #define WM8990_GPIO5_SEL_MASK 0x000F /* GPIO5_SEL - [3:0] */
  367. /*
  368. * R22 (0x16) - GPIOCTRL 2
  369. */
  370. #define WM8990_RD_3W_ENA 0x8000 /* RD_3W_ENA */
  371. #define WM8990_MODE_3W4W 0x4000 /* MODE_3W4W */
  372. #define WM8990_TEMPOK_IRQ_ENA 0x0800 /* TEMPOK_IRQ_ENA */
  373. #define WM8990_MICSHRT_IRQ_ENA 0x0400 /* MICSHRT_IRQ_ENA */
  374. #define WM8990_MICDET_IRQ_ENA 0x0200 /* MICDET_IRQ_ENA */
  375. #define WM8990_PLL_LCK_IRQ_ENA 0x0100 /* PLL_LCK_IRQ_ENA */
  376. #define WM8990_GPI8_DEB_ENA 0x0080 /* GPI8_DEB_ENA */
  377. #define WM8990_GPI8_IRQ_ENA 0x0040 /* GPI8_IRQ_ENA */
  378. #define WM8990_GPI8_ENA 0x0010 /* GPI8_ENA */
  379. #define WM8990_GPI7_DEB_ENA 0x0008 /* GPI7_DEB_ENA */
  380. #define WM8990_GPI7_IRQ_ENA 0x0004 /* GPI7_IRQ_ENA */
  381. #define WM8990_GPI7_ENA 0x0001 /* GPI7_ENA */
  382. /*
  383. * R23 (0x17) - GPIO_POL
  384. */
  385. #define WM8990_IRQ_INV 0x1000 /* IRQ_INV */
  386. #define WM8990_TEMPOK_POL 0x0800 /* TEMPOK_POL */
  387. #define WM8990_MICSHRT_POL 0x0400 /* MICSHRT_POL */
  388. #define WM8990_MICDET_POL 0x0200 /* MICDET_POL */
  389. #define WM8990_PLL_LCK_POL 0x0100 /* PLL_LCK_POL */
  390. #define WM8990_GPI8_POL 0x0080 /* GPI8_POL */
  391. #define WM8990_GPI7_POL 0x0040 /* GPI7_POL */
  392. #define WM8990_GPIO6_POL 0x0020 /* GPIO6_POL */
  393. #define WM8990_GPIO5_POL 0x0010 /* GPIO5_POL */
  394. #define WM8990_GPIO4_POL 0x0008 /* GPIO4_POL */
  395. #define WM8990_GPIO3_POL 0x0004 /* GPIO3_POL */
  396. #define WM8990_GPIO2_POL 0x0002 /* GPIO2_POL */
  397. #define WM8990_GPIO1_POL 0x0001 /* GPIO1_POL */
  398. /*
  399. * R24 (0x18) - Left Line Input 1&2 Volume
  400. */
  401. #define WM8990_IPVU 0x0100 /* IPVU */
  402. #define WM8990_LI12MUTE 0x0080 /* LI12MUTE */
  403. #define WM8990_LI12MUTE_BIT 7
  404. #define WM8990_LI12ZC 0x0040 /* LI12ZC */
  405. #define WM8990_LI12ZC_BIT 6
  406. #define WM8990_LIN12VOL_MASK 0x001F /* LIN12VOL - [4:0] */
  407. #define WM8990_LIN12VOL_SHIFT 0
  408. /*
  409. * R25 (0x19) - Left Line Input 3&4 Volume
  410. */
  411. #define WM8990_IPVU 0x0100 /* IPVU */
  412. #define WM8990_LI34MUTE 0x0080 /* LI34MUTE */
  413. #define WM8990_LI34MUTE_BIT 7
  414. #define WM8990_LI34ZC 0x0040 /* LI34ZC */
  415. #define WM8990_LI34ZC_BIT 6
  416. #define WM8990_LIN34VOL_MASK 0x001F /* LIN34VOL - [4:0] */
  417. #define WM8990_LIN34VOL_SHIFT 0
  418. /*
  419. * R26 (0x1A) - Right Line Input 1&2 Volume
  420. */
  421. #define WM8990_IPVU 0x0100 /* IPVU */
  422. #define WM8990_RI12MUTE 0x0080 /* RI12MUTE */
  423. #define WM8990_RI12MUTE_BIT 7
  424. #define WM8990_RI12ZC 0x0040 /* RI12ZC */
  425. #define WM8990_RI12ZC_BIT 6
  426. #define WM8990_RIN12VOL_MASK 0x001F /* RIN12VOL - [4:0] */
  427. #define WM8990_RIN12VOL_SHIFT 0
  428. /*
  429. * R27 (0x1B) - Right Line Input 3&4 Volume
  430. */
  431. #define WM8990_IPVU 0x0100 /* IPVU */
  432. #define WM8990_RI34MUTE 0x0080 /* RI34MUTE */
  433. #define WM8990_RI34MUTE_BIT 7
  434. #define WM8990_RI34ZC 0x0040 /* RI34ZC */
  435. #define WM8990_RI34ZC_BIT 6
  436. #define WM8990_RIN34VOL_MASK 0x001F /* RIN34VOL - [4:0] */
  437. #define WM8990_RIN34VOL_SHIFT 0
  438. /*
  439. * R28 (0x1C) - Left Output Volume
  440. */
  441. #define WM8990_OPVU 0x0100 /* OPVU */
  442. #define WM8990_LOZC 0x0080 /* LOZC */
  443. #define WM8990_LOZC_BIT 7
  444. #define WM8990_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */
  445. #define WM8990_LOUTVOL_SHIFT 0
  446. /*
  447. * R29 (0x1D) - Right Output Volume
  448. */
  449. #define WM8990_OPVU 0x0100 /* OPVU */
  450. #define WM8990_ROZC 0x0080 /* ROZC */
  451. #define WM8990_ROZC_BIT 7
  452. #define WM8990_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */
  453. #define WM8990_ROUTVOL_SHIFT 0
  454. /*
  455. * R30 (0x1E) - Line Outputs Volume
  456. */
  457. #define WM8990_LONMUTE 0x0040 /* LONMUTE */
  458. #define WM8990_LONMUTE_BIT 6
  459. #define WM8990_LOPMUTE 0x0020 /* LOPMUTE */
  460. #define WM8990_LOPMUTE_BIT 5
  461. #define WM8990_LOATTN 0x0010 /* LOATTN */
  462. #define WM8990_LOATTN_BIT 4
  463. #define WM8990_RONMUTE 0x0004 /* RONMUTE */
  464. #define WM8990_RONMUTE_BIT 2
  465. #define WM8990_ROPMUTE 0x0002 /* ROPMUTE */
  466. #define WM8990_ROPMUTE_BIT 1
  467. #define WM8990_ROATTN 0x0001 /* ROATTN */
  468. #define WM8990_ROATTN_BIT 0
  469. /*
  470. * R31 (0x1F) - Out3/4 Volume
  471. */
  472. #define WM8990_OUT3MUTE 0x0020 /* OUT3MUTE */
  473. #define WM8990_OUT3MUTE_BIT 5
  474. #define WM8990_OUT3ATTN 0x0010 /* OUT3ATTN */
  475. #define WM8990_OUT3ATTN_BIT 4
  476. #define WM8990_OUT4MUTE 0x0002 /* OUT4MUTE */
  477. #define WM8990_OUT4MUTE_BIT 1
  478. #define WM8990_OUT4ATTN 0x0001 /* OUT4ATTN */
  479. #define WM8990_OUT4ATTN_BIT 0
  480. /*
  481. * R32 (0x20) - Left OPGA Volume
  482. */
  483. #define WM8990_OPVU 0x0100 /* OPVU */
  484. #define WM8990_LOPGAZC 0x0080 /* LOPGAZC */
  485. #define WM8990_LOPGAZC_BIT 7
  486. #define WM8990_LOPGAVOL_MASK 0x007F /* LOPGAVOL - [6:0] */
  487. #define WM8990_LOPGAVOL_SHIFT 0
  488. /*
  489. * R33 (0x21) - Right OPGA Volume
  490. */
  491. #define WM8990_OPVU 0x0100 /* OPVU */
  492. #define WM8990_ROPGAZC 0x0080 /* ROPGAZC */
  493. #define WM8990_ROPGAZC_BIT 7
  494. #define WM8990_ROPGAVOL_MASK 0x007F /* ROPGAVOL - [6:0] */
  495. #define WM8990_ROPGAVOL_SHIFT 0
  496. /*
  497. * R34 (0x22) - Speaker Volume
  498. */
  499. #define WM8990_SPKVOL_MASK 0x0003 /* SPKVOL - [1:0] */
  500. #define WM8990_SPKVOL_SHIFT 0
  501. /*
  502. * R35 (0x23) - ClassD1
  503. */
  504. #define WM8990_CDMODE 0x0100 /* CDMODE */
  505. #define WM8990_CDMODE_BIT 8
  506. /*
  507. * R37 (0x25) - ClassD3
  508. */
  509. #define WM8990_DCGAIN_MASK 0x0007 /* DCGAIN - [5:3] */
  510. #define WM8990_DCGAIN_SHIFT 3
  511. #define WM8990_ACGAIN_MASK 0x0007 /* ACGAIN - [2:0] */
  512. #define WM8990_ACGAIN_SHIFT 0
  513. /*
  514. * R39 (0x27) - Input Mixer1
  515. */
  516. #define WM8990_AINLMODE_MASK 0x000C /* AINLMODE - [3:2] */
  517. #define WM8990_AINLMODE_SHIFT 2
  518. #define WM8990_AINRMODE_MASK 0x0003 /* AINRMODE - [1:0] */
  519. #define WM8990_AINRMODE_SHIFT 0
  520. /*
  521. * R40 (0x28) - Input Mixer2
  522. */
  523. #define WM8990_LMP4 0x0080 /* LMP4 */
  524. #define WM8990_LMP4_BIT 7 /* LMP4 */
  525. #define WM8990_LMN3 0x0040 /* LMN3 */
  526. #define WM8990_LMN3_BIT 6 /* LMN3 */
  527. #define WM8990_LMP2 0x0020 /* LMP2 */
  528. #define WM8990_LMP2_BIT 5 /* LMP2 */
  529. #define WM8990_LMN1 0x0010 /* LMN1 */
  530. #define WM8990_LMN1_BIT 4 /* LMN1 */
  531. #define WM8990_RMP4 0x0008 /* RMP4 */
  532. #define WM8990_RMP4_BIT 3 /* RMP4 */
  533. #define WM8990_RMN3 0x0004 /* RMN3 */
  534. #define WM8990_RMN3_BIT 2 /* RMN3 */
  535. #define WM8990_RMP2 0x0002 /* RMP2 */
  536. #define WM8990_RMP2_BIT 1 /* RMP2 */
  537. #define WM8990_RMN1 0x0001 /* RMN1 */
  538. #define WM8990_RMN1_BIT 0 /* RMN1 */
  539. /*
  540. * R41 (0x29) - Input Mixer3
  541. */
  542. #define WM8990_L34MNB 0x0100 /* L34MNB */
  543. #define WM8990_L34MNB_BIT 8
  544. #define WM8990_L34MNBST 0x0080 /* L34MNBST */
  545. #define WM8990_L34MNBST_BIT 7
  546. #define WM8990_L12MNB 0x0020 /* L12MNB */
  547. #define WM8990_L12MNB_BIT 5
  548. #define WM8990_L12MNBST 0x0010 /* L12MNBST */
  549. #define WM8990_L12MNBST_BIT 4
  550. #define WM8990_LDBVOL_MASK 0x0007 /* LDBVOL - [2:0] */
  551. #define WM8990_LDBVOL_SHIFT 0
  552. /*
  553. * R42 (0x2A) - Input Mixer4
  554. */
  555. #define WM8990_R34MNB 0x0100 /* R34MNB */
  556. #define WM8990_R34MNB_BIT 8
  557. #define WM8990_R34MNBST 0x0080 /* R34MNBST */
  558. #define WM8990_R34MNBST_BIT 7
  559. #define WM8990_R12MNB 0x0020 /* R12MNB */
  560. #define WM8990_R12MNB_BIT 5
  561. #define WM8990_R12MNBST 0x0010 /* R12MNBST */
  562. #define WM8990_R12MNBST_BIT 4
  563. #define WM8990_RDBVOL_MASK 0x0007 /* RDBVOL - [2:0] */
  564. #define WM8990_RDBVOL_SHIFT 0
  565. /*
  566. * R43 (0x2B) - Input Mixer5
  567. */
  568. #define WM8990_LI2BVOL_MASK 0x07 /* LI2BVOL - [8:6] */
  569. #define WM8990_LI2BVOL_SHIFT 6
  570. #define WM8990_LR4BVOL_MASK 0x07 /* LR4BVOL - [5:3] */
  571. #define WM8990_LR4BVOL_SHIFT 3
  572. #define WM8990_LL4BVOL_MASK 0x07 /* LL4BVOL - [2:0] */
  573. #define WM8990_LL4BVOL_SHIFT 0
  574. /*
  575. * R44 (0x2C) - Input Mixer6
  576. */
  577. #define WM8990_RI2BVOL_MASK 0x07 /* RI2BVOL - [8:6] */
  578. #define WM8990_RI2BVOL_SHIFT 6
  579. #define WM8990_RL4BVOL_MASK 0x07 /* RL4BVOL - [5:3] */
  580. #define WM8990_RL4BVOL_SHIFT 3
  581. #define WM8990_RR4BVOL_MASK 0x07 /* RR4BVOL - [2:0] */
  582. #define WM8990_RR4BVOL_SHIFT 0
  583. /*
  584. * R45 (0x2D) - Output Mixer1
  585. */
  586. #define WM8990_LRBLO 0x0080 /* LRBLO */
  587. #define WM8990_LRBLO_BIT 7
  588. #define WM8990_LLBLO 0x0040 /* LLBLO */
  589. #define WM8990_LLBLO_BIT 6
  590. #define WM8990_LRI3LO 0x0020 /* LRI3LO */
  591. #define WM8990_LRI3LO_BIT 5
  592. #define WM8990_LLI3LO 0x0010 /* LLI3LO */
  593. #define WM8990_LLI3LO_BIT 4
  594. #define WM8990_LR12LO 0x0008 /* LR12LO */
  595. #define WM8990_LR12LO_BIT 3
  596. #define WM8990_LL12LO 0x0004 /* LL12LO */
  597. #define WM8990_LL12LO_BIT 2
  598. #define WM8990_LDLO 0x0001 /* LDLO */
  599. #define WM8990_LDLO_BIT 0
  600. /*
  601. * R46 (0x2E) - Output Mixer2
  602. */
  603. #define WM8990_RLBRO 0x0080 /* RLBRO */
  604. #define WM8990_RLBRO_BIT 7
  605. #define WM8990_RRBRO 0x0040 /* RRBRO */
  606. #define WM8990_RRBRO_BIT 6
  607. #define WM8990_RLI3RO 0x0020 /* RLI3RO */
  608. #define WM8990_RLI3RO_BIT 5
  609. #define WM8990_RRI3RO 0x0010 /* RRI3RO */
  610. #define WM8990_RRI3RO_BIT 4
  611. #define WM8990_RL12RO 0x0008 /* RL12RO */
  612. #define WM8990_RL12RO_BIT 3
  613. #define WM8990_RR12RO 0x0004 /* RR12RO */
  614. #define WM8990_RR12RO_BIT 2
  615. #define WM8990_RDRO 0x0001 /* RDRO */
  616. #define WM8990_RDRO_BIT 0
  617. /*
  618. * R47 (0x2F) - Output Mixer3
  619. */
  620. #define WM8990_LLI3LOVOL_MASK 0x07 /* LLI3LOVOL - [8:6] */
  621. #define WM8990_LLI3LOVOL_SHIFT 6
  622. #define WM8990_LR12LOVOL_MASK 0x07 /* LR12LOVOL - [5:3] */
  623. #define WM8990_LR12LOVOL_SHIFT 3
  624. #define WM8990_LL12LOVOL_MASK 0x07 /* LL12LOVOL - [2:0] */
  625. #define WM8990_LL12LOVOL_SHIFT 0
  626. /*
  627. * R48 (0x30) - Output Mixer4
  628. */
  629. #define WM8990_RRI3ROVOL_MASK 0x07 /* RRI3ROVOL - [8:6] */
  630. #define WM8990_RRI3ROVOL_SHIFT 6
  631. #define WM8990_RL12ROVOL_MASK 0x07 /* RL12ROVOL - [5:3] */
  632. #define WM8990_RL12ROVOL_SHIFT 3
  633. #define WM8990_RR12ROVOL_MASK 0x07 /* RR12ROVOL - [2:0] */
  634. #define WM8990_RR12ROVOL_SHIFT 0
  635. /*
  636. * R49 (0x31) - Output Mixer5
  637. */
  638. #define WM8990_LRI3LOVOL_MASK 0x07 /* LRI3LOVOL - [8:6] */
  639. #define WM8990_LRI3LOVOL_SHIFT 6
  640. #define WM8990_LRBLOVOL_MASK 0x07 /* LRBLOVOL - [5:3] */
  641. #define WM8990_LRBLOVOL_SHIFT 3
  642. #define WM8990_LLBLOVOL_MASK 0x07 /* LLBLOVOL - [2:0] */
  643. #define WM8990_LLBLOVOL_SHIFT 0
  644. /*
  645. * R50 (0x32) - Output Mixer6
  646. */
  647. #define WM8990_RLI3ROVOL_MASK 0x07 /* RLI3ROVOL - [8:6] */
  648. #define WM8990_RLI3ROVOL_SHIFT 6
  649. #define WM8990_RLBROVOL_MASK 0x07 /* RLBROVOL - [5:3] */
  650. #define WM8990_RLBROVOL_SHIFT 3
  651. #define WM8990_RRBROVOL_MASK 0x07 /* RRBROVOL - [2:0] */
  652. #define WM8990_RRBROVOL_SHIFT 0
  653. /*
  654. * R51 (0x33) - Out3/4 Mixer
  655. */
  656. #define WM8990_VSEL_MASK 0x0180 /* VSEL - [8:7] */
  657. #define WM8990_LI4O3 0x0020 /* LI4O3 */
  658. #define WM8990_LI4O3_BIT 5
  659. #define WM8990_LPGAO3 0x0010 /* LPGAO3 */
  660. #define WM8990_LPGAO3_BIT 4
  661. #define WM8990_RI4O4 0x0002 /* RI4O4 */
  662. #define WM8990_RI4O4_BIT 1
  663. #define WM8990_RPGAO4 0x0001 /* RPGAO4 */
  664. #define WM8990_RPGAO4_BIT 0
  665. /*
  666. * R52 (0x34) - Line Mixer1
  667. */
  668. #define WM8990_LLOPGALON 0x0040 /* LLOPGALON */
  669. #define WM8990_LLOPGALON_BIT 6
  670. #define WM8990_LROPGALON 0x0020 /* LROPGALON */
  671. #define WM8990_LROPGALON_BIT 5
  672. #define WM8990_LOPLON 0x0010 /* LOPLON */
  673. #define WM8990_LOPLON_BIT 4
  674. #define WM8990_LR12LOP 0x0004 /* LR12LOP */
  675. #define WM8990_LR12LOP_BIT 2
  676. #define WM8990_LL12LOP 0x0002 /* LL12LOP */
  677. #define WM8990_LL12LOP_BIT 1
  678. #define WM8990_LLOPGALOP 0x0001 /* LLOPGALOP */
  679. #define WM8990_LLOPGALOP_BIT 0
  680. /*
  681. * R53 (0x35) - Line Mixer2
  682. */
  683. #define WM8990_RROPGARON 0x0040 /* RROPGARON */
  684. #define WM8990_RROPGARON_BIT 6
  685. #define WM8990_RLOPGARON 0x0020 /* RLOPGARON */
  686. #define WM8990_RLOPGARON_BIT 5
  687. #define WM8990_ROPRON 0x0010 /* ROPRON */
  688. #define WM8990_ROPRON_BIT 4
  689. #define WM8990_RL12ROP 0x0004 /* RL12ROP */
  690. #define WM8990_RL12ROP_BIT 2
  691. #define WM8990_RR12ROP 0x0002 /* RR12ROP */
  692. #define WM8990_RR12ROP_BIT 1
  693. #define WM8990_RROPGAROP 0x0001 /* RROPGAROP */
  694. #define WM8990_RROPGAROP_BIT 0
  695. /*
  696. * R54 (0x36) - Speaker Mixer
  697. */
  698. #define WM8990_LB2SPK 0x0080 /* LB2SPK */
  699. #define WM8990_LB2SPK_BIT 7
  700. #define WM8990_RB2SPK 0x0040 /* RB2SPK */
  701. #define WM8990_RB2SPK_BIT 6
  702. #define WM8990_LI2SPK 0x0020 /* LI2SPK */
  703. #define WM8990_LI2SPK_BIT 5
  704. #define WM8990_RI2SPK 0x0010 /* RI2SPK */
  705. #define WM8990_RI2SPK_BIT 4
  706. #define WM8990_LOPGASPK 0x0008 /* LOPGASPK */
  707. #define WM8990_LOPGASPK_BIT 3
  708. #define WM8990_ROPGASPK 0x0004 /* ROPGASPK */
  709. #define WM8990_ROPGASPK_BIT 2
  710. #define WM8990_LDSPK 0x0002 /* LDSPK */
  711. #define WM8990_LDSPK_BIT 1
  712. #define WM8990_RDSPK 0x0001 /* RDSPK */
  713. #define WM8990_RDSPK_BIT 0
  714. /*
  715. * R55 (0x37) - Additional Control
  716. */
  717. #define WM8990_VROI 0x0001 /* VROI */
  718. /*
  719. * R56 (0x38) - AntiPOP1
  720. */
  721. #define WM8990_DIS_LLINE 0x0020 /* DIS_LLINE */
  722. #define WM8990_DIS_RLINE 0x0010 /* DIS_RLINE */
  723. #define WM8990_DIS_OUT3 0x0008 /* DIS_OUT3 */
  724. #define WM8990_DIS_OUT4 0x0004 /* DIS_OUT4 */
  725. #define WM8990_DIS_LOUT 0x0002 /* DIS_LOUT */
  726. #define WM8990_DIS_ROUT 0x0001 /* DIS_ROUT */
  727. /*
  728. * R57 (0x39) - AntiPOP2
  729. */
  730. #define WM8990_SOFTST 0x0040 /* SOFTST */
  731. #define WM8990_BUFIOEN 0x0008 /* BUFIOEN */
  732. #define WM8990_BUFDCOPEN 0x0004 /* BUFDCOPEN */
  733. #define WM8990_POBCTRL 0x0002 /* POBCTRL */
  734. #define WM8990_VMIDTOG 0x0001 /* VMIDTOG */
  735. /*
  736. * R58 (0x3A) - MICBIAS
  737. */
  738. #define WM8990_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */
  739. #define WM8990_MCDTHR_MASK 0x0038 /* MCDTHR - [5:3] */
  740. #define WM8990_MCD 0x0004 /* MCD */
  741. #define WM8990_MBSEL 0x0001 /* MBSEL */
  742. /*
  743. * R60 (0x3C) - PLL1
  744. */
  745. #define WM8990_SDM 0x0080 /* SDM */
  746. #define WM8990_PRESCALE 0x0040 /* PRESCALE */
  747. #define WM8990_PLLN_MASK 0x000F /* PLLN - [3:0] */
  748. /*
  749. * R61 (0x3D) - PLL2
  750. */
  751. #define WM8990_PLLK1_MASK 0x00FF /* PLLK1 - [7:0] */
  752. /*
  753. * R62 (0x3E) - PLL3
  754. */
  755. #define WM8990_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */
  756. /*
  757. * R63 (0x3F) - Internal Driver Bits
  758. */
  759. #define WM8990_INMIXL_PWR_BIT 0
  760. #define WM8990_AINLMUX_PWR_BIT 1
  761. #define WM8990_INMIXR_PWR_BIT 2
  762. #define WM8990_AINRMUX_PWR_BIT 3
  763. /*
  764. * Default values.
  765. */
  766. #define WM8990_REGISTER_DEFAULTS \
  767. { \
  768. /*0x8990,*/ /* R0 - Reset */ \
  769. 0x0000, /* R1 - Power Management (1) */ \
  770. 0x6000, /* R2 - Power Management (2) */ \
  771. 0x0000, /* R3 - Power Management (3) */ \
  772. 0x4050, /* R4 - Audio Interface (1) */ \
  773. 0x4000, /* R5 - Audio Interface (2) */ \
  774. 0x01C8, /* R6 - Clocking (1) */ \
  775. 0x0000, /* R7 - Clocking (2) */ \
  776. 0x0040, /* R8 - Audio Interface (3) */ \
  777. 0x0040, /* R9 - Audio Interface (4) */ \
  778. 0x0004, /* R10 - DAC CTRL */ \
  779. 0x00C0, /* R11 - Left DAC Digital Volume */ \
  780. 0x00C0, /* R12 - Right DAC Digital Volume */ \
  781. 0x0000, /* R13 - Digital Side Tone */ \
  782. 0x0100, /* R14 - ADC CTRL */ \
  783. 0x00C0, /* R15 - Left ADC Digital Volume */ \
  784. 0x00C0, /* R16 - Right ADC Digital Volume */ \
  785. 0x0000, /* R17 */ \
  786. 0x0000, /* R18 - GPIO CTRL 1 */ \
  787. 0x1000, /* R19 - GPIO1 & GPIO2 */ \
  788. 0x1010, /* R20 - GPIO3 & GPIO4 */ \
  789. 0x1010, /* R21 - GPIO5 & GPIO6 */ \
  790. 0x8000, /* R22 - GPIOCTRL 2 */ \
  791. 0x0800, /* R23 - GPIO_POL */ \
  792. 0x008B, /* R24 - Left Line Input 1&2 Volume */ \
  793. 0x008B, /* R25 - Left Line Input 3&4 Volume */ \
  794. 0x008B, /* R26 - Right Line Input 1&2 Volume */ \
  795. 0x008B, /* R27 - Right Line Input 3&4 Volume */ \
  796. 0x0000, /* R28 - Left Output Volume */ \
  797. 0x0000, /* R29 - Right Output Volume */ \
  798. 0x0066, /* R30 - Line Outputs Volume */ \
  799. 0x0022, /* R31 - Out3/4 Volume */ \
  800. 0x0079, /* R32 - Left OPGA Volume */ \
  801. 0x0079, /* R33 - Right OPGA Volume */ \
  802. 0x0003, /* R34 - Speaker Volume */ \
  803. 0x0003, /* R35 - ClassD1 */ \
  804. 0x0000, /* R36 */ \
  805. 0x0100, /* R37 - ClassD3 */ \
  806. 0x0000, /* R38 */ \
  807. 0x0000, /* R39 - Input Mixer1 */ \
  808. 0x0000, /* R40 - Input Mixer2 */ \
  809. 0x0000, /* R41 - Input Mixer3 */ \
  810. 0x0000, /* R42 - Input Mixer4 */ \
  811. 0x0000, /* R43 - Input Mixer5 */ \
  812. 0x0000, /* R44 - Input Mixer6 */ \
  813. 0x0000, /* R45 - Output Mixer1 */ \
  814. 0x0000, /* R46 - Output Mixer2 */ \
  815. 0x0000, /* R47 - Output Mixer3 */ \
  816. 0x0000, /* R48 - Output Mixer4 */ \
  817. 0x0000, /* R49 - Output Mixer5 */ \
  818. 0x0000, /* R50 - Output Mixer6 */ \
  819. 0x0180, /* R51 - Out3/4 Mixer */ \
  820. 0x0000, /* R52 - Line Mixer1 */ \
  821. 0x0000, /* R53 - Line Mixer2 */ \
  822. 0x0000, /* R54 - Speaker Mixer */ \
  823. 0x0000, /* R55 - Additional Control */ \
  824. 0x0000, /* R56 - AntiPOP1 */ \
  825. 0x0000, /* R57 - AntiPOP2 */ \
  826. 0x0000, /* R58 - MICBIAS */ \
  827. 0x0000, /* R59 */ \
  828. 0x0008, /* R60 - PLL1 */ \
  829. 0x0031, /* R61 - PLL2 */ \
  830. 0x0026, /* R62 - PLL3 */ \
  831. }
  832. struct wm8990_setup_data {
  833. unsigned short i2c_address;
  834. };
  835. #define WM8990_MCLK_DIV 0
  836. #define WM8990_DACCLK_DIV 1
  837. #define WM8990_ADCCLK_DIV 2
  838. #define WM8990_BCLK_DIV 3
  839. #define WM8990_MCLK 0
  840. extern struct snd_soc_codec_dai wm8990_dai;
  841. extern struct snd_soc_codec_device soc_codec_dev_wm8990;
  842. #endif /* __WM8990REGISTERDEFS_H__ */
  843. /*------------------------------ END OF FILE ---------------------------------*/