wm8750.c 29 KB

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  1. /*
  2. * wm8750.c -- WM8750 ALSA SoC audio driver
  3. *
  4. * Copyright 2005 Openedhand Ltd.
  5. *
  6. * Author: Richard Purdie <richard@openedhand.com>
  7. *
  8. * Based on WM8753.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/pm.h>
  19. #include <linux/i2c.h>
  20. #include <linux/platform_device.h>
  21. #include <sound/driver.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include "wm8750.h"
  29. #define AUDIO_NAME "WM8750"
  30. #define WM8750_VERSION "0.12"
  31. /*
  32. * Debug
  33. */
  34. #define WM8750_DEBUG 0
  35. #ifdef WM8750_DEBUG
  36. #define dbg(format, arg...) \
  37. printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
  38. #else
  39. #define dbg(format, arg...) do {} while (0)
  40. #endif
  41. #define err(format, arg...) \
  42. printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
  43. #define info(format, arg...) \
  44. printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
  45. #define warn(format, arg...) \
  46. printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
  47. /* codec private data */
  48. struct wm8750_priv {
  49. unsigned int sysclk;
  50. };
  51. /*
  52. * wm8750 register cache
  53. * We can't read the WM8750 register space when we
  54. * are using 2 wire for device control, so we cache them instead.
  55. */
  56. static const u16 wm8750_reg[] = {
  57. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  58. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  59. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  60. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  61. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  62. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  63. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  64. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  65. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  66. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  67. 0x0079, 0x0079, 0x0079, /* 40 */
  68. };
  69. /*
  70. * read wm8750 register cache
  71. */
  72. static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
  73. unsigned int reg)
  74. {
  75. u16 *cache = codec->reg_cache;
  76. if (reg > WM8750_CACHE_REGNUM)
  77. return -1;
  78. return cache[reg];
  79. }
  80. /*
  81. * write wm8750 register cache
  82. */
  83. static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
  84. unsigned int reg, unsigned int value)
  85. {
  86. u16 *cache = codec->reg_cache;
  87. if (reg > WM8750_CACHE_REGNUM)
  88. return;
  89. cache[reg] = value;
  90. }
  91. static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
  92. unsigned int value)
  93. {
  94. u8 data[2];
  95. /* data is
  96. * D15..D9 WM8753 register offset
  97. * D8...D0 register data
  98. */
  99. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  100. data[1] = value & 0x00ff;
  101. wm8750_write_reg_cache (codec, reg, value);
  102. if (codec->hw_write(codec->control_data, data, 2) == 2)
  103. return 0;
  104. else
  105. return -EIO;
  106. }
  107. #define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0)
  108. /*
  109. * WM8750 Controls
  110. */
  111. static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
  112. static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  113. static const char *wm8750_treble[] = {"8kHz", "4kHz"};
  114. static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
  115. static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
  116. static const char *wm8750_3d_func[] = {"Capture", "Playback"};
  117. static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
  118. static const char *wm8750_ng_type[] = {"Constant PGA Gain",
  119. "Mute ADC Output"};
  120. static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
  121. "Differential"};
  122. static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
  123. "Differential"};
  124. static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
  125. "ROUT1"};
  126. static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
  127. static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
  128. "L + R Invert"};
  129. static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  130. static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
  131. "Mono (Right)", "Digital Mono"};
  132. static const struct soc_enum wm8750_enum[] = {
  133. SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
  134. SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
  135. SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
  136. SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
  137. SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
  138. SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
  139. SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
  140. SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
  141. SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
  142. SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
  143. SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
  144. SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
  145. SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
  146. SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
  147. SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
  148. SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
  149. SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
  150. };
  151. static const struct snd_kcontrol_new wm8750_snd_controls[] = {
  152. SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
  153. SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
  154. SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
  155. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
  156. WM8750_ROUT1V, 7, 1, 0),
  157. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
  158. WM8750_ROUT2V, 7, 1, 0),
  159. SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
  160. SOC_ENUM("Capture Polarity", wm8750_enum[14]),
  161. SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
  162. SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
  163. SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
  164. SOC_ENUM("Bass Boost", wm8750_enum[0]),
  165. SOC_ENUM("Bass Filter", wm8750_enum[1]),
  166. SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
  167. SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 0),
  168. SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
  169. SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
  170. SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
  171. SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
  172. SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
  173. SOC_ENUM("3D Mode", wm8750_enum[5]),
  174. SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
  175. SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
  176. SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
  177. SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
  178. SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
  179. SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
  180. SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
  181. SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
  182. SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
  183. SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
  184. SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
  185. SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
  186. SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
  187. SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
  188. SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
  189. /* Unimplemented */
  190. /* ADCDAC Bit 0 - ADCHPD */
  191. /* ADCDAC Bit 4 - HPOR */
  192. /* ADCTL1 Bit 2,3 - DATSEL */
  193. /* ADCTL1 Bit 4,5 - DMONOMIX */
  194. /* ADCTL1 Bit 6,7 - VSEL */
  195. /* ADCTL2 Bit 2 - LRCM */
  196. /* ADCTL2 Bit 3 - TRI */
  197. /* ADCTL3 Bit 5 - HPFLREN */
  198. /* ADCTL3 Bit 6 - VROI */
  199. /* ADCTL3 Bit 7,8 - ADCLRM */
  200. /* ADCIN Bit 4 - LDCM */
  201. /* ADCIN Bit 5 - RDCM */
  202. SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
  203. SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
  204. WM8750_LOUTM2, 4, 7, 1),
  205. SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
  206. WM8750_ROUTM2, 4, 7, 1),
  207. SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
  208. WM8750_MOUTM2, 4, 7, 1),
  209. SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
  210. SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
  211. 0, 127, 0),
  212. SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
  213. 0, 127, 0),
  214. SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
  215. };
  216. /* add non dapm controls */
  217. static int wm8750_add_controls(struct snd_soc_codec *codec)
  218. {
  219. int err, i;
  220. for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
  221. err = snd_ctl_add(codec->card,
  222. snd_soc_cnew(&wm8750_snd_controls[i],codec, NULL));
  223. if (err < 0)
  224. return err;
  225. }
  226. return 0;
  227. }
  228. /*
  229. * DAPM Controls
  230. */
  231. /* Left Mixer */
  232. static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
  233. SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
  234. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
  235. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
  236. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
  237. };
  238. /* Right Mixer */
  239. static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
  240. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
  241. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
  242. SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
  243. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
  244. };
  245. /* Mono Mixer */
  246. static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
  247. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
  248. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
  249. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
  250. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
  251. };
  252. /* Left Line Mux */
  253. static const struct snd_kcontrol_new wm8750_left_line_controls =
  254. SOC_DAPM_ENUM("Route", wm8750_enum[8]);
  255. /* Right Line Mux */
  256. static const struct snd_kcontrol_new wm8750_right_line_controls =
  257. SOC_DAPM_ENUM("Route", wm8750_enum[9]);
  258. /* Left PGA Mux */
  259. static const struct snd_kcontrol_new wm8750_left_pga_controls =
  260. SOC_DAPM_ENUM("Route", wm8750_enum[10]);
  261. /* Right PGA Mux */
  262. static const struct snd_kcontrol_new wm8750_right_pga_controls =
  263. SOC_DAPM_ENUM("Route", wm8750_enum[11]);
  264. /* Out 3 Mux */
  265. static const struct snd_kcontrol_new wm8750_out3_controls =
  266. SOC_DAPM_ENUM("Route", wm8750_enum[12]);
  267. /* Differential Mux */
  268. static const struct snd_kcontrol_new wm8750_diffmux_controls =
  269. SOC_DAPM_ENUM("Route", wm8750_enum[13]);
  270. /* Mono ADC Mux */
  271. static const struct snd_kcontrol_new wm8750_monomux_controls =
  272. SOC_DAPM_ENUM("Route", wm8750_enum[16]);
  273. static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
  274. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  275. &wm8750_left_mixer_controls[0],
  276. ARRAY_SIZE(wm8750_left_mixer_controls)),
  277. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  278. &wm8750_right_mixer_controls[0],
  279. ARRAY_SIZE(wm8750_right_mixer_controls)),
  280. SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
  281. &wm8750_mono_mixer_controls[0],
  282. ARRAY_SIZE(wm8750_mono_mixer_controls)),
  283. SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
  284. SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
  285. SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
  286. SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
  287. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
  288. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
  289. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
  290. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
  291. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
  292. SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
  293. &wm8750_left_pga_controls),
  294. SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
  295. &wm8750_right_pga_controls),
  296. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  297. &wm8750_left_line_controls),
  298. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  299. &wm8750_right_line_controls),
  300. SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
  301. SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
  302. SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
  303. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  304. &wm8750_diffmux_controls),
  305. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  306. &wm8750_monomux_controls),
  307. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  308. &wm8750_monomux_controls),
  309. SND_SOC_DAPM_OUTPUT("LOUT1"),
  310. SND_SOC_DAPM_OUTPUT("ROUT1"),
  311. SND_SOC_DAPM_OUTPUT("LOUT2"),
  312. SND_SOC_DAPM_OUTPUT("ROUT2"),
  313. SND_SOC_DAPM_OUTPUT("MONO"),
  314. SND_SOC_DAPM_OUTPUT("OUT3"),
  315. SND_SOC_DAPM_INPUT("LINPUT1"),
  316. SND_SOC_DAPM_INPUT("LINPUT2"),
  317. SND_SOC_DAPM_INPUT("LINPUT3"),
  318. SND_SOC_DAPM_INPUT("RINPUT1"),
  319. SND_SOC_DAPM_INPUT("RINPUT2"),
  320. SND_SOC_DAPM_INPUT("RINPUT3"),
  321. };
  322. static const char *audio_map[][3] = {
  323. /* left mixer */
  324. {"Left Mixer", "Playback Switch", "Left DAC"},
  325. {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
  326. {"Left Mixer", "Right Playback Switch", "Right DAC"},
  327. {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
  328. /* right mixer */
  329. {"Right Mixer", "Left Playback Switch", "Left DAC"},
  330. {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
  331. {"Right Mixer", "Playback Switch", "Right DAC"},
  332. {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
  333. /* left out 1 */
  334. {"Left Out 1", NULL, "Left Mixer"},
  335. {"LOUT1", NULL, "Left Out 1"},
  336. /* left out 2 */
  337. {"Left Out 2", NULL, "Left Mixer"},
  338. {"LOUT2", NULL, "Left Out 2"},
  339. /* right out 1 */
  340. {"Right Out 1", NULL, "Right Mixer"},
  341. {"ROUT1", NULL, "Right Out 1"},
  342. /* right out 2 */
  343. {"Right Out 2", NULL, "Right Mixer"},
  344. {"ROUT2", NULL, "Right Out 2"},
  345. /* mono mixer */
  346. {"Mono Mixer", "Left Playback Switch", "Left DAC"},
  347. {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
  348. {"Mono Mixer", "Right Playback Switch", "Right DAC"},
  349. {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
  350. /* mono out */
  351. {"Mono Out 1", NULL, "Mono Mixer"},
  352. {"MONO1", NULL, "Mono Out 1"},
  353. /* out 3 */
  354. {"Out3 Mux", "VREF", "VREF"},
  355. {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
  356. {"Out3 Mux", "ROUT1", "Right Mixer"},
  357. {"Out3 Mux", "MonoOut", "MONO1"},
  358. {"Out 3", NULL, "Out3 Mux"},
  359. {"OUT3", NULL, "Out 3"},
  360. /* Left Line Mux */
  361. {"Left Line Mux", "Line 1", "LINPUT1"},
  362. {"Left Line Mux", "Line 2", "LINPUT2"},
  363. {"Left Line Mux", "Line 3", "LINPUT3"},
  364. {"Left Line Mux", "PGA", "Left PGA Mux"},
  365. {"Left Line Mux", "Differential", "Differential Mux"},
  366. /* Right Line Mux */
  367. {"Right Line Mux", "Line 1", "RINPUT1"},
  368. {"Right Line Mux", "Line 2", "RINPUT2"},
  369. {"Right Line Mux", "Line 3", "RINPUT3"},
  370. {"Right Line Mux", "PGA", "Right PGA Mux"},
  371. {"Right Line Mux", "Differential", "Differential Mux"},
  372. /* Left PGA Mux */
  373. {"Left PGA Mux", "Line 1", "LINPUT1"},
  374. {"Left PGA Mux", "Line 2", "LINPUT2"},
  375. {"Left PGA Mux", "Line 3", "LINPUT3"},
  376. {"Left PGA Mux", "Differential", "Differential Mux"},
  377. /* Right PGA Mux */
  378. {"Right PGA Mux", "Line 1", "RINPUT1"},
  379. {"Right PGA Mux", "Line 2", "RINPUT2"},
  380. {"Right PGA Mux", "Line 3", "RINPUT3"},
  381. {"Right PGA Mux", "Differential", "Differential Mux"},
  382. /* Differential Mux */
  383. {"Differential Mux", "Line 1", "LINPUT1"},
  384. {"Differential Mux", "Line 1", "RINPUT1"},
  385. {"Differential Mux", "Line 2", "LINPUT2"},
  386. {"Differential Mux", "Line 2", "RINPUT2"},
  387. /* Left ADC Mux */
  388. {"Left ADC Mux", "Stereo", "Left PGA Mux"},
  389. {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
  390. {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
  391. /* Right ADC Mux */
  392. {"Right ADC Mux", "Stereo", "Right PGA Mux"},
  393. {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
  394. {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
  395. /* ADC */
  396. {"Left ADC", NULL, "Left ADC Mux"},
  397. {"Right ADC", NULL, "Right ADC Mux"},
  398. /* terminator */
  399. {NULL, NULL, NULL},
  400. };
  401. static int wm8750_add_widgets(struct snd_soc_codec *codec)
  402. {
  403. int i;
  404. for(i = 0; i < ARRAY_SIZE(wm8750_dapm_widgets); i++) {
  405. snd_soc_dapm_new_control(codec, &wm8750_dapm_widgets[i]);
  406. }
  407. /* set up audio path audio_mapnects */
  408. for(i = 0; audio_map[i][0] != NULL; i++) {
  409. snd_soc_dapm_connect_input(codec, audio_map[i][0],
  410. audio_map[i][1], audio_map[i][2]);
  411. }
  412. snd_soc_dapm_new_widgets(codec);
  413. return 0;
  414. }
  415. struct _coeff_div {
  416. u32 mclk;
  417. u32 rate;
  418. u16 fs;
  419. u8 sr:5;
  420. u8 usb:1;
  421. };
  422. /* codec hifi mclk clock divider coefficients */
  423. static const struct _coeff_div coeff_div[] = {
  424. /* 8k */
  425. {12288000, 8000, 1536, 0x6, 0x0},
  426. {11289600, 8000, 1408, 0x16, 0x0},
  427. {18432000, 8000, 2304, 0x7, 0x0},
  428. {16934400, 8000, 2112, 0x17, 0x0},
  429. {12000000, 8000, 1500, 0x6, 0x1},
  430. /* 11.025k */
  431. {11289600, 11025, 1024, 0x18, 0x0},
  432. {16934400, 11025, 1536, 0x19, 0x0},
  433. {12000000, 11025, 1088, 0x19, 0x1},
  434. /* 16k */
  435. {12288000, 16000, 768, 0xa, 0x0},
  436. {18432000, 16000, 1152, 0xb, 0x0},
  437. {12000000, 16000, 750, 0xa, 0x1},
  438. /* 22.05k */
  439. {11289600, 22050, 512, 0x1a, 0x0},
  440. {16934400, 22050, 768, 0x1b, 0x0},
  441. {12000000, 22050, 544, 0x1b, 0x1},
  442. /* 32k */
  443. {12288000, 32000, 384, 0xc, 0x0},
  444. {18432000, 32000, 576, 0xd, 0x0},
  445. {12000000, 32000, 375, 0xa, 0x1},
  446. /* 44.1k */
  447. {11289600, 44100, 256, 0x10, 0x0},
  448. {16934400, 44100, 384, 0x11, 0x0},
  449. {12000000, 44100, 272, 0x11, 0x1},
  450. /* 48k */
  451. {12288000, 48000, 256, 0x0, 0x0},
  452. {18432000, 48000, 384, 0x1, 0x0},
  453. {12000000, 48000, 250, 0x0, 0x1},
  454. /* 88.2k */
  455. {11289600, 88200, 128, 0x1e, 0x0},
  456. {16934400, 88200, 192, 0x1f, 0x0},
  457. {12000000, 88200, 136, 0x1f, 0x1},
  458. /* 96k */
  459. {12288000, 96000, 128, 0xe, 0x0},
  460. {18432000, 96000, 192, 0xf, 0x0},
  461. {12000000, 96000, 125, 0xe, 0x1},
  462. };
  463. static inline int get_coeff(int mclk, int rate)
  464. {
  465. int i;
  466. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  467. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  468. return i;
  469. }
  470. printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
  471. mclk, rate);
  472. return -EINVAL;
  473. }
  474. static int wm8750_set_dai_sysclk(struct snd_soc_codec_dai *codec_dai,
  475. int clk_id, unsigned int freq, int dir)
  476. {
  477. struct snd_soc_codec *codec = codec_dai->codec;
  478. struct wm8750_priv *wm8750 = codec->private_data;
  479. switch (freq) {
  480. case 11289600:
  481. case 12000000:
  482. case 12288000:
  483. case 16934400:
  484. case 18432000:
  485. wm8750->sysclk = freq;
  486. return 0;
  487. }
  488. return -EINVAL;
  489. }
  490. static int wm8750_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
  491. unsigned int fmt)
  492. {
  493. struct snd_soc_codec *codec = codec_dai->codec;
  494. u16 iface = 0;
  495. /* set master/slave audio interface */
  496. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  497. case SND_SOC_DAIFMT_CBM_CFM:
  498. iface = 0x0040;
  499. break;
  500. case SND_SOC_DAIFMT_CBS_CFS:
  501. break;
  502. default:
  503. return -EINVAL;
  504. }
  505. /* interface format */
  506. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  507. case SND_SOC_DAIFMT_I2S:
  508. iface |= 0x0002;
  509. break;
  510. case SND_SOC_DAIFMT_RIGHT_J:
  511. break;
  512. case SND_SOC_DAIFMT_LEFT_J:
  513. iface |= 0x0001;
  514. break;
  515. case SND_SOC_DAIFMT_DSP_A:
  516. iface |= 0x0003;
  517. break;
  518. case SND_SOC_DAIFMT_DSP_B:
  519. iface |= 0x0013;
  520. break;
  521. default:
  522. return -EINVAL;
  523. }
  524. /* clock inversion */
  525. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  526. case SND_SOC_DAIFMT_NB_NF:
  527. break;
  528. case SND_SOC_DAIFMT_IB_IF:
  529. iface |= 0x0090;
  530. break;
  531. case SND_SOC_DAIFMT_IB_NF:
  532. iface |= 0x0080;
  533. break;
  534. case SND_SOC_DAIFMT_NB_IF:
  535. iface |= 0x0010;
  536. break;
  537. default:
  538. return -EINVAL;
  539. }
  540. wm8750_write(codec, WM8750_IFACE, iface);
  541. return 0;
  542. }
  543. static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
  544. struct snd_pcm_hw_params *params)
  545. {
  546. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  547. struct snd_soc_device *socdev = rtd->socdev;
  548. struct snd_soc_codec *codec = socdev->codec;
  549. struct wm8750_priv *wm8750 = codec->private_data;
  550. u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3;
  551. u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0;
  552. int coeff = get_coeff(wm8750->sysclk, params_rate(params));
  553. /* bit size */
  554. switch (params_format(params)) {
  555. case SNDRV_PCM_FORMAT_S16_LE:
  556. break;
  557. case SNDRV_PCM_FORMAT_S20_3LE:
  558. iface |= 0x0004;
  559. break;
  560. case SNDRV_PCM_FORMAT_S24_LE:
  561. iface |= 0x0008;
  562. break;
  563. case SNDRV_PCM_FORMAT_S32_LE:
  564. iface |= 0x000c;
  565. break;
  566. }
  567. /* set iface & srate */
  568. wm8750_write(codec, WM8750_IFACE, iface);
  569. if (coeff >= 0)
  570. wm8750_write(codec, WM8750_SRATE, srate |
  571. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  572. return 0;
  573. }
  574. static int wm8750_mute(struct snd_soc_codec_dai *dai, int mute)
  575. {
  576. struct snd_soc_codec *codec = dai->codec;
  577. u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
  578. if (mute)
  579. wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
  580. else
  581. wm8750_write(codec, WM8750_ADCDAC, mute_reg);
  582. return 0;
  583. }
  584. static int wm8750_dapm_event(struct snd_soc_codec *codec, int event)
  585. {
  586. u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
  587. switch (event) {
  588. case SNDRV_CTL_POWER_D0: /* full On */
  589. /* set vmid to 50k and unmute dac */
  590. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
  591. break;
  592. case SNDRV_CTL_POWER_D1: /* partial On */
  593. case SNDRV_CTL_POWER_D2: /* partial On */
  594. /* set vmid to 5k for quick power up */
  595. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
  596. break;
  597. case SNDRV_CTL_POWER_D3hot: /* Off, with power */
  598. /* mute dac and set vmid to 500k, enable VREF */
  599. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
  600. break;
  601. case SNDRV_CTL_POWER_D3cold: /* Off, without power */
  602. wm8750_write(codec, WM8750_PWR1, 0x0001);
  603. break;
  604. }
  605. codec->dapm_state = event;
  606. return 0;
  607. }
  608. #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  609. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
  610. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  611. #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  612. SNDRV_PCM_FMTBIT_S24_LE)
  613. struct snd_soc_codec_dai wm8750_dai = {
  614. .name = "WM8750",
  615. .playback = {
  616. .stream_name = "Playback",
  617. .channels_min = 1,
  618. .channels_max = 2,
  619. .rates = WM8750_RATES,
  620. .formats = WM8750_FORMATS,},
  621. .capture = {
  622. .stream_name = "Capture",
  623. .channels_min = 1,
  624. .channels_max = 2,
  625. .rates = WM8750_RATES,
  626. .formats = WM8750_FORMATS,},
  627. .ops = {
  628. .hw_params = wm8750_pcm_hw_params,
  629. },
  630. .dai_ops = {
  631. .digital_mute = wm8750_mute,
  632. .set_fmt = wm8750_set_dai_fmt,
  633. .set_sysclk = wm8750_set_dai_sysclk,
  634. },
  635. };
  636. EXPORT_SYMBOL_GPL(wm8750_dai);
  637. static void wm8750_work(struct work_struct *work)
  638. {
  639. struct snd_soc_codec *codec =
  640. container_of(work, struct snd_soc_codec, delayed_work.work);
  641. wm8750_dapm_event(codec, codec->dapm_state);
  642. }
  643. static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
  644. {
  645. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  646. struct snd_soc_codec *codec = socdev->codec;
  647. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
  648. return 0;
  649. }
  650. static int wm8750_resume(struct platform_device *pdev)
  651. {
  652. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  653. struct snd_soc_codec *codec = socdev->codec;
  654. int i;
  655. u8 data[2];
  656. u16 *cache = codec->reg_cache;
  657. /* Sync reg_cache with the hardware */
  658. for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
  659. if (i == WM8750_RESET)
  660. continue;
  661. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  662. data[1] = cache[i] & 0x00ff;
  663. codec->hw_write(codec->control_data, data, 2);
  664. }
  665. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
  666. /* charge wm8750 caps */
  667. if (codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) {
  668. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
  669. codec->dapm_state = SNDRV_CTL_POWER_D0;
  670. schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
  671. }
  672. return 0;
  673. }
  674. /*
  675. * initialise the WM8750 driver
  676. * register the mixer and dsp interfaces with the kernel
  677. */
  678. static int wm8750_init(struct snd_soc_device *socdev)
  679. {
  680. struct snd_soc_codec *codec = socdev->codec;
  681. int reg, ret = 0;
  682. codec->name = "WM8750";
  683. codec->owner = THIS_MODULE;
  684. codec->read = wm8750_read_reg_cache;
  685. codec->write = wm8750_write;
  686. codec->dapm_event = wm8750_dapm_event;
  687. codec->dai = &wm8750_dai;
  688. codec->num_dai = 1;
  689. codec->reg_cache_size = sizeof(wm8750_reg);
  690. codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
  691. if (codec->reg_cache == NULL)
  692. return -ENOMEM;
  693. wm8750_reset(codec);
  694. /* register pcms */
  695. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  696. if (ret < 0) {
  697. printk(KERN_ERR "wm8750: failed to create pcms\n");
  698. goto pcm_err;
  699. }
  700. /* charge output caps */
  701. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
  702. codec->dapm_state = SNDRV_CTL_POWER_D3hot;
  703. schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
  704. /* set the update bits */
  705. reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
  706. wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
  707. reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
  708. wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
  709. reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
  710. wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
  711. reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
  712. wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
  713. reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
  714. wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
  715. reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
  716. wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
  717. reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
  718. wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
  719. reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
  720. wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
  721. wm8750_add_controls(codec);
  722. wm8750_add_widgets(codec);
  723. ret = snd_soc_register_card(socdev);
  724. if (ret < 0) {
  725. printk(KERN_ERR "wm8750: failed to register card\n");
  726. goto card_err;
  727. }
  728. return ret;
  729. card_err:
  730. snd_soc_free_pcms(socdev);
  731. snd_soc_dapm_free(socdev);
  732. pcm_err:
  733. kfree(codec->reg_cache);
  734. return ret;
  735. }
  736. /* If the i2c layer weren't so broken, we could pass this kind of data
  737. around */
  738. static struct snd_soc_device *wm8750_socdev;
  739. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  740. /*
  741. * WM8731 2 wire address is determined by GPIO5
  742. * state during powerup.
  743. * low = 0x1a
  744. * high = 0x1b
  745. */
  746. static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
  747. /* Magic definition of all other variables and things */
  748. I2C_CLIENT_INSMOD;
  749. static struct i2c_driver wm8750_i2c_driver;
  750. static struct i2c_client client_template;
  751. static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind)
  752. {
  753. struct snd_soc_device *socdev = wm8750_socdev;
  754. struct wm8750_setup_data *setup = socdev->codec_data;
  755. struct snd_soc_codec *codec = socdev->codec;
  756. struct i2c_client *i2c;
  757. int ret;
  758. if (addr != setup->i2c_address)
  759. return -ENODEV;
  760. client_template.adapter = adap;
  761. client_template.addr = addr;
  762. i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL);
  763. if (i2c == NULL) {
  764. kfree(codec);
  765. return -ENOMEM;
  766. }
  767. i2c_set_clientdata(i2c, codec);
  768. codec->control_data = i2c;
  769. ret = i2c_attach_client(i2c);
  770. if (ret < 0) {
  771. err("failed to attach codec at addr %x\n", addr);
  772. goto err;
  773. }
  774. ret = wm8750_init(socdev);
  775. if (ret < 0) {
  776. err("failed to initialise WM8750\n");
  777. goto err;
  778. }
  779. return ret;
  780. err:
  781. kfree(codec);
  782. kfree(i2c);
  783. return ret;
  784. }
  785. static int wm8750_i2c_detach(struct i2c_client *client)
  786. {
  787. struct snd_soc_codec *codec = i2c_get_clientdata(client);
  788. i2c_detach_client(client);
  789. kfree(codec->reg_cache);
  790. kfree(client);
  791. return 0;
  792. }
  793. static int wm8750_i2c_attach(struct i2c_adapter *adap)
  794. {
  795. return i2c_probe(adap, &addr_data, wm8750_codec_probe);
  796. }
  797. /* corgi i2c codec control layer */
  798. static struct i2c_driver wm8750_i2c_driver = {
  799. .driver = {
  800. .name = "WM8750 I2C Codec",
  801. .owner = THIS_MODULE,
  802. },
  803. .id = I2C_DRIVERID_WM8750,
  804. .attach_adapter = wm8750_i2c_attach,
  805. .detach_client = wm8750_i2c_detach,
  806. .command = NULL,
  807. };
  808. static struct i2c_client client_template = {
  809. .name = "WM8750",
  810. .driver = &wm8750_i2c_driver,
  811. };
  812. #endif
  813. static int wm8750_probe(struct platform_device *pdev)
  814. {
  815. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  816. struct wm8750_setup_data *setup = socdev->codec_data;
  817. struct snd_soc_codec *codec;
  818. struct wm8750_priv *wm8750;
  819. int ret = 0;
  820. info("WM8750 Audio Codec %s", WM8750_VERSION);
  821. codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
  822. if (codec == NULL)
  823. return -ENOMEM;
  824. wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
  825. if (wm8750 == NULL) {
  826. kfree(codec);
  827. return -ENOMEM;
  828. }
  829. codec->private_data = wm8750;
  830. socdev->codec = codec;
  831. mutex_init(&codec->mutex);
  832. INIT_LIST_HEAD(&codec->dapm_widgets);
  833. INIT_LIST_HEAD(&codec->dapm_paths);
  834. wm8750_socdev = socdev;
  835. INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
  836. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  837. if (setup->i2c_address) {
  838. normal_i2c[0] = setup->i2c_address;
  839. codec->hw_write = (hw_write_t)i2c_master_send;
  840. ret = i2c_add_driver(&wm8750_i2c_driver);
  841. if (ret != 0)
  842. printk(KERN_ERR "can't add i2c driver");
  843. }
  844. #else
  845. /* Add other interfaces here */
  846. #endif
  847. return ret;
  848. }
  849. /*
  850. * This function forces any delayed work to be queued and run.
  851. */
  852. static int run_delayed_work(struct delayed_work *dwork)
  853. {
  854. int ret;
  855. /* cancel any work waiting to be queued. */
  856. ret = cancel_delayed_work(dwork);
  857. /* if there was any work waiting then we run it now and
  858. * wait for it's completion */
  859. if (ret) {
  860. schedule_delayed_work(dwork, 0);
  861. flush_scheduled_work();
  862. }
  863. return ret;
  864. }
  865. /* power down chip */
  866. static int wm8750_remove(struct platform_device *pdev)
  867. {
  868. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  869. struct snd_soc_codec *codec = socdev->codec;
  870. if (codec->control_data)
  871. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
  872. run_delayed_work(&codec->delayed_work);
  873. snd_soc_free_pcms(socdev);
  874. snd_soc_dapm_free(socdev);
  875. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  876. i2c_del_driver(&wm8750_i2c_driver);
  877. #endif
  878. kfree(codec->private_data);
  879. kfree(codec);
  880. return 0;
  881. }
  882. struct snd_soc_codec_device soc_codec_dev_wm8750 = {
  883. .probe = wm8750_probe,
  884. .remove = wm8750_remove,
  885. .suspend = wm8750_suspend,
  886. .resume = wm8750_resume,
  887. };
  888. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
  889. MODULE_DESCRIPTION("ASoC WM8750 driver");
  890. MODULE_AUTHOR("Liam Girdwood");
  891. MODULE_LICENSE("GPL");