ice1724.c 67 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <sound/driver.h>
  25. #include <asm/io.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/mutex.h>
  33. #include <sound/core.h>
  34. #include <sound/info.h>
  35. #include <sound/mpu401.h>
  36. #include <sound/initval.h>
  37. #include <sound/asoundef.h>
  38. #include "ice1712.h"
  39. #include "envy24ht.h"
  40. /* lowlevel routines */
  41. #include "amp.h"
  42. #include "revo.h"
  43. #include "aureon.h"
  44. #include "vt1720_mobo.h"
  45. #include "pontis.h"
  46. #include "prodigy192.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  51. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  52. MODULE_LICENSE("GPL");
  53. MODULE_SUPPORTED_DEVICE("{"
  54. REVO_DEVICE_DESC
  55. AMP_AUDIO2000_DEVICE_DESC
  56. AUREON_DEVICE_DESC
  57. VT1720_MOBO_DEVICE_DESC
  58. PONTIS_DEVICE_DESC
  59. PRODIGY192_DEVICE_DESC
  60. JULI_DEVICE_DESC
  61. PHASE_DEVICE_DESC
  62. WTM_DEVICE_DESC
  63. "{VIA,VT1720},"
  64. "{VIA,VT1724},"
  65. "{ICEnsemble,Generic ICE1724},"
  66. "{ICEnsemble,Generic Envy24HT}"
  67. "{ICEnsemble,Generic Envy24PT}}");
  68. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  69. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  70. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  71. static char *model[SNDRV_CARDS];
  72. module_param_array(index, int, NULL, 0444);
  73. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  74. module_param_array(id, charp, NULL, 0444);
  75. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  76. module_param_array(enable, bool, NULL, 0444);
  77. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  78. module_param_array(model, charp, NULL, 0444);
  79. MODULE_PARM_DESC(model, "Use the given board model.");
  80. /* Both VT1720 and VT1724 have the same PCI IDs */
  81. static const struct pci_device_id snd_vt1724_ids[] = {
  82. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  83. { 0, }
  84. };
  85. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  86. static int PRO_RATE_LOCKED;
  87. static int PRO_RATE_RESET = 1;
  88. static unsigned int PRO_RATE_DEFAULT = 44100;
  89. /*
  90. * Basic I/O
  91. */
  92. /* check whether the clock mode is spdif-in */
  93. static inline int is_spdif_master(struct snd_ice1712 *ice)
  94. {
  95. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  96. }
  97. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  98. {
  99. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  100. }
  101. /*
  102. * ac97 section
  103. */
  104. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  105. {
  106. unsigned char old_cmd;
  107. int tm;
  108. for (tm = 0; tm < 0x10000; tm++) {
  109. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  110. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  111. continue;
  112. if (!(old_cmd & VT1724_AC97_READY))
  113. continue;
  114. return old_cmd;
  115. }
  116. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  117. return old_cmd;
  118. }
  119. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  120. {
  121. int tm;
  122. for (tm = 0; tm < 0x10000; tm++)
  123. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  124. return 0;
  125. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  126. return -EIO;
  127. }
  128. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  129. unsigned short reg,
  130. unsigned short val)
  131. {
  132. struct snd_ice1712 *ice = ac97->private_data;
  133. unsigned char old_cmd;
  134. old_cmd = snd_vt1724_ac97_ready(ice);
  135. old_cmd &= ~VT1724_AC97_ID_MASK;
  136. old_cmd |= ac97->num;
  137. outb(reg, ICEMT1724(ice, AC97_INDEX));
  138. outw(val, ICEMT1724(ice, AC97_DATA));
  139. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  140. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  141. }
  142. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  143. {
  144. struct snd_ice1712 *ice = ac97->private_data;
  145. unsigned char old_cmd;
  146. old_cmd = snd_vt1724_ac97_ready(ice);
  147. old_cmd &= ~VT1724_AC97_ID_MASK;
  148. old_cmd |= ac97->num;
  149. outb(reg, ICEMT1724(ice, AC97_INDEX));
  150. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  151. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  152. return ~0;
  153. return inw(ICEMT1724(ice, AC97_DATA));
  154. }
  155. /*
  156. * GPIO operations
  157. */
  158. /* set gpio direction 0 = read, 1 = write */
  159. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  160. {
  161. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  162. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  163. }
  164. /* set the gpio mask (0 = writable) */
  165. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  166. {
  167. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  168. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  169. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  170. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  171. }
  172. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  173. {
  174. outw(data, ICEREG1724(ice, GPIO_DATA));
  175. if (! ice->vt1720)
  176. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  177. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  178. }
  179. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  180. {
  181. unsigned int data;
  182. if (! ice->vt1720)
  183. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  184. else
  185. data = 0;
  186. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  187. return data;
  188. }
  189. /*
  190. * Interrupt handler
  191. */
  192. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  193. {
  194. struct snd_ice1712 *ice = dev_id;
  195. unsigned char status;
  196. int handled = 0;
  197. while (1) {
  198. status = inb(ICEREG1724(ice, IRQSTAT));
  199. if (status == 0)
  200. break;
  201. handled = 1;
  202. /* these should probably be separated at some point,
  203. * but as we don't currently have MPU support on the board
  204. * I will leave it
  205. */
  206. if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
  207. if (ice->rmidi[0])
  208. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
  209. outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
  210. status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
  211. }
  212. if (status & VT1724_IRQ_MTPCM) {
  213. /*
  214. * Multi-track PCM
  215. * PCM assignment are:
  216. * Playback DMA0 (M/C) = playback_pro_substream
  217. * Playback DMA1 = playback_con_substream_ds[0]
  218. * Playback DMA2 = playback_con_substream_ds[1]
  219. * Playback DMA3 = playback_con_substream_ds[2]
  220. * Playback DMA4 (SPDIF) = playback_con_substream
  221. * Record DMA0 = capture_pro_substream
  222. * Record DMA1 = capture_con_substream
  223. */
  224. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  225. if (mtstat & VT1724_MULTI_PDMA0) {
  226. if (ice->playback_pro_substream)
  227. snd_pcm_period_elapsed(ice->playback_pro_substream);
  228. }
  229. if (mtstat & VT1724_MULTI_RDMA0) {
  230. if (ice->capture_pro_substream)
  231. snd_pcm_period_elapsed(ice->capture_pro_substream);
  232. }
  233. if (mtstat & VT1724_MULTI_PDMA1) {
  234. if (ice->playback_con_substream_ds[0])
  235. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  236. }
  237. if (mtstat & VT1724_MULTI_PDMA2) {
  238. if (ice->playback_con_substream_ds[1])
  239. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  240. }
  241. if (mtstat & VT1724_MULTI_PDMA3) {
  242. if (ice->playback_con_substream_ds[2])
  243. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  244. }
  245. if (mtstat & VT1724_MULTI_PDMA4) {
  246. if (ice->playback_con_substream)
  247. snd_pcm_period_elapsed(ice->playback_con_substream);
  248. }
  249. if (mtstat & VT1724_MULTI_RDMA1) {
  250. if (ice->capture_con_substream)
  251. snd_pcm_period_elapsed(ice->capture_con_substream);
  252. }
  253. /* ack anyway to avoid freeze */
  254. outb(mtstat, ICEMT1724(ice, IRQ));
  255. /* ought to really handle this properly */
  256. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  257. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  258. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  259. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  260. /* If I don't do this, I get machine lockup due to continual interrupts */
  261. }
  262. }
  263. }
  264. return IRQ_RETVAL(handled);
  265. }
  266. /*
  267. * PCM code - professional part (multitrack)
  268. */
  269. static unsigned int rates[] = {
  270. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  271. 32000, 44100, 48000, 64000, 88200, 96000,
  272. 176400, 192000,
  273. };
  274. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  275. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  276. .list = rates,
  277. .mask = 0,
  278. };
  279. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  280. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  281. .list = rates,
  282. .mask = 0,
  283. };
  284. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  285. .count = ARRAY_SIZE(rates),
  286. .list = rates,
  287. .mask = 0,
  288. };
  289. struct vt1724_pcm_reg {
  290. unsigned int addr; /* ADDR register offset */
  291. unsigned int size; /* SIZE register offset */
  292. unsigned int count; /* COUNT register offset */
  293. unsigned int start; /* start & pause bit */
  294. };
  295. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  296. {
  297. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  298. unsigned char what;
  299. unsigned char old;
  300. struct list_head *pos;
  301. struct snd_pcm_substream *s;
  302. what = 0;
  303. snd_pcm_group_for_each(pos, substream) {
  304. const struct vt1724_pcm_reg *reg;
  305. s = snd_pcm_group_substream_entry(pos);
  306. reg = s->runtime->private_data;
  307. what |= reg->start;
  308. snd_pcm_trigger_done(s, substream);
  309. }
  310. switch (cmd) {
  311. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  312. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  313. spin_lock(&ice->reg_lock);
  314. old = inb(ICEMT1724(ice, DMA_PAUSE));
  315. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  316. old |= what;
  317. else
  318. old &= ~what;
  319. outb(old, ICEMT1724(ice, DMA_PAUSE));
  320. spin_unlock(&ice->reg_lock);
  321. break;
  322. case SNDRV_PCM_TRIGGER_START:
  323. case SNDRV_PCM_TRIGGER_STOP:
  324. spin_lock(&ice->reg_lock);
  325. old = inb(ICEMT1724(ice, DMA_CONTROL));
  326. if (cmd == SNDRV_PCM_TRIGGER_START)
  327. old |= what;
  328. else
  329. old &= ~what;
  330. outb(old, ICEMT1724(ice, DMA_CONTROL));
  331. spin_unlock(&ice->reg_lock);
  332. break;
  333. default:
  334. return -EINVAL;
  335. }
  336. return 0;
  337. }
  338. /*
  339. */
  340. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  341. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  342. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  343. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  344. static int get_max_rate(struct snd_ice1712 *ice)
  345. {
  346. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  347. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  348. return 192000;
  349. else
  350. return 96000;
  351. } else
  352. return 48000;
  353. }
  354. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  355. int force)
  356. {
  357. unsigned long flags;
  358. unsigned char val, old;
  359. unsigned int i, mclk_change;
  360. if (rate > get_max_rate(ice))
  361. return;
  362. switch (rate) {
  363. case 8000: val = 6; break;
  364. case 9600: val = 3; break;
  365. case 11025: val = 10; break;
  366. case 12000: val = 2; break;
  367. case 16000: val = 5; break;
  368. case 22050: val = 9; break;
  369. case 24000: val = 1; break;
  370. case 32000: val = 4; break;
  371. case 44100: val = 8; break;
  372. case 48000: val = 0; break;
  373. case 64000: val = 15; break;
  374. case 88200: val = 11; break;
  375. case 96000: val = 7; break;
  376. case 176400: val = 12; break;
  377. case 192000: val = 14; break;
  378. default:
  379. snd_BUG();
  380. val = 0;
  381. break;
  382. }
  383. spin_lock_irqsave(&ice->reg_lock, flags);
  384. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  385. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  386. /* running? we cannot change the rate now... */
  387. spin_unlock_irqrestore(&ice->reg_lock, flags);
  388. return;
  389. }
  390. if (!force && is_pro_rate_locked(ice)) {
  391. spin_unlock_irqrestore(&ice->reg_lock, flags);
  392. return;
  393. }
  394. old = inb(ICEMT1724(ice, RATE));
  395. if (force || old != val)
  396. outb(val, ICEMT1724(ice, RATE));
  397. else if (rate == ice->cur_rate) {
  398. spin_unlock_irqrestore(&ice->reg_lock, flags);
  399. return;
  400. }
  401. ice->cur_rate = rate;
  402. /* check MT02 */
  403. mclk_change = 0;
  404. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  405. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  406. if (rate > 96000)
  407. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  408. else
  409. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  410. if (val != old) {
  411. outb(val, ICEMT1724(ice, I2S_FORMAT));
  412. mclk_change = 1;
  413. }
  414. }
  415. spin_unlock_irqrestore(&ice->reg_lock, flags);
  416. if (mclk_change && ice->gpio.i2s_mclk_changed)
  417. ice->gpio.i2s_mclk_changed(ice);
  418. if (ice->gpio.set_pro_rate)
  419. ice->gpio.set_pro_rate(ice, rate);
  420. /* set up codecs */
  421. for (i = 0; i < ice->akm_codecs; i++) {
  422. if (ice->akm[i].ops.set_rate_val)
  423. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  424. }
  425. if (ice->spdif.ops.setup_rate)
  426. ice->spdif.ops.setup_rate(ice, rate);
  427. }
  428. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  429. struct snd_pcm_hw_params *hw_params)
  430. {
  431. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  432. int i, chs;
  433. chs = params_channels(hw_params);
  434. mutex_lock(&ice->open_mutex);
  435. /* mark surround channels */
  436. if (substream == ice->playback_pro_substream) {
  437. /* PDMA0 can be multi-channel up to 8 */
  438. chs = chs / 2 - 1;
  439. for (i = 0; i < chs; i++) {
  440. if (ice->pcm_reserved[i] &&
  441. ice->pcm_reserved[i] != substream) {
  442. mutex_unlock(&ice->open_mutex);
  443. return -EBUSY;
  444. }
  445. ice->pcm_reserved[i] = substream;
  446. }
  447. for (; i < 3; i++) {
  448. if (ice->pcm_reserved[i] == substream)
  449. ice->pcm_reserved[i] = NULL;
  450. }
  451. } else {
  452. for (i = 0; i < 3; i++) {
  453. /* check individual playback stream */
  454. if (ice->playback_con_substream_ds[i] == substream) {
  455. if (ice->pcm_reserved[i] &&
  456. ice->pcm_reserved[i] != substream) {
  457. mutex_unlock(&ice->open_mutex);
  458. return -EBUSY;
  459. }
  460. ice->pcm_reserved[i] = substream;
  461. break;
  462. }
  463. }
  464. }
  465. mutex_unlock(&ice->open_mutex);
  466. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  467. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  468. }
  469. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  470. {
  471. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  472. int i;
  473. mutex_lock(&ice->open_mutex);
  474. /* unmark surround channels */
  475. for (i = 0; i < 3; i++)
  476. if (ice->pcm_reserved[i] == substream)
  477. ice->pcm_reserved[i] = NULL;
  478. mutex_unlock(&ice->open_mutex);
  479. return snd_pcm_lib_free_pages(substream);
  480. }
  481. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  482. {
  483. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  484. unsigned char val;
  485. unsigned int size;
  486. spin_lock_irq(&ice->reg_lock);
  487. val = (8 - substream->runtime->channels) >> 1;
  488. outb(val, ICEMT1724(ice, BURST));
  489. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  490. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  491. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  492. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  493. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  494. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  495. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  496. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  497. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  498. spin_unlock_irq(&ice->reg_lock);
  499. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  500. return 0;
  501. }
  502. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  503. {
  504. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  505. size_t ptr;
  506. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  507. return 0;
  508. #if 0 /* read PLAYBACK_ADDR */
  509. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  510. if (ptr < substream->runtime->dma_addr) {
  511. snd_printd("ice1724: invalid negative ptr\n");
  512. return 0;
  513. }
  514. ptr -= substream->runtime->dma_addr;
  515. ptr = bytes_to_frames(substream->runtime, ptr);
  516. if (ptr >= substream->runtime->buffer_size) {
  517. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  518. (int)ptr, (int)substream->runtime->period_size);
  519. return 0;
  520. }
  521. #else /* read PLAYBACK_SIZE */
  522. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  523. ptr = (ptr + 1) << 2;
  524. ptr = bytes_to_frames(substream->runtime, ptr);
  525. if (! ptr)
  526. ;
  527. else if (ptr <= substream->runtime->buffer_size)
  528. ptr = substream->runtime->buffer_size - ptr;
  529. else {
  530. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  531. (int)ptr, (int)substream->runtime->buffer_size);
  532. ptr = 0;
  533. }
  534. #endif
  535. return ptr;
  536. }
  537. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  538. {
  539. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  540. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  541. spin_lock_irq(&ice->reg_lock);
  542. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  543. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  544. ice->profi_port + reg->size);
  545. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  546. ice->profi_port + reg->count);
  547. spin_unlock_irq(&ice->reg_lock);
  548. return 0;
  549. }
  550. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  551. {
  552. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  553. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  554. size_t ptr;
  555. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  556. return 0;
  557. #if 0 /* use ADDR register */
  558. ptr = inl(ice->profi_port + reg->addr);
  559. ptr -= substream->runtime->dma_addr;
  560. return bytes_to_frames(substream->runtime, ptr);
  561. #else /* use SIZE register */
  562. ptr = inw(ice->profi_port + reg->size);
  563. ptr = (ptr + 1) << 2;
  564. ptr = bytes_to_frames(substream->runtime, ptr);
  565. if (! ptr)
  566. ;
  567. else if (ptr <= substream->runtime->buffer_size)
  568. ptr = substream->runtime->buffer_size - ptr;
  569. else {
  570. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  571. (int)ptr, (int)substream->runtime->buffer_size);
  572. ptr = 0;
  573. }
  574. return ptr;
  575. #endif
  576. }
  577. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  578. .addr = VT1724_MT_PLAYBACK_ADDR,
  579. .size = VT1724_MT_PLAYBACK_SIZE,
  580. .count = VT1724_MT_PLAYBACK_COUNT,
  581. .start = VT1724_PDMA0_START,
  582. };
  583. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  584. .addr = VT1724_MT_CAPTURE_ADDR,
  585. .size = VT1724_MT_CAPTURE_SIZE,
  586. .count = VT1724_MT_CAPTURE_COUNT,
  587. .start = VT1724_RDMA0_START,
  588. };
  589. static const struct snd_pcm_hardware snd_vt1724_playback_pro =
  590. {
  591. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  592. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  593. SNDRV_PCM_INFO_MMAP_VALID |
  594. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  595. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  596. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  597. .rate_min = 8000,
  598. .rate_max = 192000,
  599. .channels_min = 2,
  600. .channels_max = 8,
  601. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  602. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  603. .period_bytes_max = (1UL << 21),
  604. .periods_min = 2,
  605. .periods_max = 1024,
  606. };
  607. static const struct snd_pcm_hardware snd_vt1724_spdif =
  608. {
  609. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  610. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  611. SNDRV_PCM_INFO_MMAP_VALID |
  612. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  613. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  614. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  615. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  616. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  617. SNDRV_PCM_RATE_192000),
  618. .rate_min = 32000,
  619. .rate_max = 192000,
  620. .channels_min = 2,
  621. .channels_max = 2,
  622. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  623. .period_bytes_min = 2 * 4 * 2,
  624. .period_bytes_max = (1UL << 18),
  625. .periods_min = 2,
  626. .periods_max = 1024,
  627. };
  628. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
  629. {
  630. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  631. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  632. SNDRV_PCM_INFO_MMAP_VALID |
  633. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  634. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  635. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  636. .rate_min = 8000,
  637. .rate_max = 192000,
  638. .channels_min = 2,
  639. .channels_max = 2,
  640. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  641. .period_bytes_min = 2 * 4 * 2,
  642. .period_bytes_max = (1UL << 18),
  643. .periods_min = 2,
  644. .periods_max = 1024,
  645. };
  646. /*
  647. * set rate constraints
  648. */
  649. static int set_rate_constraints(struct snd_ice1712 *ice,
  650. struct snd_pcm_substream *substream)
  651. {
  652. struct snd_pcm_runtime *runtime = substream->runtime;
  653. if (ice->hw_rates) {
  654. /* hardware specific */
  655. runtime->hw.rate_min = ice->hw_rates->list[0];
  656. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  657. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  658. return snd_pcm_hw_constraint_list(runtime, 0,
  659. SNDRV_PCM_HW_PARAM_RATE,
  660. ice->hw_rates);
  661. }
  662. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  663. /* I2S */
  664. /* VT1720 doesn't support more than 96kHz */
  665. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  666. return snd_pcm_hw_constraint_list(runtime, 0,
  667. SNDRV_PCM_HW_PARAM_RATE,
  668. &hw_constraints_rates_192);
  669. else {
  670. runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
  671. SNDRV_PCM_RATE_8000_96000;
  672. runtime->hw.rate_max = 96000;
  673. return snd_pcm_hw_constraint_list(runtime, 0,
  674. SNDRV_PCM_HW_PARAM_RATE,
  675. &hw_constraints_rates_96);
  676. }
  677. } else if (ice->ac97) {
  678. /* ACLINK */
  679. runtime->hw.rate_max = 48000;
  680. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
  681. return snd_pcm_hw_constraint_list(runtime, 0,
  682. SNDRV_PCM_HW_PARAM_RATE,
  683. &hw_constraints_rates_48);
  684. }
  685. return 0;
  686. }
  687. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  688. * actually used
  689. */
  690. #define VT1724_BUFFER_ALIGN 0x20
  691. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  692. {
  693. struct snd_pcm_runtime *runtime = substream->runtime;
  694. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  695. int chs;
  696. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  697. ice->playback_pro_substream = substream;
  698. runtime->hw = snd_vt1724_playback_pro;
  699. snd_pcm_set_sync(substream);
  700. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  701. set_rate_constraints(ice, substream);
  702. mutex_lock(&ice->open_mutex);
  703. /* calculate the currently available channels */
  704. for (chs = 0; chs < 3; chs++) {
  705. if (ice->pcm_reserved[chs])
  706. break;
  707. }
  708. chs = (chs + 1) * 2;
  709. runtime->hw.channels_max = chs;
  710. if (chs > 2) /* channels must be even */
  711. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  712. mutex_unlock(&ice->open_mutex);
  713. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  714. VT1724_BUFFER_ALIGN);
  715. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  716. VT1724_BUFFER_ALIGN);
  717. return 0;
  718. }
  719. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  720. {
  721. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  722. struct snd_pcm_runtime *runtime = substream->runtime;
  723. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  724. ice->capture_pro_substream = substream;
  725. runtime->hw = snd_vt1724_2ch_stereo;
  726. snd_pcm_set_sync(substream);
  727. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  728. set_rate_constraints(ice, substream);
  729. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  730. VT1724_BUFFER_ALIGN);
  731. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  732. VT1724_BUFFER_ALIGN);
  733. return 0;
  734. }
  735. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  736. {
  737. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  738. if (PRO_RATE_RESET)
  739. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  740. ice->playback_pro_substream = NULL;
  741. return 0;
  742. }
  743. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  744. {
  745. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  746. if (PRO_RATE_RESET)
  747. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  748. ice->capture_pro_substream = NULL;
  749. return 0;
  750. }
  751. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  752. .open = snd_vt1724_playback_pro_open,
  753. .close = snd_vt1724_playback_pro_close,
  754. .ioctl = snd_pcm_lib_ioctl,
  755. .hw_params = snd_vt1724_pcm_hw_params,
  756. .hw_free = snd_vt1724_pcm_hw_free,
  757. .prepare = snd_vt1724_playback_pro_prepare,
  758. .trigger = snd_vt1724_pcm_trigger,
  759. .pointer = snd_vt1724_playback_pro_pointer,
  760. };
  761. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  762. .open = snd_vt1724_capture_pro_open,
  763. .close = snd_vt1724_capture_pro_close,
  764. .ioctl = snd_pcm_lib_ioctl,
  765. .hw_params = snd_vt1724_pcm_hw_params,
  766. .hw_free = snd_vt1724_pcm_hw_free,
  767. .prepare = snd_vt1724_pcm_prepare,
  768. .trigger = snd_vt1724_pcm_trigger,
  769. .pointer = snd_vt1724_pcm_pointer,
  770. };
  771. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
  772. {
  773. struct snd_pcm *pcm;
  774. int err;
  775. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  776. if (err < 0)
  777. return err;
  778. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  779. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  780. pcm->private_data = ice;
  781. pcm->info_flags = 0;
  782. strcpy(pcm->name, "ICE1724");
  783. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  784. snd_dma_pci_data(ice->pci),
  785. 256*1024, 256*1024);
  786. ice->pcm_pro = pcm;
  787. return 0;
  788. }
  789. /*
  790. * SPDIF PCM
  791. */
  792. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  793. .addr = VT1724_MT_PDMA4_ADDR,
  794. .size = VT1724_MT_PDMA4_SIZE,
  795. .count = VT1724_MT_PDMA4_COUNT,
  796. .start = VT1724_PDMA4_START,
  797. };
  798. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  799. .addr = VT1724_MT_RDMA1_ADDR,
  800. .size = VT1724_MT_RDMA1_SIZE,
  801. .count = VT1724_MT_RDMA1_COUNT,
  802. .start = VT1724_RDMA1_START,
  803. };
  804. /* update spdif control bits; call with reg_lock */
  805. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  806. {
  807. unsigned char cbit, disabled;
  808. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  809. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  810. if (cbit != disabled)
  811. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  812. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  813. if (cbit != disabled)
  814. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  815. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  816. }
  817. /* update SPDIF control bits according to the given rate */
  818. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  819. {
  820. unsigned int val, nval;
  821. unsigned long flags;
  822. spin_lock_irqsave(&ice->reg_lock, flags);
  823. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  824. nval &= ~(7 << 12);
  825. switch (rate) {
  826. case 44100: break;
  827. case 48000: nval |= 2 << 12; break;
  828. case 32000: nval |= 3 << 12; break;
  829. case 88200: nval |= 4 << 12; break;
  830. case 96000: nval |= 5 << 12; break;
  831. case 192000: nval |= 6 << 12; break;
  832. case 176400: nval |= 7 << 12; break;
  833. }
  834. if (val != nval)
  835. update_spdif_bits(ice, nval);
  836. spin_unlock_irqrestore(&ice->reg_lock, flags);
  837. }
  838. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  839. {
  840. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  841. if (! ice->force_pdma4)
  842. update_spdif_rate(ice, substream->runtime->rate);
  843. return snd_vt1724_pcm_prepare(substream);
  844. }
  845. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  846. {
  847. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  848. struct snd_pcm_runtime *runtime = substream->runtime;
  849. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  850. ice->playback_con_substream = substream;
  851. if (ice->force_pdma4) {
  852. runtime->hw = snd_vt1724_2ch_stereo;
  853. set_rate_constraints(ice, substream);
  854. } else
  855. runtime->hw = snd_vt1724_spdif;
  856. snd_pcm_set_sync(substream);
  857. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  858. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  859. VT1724_BUFFER_ALIGN);
  860. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  861. VT1724_BUFFER_ALIGN);
  862. return 0;
  863. }
  864. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  865. {
  866. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  867. if (PRO_RATE_RESET)
  868. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  869. ice->playback_con_substream = NULL;
  870. return 0;
  871. }
  872. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  873. {
  874. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  875. struct snd_pcm_runtime *runtime = substream->runtime;
  876. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  877. ice->capture_con_substream = substream;
  878. if (ice->force_rdma1) {
  879. runtime->hw = snd_vt1724_2ch_stereo;
  880. set_rate_constraints(ice, substream);
  881. } else
  882. runtime->hw = snd_vt1724_spdif;
  883. snd_pcm_set_sync(substream);
  884. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  885. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  886. VT1724_BUFFER_ALIGN);
  887. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  888. VT1724_BUFFER_ALIGN);
  889. return 0;
  890. }
  891. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  892. {
  893. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  894. if (PRO_RATE_RESET)
  895. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  896. ice->capture_con_substream = NULL;
  897. return 0;
  898. }
  899. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  900. .open = snd_vt1724_playback_spdif_open,
  901. .close = snd_vt1724_playback_spdif_close,
  902. .ioctl = snd_pcm_lib_ioctl,
  903. .hw_params = snd_vt1724_pcm_hw_params,
  904. .hw_free = snd_vt1724_pcm_hw_free,
  905. .prepare = snd_vt1724_playback_spdif_prepare,
  906. .trigger = snd_vt1724_pcm_trigger,
  907. .pointer = snd_vt1724_pcm_pointer,
  908. };
  909. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  910. .open = snd_vt1724_capture_spdif_open,
  911. .close = snd_vt1724_capture_spdif_close,
  912. .ioctl = snd_pcm_lib_ioctl,
  913. .hw_params = snd_vt1724_pcm_hw_params,
  914. .hw_free = snd_vt1724_pcm_hw_free,
  915. .prepare = snd_vt1724_pcm_prepare,
  916. .trigger = snd_vt1724_pcm_trigger,
  917. .pointer = snd_vt1724_pcm_pointer,
  918. };
  919. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
  920. {
  921. char *name;
  922. struct snd_pcm *pcm;
  923. int play, capt;
  924. int err;
  925. if (ice->force_pdma4 ||
  926. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  927. play = 1;
  928. ice->has_spdif = 1;
  929. } else
  930. play = 0;
  931. if (ice->force_rdma1 ||
  932. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  933. capt = 1;
  934. ice->has_spdif = 1;
  935. } else
  936. capt = 0;
  937. if (! play && ! capt)
  938. return 0; /* no spdif device */
  939. if (ice->force_pdma4 || ice->force_rdma1)
  940. name = "ICE1724 Secondary";
  941. else
  942. name = "IEC1724 IEC958";
  943. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  944. if (err < 0)
  945. return err;
  946. if (play)
  947. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  948. &snd_vt1724_playback_spdif_ops);
  949. if (capt)
  950. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  951. &snd_vt1724_capture_spdif_ops);
  952. pcm->private_data = ice;
  953. pcm->info_flags = 0;
  954. strcpy(pcm->name, name);
  955. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  956. snd_dma_pci_data(ice->pci),
  957. 64*1024, 64*1024);
  958. ice->pcm = pcm;
  959. return 0;
  960. }
  961. /*
  962. * independent surround PCMs
  963. */
  964. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  965. {
  966. .addr = VT1724_MT_PDMA1_ADDR,
  967. .size = VT1724_MT_PDMA1_SIZE,
  968. .count = VT1724_MT_PDMA1_COUNT,
  969. .start = VT1724_PDMA1_START,
  970. },
  971. {
  972. .addr = VT1724_MT_PDMA2_ADDR,
  973. .size = VT1724_MT_PDMA2_SIZE,
  974. .count = VT1724_MT_PDMA2_COUNT,
  975. .start = VT1724_PDMA2_START,
  976. },
  977. {
  978. .addr = VT1724_MT_PDMA3_ADDR,
  979. .size = VT1724_MT_PDMA3_SIZE,
  980. .count = VT1724_MT_PDMA3_COUNT,
  981. .start = VT1724_PDMA3_START,
  982. },
  983. };
  984. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  985. {
  986. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  987. unsigned char val;
  988. spin_lock_irq(&ice->reg_lock);
  989. val = 3 - substream->number;
  990. if (inb(ICEMT1724(ice, BURST)) < val)
  991. outb(val, ICEMT1724(ice, BURST));
  992. spin_unlock_irq(&ice->reg_lock);
  993. return snd_vt1724_pcm_prepare(substream);
  994. }
  995. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  996. {
  997. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  998. struct snd_pcm_runtime *runtime = substream->runtime;
  999. mutex_lock(&ice->open_mutex);
  1000. /* already used by PDMA0? */
  1001. if (ice->pcm_reserved[substream->number]) {
  1002. mutex_unlock(&ice->open_mutex);
  1003. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1004. }
  1005. mutex_unlock(&ice->open_mutex);
  1006. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1007. ice->playback_con_substream_ds[substream->number] = substream;
  1008. runtime->hw = snd_vt1724_2ch_stereo;
  1009. snd_pcm_set_sync(substream);
  1010. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1011. set_rate_constraints(ice, substream);
  1012. return 0;
  1013. }
  1014. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1015. {
  1016. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1017. if (PRO_RATE_RESET)
  1018. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1019. ice->playback_con_substream_ds[substream->number] = NULL;
  1020. ice->pcm_reserved[substream->number] = NULL;
  1021. return 0;
  1022. }
  1023. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1024. .open = snd_vt1724_playback_indep_open,
  1025. .close = snd_vt1724_playback_indep_close,
  1026. .ioctl = snd_pcm_lib_ioctl,
  1027. .hw_params = snd_vt1724_pcm_hw_params,
  1028. .hw_free = snd_vt1724_pcm_hw_free,
  1029. .prepare = snd_vt1724_playback_indep_prepare,
  1030. .trigger = snd_vt1724_pcm_trigger,
  1031. .pointer = snd_vt1724_pcm_pointer,
  1032. };
  1033. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
  1034. {
  1035. struct snd_pcm *pcm;
  1036. int play;
  1037. int err;
  1038. play = ice->num_total_dacs / 2 - 1;
  1039. if (play <= 0)
  1040. return 0;
  1041. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1042. if (err < 0)
  1043. return err;
  1044. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1045. &snd_vt1724_playback_indep_ops);
  1046. pcm->private_data = ice;
  1047. pcm->info_flags = 0;
  1048. strcpy(pcm->name, "ICE1724 Surround PCM");
  1049. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1050. snd_dma_pci_data(ice->pci),
  1051. 64*1024, 64*1024);
  1052. ice->pcm_ds = pcm;
  1053. return 0;
  1054. }
  1055. /*
  1056. * Mixer section
  1057. */
  1058. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
  1059. {
  1060. int err;
  1061. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1062. struct snd_ac97_bus *pbus;
  1063. struct snd_ac97_template ac97;
  1064. static struct snd_ac97_bus_ops ops = {
  1065. .write = snd_vt1724_ac97_write,
  1066. .read = snd_vt1724_ac97_read,
  1067. };
  1068. /* cold reset */
  1069. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1070. mdelay(5); /* FIXME */
  1071. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1072. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1073. return err;
  1074. memset(&ac97, 0, sizeof(ac97));
  1075. ac97.private_data = ice;
  1076. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1077. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1078. else
  1079. return 0;
  1080. }
  1081. /* I2S mixer only */
  1082. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1083. return 0;
  1084. }
  1085. /*
  1086. *
  1087. */
  1088. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1089. {
  1090. return (unsigned int)ice->eeprom.data[idx] | \
  1091. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1092. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1093. }
  1094. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1095. struct snd_info_buffer *buffer)
  1096. {
  1097. struct snd_ice1712 *ice = entry->private_data;
  1098. unsigned int idx;
  1099. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1100. snd_iprintf(buffer, "EEPROM:\n");
  1101. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1102. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1103. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1104. snd_iprintf(buffer, " System Config : 0x%x\n",
  1105. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1106. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1107. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1108. snd_iprintf(buffer, " I2S : 0x%x\n",
  1109. ice->eeprom.data[ICE_EEP2_I2S]);
  1110. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1111. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1112. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1113. ice->eeprom.gpiodir);
  1114. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1115. ice->eeprom.gpiomask);
  1116. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1117. ice->eeprom.gpiostate);
  1118. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1119. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1120. idx, ice->eeprom.data[idx]);
  1121. snd_iprintf(buffer, "\nRegisters:\n");
  1122. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1123. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1124. for (idx = 0x0; idx < 0x20 ; idx++)
  1125. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1126. idx, inb(ice->port+idx));
  1127. for (idx = 0x0; idx < 0x30 ; idx++)
  1128. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1129. idx, inb(ice->profi_port+idx));
  1130. }
  1131. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
  1132. {
  1133. struct snd_info_entry *entry;
  1134. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1135. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1136. }
  1137. /*
  1138. *
  1139. */
  1140. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1141. struct snd_ctl_elem_info *uinfo)
  1142. {
  1143. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1144. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1145. return 0;
  1146. }
  1147. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1148. struct snd_ctl_elem_value *ucontrol)
  1149. {
  1150. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1151. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1152. return 0;
  1153. }
  1154. static const struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1155. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1156. .name = "ICE1724 EEPROM",
  1157. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1158. .info = snd_vt1724_eeprom_info,
  1159. .get = snd_vt1724_eeprom_get
  1160. };
  1161. /*
  1162. */
  1163. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1164. struct snd_ctl_elem_info *uinfo)
  1165. {
  1166. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1167. uinfo->count = 1;
  1168. return 0;
  1169. }
  1170. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1171. {
  1172. unsigned int val, rbits;
  1173. val = diga->status[0] & 0x03; /* professional, non-audio */
  1174. if (val & 0x01) {
  1175. /* professional */
  1176. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1177. IEC958_AES0_PRO_EMPHASIS_5015)
  1178. val |= 1U << 3;
  1179. rbits = (diga->status[4] >> 3) & 0x0f;
  1180. if (rbits) {
  1181. switch (rbits) {
  1182. case 2: val |= 5 << 12; break; /* 96k */
  1183. case 3: val |= 6 << 12; break; /* 192k */
  1184. case 10: val |= 4 << 12; break; /* 88.2k */
  1185. case 11: val |= 7 << 12; break; /* 176.4k */
  1186. }
  1187. } else {
  1188. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1189. case IEC958_AES0_PRO_FS_44100:
  1190. break;
  1191. case IEC958_AES0_PRO_FS_32000:
  1192. val |= 3U << 12;
  1193. break;
  1194. default:
  1195. val |= 2U << 12;
  1196. break;
  1197. }
  1198. }
  1199. } else {
  1200. /* consumer */
  1201. val |= diga->status[1] & 0x04; /* copyright */
  1202. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1203. IEC958_AES0_CON_EMPHASIS_5015)
  1204. val |= 1U << 3;
  1205. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1206. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1207. }
  1208. return val;
  1209. }
  1210. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1211. {
  1212. memset(diga->status, 0, sizeof(diga->status));
  1213. diga->status[0] = val & 0x03; /* professional, non-audio */
  1214. if (val & 0x01) {
  1215. /* professional */
  1216. if (val & (1U << 3))
  1217. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1218. switch ((val >> 12) & 0x7) {
  1219. case 0:
  1220. break;
  1221. case 2:
  1222. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1223. break;
  1224. default:
  1225. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1226. break;
  1227. }
  1228. } else {
  1229. /* consumer */
  1230. diga->status[0] |= val & (1U << 2); /* copyright */
  1231. if (val & (1U << 3))
  1232. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1233. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1234. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1235. }
  1236. }
  1237. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1238. struct snd_ctl_elem_value *ucontrol)
  1239. {
  1240. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1241. unsigned int val;
  1242. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1243. decode_spdif_bits(&ucontrol->value.iec958, val);
  1244. return 0;
  1245. }
  1246. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1247. struct snd_ctl_elem_value *ucontrol)
  1248. {
  1249. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1250. unsigned int val, old;
  1251. val = encode_spdif_bits(&ucontrol->value.iec958);
  1252. spin_lock_irq(&ice->reg_lock);
  1253. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1254. if (val != old)
  1255. update_spdif_bits(ice, val);
  1256. spin_unlock_irq(&ice->reg_lock);
  1257. return (val != old);
  1258. }
  1259. static const struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1260. {
  1261. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1262. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1263. .info = snd_vt1724_spdif_info,
  1264. .get = snd_vt1724_spdif_default_get,
  1265. .put = snd_vt1724_spdif_default_put
  1266. };
  1267. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1268. struct snd_ctl_elem_value *ucontrol)
  1269. {
  1270. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1271. IEC958_AES0_PROFESSIONAL |
  1272. IEC958_AES0_CON_NOT_COPYRIGHT |
  1273. IEC958_AES0_CON_EMPHASIS;
  1274. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1275. IEC958_AES1_CON_CATEGORY;
  1276. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1277. return 0;
  1278. }
  1279. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1280. struct snd_ctl_elem_value *ucontrol)
  1281. {
  1282. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1283. IEC958_AES0_PROFESSIONAL |
  1284. IEC958_AES0_PRO_FS |
  1285. IEC958_AES0_PRO_EMPHASIS;
  1286. return 0;
  1287. }
  1288. static const struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1289. {
  1290. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1291. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1292. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1293. .info = snd_vt1724_spdif_info,
  1294. .get = snd_vt1724_spdif_maskc_get,
  1295. };
  1296. static const struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1297. {
  1298. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1299. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1300. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1301. .info = snd_vt1724_spdif_info,
  1302. .get = snd_vt1724_spdif_maskp_get,
  1303. };
  1304. static int snd_vt1724_spdif_sw_info(struct snd_kcontrol *kcontrol,
  1305. struct snd_ctl_elem_info *uinfo)
  1306. {
  1307. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1308. uinfo->count = 1;
  1309. uinfo->value.integer.min = 0;
  1310. uinfo->value.integer.max = 1;
  1311. return 0;
  1312. }
  1313. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1314. struct snd_ctl_elem_value *ucontrol)
  1315. {
  1316. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1317. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1318. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1319. return 0;
  1320. }
  1321. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1322. struct snd_ctl_elem_value *ucontrol)
  1323. {
  1324. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1325. unsigned char old, val;
  1326. spin_lock_irq(&ice->reg_lock);
  1327. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1328. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1329. if (ucontrol->value.integer.value[0])
  1330. val |= VT1724_CFG_SPDIF_OUT_EN;
  1331. if (old != val)
  1332. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1333. spin_unlock_irq(&ice->reg_lock);
  1334. return old != val;
  1335. }
  1336. static const struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1337. {
  1338. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1339. /* FIXME: the following conflict with IEC958 Playback Route */
  1340. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1341. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1342. .info = snd_vt1724_spdif_sw_info,
  1343. .get = snd_vt1724_spdif_sw_get,
  1344. .put = snd_vt1724_spdif_sw_put
  1345. };
  1346. #if 0 /* NOT USED YET */
  1347. /*
  1348. * GPIO access from extern
  1349. */
  1350. int snd_vt1724_gpio_info(struct snd_kcontrol *kcontrol,
  1351. struct snd_ctl_elem_info *uinfo)
  1352. {
  1353. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1354. uinfo->count = 1;
  1355. uinfo->value.integer.min = 0;
  1356. uinfo->value.integer.max = 1;
  1357. return 0;
  1358. }
  1359. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1360. struct snd_ctl_elem_value *ucontrol)
  1361. {
  1362. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1363. int shift = kcontrol->private_value & 0xff;
  1364. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1365. snd_ice1712_save_gpio_status(ice);
  1366. ucontrol->value.integer.value[0] =
  1367. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1368. snd_ice1712_restore_gpio_status(ice);
  1369. return 0;
  1370. }
  1371. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1372. struct snd_ctl_elem_value *ucontrol)
  1373. {
  1374. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1375. int shift = kcontrol->private_value & 0xff;
  1376. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1377. unsigned int val, nval;
  1378. if (kcontrol->private_value & (1 << 31))
  1379. return -EPERM;
  1380. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1381. snd_ice1712_save_gpio_status(ice);
  1382. val = snd_ice1712_gpio_read(ice);
  1383. nval |= val & ~(1 << shift);
  1384. if (val != nval)
  1385. snd_ice1712_gpio_write(ice, nval);
  1386. snd_ice1712_restore_gpio_status(ice);
  1387. return val != nval;
  1388. }
  1389. #endif /* NOT USED YET */
  1390. /*
  1391. * rate
  1392. */
  1393. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1394. struct snd_ctl_elem_info *uinfo)
  1395. {
  1396. static const char * const texts_1724[] = {
  1397. "8000", /* 0: 6 */
  1398. "9600", /* 1: 3 */
  1399. "11025", /* 2: 10 */
  1400. "12000", /* 3: 2 */
  1401. "16000", /* 4: 5 */
  1402. "22050", /* 5: 9 */
  1403. "24000", /* 6: 1 */
  1404. "32000", /* 7: 4 */
  1405. "44100", /* 8: 8 */
  1406. "48000", /* 9: 0 */
  1407. "64000", /* 10: 15 */
  1408. "88200", /* 11: 11 */
  1409. "96000", /* 12: 7 */
  1410. "176400", /* 13: 12 */
  1411. "192000", /* 14: 14 */
  1412. "IEC958 Input", /* 15: -- */
  1413. };
  1414. static const char * const texts_1720[] = {
  1415. "8000", /* 0: 6 */
  1416. "9600", /* 1: 3 */
  1417. "11025", /* 2: 10 */
  1418. "12000", /* 3: 2 */
  1419. "16000", /* 4: 5 */
  1420. "22050", /* 5: 9 */
  1421. "24000", /* 6: 1 */
  1422. "32000", /* 7: 4 */
  1423. "44100", /* 8: 8 */
  1424. "48000", /* 9: 0 */
  1425. "64000", /* 10: 15 */
  1426. "88200", /* 11: 11 */
  1427. "96000", /* 12: 7 */
  1428. "IEC958 Input", /* 13: -- */
  1429. };
  1430. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1431. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1432. uinfo->count = 1;
  1433. uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
  1434. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1435. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1436. strcpy(uinfo->value.enumerated.name,
  1437. ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
  1438. texts_1724[uinfo->value.enumerated.item]);
  1439. return 0;
  1440. }
  1441. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1442. struct snd_ctl_elem_value *ucontrol)
  1443. {
  1444. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1445. static const unsigned char xlate[16] = {
  1446. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
  1447. };
  1448. unsigned char val;
  1449. spin_lock_irq(&ice->reg_lock);
  1450. if (is_spdif_master(ice)) {
  1451. ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
  1452. } else {
  1453. val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
  1454. if (val == 255) {
  1455. snd_BUG();
  1456. val = 0;
  1457. }
  1458. ucontrol->value.enumerated.item[0] = val;
  1459. }
  1460. spin_unlock_irq(&ice->reg_lock);
  1461. return 0;
  1462. }
  1463. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1464. struct snd_ctl_elem_value *ucontrol)
  1465. {
  1466. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1467. unsigned char oval;
  1468. int rate;
  1469. int change = 0;
  1470. int spdif = ice->vt1720 ? 13 : 15;
  1471. spin_lock_irq(&ice->reg_lock);
  1472. oval = inb(ICEMT1724(ice, RATE));
  1473. if (ucontrol->value.enumerated.item[0] == spdif) {
  1474. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1475. } else {
  1476. rate = rates[ucontrol->value.integer.value[0] % 15];
  1477. if (rate <= get_max_rate(ice)) {
  1478. PRO_RATE_DEFAULT = rate;
  1479. spin_unlock_irq(&ice->reg_lock);
  1480. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1481. spin_lock_irq(&ice->reg_lock);
  1482. }
  1483. }
  1484. change = inb(ICEMT1724(ice, RATE)) != oval;
  1485. spin_unlock_irq(&ice->reg_lock);
  1486. if ((oval & VT1724_SPDIF_MASTER) !=
  1487. (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
  1488. /* notify akm chips as well */
  1489. if (is_spdif_master(ice)) {
  1490. unsigned int i;
  1491. for (i = 0; i < ice->akm_codecs; i++) {
  1492. if (ice->akm[i].ops.set_rate_val)
  1493. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1494. }
  1495. }
  1496. }
  1497. return change;
  1498. }
  1499. static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1500. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1501. .name = "Multi Track Internal Clock",
  1502. .info = snd_vt1724_pro_internal_clock_info,
  1503. .get = snd_vt1724_pro_internal_clock_get,
  1504. .put = snd_vt1724_pro_internal_clock_put
  1505. };
  1506. static int snd_vt1724_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
  1507. struct snd_ctl_elem_info *uinfo)
  1508. {
  1509. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1510. uinfo->count = 1;
  1511. uinfo->value.integer.min = 0;
  1512. uinfo->value.integer.max = 1;
  1513. return 0;
  1514. }
  1515. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1516. struct snd_ctl_elem_value *ucontrol)
  1517. {
  1518. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1519. return 0;
  1520. }
  1521. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1522. struct snd_ctl_elem_value *ucontrol)
  1523. {
  1524. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1525. int change = 0, nval;
  1526. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1527. spin_lock_irq(&ice->reg_lock);
  1528. change = PRO_RATE_LOCKED != nval;
  1529. PRO_RATE_LOCKED = nval;
  1530. spin_unlock_irq(&ice->reg_lock);
  1531. return change;
  1532. }
  1533. static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1534. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1535. .name = "Multi Track Rate Locking",
  1536. .info = snd_vt1724_pro_rate_locking_info,
  1537. .get = snd_vt1724_pro_rate_locking_get,
  1538. .put = snd_vt1724_pro_rate_locking_put
  1539. };
  1540. static int snd_vt1724_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
  1541. struct snd_ctl_elem_info *uinfo)
  1542. {
  1543. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1544. uinfo->count = 1;
  1545. uinfo->value.integer.min = 0;
  1546. uinfo->value.integer.max = 1;
  1547. return 0;
  1548. }
  1549. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1550. struct snd_ctl_elem_value *ucontrol)
  1551. {
  1552. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1553. return 0;
  1554. }
  1555. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1556. struct snd_ctl_elem_value *ucontrol)
  1557. {
  1558. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1559. int change = 0, nval;
  1560. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1561. spin_lock_irq(&ice->reg_lock);
  1562. change = PRO_RATE_RESET != nval;
  1563. PRO_RATE_RESET = nval;
  1564. spin_unlock_irq(&ice->reg_lock);
  1565. return change;
  1566. }
  1567. static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1568. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1569. .name = "Multi Track Rate Reset",
  1570. .info = snd_vt1724_pro_rate_reset_info,
  1571. .get = snd_vt1724_pro_rate_reset_get,
  1572. .put = snd_vt1724_pro_rate_reset_put
  1573. };
  1574. /*
  1575. * routing
  1576. */
  1577. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1578. struct snd_ctl_elem_info *uinfo)
  1579. {
  1580. static char *texts[] = {
  1581. "PCM Out", /* 0 */
  1582. "H/W In 0", "H/W In 1", /* 1-2 */
  1583. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1584. };
  1585. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1586. uinfo->count = 1;
  1587. uinfo->value.enumerated.items = 5;
  1588. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1589. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1590. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1591. return 0;
  1592. }
  1593. static inline int analog_route_shift(int idx)
  1594. {
  1595. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1596. }
  1597. static inline int digital_route_shift(int idx)
  1598. {
  1599. return idx * 3;
  1600. }
  1601. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1602. {
  1603. unsigned long val;
  1604. unsigned char eitem;
  1605. static const unsigned char xlate[8] = {
  1606. 0, 255, 1, 2, 255, 255, 3, 4,
  1607. };
  1608. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1609. val >>= shift;
  1610. val &= 7; //we now have 3 bits per output
  1611. eitem = xlate[val];
  1612. if (eitem == 255) {
  1613. snd_BUG();
  1614. return 0;
  1615. }
  1616. return eitem;
  1617. }
  1618. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1619. {
  1620. unsigned int old_val, nval;
  1621. int change;
  1622. static const unsigned char xroute[8] = {
  1623. 0, /* PCM */
  1624. 2, /* PSDIN0 Left */
  1625. 3, /* PSDIN0 Right */
  1626. 6, /* SPDIN Left */
  1627. 7, /* SPDIN Right */
  1628. };
  1629. nval = xroute[val % 5];
  1630. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1631. val &= ~(0x07 << shift);
  1632. val |= nval << shift;
  1633. change = val != old_val;
  1634. if (change)
  1635. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1636. return change;
  1637. }
  1638. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1639. struct snd_ctl_elem_value *ucontrol)
  1640. {
  1641. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1642. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1643. ucontrol->value.enumerated.item[0] =
  1644. get_route_val(ice, analog_route_shift(idx));
  1645. return 0;
  1646. }
  1647. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1648. struct snd_ctl_elem_value *ucontrol)
  1649. {
  1650. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1651. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1652. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1653. analog_route_shift(idx));
  1654. }
  1655. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1656. struct snd_ctl_elem_value *ucontrol)
  1657. {
  1658. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1659. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1660. ucontrol->value.enumerated.item[0] =
  1661. get_route_val(ice, digital_route_shift(idx));
  1662. return 0;
  1663. }
  1664. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1665. struct snd_ctl_elem_value *ucontrol)
  1666. {
  1667. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1668. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1669. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1670. digital_route_shift(idx));
  1671. }
  1672. static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1673. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1674. .name = "H/W Playback Route",
  1675. .info = snd_vt1724_pro_route_info,
  1676. .get = snd_vt1724_pro_route_analog_get,
  1677. .put = snd_vt1724_pro_route_analog_put,
  1678. };
  1679. static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1680. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1681. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1682. .info = snd_vt1724_pro_route_info,
  1683. .get = snd_vt1724_pro_route_spdif_get,
  1684. .put = snd_vt1724_pro_route_spdif_put,
  1685. .count = 2,
  1686. };
  1687. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1688. struct snd_ctl_elem_info *uinfo)
  1689. {
  1690. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1691. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1692. uinfo->value.integer.min = 0;
  1693. uinfo->value.integer.max = 255;
  1694. return 0;
  1695. }
  1696. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1697. struct snd_ctl_elem_value *ucontrol)
  1698. {
  1699. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1700. int idx;
  1701. spin_lock_irq(&ice->reg_lock);
  1702. for (idx = 0; idx < 22; idx++) {
  1703. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1704. ucontrol->value.integer.value[idx] =
  1705. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1706. }
  1707. spin_unlock_irq(&ice->reg_lock);
  1708. return 0;
  1709. }
  1710. static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1711. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1712. .name = "Multi Track Peak",
  1713. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1714. .info = snd_vt1724_pro_peak_info,
  1715. .get = snd_vt1724_pro_peak_get
  1716. };
  1717. /*
  1718. *
  1719. */
  1720. static const struct snd_ice1712_card_info no_matched __devinitdata;
  1721. static const struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1722. snd_vt1724_revo_cards,
  1723. snd_vt1724_amp_cards,
  1724. snd_vt1724_aureon_cards,
  1725. snd_vt1720_mobo_cards,
  1726. snd_vt1720_pontis_cards,
  1727. snd_vt1724_prodigy192_cards,
  1728. snd_vt1724_juli_cards,
  1729. snd_vt1724_phase_cards,
  1730. snd_vt1724_wtm_cards,
  1731. NULL,
  1732. };
  1733. /*
  1734. */
  1735. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1736. {
  1737. int t = 0x10000;
  1738. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1739. ;
  1740. if (t == -1)
  1741. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1742. }
  1743. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1744. unsigned char dev, unsigned char addr)
  1745. {
  1746. unsigned char val;
  1747. mutex_lock(&ice->i2c_mutex);
  1748. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1749. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1750. wait_i2c_busy(ice);
  1751. val = inb(ICEREG1724(ice, I2C_DATA));
  1752. mutex_unlock(&ice->i2c_mutex);
  1753. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1754. return val;
  1755. }
  1756. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1757. unsigned char dev, unsigned char addr, unsigned char data)
  1758. {
  1759. mutex_lock(&ice->i2c_mutex);
  1760. wait_i2c_busy(ice);
  1761. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1762. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1763. outb(data, ICEREG1724(ice, I2C_DATA));
  1764. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1765. wait_i2c_busy(ice);
  1766. mutex_unlock(&ice->i2c_mutex);
  1767. }
  1768. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1769. const char *modelname)
  1770. {
  1771. const int dev = 0xa0; /* EEPROM device address */
  1772. unsigned int i, size;
  1773. const struct snd_ice1712_card_info **tbl, *c;
  1774. if (! modelname || ! *modelname) {
  1775. ice->eeprom.subvendor = 0;
  1776. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1777. ice->eeprom.subvendor =
  1778. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1779. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1780. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1781. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1782. if (ice->eeprom.subvendor == 0 ||
  1783. ice->eeprom.subvendor == (unsigned int)-1) {
  1784. /* invalid subvendor from EEPROM, try the PCI
  1785. * subststem ID instead
  1786. */
  1787. u16 vendor, device;
  1788. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1789. &vendor);
  1790. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1791. ice->eeprom.subvendor =
  1792. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1793. if (ice->eeprom.subvendor == 0 ||
  1794. ice->eeprom.subvendor == (unsigned int)-1) {
  1795. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1796. return -ENXIO;
  1797. }
  1798. }
  1799. }
  1800. for (tbl = card_tables; *tbl; tbl++) {
  1801. for (c = *tbl; c->subvendor; c++) {
  1802. if (modelname && c->model &&
  1803. ! strcmp(modelname, c->model)) {
  1804. printk(KERN_INFO "ice1724: Using board model %s\n",
  1805. c->name);
  1806. ice->eeprom.subvendor = c->subvendor;
  1807. } else if (c->subvendor != ice->eeprom.subvendor)
  1808. continue;
  1809. if (! c->eeprom_size || ! c->eeprom_data)
  1810. goto found;
  1811. /* if the EEPROM is given by the driver, use it */
  1812. snd_printdd("using the defined eeprom..\n");
  1813. ice->eeprom.version = 2;
  1814. ice->eeprom.size = c->eeprom_size + 6;
  1815. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1816. goto read_skipped;
  1817. }
  1818. }
  1819. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1820. ice->eeprom.subvendor);
  1821. found:
  1822. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1823. if (ice->eeprom.size < 6)
  1824. ice->eeprom.size = 32;
  1825. else if (ice->eeprom.size > 32) {
  1826. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1827. ice->eeprom.size);
  1828. return -EIO;
  1829. }
  1830. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1831. if (ice->eeprom.version != 2)
  1832. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1833. ice->eeprom.version);
  1834. size = ice->eeprom.size - 6;
  1835. for (i = 0; i < size; i++)
  1836. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1837. read_skipped:
  1838. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1839. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1840. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1841. return 0;
  1842. }
  1843. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1844. {
  1845. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1846. udelay(200);
  1847. outb(0, ICEREG1724(ice, CONTROL));
  1848. udelay(200);
  1849. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1850. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1851. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1852. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1853. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1854. ice->gpio.direction = ice->eeprom.gpiodir;
  1855. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1856. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1857. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1858. outb(0, ICEREG1724(ice, POWERDOWN));
  1859. return 0;
  1860. }
  1861. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1862. {
  1863. int err;
  1864. struct snd_kcontrol *kctl;
  1865. snd_assert(ice->pcm != NULL, return -EIO);
  1866. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1867. if (err < 0)
  1868. return err;
  1869. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1870. if (err < 0)
  1871. return err;
  1872. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1873. if (err < 0)
  1874. return err;
  1875. kctl->id.device = ice->pcm->device;
  1876. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1877. if (err < 0)
  1878. return err;
  1879. kctl->id.device = ice->pcm->device;
  1880. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1881. if (err < 0)
  1882. return err;
  1883. kctl->id.device = ice->pcm->device;
  1884. #if 0 /* use default only */
  1885. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1886. if (err < 0)
  1887. return err;
  1888. kctl->id.device = ice->pcm->device;
  1889. ice->spdif.stream_ctl = kctl;
  1890. #endif
  1891. return 0;
  1892. }
  1893. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  1894. {
  1895. int err;
  1896. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1897. if (err < 0)
  1898. return err;
  1899. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1900. if (err < 0)
  1901. return err;
  1902. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1903. if (err < 0)
  1904. return err;
  1905. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1906. if (err < 0)
  1907. return err;
  1908. if (ice->num_total_dacs > 0) {
  1909. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  1910. tmp.count = ice->num_total_dacs;
  1911. if (ice->vt1720 && tmp.count > 2)
  1912. tmp.count = 2;
  1913. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1914. if (err < 0)
  1915. return err;
  1916. }
  1917. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1918. if (err < 0)
  1919. return err;
  1920. return 0;
  1921. }
  1922. static int snd_vt1724_free(struct snd_ice1712 *ice)
  1923. {
  1924. if (! ice->port)
  1925. goto __hw_end;
  1926. /* mask all interrupts */
  1927. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1928. outb(0xff, ICEREG1724(ice, IRQMASK));
  1929. /* --- */
  1930. __hw_end:
  1931. if (ice->irq >= 0) {
  1932. synchronize_irq(ice->irq);
  1933. free_irq(ice->irq, ice);
  1934. }
  1935. pci_release_regions(ice->pci);
  1936. snd_ice1712_akm4xxx_free(ice);
  1937. pci_disable_device(ice->pci);
  1938. kfree(ice);
  1939. return 0;
  1940. }
  1941. static int snd_vt1724_dev_free(struct snd_device *device)
  1942. {
  1943. struct snd_ice1712 *ice = device->device_data;
  1944. return snd_vt1724_free(ice);
  1945. }
  1946. static int __devinit snd_vt1724_create(struct snd_card *card,
  1947. struct pci_dev *pci,
  1948. const char *modelname,
  1949. struct snd_ice1712 ** r_ice1712)
  1950. {
  1951. struct snd_ice1712 *ice;
  1952. int err;
  1953. unsigned char mask;
  1954. static struct snd_device_ops ops = {
  1955. .dev_free = snd_vt1724_dev_free,
  1956. };
  1957. *r_ice1712 = NULL;
  1958. /* enable PCI device */
  1959. if ((err = pci_enable_device(pci)) < 0)
  1960. return err;
  1961. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  1962. if (ice == NULL) {
  1963. pci_disable_device(pci);
  1964. return -ENOMEM;
  1965. }
  1966. ice->vt1724 = 1;
  1967. spin_lock_init(&ice->reg_lock);
  1968. mutex_init(&ice->gpio_mutex);
  1969. mutex_init(&ice->open_mutex);
  1970. mutex_init(&ice->i2c_mutex);
  1971. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1972. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1973. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1974. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1975. ice->card = card;
  1976. ice->pci = pci;
  1977. ice->irq = -1;
  1978. pci_set_master(pci);
  1979. snd_vt1724_proc_init(ice);
  1980. synchronize_irq(pci->irq);
  1981. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1982. kfree(ice);
  1983. pci_disable_device(pci);
  1984. return err;
  1985. }
  1986. ice->port = pci_resource_start(pci, 0);
  1987. ice->profi_port = pci_resource_start(pci, 1);
  1988. if (request_irq(pci->irq, snd_vt1724_interrupt,
  1989. IRQF_SHARED, "ICE1724", ice)) {
  1990. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1991. snd_vt1724_free(ice);
  1992. return -EIO;
  1993. }
  1994. ice->irq = pci->irq;
  1995. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  1996. snd_vt1724_free(ice);
  1997. return -EIO;
  1998. }
  1999. if (snd_vt1724_chip_init(ice) < 0) {
  2000. snd_vt1724_free(ice);
  2001. return -EIO;
  2002. }
  2003. /* unmask used interrupts */
  2004. if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
  2005. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  2006. else
  2007. mask = 0;
  2008. outb(mask, ICEREG1724(ice, IRQMASK));
  2009. /* don't handle FIFO overrun/underruns (just yet),
  2010. * since they cause machine lockups
  2011. */
  2012. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2013. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2014. snd_vt1724_free(ice);
  2015. return err;
  2016. }
  2017. snd_card_set_dev(card, &pci->dev);
  2018. *r_ice1712 = ice;
  2019. return 0;
  2020. }
  2021. /*
  2022. *
  2023. * Registration
  2024. *
  2025. */
  2026. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2027. const struct pci_device_id *pci_id)
  2028. {
  2029. static int dev;
  2030. struct snd_card *card;
  2031. struct snd_ice1712 *ice;
  2032. int pcm_dev = 0, err;
  2033. const struct snd_ice1712_card_info **tbl, *c;
  2034. if (dev >= SNDRV_CARDS)
  2035. return -ENODEV;
  2036. if (!enable[dev]) {
  2037. dev++;
  2038. return -ENOENT;
  2039. }
  2040. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2041. if (card == NULL)
  2042. return -ENOMEM;
  2043. strcpy(card->driver, "ICE1724");
  2044. strcpy(card->shortname, "ICEnsemble ICE1724");
  2045. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  2046. snd_card_free(card);
  2047. return err;
  2048. }
  2049. for (tbl = card_tables; *tbl; tbl++) {
  2050. for (c = *tbl; c->subvendor; c++) {
  2051. if (c->subvendor == ice->eeprom.subvendor) {
  2052. strcpy(card->shortname, c->name);
  2053. if (c->driver) /* specific driver? */
  2054. strcpy(card->driver, c->driver);
  2055. if (c->chip_init) {
  2056. if ((err = c->chip_init(ice)) < 0) {
  2057. snd_card_free(card);
  2058. return err;
  2059. }
  2060. }
  2061. goto __found;
  2062. }
  2063. }
  2064. }
  2065. c = &no_matched;
  2066. __found:
  2067. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  2068. snd_card_free(card);
  2069. return err;
  2070. }
  2071. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  2072. snd_card_free(card);
  2073. return err;
  2074. }
  2075. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  2076. snd_card_free(card);
  2077. return err;
  2078. }
  2079. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  2080. snd_card_free(card);
  2081. return err;
  2082. }
  2083. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  2084. snd_card_free(card);
  2085. return err;
  2086. }
  2087. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2088. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  2089. snd_card_free(card);
  2090. return err;
  2091. }
  2092. }
  2093. if (c->build_controls) {
  2094. if ((err = c->build_controls(ice)) < 0) {
  2095. snd_card_free(card);
  2096. return err;
  2097. }
  2098. }
  2099. if (! c->no_mpu401) {
  2100. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2101. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2102. ICEREG1724(ice, MPU_CTRL),
  2103. MPU401_INFO_INTEGRATED,
  2104. ice->irq, 0,
  2105. &ice->rmidi[0])) < 0) {
  2106. snd_card_free(card);
  2107. return err;
  2108. }
  2109. }
  2110. }
  2111. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2112. card->shortname, ice->port, ice->irq);
  2113. if ((err = snd_card_register(card)) < 0) {
  2114. snd_card_free(card);
  2115. return err;
  2116. }
  2117. pci_set_drvdata(pci, card);
  2118. dev++;
  2119. return 0;
  2120. }
  2121. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2122. {
  2123. snd_card_free(pci_get_drvdata(pci));
  2124. pci_set_drvdata(pci, NULL);
  2125. }
  2126. static struct pci_driver driver = {
  2127. .name = "ICE1724",
  2128. .id_table = snd_vt1724_ids,
  2129. .probe = snd_vt1724_probe,
  2130. .remove = __devexit_p(snd_vt1724_remove),
  2131. };
  2132. static int __init alsa_card_ice1724_init(void)
  2133. {
  2134. return pci_register_driver(&driver);
  2135. }
  2136. static void __exit alsa_card_ice1724_exit(void)
  2137. {
  2138. pci_unregister_driver(&driver);
  2139. }
  2140. module_init(alsa_card_ice1724_init)
  2141. module_exit(alsa_card_ice1724_exit)