delta.c 23 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Lowlevel functions for M-Audio Delta 1010, 44, 66, Dio2496, Audiophile
  5. * Digigram VX442
  6. *
  7. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <sound/driver.h>
  25. #include <asm/io.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/mutex.h>
  31. #include <sound/core.h>
  32. #include <sound/cs8427.h>
  33. #include <sound/asoundef.h>
  34. #include "ice1712.h"
  35. #include "delta.h"
  36. #define SND_CS8403
  37. #include <sound/cs8403.h>
  38. /*
  39. * CS8427 via SPI mode (for Audiophile), emulated I2C
  40. */
  41. /* send 8 bits */
  42. static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
  43. {
  44. int idx;
  45. for (idx = 7; idx >= 0; idx--) {
  46. tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
  47. if (data & (1 << idx))
  48. tmp |= ICE1712_DELTA_AP_DOUT;
  49. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  50. udelay(5);
  51. tmp |= ICE1712_DELTA_AP_CCLK;
  52. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  53. udelay(5);
  54. }
  55. }
  56. /* read 8 bits */
  57. static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
  58. {
  59. unsigned char data = 0;
  60. int idx;
  61. for (idx = 7; idx >= 0; idx--) {
  62. tmp &= ~ICE1712_DELTA_AP_CCLK;
  63. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  64. udelay(5);
  65. if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
  66. data |= 1 << idx;
  67. tmp |= ICE1712_DELTA_AP_CCLK;
  68. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  69. udelay(5);
  70. }
  71. return data;
  72. }
  73. /* assert chip select */
  74. static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
  75. {
  76. unsigned char tmp;
  77. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  78. switch (ice->eeprom.subvendor) {
  79. case ICE1712_SUBDEVICE_DELTA1010LT:
  80. tmp &= ~ICE1712_DELTA_1010LT_CS;
  81. tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
  82. break;
  83. case ICE1712_SUBDEVICE_AUDIOPHILE:
  84. case ICE1712_SUBDEVICE_DELTA410:
  85. tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
  86. tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
  87. break;
  88. case ICE1712_SUBDEVICE_VX442:
  89. tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
  90. tmp &= ~ICE1712_VX442_CS_DIGITAL;
  91. break;
  92. }
  93. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  94. udelay(5);
  95. return tmp;
  96. }
  97. /* deassert chip select */
  98. static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
  99. {
  100. switch (ice->eeprom.subvendor) {
  101. case ICE1712_SUBDEVICE_DELTA1010LT:
  102. tmp &= ~ICE1712_DELTA_1010LT_CS;
  103. tmp |= ICE1712_DELTA_1010LT_CS_NONE;
  104. break;
  105. case ICE1712_SUBDEVICE_AUDIOPHILE:
  106. case ICE1712_SUBDEVICE_DELTA410:
  107. tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
  108. break;
  109. case ICE1712_SUBDEVICE_VX442:
  110. tmp |= ICE1712_VX442_CS_DIGITAL;
  111. break;
  112. }
  113. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  114. }
  115. /* sequential write */
  116. static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  117. {
  118. struct snd_ice1712 *ice = device->bus->private_data;
  119. int res = count;
  120. unsigned char tmp;
  121. mutex_lock(&ice->gpio_mutex);
  122. tmp = ap_cs8427_codec_select(ice);
  123. ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
  124. while (count-- > 0)
  125. ap_cs8427_write_byte(ice, *bytes++, tmp);
  126. ap_cs8427_codec_deassert(ice, tmp);
  127. mutex_unlock(&ice->gpio_mutex);
  128. return res;
  129. }
  130. /* sequential read */
  131. static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  132. {
  133. struct snd_ice1712 *ice = device->bus->private_data;
  134. int res = count;
  135. unsigned char tmp;
  136. mutex_lock(&ice->gpio_mutex);
  137. tmp = ap_cs8427_codec_select(ice);
  138. ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
  139. while (count-- > 0)
  140. *bytes++ = ap_cs8427_read_byte(ice, tmp);
  141. ap_cs8427_codec_deassert(ice, tmp);
  142. mutex_unlock(&ice->gpio_mutex);
  143. return res;
  144. }
  145. static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
  146. {
  147. if (addr == 0x10)
  148. return 1;
  149. return -ENOENT;
  150. }
  151. static struct snd_i2c_ops ap_cs8427_i2c_ops = {
  152. .sendbytes = ap_cs8427_sendbytes,
  153. .readbytes = ap_cs8427_readbytes,
  154. .probeaddr = ap_cs8427_probeaddr,
  155. };
  156. /*
  157. */
  158. static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
  159. {
  160. unsigned char tmp, mask1, mask2;
  161. int idx;
  162. /* send byte to transmitter */
  163. mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
  164. mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
  165. mutex_lock(&ice->gpio_mutex);
  166. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  167. for (idx = 7; idx >= 0; idx--) {
  168. tmp &= ~(mask1 | mask2);
  169. if (bits & (1 << idx))
  170. tmp |= mask2;
  171. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  172. udelay(100);
  173. tmp |= mask1;
  174. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  175. udelay(100);
  176. }
  177. tmp &= ~mask1;
  178. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  179. mutex_unlock(&ice->gpio_mutex);
  180. }
  181. static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  182. {
  183. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
  184. }
  185. static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  186. {
  187. unsigned int val;
  188. int change;
  189. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  190. spin_lock_irq(&ice->reg_lock);
  191. change = ice->spdif.cs8403_bits != val;
  192. ice->spdif.cs8403_bits = val;
  193. if (change && ice->playback_pro_substream == NULL) {
  194. spin_unlock_irq(&ice->reg_lock);
  195. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  196. } else {
  197. spin_unlock_irq(&ice->reg_lock);
  198. }
  199. return change;
  200. }
  201. static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  202. {
  203. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
  204. }
  205. static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  206. {
  207. unsigned int val;
  208. int change;
  209. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  210. spin_lock_irq(&ice->reg_lock);
  211. change = ice->spdif.cs8403_stream_bits != val;
  212. ice->spdif.cs8403_stream_bits = val;
  213. if (change && ice->playback_pro_substream != NULL) {
  214. spin_unlock_irq(&ice->reg_lock);
  215. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  216. } else {
  217. spin_unlock_irq(&ice->reg_lock);
  218. }
  219. return change;
  220. }
  221. /*
  222. * AK4524 on Delta 44 and 66 to choose the chip mask
  223. */
  224. static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  225. {
  226. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  227. struct snd_ice1712 *ice = ak->private_data[0];
  228. snd_ice1712_save_gpio_status(ice);
  229. priv->cs_mask =
  230. priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
  231. ICE1712_DELTA_CODEC_CHIP_B;
  232. }
  233. /*
  234. * AK4524 on Delta1010LT to choose the chip address
  235. */
  236. static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  237. {
  238. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  239. struct snd_ice1712 *ice = ak->private_data[0];
  240. snd_ice1712_save_gpio_status(ice);
  241. priv->cs_mask = ICE1712_DELTA_1010LT_CS;
  242. priv->cs_addr = chip << 4;
  243. }
  244. /*
  245. * AK4528 on VX442 to choose the chip mask
  246. */
  247. static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  248. {
  249. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  250. struct snd_ice1712 *ice = ak->private_data[0];
  251. snd_ice1712_save_gpio_status(ice);
  252. priv->cs_mask =
  253. priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
  254. ICE1712_VX442_CODEC_CHIP_B;
  255. }
  256. /*
  257. * change the DFS bit according rate for Delta1010
  258. */
  259. static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
  260. {
  261. unsigned char tmp, tmp2;
  262. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  263. return;
  264. mutex_lock(&ice->gpio_mutex);
  265. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  266. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  267. if (rate > 48000)
  268. tmp2 |= ICE1712_DELTA_DFS;
  269. if (tmp != tmp2)
  270. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
  271. mutex_unlock(&ice->gpio_mutex);
  272. }
  273. /*
  274. * change the rate of AK4524 on Delta 44/66, AP, 1010LT
  275. */
  276. static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  277. {
  278. unsigned char tmp, tmp2;
  279. struct snd_ice1712 *ice = ak->private_data[0];
  280. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  281. return;
  282. /* check before reset ak4524 to avoid unnecessary clicks */
  283. mutex_lock(&ice->gpio_mutex);
  284. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  285. mutex_unlock(&ice->gpio_mutex);
  286. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  287. if (rate > 48000)
  288. tmp2 |= ICE1712_DELTA_DFS;
  289. if (tmp == tmp2)
  290. return;
  291. /* do it again */
  292. snd_akm4xxx_reset(ak, 1);
  293. mutex_lock(&ice->gpio_mutex);
  294. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
  295. if (rate > 48000)
  296. tmp |= ICE1712_DELTA_DFS;
  297. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  298. mutex_unlock(&ice->gpio_mutex);
  299. snd_akm4xxx_reset(ak, 0);
  300. }
  301. /*
  302. * change the rate of AK4524 on VX442
  303. */
  304. static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  305. {
  306. unsigned char val;
  307. val = (rate > 48000) ? 0x65 : 0x60;
  308. if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
  309. snd_akm4xxx_get(ak, 1, 0x02) != val) {
  310. snd_akm4xxx_reset(ak, 1);
  311. snd_akm4xxx_write(ak, 0, 0x02, val);
  312. snd_akm4xxx_write(ak, 1, 0x02, val);
  313. snd_akm4xxx_reset(ak, 0);
  314. }
  315. }
  316. /*
  317. * SPDIF ops for Delta 1010, Dio, 66
  318. */
  319. /* open callback */
  320. static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  321. {
  322. ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
  323. }
  324. /* set up */
  325. static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
  326. {
  327. unsigned long flags;
  328. unsigned int tmp;
  329. int change;
  330. spin_lock_irqsave(&ice->reg_lock, flags);
  331. tmp = ice->spdif.cs8403_stream_bits;
  332. if (tmp & 0x01) /* consumer */
  333. tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
  334. switch (rate) {
  335. case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
  336. case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
  337. case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
  338. default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
  339. }
  340. change = ice->spdif.cs8403_stream_bits != tmp;
  341. ice->spdif.cs8403_stream_bits = tmp;
  342. spin_unlock_irqrestore(&ice->reg_lock, flags);
  343. if (change)
  344. snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
  345. snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
  346. }
  347. static int snd_ice1712_delta1010lt_wordclock_status_info(struct snd_kcontrol *kcontrol,
  348. struct snd_ctl_elem_info *uinfo)
  349. {
  350. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  351. uinfo->count = 1;
  352. uinfo->value.integer.min = 0;
  353. uinfo->value.integer.max = 1;
  354. return 0;
  355. }
  356. static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
  357. struct snd_ctl_elem_value *ucontrol)
  358. {
  359. char reg = 0x10; // cs8427 receiver error register
  360. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  361. if (snd_i2c_sendbytes(ice->cs8427, &reg, 1) != 1)
  362. snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
  363. snd_i2c_readbytes(ice->cs8427, &reg, 1);
  364. ucontrol->value.integer.value[0] = (reg ? 1 : 0);
  365. return 0;
  366. }
  367. static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status __devinitdata =
  368. {
  369. .access = (SNDRV_CTL_ELEM_ACCESS_READ),
  370. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  371. .name = "Word Clock Status",
  372. .info = snd_ice1712_delta1010lt_wordclock_status_info,
  373. .get = snd_ice1712_delta1010lt_wordclock_status_get,
  374. };
  375. /*
  376. * initialize the chips on M-Audio cards
  377. */
  378. static const struct snd_akm4xxx akm_audiophile __devinitdata = {
  379. .type = SND_AK4528,
  380. .num_adcs = 2,
  381. .num_dacs = 2,
  382. .ops = {
  383. .set_rate_val = delta_ak4524_set_rate_val
  384. }
  385. };
  386. static const struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = {
  387. .caddr = 2,
  388. .cif = 0,
  389. .data_mask = ICE1712_DELTA_AP_DOUT,
  390. .clk_mask = ICE1712_DELTA_AP_CCLK,
  391. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  392. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  393. .cs_none = 0,
  394. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  395. .mask_flags = 0,
  396. };
  397. static const struct snd_akm4xxx akm_delta410 __devinitdata = {
  398. .type = SND_AK4529,
  399. .num_adcs = 2,
  400. .num_dacs = 8,
  401. .ops = {
  402. .set_rate_val = delta_ak4524_set_rate_val
  403. }
  404. };
  405. static const struct snd_ak4xxx_private akm_delta410_priv __devinitdata = {
  406. .caddr = 0,
  407. .cif = 0,
  408. .data_mask = ICE1712_DELTA_AP_DOUT,
  409. .clk_mask = ICE1712_DELTA_AP_CCLK,
  410. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  411. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  412. .cs_none = 0,
  413. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  414. .mask_flags = 0,
  415. };
  416. static const struct snd_akm4xxx akm_delta1010lt __devinitdata = {
  417. .type = SND_AK4524,
  418. .num_adcs = 8,
  419. .num_dacs = 8,
  420. .ops = {
  421. .lock = delta1010lt_ak4524_lock,
  422. .set_rate_val = delta_ak4524_set_rate_val
  423. }
  424. };
  425. static const struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = {
  426. .caddr = 2,
  427. .cif = 0, /* the default level of the CIF pin from AK4524 */
  428. .data_mask = ICE1712_DELTA_1010LT_DOUT,
  429. .clk_mask = ICE1712_DELTA_1010LT_CCLK,
  430. .cs_mask = 0,
  431. .cs_addr = 0, /* set later */
  432. .cs_none = ICE1712_DELTA_1010LT_CS_NONE,
  433. .add_flags = 0,
  434. .mask_flags = 0,
  435. };
  436. static const struct snd_akm4xxx akm_delta44 __devinitdata = {
  437. .type = SND_AK4524,
  438. .num_adcs = 4,
  439. .num_dacs = 4,
  440. .ops = {
  441. .lock = delta_ak4524_lock,
  442. .set_rate_val = delta_ak4524_set_rate_val
  443. }
  444. };
  445. static const struct snd_ak4xxx_private akm_delta44_priv __devinitdata = {
  446. .caddr = 2,
  447. .cif = 0, /* the default level of the CIF pin from AK4524 */
  448. .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
  449. .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
  450. .cs_mask = 0,
  451. .cs_addr = 0, /* set later */
  452. .cs_none = 0,
  453. .add_flags = 0,
  454. .mask_flags = 0,
  455. };
  456. static const struct snd_akm4xxx akm_vx442 __devinitdata = {
  457. .type = SND_AK4524,
  458. .num_adcs = 4,
  459. .num_dacs = 4,
  460. .ops = {
  461. .lock = vx442_ak4524_lock,
  462. .set_rate_val = vx442_ak4524_set_rate_val
  463. }
  464. };
  465. static const struct snd_ak4xxx_private akm_vx442_priv __devinitdata = {
  466. .caddr = 2,
  467. .cif = 0,
  468. .data_mask = ICE1712_VX442_DOUT,
  469. .clk_mask = ICE1712_VX442_CCLK,
  470. .cs_mask = 0,
  471. .cs_addr = 0, /* set later */
  472. .cs_none = 0,
  473. .add_flags = 0,
  474. .mask_flags = 0,
  475. };
  476. static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice)
  477. {
  478. int err;
  479. struct snd_akm4xxx *ak;
  480. /* determine I2C, DACs and ADCs */
  481. switch (ice->eeprom.subvendor) {
  482. case ICE1712_SUBDEVICE_AUDIOPHILE:
  483. ice->num_total_dacs = 2;
  484. ice->num_total_adcs = 2;
  485. break;
  486. case ICE1712_SUBDEVICE_DELTA410:
  487. ice->num_total_dacs = 8;
  488. ice->num_total_adcs = 2;
  489. break;
  490. case ICE1712_SUBDEVICE_DELTA44:
  491. case ICE1712_SUBDEVICE_DELTA66:
  492. ice->num_total_dacs = ice->omni ? 8 : 4;
  493. ice->num_total_adcs = ice->omni ? 8 : 4;
  494. break;
  495. case ICE1712_SUBDEVICE_DELTA1010:
  496. case ICE1712_SUBDEVICE_DELTA1010LT:
  497. case ICE1712_SUBDEVICE_MEDIASTATION:
  498. ice->num_total_dacs = 8;
  499. ice->num_total_adcs = 8;
  500. break;
  501. case ICE1712_SUBDEVICE_DELTADIO2496:
  502. ice->num_total_dacs = 4; /* two AK4324 codecs */
  503. break;
  504. case ICE1712_SUBDEVICE_VX442:
  505. ice->num_total_dacs = 4;
  506. ice->num_total_adcs = 4;
  507. break;
  508. }
  509. /* initialize spdif */
  510. switch (ice->eeprom.subvendor) {
  511. case ICE1712_SUBDEVICE_AUDIOPHILE:
  512. case ICE1712_SUBDEVICE_DELTA410:
  513. case ICE1712_SUBDEVICE_DELTA1010LT:
  514. case ICE1712_SUBDEVICE_VX442:
  515. if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) {
  516. snd_printk(KERN_ERR "unable to create I2C bus\n");
  517. return err;
  518. }
  519. ice->i2c->private_data = ice;
  520. ice->i2c->ops = &ap_cs8427_i2c_ops;
  521. if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0)
  522. return err;
  523. break;
  524. case ICE1712_SUBDEVICE_DELTA1010:
  525. case ICE1712_SUBDEVICE_MEDIASTATION:
  526. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  527. break;
  528. case ICE1712_SUBDEVICE_DELTADIO2496:
  529. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  530. /* fall thru */
  531. case ICE1712_SUBDEVICE_DELTA66:
  532. ice->spdif.ops.open = delta_open_spdif;
  533. ice->spdif.ops.setup_rate = delta_setup_spdif;
  534. ice->spdif.ops.default_get = delta_spdif_default_get;
  535. ice->spdif.ops.default_put = delta_spdif_default_put;
  536. ice->spdif.ops.stream_get = delta_spdif_stream_get;
  537. ice->spdif.ops.stream_put = delta_spdif_stream_put;
  538. /* Set spdif defaults */
  539. snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
  540. break;
  541. }
  542. /* no analog? */
  543. switch (ice->eeprom.subvendor) {
  544. case ICE1712_SUBDEVICE_DELTA1010:
  545. case ICE1712_SUBDEVICE_DELTADIO2496:
  546. case ICE1712_SUBDEVICE_MEDIASTATION:
  547. return 0;
  548. }
  549. /* second stage of initialization, analog parts and others */
  550. ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  551. if (! ak)
  552. return -ENOMEM;
  553. ice->akm_codecs = 1;
  554. switch (ice->eeprom.subvendor) {
  555. case ICE1712_SUBDEVICE_AUDIOPHILE:
  556. err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
  557. break;
  558. case ICE1712_SUBDEVICE_DELTA410:
  559. err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
  560. break;
  561. case ICE1712_SUBDEVICE_DELTA1010LT:
  562. err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
  563. break;
  564. case ICE1712_SUBDEVICE_DELTA66:
  565. case ICE1712_SUBDEVICE_DELTA44:
  566. err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
  567. break;
  568. case ICE1712_SUBDEVICE_VX442:
  569. err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
  570. break;
  571. default:
  572. snd_BUG();
  573. return -EINVAL;
  574. }
  575. return err;
  576. }
  577. /*
  578. * additional controls for M-Audio cards
  579. */
  580. static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata =
  581. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
  582. static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata =
  583. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
  584. static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata =
  585. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  586. static const struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata =
  587. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
  588. static const struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata =
  589. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  590. static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
  591. {
  592. int err;
  593. /* 1010 and dio specific controls */
  594. switch (ice->eeprom.subvendor) {
  595. case ICE1712_SUBDEVICE_DELTA1010:
  596. case ICE1712_SUBDEVICE_MEDIASTATION:
  597. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
  598. if (err < 0)
  599. return err;
  600. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
  601. if (err < 0)
  602. return err;
  603. break;
  604. case ICE1712_SUBDEVICE_DELTADIO2496:
  605. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
  606. if (err < 0)
  607. return err;
  608. break;
  609. case ICE1712_SUBDEVICE_DELTA1010LT:
  610. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
  611. if (err < 0)
  612. return err;
  613. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
  614. if (err < 0)
  615. return err;
  616. break;
  617. }
  618. /* normal spdif controls */
  619. switch (ice->eeprom.subvendor) {
  620. case ICE1712_SUBDEVICE_DELTA1010:
  621. case ICE1712_SUBDEVICE_DELTADIO2496:
  622. case ICE1712_SUBDEVICE_DELTA66:
  623. case ICE1712_SUBDEVICE_MEDIASTATION:
  624. err = snd_ice1712_spdif_build_controls(ice);
  625. if (err < 0)
  626. return err;
  627. break;
  628. }
  629. /* spdif status in */
  630. switch (ice->eeprom.subvendor) {
  631. case ICE1712_SUBDEVICE_DELTA1010:
  632. case ICE1712_SUBDEVICE_DELTADIO2496:
  633. case ICE1712_SUBDEVICE_DELTA66:
  634. case ICE1712_SUBDEVICE_MEDIASTATION:
  635. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
  636. if (err < 0)
  637. return err;
  638. break;
  639. }
  640. /* ak4524 controls */
  641. switch (ice->eeprom.subvendor) {
  642. case ICE1712_SUBDEVICE_DELTA1010LT:
  643. case ICE1712_SUBDEVICE_AUDIOPHILE:
  644. case ICE1712_SUBDEVICE_DELTA410:
  645. case ICE1712_SUBDEVICE_DELTA44:
  646. case ICE1712_SUBDEVICE_DELTA66:
  647. case ICE1712_SUBDEVICE_VX442:
  648. err = snd_ice1712_akm4xxx_build_controls(ice);
  649. if (err < 0)
  650. return err;
  651. break;
  652. }
  653. return 0;
  654. }
  655. /* entry point */
  656. const struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = {
  657. {
  658. .subvendor = ICE1712_SUBDEVICE_DELTA1010,
  659. .name = "M Audio Delta 1010",
  660. .model = "delta1010",
  661. .chip_init = snd_ice1712_delta_init,
  662. .build_controls = snd_ice1712_delta_add_controls,
  663. },
  664. {
  665. .subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
  666. .name = "M Audio Delta DiO 2496",
  667. .model = "dio2496",
  668. .chip_init = snd_ice1712_delta_init,
  669. .build_controls = snd_ice1712_delta_add_controls,
  670. .no_mpu401 = 1,
  671. },
  672. {
  673. .subvendor = ICE1712_SUBDEVICE_DELTA66,
  674. .name = "M Audio Delta 66",
  675. .model = "delta66",
  676. .chip_init = snd_ice1712_delta_init,
  677. .build_controls = snd_ice1712_delta_add_controls,
  678. .no_mpu401 = 1,
  679. },
  680. {
  681. .subvendor = ICE1712_SUBDEVICE_DELTA44,
  682. .name = "M Audio Delta 44",
  683. .model = "delta44",
  684. .chip_init = snd_ice1712_delta_init,
  685. .build_controls = snd_ice1712_delta_add_controls,
  686. .no_mpu401 = 1,
  687. },
  688. {
  689. .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
  690. .name = "M Audio Audiophile 24/96",
  691. .model = "audiophile",
  692. .chip_init = snd_ice1712_delta_init,
  693. .build_controls = snd_ice1712_delta_add_controls,
  694. },
  695. {
  696. .subvendor = ICE1712_SUBDEVICE_DELTA410,
  697. .name = "M Audio Delta 410",
  698. .model = "delta410",
  699. .chip_init = snd_ice1712_delta_init,
  700. .build_controls = snd_ice1712_delta_add_controls,
  701. },
  702. {
  703. .subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
  704. .name = "M Audio Delta 1010LT",
  705. .model = "delta1010lt",
  706. .chip_init = snd_ice1712_delta_init,
  707. .build_controls = snd_ice1712_delta_add_controls,
  708. },
  709. {
  710. .subvendor = ICE1712_SUBDEVICE_VX442,
  711. .name = "Digigram VX442",
  712. .model = "vx442",
  713. .chip_init = snd_ice1712_delta_init,
  714. .build_controls = snd_ice1712_delta_add_controls,
  715. .no_mpu401 = 1,
  716. },
  717. {
  718. .subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
  719. .name = "Lionstracs Mediastation",
  720. .model = "mediastation",
  721. .chip_init = snd_ice1712_delta_init,
  722. .build_controls = snd_ice1712_delta_add_controls,
  723. },
  724. { } /* terminator */
  725. };