aureon.c 62 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. *
  48. */
  49. #include <sound/driver.h>
  50. #include <asm/io.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/init.h>
  54. #include <linux/slab.h>
  55. #include <linux/mutex.h>
  56. #include <sound/core.h>
  57. #include "ice1712.h"
  58. #include "envy24ht.h"
  59. #include "aureon.h"
  60. #include <sound/tlv.h>
  61. /* WM8770 registers */
  62. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  63. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  64. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  65. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  66. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  67. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  68. #define WM_MUTE 0x14 /* mute controls */
  69. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  70. #define WM_INT_CTRL 0x16 /* interface control */
  71. #define WM_MASTER 0x17 /* master clock and mode */
  72. #define WM_POWERDOWN 0x18 /* power-down controls */
  73. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  74. #define WM_ADC_MUX 0x1b /* input MUX */
  75. #define WM_OUT_MUX1 0x1c /* output MUX */
  76. #define WM_OUT_MUX2 0x1e /* output MUX */
  77. #define WM_RESET 0x1f /* software reset */
  78. /* CS8415A registers */
  79. #define CS8415_CTRL1 0x01
  80. #define CS8415_CTRL2 0x02
  81. #define CS8415_QSUB 0x14
  82. #define CS8415_RATIO 0x1E
  83. #define CS8415_C_BUFFER 0x20
  84. #define CS8415_ID 0x7F
  85. /* PCA9554 registers */
  86. #define PCA9554_DEV 0x40 /* I2C device address */
  87. #define PCA9554_IN 0x00 /* input port */
  88. #define PCA9554_OUT 0x01 /* output port */
  89. #define PCA9554_INVERT 0x02 /* input invert */
  90. #define PCA9554_DIR 0x03 /* port directions */
  91. /*
  92. * Aureon Universe additional controls using PCA9554
  93. */
  94. /*
  95. * Send data to pca9554
  96. */
  97. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  98. unsigned char data)
  99. {
  100. unsigned int tmp;
  101. int i, j;
  102. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  103. unsigned char val = 0;
  104. tmp = snd_ice1712_gpio_read(ice);
  105. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  106. AUREON_WM_RW|AUREON_WM_CS|
  107. AUREON_CS8415_CS));
  108. tmp |= AUREON_WM_RW;
  109. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  110. tmp &= ~AUREON_SPI_MOSI;
  111. tmp &= ~AUREON_SPI_CLK;
  112. snd_ice1712_gpio_write(ice, tmp);
  113. udelay(50);
  114. /*
  115. * send i2c stop condition and start condition
  116. * to obtain sane state
  117. */
  118. tmp |= AUREON_SPI_CLK;
  119. snd_ice1712_gpio_write(ice, tmp);
  120. udelay(50);
  121. tmp |= AUREON_SPI_MOSI;
  122. snd_ice1712_gpio_write(ice, tmp);
  123. udelay(100);
  124. tmp &= ~AUREON_SPI_MOSI;
  125. snd_ice1712_gpio_write(ice, tmp);
  126. udelay(50);
  127. tmp &= ~AUREON_SPI_CLK;
  128. snd_ice1712_gpio_write(ice, tmp);
  129. udelay(100);
  130. /*
  131. * send device address, command and value,
  132. * skipping ack cycles inbetween
  133. */
  134. for (j = 0; j < 3; j++) {
  135. switch(j) {
  136. case 0: val = dev; break;
  137. case 1: val = reg; break;
  138. case 2: val = data; break;
  139. }
  140. for (i = 7; i >= 0; i--) {
  141. tmp &= ~AUREON_SPI_CLK;
  142. snd_ice1712_gpio_write(ice, tmp);
  143. udelay(40);
  144. if (val & (1 << i))
  145. tmp |= AUREON_SPI_MOSI;
  146. else
  147. tmp &= ~AUREON_SPI_MOSI;
  148. snd_ice1712_gpio_write(ice, tmp);
  149. udelay(40);
  150. tmp |= AUREON_SPI_CLK;
  151. snd_ice1712_gpio_write(ice, tmp);
  152. udelay(40);
  153. }
  154. tmp &= ~AUREON_SPI_CLK;
  155. snd_ice1712_gpio_write(ice, tmp);
  156. udelay(40);
  157. tmp |= AUREON_SPI_CLK;
  158. snd_ice1712_gpio_write(ice, tmp);
  159. udelay(40);
  160. tmp &= ~AUREON_SPI_CLK;
  161. snd_ice1712_gpio_write(ice, tmp);
  162. udelay(40);
  163. }
  164. tmp &= ~AUREON_SPI_CLK;
  165. snd_ice1712_gpio_write(ice, tmp);
  166. udelay(40);
  167. tmp &= ~AUREON_SPI_MOSI;
  168. snd_ice1712_gpio_write(ice, tmp);
  169. udelay(40);
  170. tmp |= AUREON_SPI_CLK;
  171. snd_ice1712_gpio_write(ice, tmp);
  172. udelay(50);
  173. tmp |= AUREON_SPI_MOSI;
  174. snd_ice1712_gpio_write(ice, tmp);
  175. udelay(100);
  176. }
  177. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  178. struct snd_ctl_elem_info *uinfo)
  179. {
  180. char *texts[3] = {"Internal Aux", "Wavetable", "Rear Line-In"};
  181. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  182. uinfo->count = 1;
  183. uinfo->value.enumerated.items = 3;
  184. if(uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  185. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  186. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  187. return 0;
  188. }
  189. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  190. struct snd_ctl_elem_value *ucontrol)
  191. {
  192. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  193. ucontrol->value.integer.value[0] = ice->spec.aureon.pca9554_out;
  194. return 0;
  195. }
  196. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  197. struct snd_ctl_elem_value *ucontrol)
  198. {
  199. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  200. unsigned char oval, nval;
  201. int change;
  202. snd_ice1712_save_gpio_status(ice);
  203. oval = ice->spec.aureon.pca9554_out;
  204. nval = ucontrol->value.integer.value[0];
  205. if ((change = (oval != nval))) {
  206. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  207. ice->spec.aureon.pca9554_out = nval;
  208. }
  209. snd_ice1712_restore_gpio_status(ice);
  210. return change;
  211. }
  212. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  213. unsigned short val)
  214. {
  215. unsigned int tmp;
  216. /* Send address to XILINX chip */
  217. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  218. snd_ice1712_gpio_write(ice, tmp);
  219. udelay(10);
  220. tmp |= AUREON_AC97_ADDR;
  221. snd_ice1712_gpio_write(ice, tmp);
  222. udelay(10);
  223. tmp &= ~AUREON_AC97_ADDR;
  224. snd_ice1712_gpio_write(ice, tmp);
  225. udelay(10);
  226. /* Send low-order byte to XILINX chip */
  227. tmp &= ~AUREON_AC97_DATA_MASK;
  228. tmp |= val & AUREON_AC97_DATA_MASK;
  229. snd_ice1712_gpio_write(ice, tmp);
  230. udelay(10);
  231. tmp |= AUREON_AC97_DATA_LOW;
  232. snd_ice1712_gpio_write(ice, tmp);
  233. udelay(10);
  234. tmp &= ~AUREON_AC97_DATA_LOW;
  235. snd_ice1712_gpio_write(ice, tmp);
  236. udelay(10);
  237. /* Send high-order byte to XILINX chip */
  238. tmp &= ~AUREON_AC97_DATA_MASK;
  239. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  240. snd_ice1712_gpio_write(ice, tmp);
  241. udelay(10);
  242. tmp |= AUREON_AC97_DATA_HIGH;
  243. snd_ice1712_gpio_write(ice, tmp);
  244. udelay(10);
  245. tmp &= ~AUREON_AC97_DATA_HIGH;
  246. snd_ice1712_gpio_write(ice, tmp);
  247. udelay(10);
  248. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  249. tmp |= AUREON_AC97_COMMIT;
  250. snd_ice1712_gpio_write(ice, tmp);
  251. udelay(10);
  252. tmp &= ~AUREON_AC97_COMMIT;
  253. snd_ice1712_gpio_write(ice, tmp);
  254. udelay(10);
  255. /* Store the data in out private buffer */
  256. ice->spec.aureon.stac9744[(reg & 0x7F) >> 1] = val;
  257. }
  258. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  259. {
  260. return ice->spec.aureon.stac9744[(reg & 0x7F) >> 1];
  261. }
  262. /*
  263. * Initialize STAC9744 chip
  264. */
  265. static int aureon_ac97_init (struct snd_ice1712 *ice)
  266. {
  267. int i;
  268. static const unsigned short ac97_defaults[] = {
  269. 0x00, 0x9640,
  270. 0x02, 0x8000,
  271. 0x04, 0x8000,
  272. 0x06, 0x8000,
  273. 0x0C, 0x8008,
  274. 0x0E, 0x8008,
  275. 0x10, 0x8808,
  276. 0x12, 0x8808,
  277. 0x14, 0x8808,
  278. 0x16, 0x8808,
  279. 0x18, 0x8808,
  280. 0x1C, 0x8000,
  281. 0x26, 0x000F,
  282. 0x28, 0x0201,
  283. 0x2C, 0xBB80,
  284. 0x32, 0xBB80,
  285. 0x7C, 0x8384,
  286. 0x7E, 0x7644,
  287. (unsigned short)-1
  288. };
  289. unsigned int tmp;
  290. /* Cold reset */
  291. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  292. snd_ice1712_gpio_write(ice, tmp);
  293. udelay(3);
  294. tmp &= ~AUREON_AC97_RESET;
  295. snd_ice1712_gpio_write(ice, tmp);
  296. udelay(3);
  297. tmp |= AUREON_AC97_RESET;
  298. snd_ice1712_gpio_write(ice, tmp);
  299. udelay(3);
  300. memset(&ice->spec.aureon.stac9744, 0, sizeof(ice->spec.aureon.stac9744));
  301. for (i=0; ac97_defaults[i] != (unsigned short)-1; i+=2)
  302. ice->spec.aureon.stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  303. aureon_ac97_write(ice, AC97_MASTER, 0x0000); // Unmute AC'97 master volume permanently - muting is done by WM8770
  304. return 0;
  305. }
  306. #define AUREON_AC97_STEREO 0x80
  307. /*
  308. * AC'97 volume controls
  309. */
  310. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  311. {
  312. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  313. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  314. uinfo->value.integer.min = 0;
  315. uinfo->value.integer.max = 31;
  316. return 0;
  317. }
  318. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  319. {
  320. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  321. unsigned short vol;
  322. mutex_lock(&ice->gpio_mutex);
  323. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  324. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  325. if (kcontrol->private_value & AUREON_AC97_STEREO)
  326. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  327. mutex_unlock(&ice->gpio_mutex);
  328. return 0;
  329. }
  330. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  331. {
  332. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  333. unsigned short ovol, nvol;
  334. int change;
  335. snd_ice1712_save_gpio_status(ice);
  336. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  337. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  338. if (kcontrol->private_value & AUREON_AC97_STEREO)
  339. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  340. nvol |= ovol & ~0x1F1F;
  341. if ((change = (ovol != nvol)))
  342. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  343. snd_ice1712_restore_gpio_status(ice);
  344. return change;
  345. }
  346. /*
  347. * AC'97 mute controls
  348. */
  349. #define aureon_ac97_mute_info aureon_mono_bool_info
  350. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  351. {
  352. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  353. mutex_lock(&ice->gpio_mutex);
  354. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  355. mutex_unlock(&ice->gpio_mutex);
  356. return 0;
  357. }
  358. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  359. {
  360. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  361. unsigned short ovol, nvol;
  362. int change;
  363. snd_ice1712_save_gpio_status(ice);
  364. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  365. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~ 0x8000);
  366. if ((change = (ovol != nvol)))
  367. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  368. snd_ice1712_restore_gpio_status(ice);
  369. return change;
  370. }
  371. /*
  372. * AC'97 mute controls
  373. */
  374. #define aureon_ac97_micboost_info aureon_mono_bool_info
  375. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  376. {
  377. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  378. mutex_lock(&ice->gpio_mutex);
  379. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  380. mutex_unlock(&ice->gpio_mutex);
  381. return 0;
  382. }
  383. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  384. {
  385. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  386. unsigned short ovol, nvol;
  387. int change;
  388. snd_ice1712_save_gpio_status(ice);
  389. ovol = aureon_ac97_read(ice, AC97_MIC);
  390. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  391. if ((change = (ovol != nvol)))
  392. aureon_ac97_write(ice, AC97_MIC, nvol);
  393. snd_ice1712_restore_gpio_status(ice);
  394. return change;
  395. }
  396. /*
  397. * write data in the SPI mode
  398. */
  399. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  400. {
  401. unsigned int tmp;
  402. int i;
  403. unsigned int mosi, clk;
  404. tmp = snd_ice1712_gpio_read(ice);
  405. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  406. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
  407. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  408. mosi = PRODIGY_SPI_MOSI;
  409. clk = PRODIGY_SPI_CLK;
  410. }
  411. else {
  412. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  413. AUREON_WM_CS|AUREON_CS8415_CS));
  414. mosi = AUREON_SPI_MOSI;
  415. clk = AUREON_SPI_CLK;
  416. tmp |= AUREON_WM_RW;
  417. }
  418. tmp &= ~cs;
  419. snd_ice1712_gpio_write(ice, tmp);
  420. udelay(1);
  421. for (i = bits - 1; i >= 0; i--) {
  422. tmp &= ~clk;
  423. snd_ice1712_gpio_write(ice, tmp);
  424. udelay(1);
  425. if (data & (1 << i))
  426. tmp |= mosi;
  427. else
  428. tmp &= ~mosi;
  429. snd_ice1712_gpio_write(ice, tmp);
  430. udelay(1);
  431. tmp |= clk;
  432. snd_ice1712_gpio_write(ice, tmp);
  433. udelay(1);
  434. }
  435. tmp &= ~clk;
  436. tmp |= cs;
  437. snd_ice1712_gpio_write(ice, tmp);
  438. udelay(1);
  439. tmp |= clk;
  440. snd_ice1712_gpio_write(ice, tmp);
  441. udelay(1);
  442. }
  443. /*
  444. * Read data in SPI mode
  445. */
  446. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits, unsigned char *buffer, int size) {
  447. int i, j;
  448. unsigned int tmp;
  449. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  450. snd_ice1712_gpio_write(ice, tmp);
  451. tmp &= ~cs;
  452. snd_ice1712_gpio_write(ice, tmp);
  453. udelay(1);
  454. for (i=bits-1; i>=0; i--) {
  455. if (data & (1 << i))
  456. tmp |= AUREON_SPI_MOSI;
  457. else
  458. tmp &= ~AUREON_SPI_MOSI;
  459. snd_ice1712_gpio_write(ice, tmp);
  460. udelay(1);
  461. tmp |= AUREON_SPI_CLK;
  462. snd_ice1712_gpio_write(ice, tmp);
  463. udelay(1);
  464. tmp &= ~AUREON_SPI_CLK;
  465. snd_ice1712_gpio_write(ice, tmp);
  466. udelay(1);
  467. }
  468. for (j=0; j<size; j++) {
  469. unsigned char outdata = 0;
  470. for (i=7; i>=0; i--) {
  471. tmp = snd_ice1712_gpio_read(ice);
  472. outdata <<= 1;
  473. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  474. udelay(1);
  475. tmp |= AUREON_SPI_CLK;
  476. snd_ice1712_gpio_write(ice, tmp);
  477. udelay(1);
  478. tmp &= ~AUREON_SPI_CLK;
  479. snd_ice1712_gpio_write(ice, tmp);
  480. udelay(1);
  481. }
  482. buffer[j] = outdata;
  483. }
  484. tmp |= cs;
  485. snd_ice1712_gpio_write(ice, tmp);
  486. }
  487. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg) {
  488. unsigned char val;
  489. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  490. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  491. return val;
  492. }
  493. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg, unsigned char *buffer, int size) {
  494. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  495. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  496. }
  497. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg, unsigned char val) {
  498. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  499. }
  500. /*
  501. * get the current register value of WM codec
  502. */
  503. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  504. {
  505. reg <<= 1;
  506. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  507. ice->akm[0].images[reg + 1];
  508. }
  509. /*
  510. * set the register value of WM codec
  511. */
  512. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  513. {
  514. aureon_spi_write(ice,
  515. ((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  516. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
  517. PRODIGY_WM_CS : AUREON_WM_CS),
  518. (reg << 9) | (val & 0x1ff), 16);
  519. }
  520. /*
  521. * set the register value of WM codec and remember it
  522. */
  523. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  524. {
  525. wm_put_nocache(ice, reg, val);
  526. reg <<= 1;
  527. ice->akm[0].images[reg] = val >> 8;
  528. ice->akm[0].images[reg + 1] = val;
  529. }
  530. /*
  531. */
  532. static int aureon_mono_bool_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  533. {
  534. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  535. uinfo->count = 1;
  536. uinfo->value.integer.min = 0;
  537. uinfo->value.integer.max = 1;
  538. return 0;
  539. }
  540. /*
  541. * AC'97 master playback mute controls (Mute on WM8770 chip)
  542. */
  543. #define aureon_ac97_mmute_info aureon_mono_bool_info
  544. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  545. {
  546. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  547. mutex_lock(&ice->gpio_mutex);
  548. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  549. mutex_unlock(&ice->gpio_mutex);
  550. return 0;
  551. }
  552. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  553. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  554. unsigned short ovol, nvol;
  555. int change;
  556. snd_ice1712_save_gpio_status(ice);
  557. ovol = wm_get(ice, WM_OUT_MUX1);
  558. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  559. if ((change = (ovol != nvol)))
  560. wm_put(ice, WM_OUT_MUX1, nvol);
  561. snd_ice1712_restore_gpio_status(ice);
  562. return change;
  563. }
  564. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
  565. static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  566. static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  567. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  568. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  569. /*
  570. * Logarithmic volume values for WM8770
  571. * Computed as 20 * Log10(255 / x)
  572. */
  573. static const unsigned char wm_vol[256] = {
  574. 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23,
  575. 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17,
  576. 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13,
  577. 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11,
  578. 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8,
  579. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6,
  580. 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
  581. 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
  582. 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
  583. 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
  584. 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  585. 0, 0
  586. };
  587. #define WM_VOL_MAX (sizeof(wm_vol) - 1)
  588. #define WM_VOL_MUTE 0x8000
  589. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  590. {
  591. unsigned char nvol;
  592. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  593. nvol = 0;
  594. else
  595. nvol = 127 - wm_vol[(((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 127) & WM_VOL_MAX];
  596. wm_put(ice, index, nvol);
  597. wm_put_nocache(ice, index, 0x180 | nvol);
  598. }
  599. /*
  600. * DAC mute control
  601. */
  602. #define wm_pcm_mute_info aureon_mono_bool_info
  603. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  604. {
  605. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  606. mutex_lock(&ice->gpio_mutex);
  607. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  608. mutex_unlock(&ice->gpio_mutex);
  609. return 0;
  610. }
  611. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  612. {
  613. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  614. unsigned short nval, oval;
  615. int change;
  616. snd_ice1712_save_gpio_status(ice);
  617. oval = wm_get(ice, WM_MUTE);
  618. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  619. if ((change = (nval != oval)))
  620. wm_put(ice, WM_MUTE, nval);
  621. snd_ice1712_restore_gpio_status(ice);
  622. return change;
  623. }
  624. /*
  625. * Master volume attenuation mixer control
  626. */
  627. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  628. {
  629. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  630. uinfo->count = 2;
  631. uinfo->value.integer.min = 0;
  632. uinfo->value.integer.max = WM_VOL_MAX;
  633. return 0;
  634. }
  635. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  636. {
  637. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  638. int i;
  639. for (i=0; i<2; i++)
  640. ucontrol->value.integer.value[i] = ice->spec.aureon.master[i] & ~WM_VOL_MUTE;
  641. return 0;
  642. }
  643. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  644. {
  645. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  646. int ch, change = 0;
  647. snd_ice1712_save_gpio_status(ice);
  648. for (ch = 0; ch < 2; ch++) {
  649. if (ucontrol->value.integer.value[ch] != ice->spec.aureon.master[ch]) {
  650. int dac;
  651. ice->spec.aureon.master[ch] &= WM_VOL_MUTE;
  652. ice->spec.aureon.master[ch] |= ucontrol->value.integer.value[ch];
  653. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  654. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  655. ice->spec.aureon.vol[dac + ch],
  656. ice->spec.aureon.master[ch]);
  657. change = 1;
  658. }
  659. }
  660. snd_ice1712_restore_gpio_status(ice);
  661. return change;
  662. }
  663. /*
  664. * DAC volume attenuation mixer control
  665. */
  666. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  667. {
  668. int voices = kcontrol->private_value >> 8;
  669. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  670. uinfo->count = voices;
  671. uinfo->value.integer.min = 0; /* mute (-101dB) */
  672. uinfo->value.integer.max = 0x7F; /* 0dB */
  673. return 0;
  674. }
  675. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  676. {
  677. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  678. int i, ofs, voices;
  679. voices = kcontrol->private_value >> 8;
  680. ofs = kcontrol->private_value & 0xff;
  681. for (i = 0; i < voices; i++)
  682. ucontrol->value.integer.value[i] = ice->spec.aureon.vol[ofs+i] & ~WM_VOL_MUTE;
  683. return 0;
  684. }
  685. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  686. {
  687. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  688. int i, idx, ofs, voices;
  689. int change = 0;
  690. voices = kcontrol->private_value >> 8;
  691. ofs = kcontrol->private_value & 0xff;
  692. snd_ice1712_save_gpio_status(ice);
  693. for (i = 0; i < voices; i++) {
  694. idx = WM_DAC_ATTEN + ofs + i;
  695. if (ucontrol->value.integer.value[i] != ice->spec.aureon.vol[ofs+i]) {
  696. ice->spec.aureon.vol[ofs+i] &= WM_VOL_MUTE;
  697. ice->spec.aureon.vol[ofs+i] |= ucontrol->value.integer.value[i];
  698. wm_set_vol(ice, idx, ice->spec.aureon.vol[ofs+i],
  699. ice->spec.aureon.master[i]);
  700. change = 1;
  701. }
  702. }
  703. snd_ice1712_restore_gpio_status(ice);
  704. return change;
  705. }
  706. /*
  707. * WM8770 mute control
  708. */
  709. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  710. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  711. uinfo->count = kcontrol->private_value >> 8;
  712. uinfo->value.integer.min = 0;
  713. uinfo->value.integer.max = 1;
  714. return 0;
  715. }
  716. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  717. {
  718. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  719. int voices, ofs, i;
  720. voices = kcontrol->private_value >> 8;
  721. ofs = kcontrol->private_value & 0xFF;
  722. for (i = 0; i < voices; i++)
  723. ucontrol->value.integer.value[i] = (ice->spec.aureon.vol[ofs+i] & WM_VOL_MUTE) ? 0 : 1;
  724. return 0;
  725. }
  726. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  727. {
  728. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  729. int change = 0, voices, ofs, i;
  730. voices = kcontrol->private_value >> 8;
  731. ofs = kcontrol->private_value & 0xFF;
  732. snd_ice1712_save_gpio_status(ice);
  733. for (i = 0; i < voices; i++) {
  734. int val = (ice->spec.aureon.vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  735. if (ucontrol->value.integer.value[i] != val) {
  736. ice->spec.aureon.vol[ofs + i] &= ~WM_VOL_MUTE;
  737. ice->spec.aureon.vol[ofs + i] |=
  738. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  739. wm_set_vol(ice, ofs + i, ice->spec.aureon.vol[ofs + i],
  740. ice->spec.aureon.master[i]);
  741. change = 1;
  742. }
  743. }
  744. snd_ice1712_restore_gpio_status(ice);
  745. return change;
  746. }
  747. /*
  748. * WM8770 master mute control
  749. */
  750. static int wm_master_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  751. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  752. uinfo->count = 2;
  753. uinfo->value.integer.min = 0;
  754. uinfo->value.integer.max = 1;
  755. return 0;
  756. }
  757. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  758. {
  759. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  760. ucontrol->value.integer.value[0] = (ice->spec.aureon.master[0] & WM_VOL_MUTE) ? 0 : 1;
  761. ucontrol->value.integer.value[1] = (ice->spec.aureon.master[1] & WM_VOL_MUTE) ? 0 : 1;
  762. return 0;
  763. }
  764. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  765. {
  766. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  767. int change = 0, i;
  768. snd_ice1712_save_gpio_status(ice);
  769. for (i = 0; i < 2; i++) {
  770. int val = (ice->spec.aureon.master[i] & WM_VOL_MUTE) ? 0 : 1;
  771. if (ucontrol->value.integer.value[i] != val) {
  772. int dac;
  773. ice->spec.aureon.master[i] &= ~WM_VOL_MUTE;
  774. ice->spec.aureon.master[i] |=
  775. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  776. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  777. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  778. ice->spec.aureon.vol[dac + i],
  779. ice->spec.aureon.master[i]);
  780. change = 1;
  781. }
  782. }
  783. snd_ice1712_restore_gpio_status(ice);
  784. return change;
  785. }
  786. /* digital master volume */
  787. #define PCM_0dB 0xff
  788. #define PCM_RES 128 /* -64dB */
  789. #define PCM_MIN (PCM_0dB - PCM_RES)
  790. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  791. {
  792. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  793. uinfo->count = 1;
  794. uinfo->value.integer.min = 0; /* mute (-64dB) */
  795. uinfo->value.integer.max = PCM_RES; /* 0dB */
  796. return 0;
  797. }
  798. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  799. {
  800. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  801. unsigned short val;
  802. mutex_lock(&ice->gpio_mutex);
  803. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  804. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  805. ucontrol->value.integer.value[0] = val;
  806. mutex_unlock(&ice->gpio_mutex);
  807. return 0;
  808. }
  809. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  810. {
  811. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  812. unsigned short ovol, nvol;
  813. int change = 0;
  814. snd_ice1712_save_gpio_status(ice);
  815. nvol = ucontrol->value.integer.value[0];
  816. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  817. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  818. if (ovol != nvol) {
  819. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  820. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  821. change = 1;
  822. }
  823. snd_ice1712_restore_gpio_status(ice);
  824. return change;
  825. }
  826. /*
  827. * ADC mute control
  828. */
  829. static int wm_adc_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  830. {
  831. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  832. uinfo->count = 2;
  833. uinfo->value.integer.min = 0;
  834. uinfo->value.integer.max = 1;
  835. return 0;
  836. }
  837. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  838. {
  839. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  840. unsigned short val;
  841. int i;
  842. mutex_lock(&ice->gpio_mutex);
  843. for (i = 0; i < 2; i++) {
  844. val = wm_get(ice, WM_ADC_GAIN + i);
  845. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  846. }
  847. mutex_unlock(&ice->gpio_mutex);
  848. return 0;
  849. }
  850. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  851. {
  852. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  853. unsigned short new, old;
  854. int i, change = 0;
  855. snd_ice1712_save_gpio_status(ice);
  856. for (i = 0; i < 2; i++) {
  857. old = wm_get(ice, WM_ADC_GAIN + i);
  858. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  859. if (new != old) {
  860. wm_put(ice, WM_ADC_GAIN + i, new);
  861. change = 1;
  862. }
  863. }
  864. snd_ice1712_restore_gpio_status(ice);
  865. return change;
  866. }
  867. /*
  868. * ADC gain mixer control
  869. */
  870. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  871. {
  872. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  873. uinfo->count = 2;
  874. uinfo->value.integer.min = 0; /* -12dB */
  875. uinfo->value.integer.max = 0x1f; /* 19dB */
  876. return 0;
  877. }
  878. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  879. {
  880. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  881. int i, idx;
  882. unsigned short vol;
  883. mutex_lock(&ice->gpio_mutex);
  884. for (i = 0; i < 2; i++) {
  885. idx = WM_ADC_GAIN + i;
  886. vol = wm_get(ice, idx) & 0x1f;
  887. ucontrol->value.integer.value[i] = vol;
  888. }
  889. mutex_unlock(&ice->gpio_mutex);
  890. return 0;
  891. }
  892. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  893. {
  894. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  895. int i, idx;
  896. unsigned short ovol, nvol;
  897. int change = 0;
  898. snd_ice1712_save_gpio_status(ice);
  899. for (i = 0; i < 2; i++) {
  900. idx = WM_ADC_GAIN + i;
  901. nvol = ucontrol->value.integer.value[i];
  902. ovol = wm_get(ice, idx);
  903. if ((ovol & 0x1f) != nvol) {
  904. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  905. change = 1;
  906. }
  907. }
  908. snd_ice1712_restore_gpio_status(ice);
  909. return change;
  910. }
  911. /*
  912. * ADC input mux mixer control
  913. */
  914. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  915. {
  916. static const char * const texts[] = {
  917. "CD", //AIN1
  918. "Aux", //AIN2
  919. "Line", //AIN3
  920. "Mic", //AIN4
  921. "AC97" //AIN5
  922. };
  923. static const char * const universe_texts[] = {
  924. "Aux1", //AIN1
  925. "CD", //AIN2
  926. "Phono", //AIN3
  927. "Line", //AIN4
  928. "Aux2", //AIN5
  929. "Mic", //AIN6
  930. "Aux3", //AIN7
  931. "AC97" //AIN8
  932. };
  933. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  934. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  935. uinfo->count = 2;
  936. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  937. uinfo->value.enumerated.items = 8;
  938. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  939. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  940. strcpy(uinfo->value.enumerated.name, universe_texts[uinfo->value.enumerated.item]);
  941. }
  942. else {
  943. uinfo->value.enumerated.items = 5;
  944. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  945. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  946. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  947. }
  948. return 0;
  949. }
  950. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  951. {
  952. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  953. unsigned short val;
  954. mutex_lock(&ice->gpio_mutex);
  955. val = wm_get(ice, WM_ADC_MUX);
  956. ucontrol->value.enumerated.item[0] = val & 7;
  957. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  958. mutex_unlock(&ice->gpio_mutex);
  959. return 0;
  960. }
  961. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  962. {
  963. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  964. unsigned short oval, nval;
  965. int change;
  966. snd_ice1712_save_gpio_status(ice);
  967. oval = wm_get(ice, WM_ADC_MUX);
  968. nval = oval & ~0x77;
  969. nval |= ucontrol->value.enumerated.item[0] & 7;
  970. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  971. change = (oval != nval);
  972. if (change)
  973. wm_put(ice, WM_ADC_MUX, nval);
  974. snd_ice1712_restore_gpio_status(ice);
  975. return change;
  976. }
  977. /*
  978. * CS8415 Input mux
  979. */
  980. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  981. {
  982. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  983. static const char * const aureon_texts[] = {
  984. "CD", //RXP0
  985. "Optical" //RXP1
  986. };
  987. static const char * const prodigy_texts[] = {
  988. "CD",
  989. "Coax"
  990. };
  991. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  992. uinfo->count = 1;
  993. uinfo->value.enumerated.items = 2;
  994. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  995. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  996. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  997. strcpy(uinfo->value.enumerated.name, prodigy_texts[uinfo->value.enumerated.item]);
  998. else
  999. strcpy(uinfo->value.enumerated.name, aureon_texts[uinfo->value.enumerated.item]);
  1000. return 0;
  1001. }
  1002. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1003. {
  1004. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1005. //snd_ice1712_save_gpio_status(ice);
  1006. //val = aureon_cs8415_get(ice, CS8415_CTRL2);
  1007. ucontrol->value.enumerated.item[0] = ice->spec.aureon.cs8415_mux;
  1008. //snd_ice1712_restore_gpio_status(ice);
  1009. return 0;
  1010. }
  1011. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1012. {
  1013. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1014. unsigned short oval, nval;
  1015. int change;
  1016. snd_ice1712_save_gpio_status(ice);
  1017. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1018. nval = oval & ~0x07;
  1019. nval |= ucontrol->value.enumerated.item[0] & 7;
  1020. change = (oval != nval);
  1021. if (change)
  1022. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1023. snd_ice1712_restore_gpio_status(ice);
  1024. ice->spec.aureon.cs8415_mux = ucontrol->value.enumerated.item[0];
  1025. return change;
  1026. }
  1027. static int aureon_cs8415_rate_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1028. {
  1029. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1030. uinfo->count = 1;
  1031. uinfo->value.integer.min = 0;
  1032. uinfo->value.integer.max = 192000;
  1033. return 0;
  1034. }
  1035. static int aureon_cs8415_rate_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1036. {
  1037. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1038. unsigned char ratio;
  1039. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1040. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1041. return 0;
  1042. }
  1043. /*
  1044. * CS8415A Mute
  1045. */
  1046. static int aureon_cs8415_mute_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1047. {
  1048. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1049. uinfo->count = 1;
  1050. return 0;
  1051. }
  1052. static int aureon_cs8415_mute_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1053. {
  1054. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1055. snd_ice1712_save_gpio_status(ice);
  1056. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1057. snd_ice1712_restore_gpio_status(ice);
  1058. return 0;
  1059. }
  1060. static int aureon_cs8415_mute_put (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1061. {
  1062. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1063. unsigned char oval, nval;
  1064. int change;
  1065. snd_ice1712_save_gpio_status(ice);
  1066. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1067. if (ucontrol->value.integer.value[0])
  1068. nval = oval & ~0x20;
  1069. else
  1070. nval = oval | 0x20;
  1071. if ((change = (oval != nval)))
  1072. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1073. snd_ice1712_restore_gpio_status(ice);
  1074. return change;
  1075. }
  1076. /*
  1077. * CS8415A Q-Sub info
  1078. */
  1079. static int aureon_cs8415_qsub_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1080. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1081. uinfo->count = 10;
  1082. return 0;
  1083. }
  1084. static int aureon_cs8415_qsub_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1085. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1086. snd_ice1712_save_gpio_status(ice);
  1087. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1088. snd_ice1712_restore_gpio_status(ice);
  1089. return 0;
  1090. }
  1091. static int aureon_cs8415_spdif_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1092. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1093. uinfo->count = 1;
  1094. return 0;
  1095. }
  1096. static int aureon_cs8415_mask_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1097. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1098. return 0;
  1099. }
  1100. static int aureon_cs8415_spdif_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1101. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1102. snd_ice1712_save_gpio_status(ice);
  1103. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1104. snd_ice1712_restore_gpio_status(ice);
  1105. return 0;
  1106. }
  1107. /*
  1108. * Headphone Amplifier
  1109. */
  1110. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1111. {
  1112. unsigned int tmp, tmp2;
  1113. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1114. if (enable)
  1115. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1116. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1117. tmp |= AUREON_HP_SEL;
  1118. else
  1119. tmp |= PRODIGY_HP_SEL;
  1120. else
  1121. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1122. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1123. tmp &= ~ AUREON_HP_SEL;
  1124. else
  1125. tmp &= ~ PRODIGY_HP_SEL;
  1126. if (tmp != tmp2) {
  1127. snd_ice1712_gpio_write(ice, tmp);
  1128. return 1;
  1129. }
  1130. return 0;
  1131. }
  1132. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1133. {
  1134. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1135. return ( tmp & AUREON_HP_SEL )!= 0;
  1136. }
  1137. #define aureon_hpamp_info aureon_mono_bool_info
  1138. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1139. {
  1140. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1141. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1142. return 0;
  1143. }
  1144. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1145. {
  1146. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1147. return aureon_set_headphone_amp(ice,ucontrol->value.integer.value[0]);
  1148. }
  1149. /*
  1150. * Deemphasis
  1151. */
  1152. #define aureon_deemp_info aureon_mono_bool_info
  1153. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1154. {
  1155. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1156. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1157. return 0;
  1158. }
  1159. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1160. {
  1161. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1162. int temp, temp2;
  1163. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1164. if (ucontrol->value.integer.value[0])
  1165. temp |= 0xf;
  1166. else
  1167. temp &= ~0xf;
  1168. if (temp != temp2) {
  1169. wm_put(ice, WM_DAC_CTRL2, temp);
  1170. return 1;
  1171. }
  1172. return 0;
  1173. }
  1174. /*
  1175. * ADC Oversampling
  1176. */
  1177. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1178. {
  1179. static const char * const texts[2] = { "128x", "64x" };
  1180. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1181. uinfo->count = 1;
  1182. uinfo->value.enumerated.items = 2;
  1183. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1184. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1185. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1186. return 0;
  1187. }
  1188. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1189. {
  1190. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1191. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1192. return 0;
  1193. }
  1194. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1195. {
  1196. int temp, temp2;
  1197. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1198. temp2 = temp = wm_get(ice, WM_MASTER);
  1199. if (ucontrol->value.enumerated.item[0])
  1200. temp |= 0x8;
  1201. else
  1202. temp &= ~0x8;
  1203. if (temp != temp2) {
  1204. wm_put(ice, WM_MASTER, temp);
  1205. return 1;
  1206. }
  1207. return 0;
  1208. }
  1209. /*
  1210. * mixers
  1211. */
  1212. static const struct snd_kcontrol_new aureon_dac_controls[] __devinitdata = {
  1213. {
  1214. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1215. .name = "Master Playback Switch",
  1216. .info = wm_master_mute_info,
  1217. .get = wm_master_mute_get,
  1218. .put = wm_master_mute_put
  1219. },
  1220. {
  1221. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1222. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1223. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1224. .name = "Master Playback Volume",
  1225. .info = wm_master_vol_info,
  1226. .get = wm_master_vol_get,
  1227. .put = wm_master_vol_put,
  1228. .tlv = { .p = db_scale_wm_dac }
  1229. },
  1230. {
  1231. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1232. .name = "Front Playback Switch",
  1233. .info = wm_mute_info,
  1234. .get = wm_mute_get,
  1235. .put = wm_mute_put,
  1236. .private_value = (2 << 8) | 0
  1237. },
  1238. {
  1239. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1240. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1241. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1242. .name = "Front Playback Volume",
  1243. .info = wm_vol_info,
  1244. .get = wm_vol_get,
  1245. .put = wm_vol_put,
  1246. .private_value = (2 << 8) | 0,
  1247. .tlv = { .p = db_scale_wm_dac }
  1248. },
  1249. {
  1250. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1251. .name = "Rear Playback Switch",
  1252. .info = wm_mute_info,
  1253. .get = wm_mute_get,
  1254. .put = wm_mute_put,
  1255. .private_value = (2 << 8) | 2
  1256. },
  1257. {
  1258. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1259. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1260. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1261. .name = "Rear Playback Volume",
  1262. .info = wm_vol_info,
  1263. .get = wm_vol_get,
  1264. .put = wm_vol_put,
  1265. .private_value = (2 << 8) | 2,
  1266. .tlv = { .p = db_scale_wm_dac }
  1267. },
  1268. {
  1269. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1270. .name = "Center Playback Switch",
  1271. .info = wm_mute_info,
  1272. .get = wm_mute_get,
  1273. .put = wm_mute_put,
  1274. .private_value = (1 << 8) | 4
  1275. },
  1276. {
  1277. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1278. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1279. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1280. .name = "Center Playback Volume",
  1281. .info = wm_vol_info,
  1282. .get = wm_vol_get,
  1283. .put = wm_vol_put,
  1284. .private_value = (1 << 8) | 4,
  1285. .tlv = { .p = db_scale_wm_dac }
  1286. },
  1287. {
  1288. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1289. .name = "LFE Playback Switch",
  1290. .info = wm_mute_info,
  1291. .get = wm_mute_get,
  1292. .put = wm_mute_put,
  1293. .private_value = (1 << 8) | 5
  1294. },
  1295. {
  1296. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1297. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1298. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1299. .name = "LFE Playback Volume",
  1300. .info = wm_vol_info,
  1301. .get = wm_vol_get,
  1302. .put = wm_vol_put,
  1303. .private_value = (1 << 8) | 5,
  1304. .tlv = { .p = db_scale_wm_dac }
  1305. },
  1306. {
  1307. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1308. .name = "Side Playback Switch",
  1309. .info = wm_mute_info,
  1310. .get = wm_mute_get,
  1311. .put = wm_mute_put,
  1312. .private_value = (2 << 8) | 6
  1313. },
  1314. {
  1315. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1316. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1317. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1318. .name = "Side Playback Volume",
  1319. .info = wm_vol_info,
  1320. .get = wm_vol_get,
  1321. .put = wm_vol_put,
  1322. .private_value = (2 << 8) | 6,
  1323. .tlv = { .p = db_scale_wm_dac }
  1324. }
  1325. };
  1326. static const struct snd_kcontrol_new wm_controls[] __devinitdata = {
  1327. {
  1328. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1329. .name = "PCM Playback Switch",
  1330. .info = wm_pcm_mute_info,
  1331. .get = wm_pcm_mute_get,
  1332. .put = wm_pcm_mute_put
  1333. },
  1334. {
  1335. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1336. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1337. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1338. .name = "PCM Playback Volume",
  1339. .info = wm_pcm_vol_info,
  1340. .get = wm_pcm_vol_get,
  1341. .put = wm_pcm_vol_put,
  1342. .tlv = { .p = db_scale_wm_pcm }
  1343. },
  1344. {
  1345. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1346. .name = "Capture Switch",
  1347. .info = wm_adc_mute_info,
  1348. .get = wm_adc_mute_get,
  1349. .put = wm_adc_mute_put,
  1350. },
  1351. {
  1352. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1353. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1354. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1355. .name = "Capture Volume",
  1356. .info = wm_adc_vol_info,
  1357. .get = wm_adc_vol_get,
  1358. .put = wm_adc_vol_put,
  1359. .tlv = { .p = db_scale_wm_adc }
  1360. },
  1361. {
  1362. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1363. .name = "Capture Source",
  1364. .info = wm_adc_mux_info,
  1365. .get = wm_adc_mux_get,
  1366. .put = wm_adc_mux_put,
  1367. .private_value = 5
  1368. },
  1369. {
  1370. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1371. .name = "External Amplifier",
  1372. .info = aureon_hpamp_info,
  1373. .get = aureon_hpamp_get,
  1374. .put = aureon_hpamp_put
  1375. },
  1376. {
  1377. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1378. .name = "DAC Deemphasis Switch",
  1379. .info = aureon_deemp_info,
  1380. .get = aureon_deemp_get,
  1381. .put = aureon_deemp_put
  1382. },
  1383. {
  1384. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1385. .name = "ADC Oversampling",
  1386. .info = aureon_oversampling_info,
  1387. .get = aureon_oversampling_get,
  1388. .put = aureon_oversampling_put
  1389. }
  1390. };
  1391. static const struct snd_kcontrol_new ac97_controls[] __devinitdata = {
  1392. {
  1393. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1394. .name = "AC97 Playback Switch",
  1395. .info = aureon_ac97_mmute_info,
  1396. .get = aureon_ac97_mmute_get,
  1397. .put = aureon_ac97_mmute_put,
  1398. .private_value = AC97_MASTER
  1399. },
  1400. {
  1401. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1402. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1403. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1404. .name = "AC97 Playback Volume",
  1405. .info = aureon_ac97_vol_info,
  1406. .get = aureon_ac97_vol_get,
  1407. .put = aureon_ac97_vol_put,
  1408. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1409. .tlv = { .p = db_scale_ac97_master }
  1410. },
  1411. {
  1412. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1413. .name = "CD Playback Switch",
  1414. .info = aureon_ac97_mute_info,
  1415. .get = aureon_ac97_mute_get,
  1416. .put = aureon_ac97_mute_put,
  1417. .private_value = AC97_CD
  1418. },
  1419. {
  1420. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1421. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1422. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1423. .name = "CD Playback Volume",
  1424. .info = aureon_ac97_vol_info,
  1425. .get = aureon_ac97_vol_get,
  1426. .put = aureon_ac97_vol_put,
  1427. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1428. .tlv = { .p = db_scale_ac97_gain }
  1429. },
  1430. {
  1431. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1432. .name = "Aux Playback Switch",
  1433. .info = aureon_ac97_mute_info,
  1434. .get = aureon_ac97_mute_get,
  1435. .put = aureon_ac97_mute_put,
  1436. .private_value = AC97_AUX,
  1437. },
  1438. {
  1439. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1440. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1441. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1442. .name = "Aux Playback Volume",
  1443. .info = aureon_ac97_vol_info,
  1444. .get = aureon_ac97_vol_get,
  1445. .put = aureon_ac97_vol_put,
  1446. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1447. .tlv = { .p = db_scale_ac97_gain }
  1448. },
  1449. {
  1450. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1451. .name = "Line Playback Switch",
  1452. .info = aureon_ac97_mute_info,
  1453. .get = aureon_ac97_mute_get,
  1454. .put = aureon_ac97_mute_put,
  1455. .private_value = AC97_LINE
  1456. },
  1457. {
  1458. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1459. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1460. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1461. .name = "Line Playback Volume",
  1462. .info = aureon_ac97_vol_info,
  1463. .get = aureon_ac97_vol_get,
  1464. .put = aureon_ac97_vol_put,
  1465. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1466. .tlv = { .p = db_scale_ac97_gain }
  1467. },
  1468. {
  1469. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1470. .name = "Mic Playback Switch",
  1471. .info = aureon_ac97_mute_info,
  1472. .get = aureon_ac97_mute_get,
  1473. .put = aureon_ac97_mute_put,
  1474. .private_value = AC97_MIC
  1475. },
  1476. {
  1477. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1478. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1479. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1480. .name = "Mic Playback Volume",
  1481. .info = aureon_ac97_vol_info,
  1482. .get = aureon_ac97_vol_get,
  1483. .put = aureon_ac97_vol_put,
  1484. .private_value = AC97_MIC,
  1485. .tlv = { .p = db_scale_ac97_gain }
  1486. },
  1487. {
  1488. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1489. .name = "Mic Boost (+20dB)",
  1490. .info = aureon_ac97_micboost_info,
  1491. .get = aureon_ac97_micboost_get,
  1492. .put = aureon_ac97_micboost_put
  1493. }
  1494. };
  1495. static const struct snd_kcontrol_new universe_ac97_controls[] __devinitdata = {
  1496. {
  1497. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1498. .name = "AC97 Playback Switch",
  1499. .info = aureon_ac97_mmute_info,
  1500. .get = aureon_ac97_mmute_get,
  1501. .put = aureon_ac97_mmute_put,
  1502. .private_value = AC97_MASTER
  1503. },
  1504. {
  1505. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1506. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1507. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1508. .name = "AC97 Playback Volume",
  1509. .info = aureon_ac97_vol_info,
  1510. .get = aureon_ac97_vol_get,
  1511. .put = aureon_ac97_vol_put,
  1512. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1513. .tlv = { .p = db_scale_ac97_master }
  1514. },
  1515. {
  1516. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1517. .name = "CD Playback Switch",
  1518. .info = aureon_ac97_mute_info,
  1519. .get = aureon_ac97_mute_get,
  1520. .put = aureon_ac97_mute_put,
  1521. .private_value = AC97_AUX
  1522. },
  1523. {
  1524. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1525. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1526. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1527. .name = "CD Playback Volume",
  1528. .info = aureon_ac97_vol_info,
  1529. .get = aureon_ac97_vol_get,
  1530. .put = aureon_ac97_vol_put,
  1531. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1532. .tlv = { .p = db_scale_ac97_gain }
  1533. },
  1534. {
  1535. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1536. .name = "Phono Playback Switch",
  1537. .info = aureon_ac97_mute_info,
  1538. .get = aureon_ac97_mute_get,
  1539. .put = aureon_ac97_mute_put,
  1540. .private_value = AC97_CD
  1541. },
  1542. {
  1543. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1544. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1545. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1546. .name = "Phono Playback Volume",
  1547. .info = aureon_ac97_vol_info,
  1548. .get = aureon_ac97_vol_get,
  1549. .put = aureon_ac97_vol_put,
  1550. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1551. .tlv = { .p = db_scale_ac97_gain }
  1552. },
  1553. {
  1554. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1555. .name = "Line Playback Switch",
  1556. .info = aureon_ac97_mute_info,
  1557. .get = aureon_ac97_mute_get,
  1558. .put = aureon_ac97_mute_put,
  1559. .private_value = AC97_LINE
  1560. },
  1561. {
  1562. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1563. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1564. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1565. .name = "Line Playback Volume",
  1566. .info = aureon_ac97_vol_info,
  1567. .get = aureon_ac97_vol_get,
  1568. .put = aureon_ac97_vol_put,
  1569. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1570. .tlv = { .p = db_scale_ac97_gain }
  1571. },
  1572. {
  1573. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1574. .name = "Mic Playback Switch",
  1575. .info = aureon_ac97_mute_info,
  1576. .get = aureon_ac97_mute_get,
  1577. .put = aureon_ac97_mute_put,
  1578. .private_value = AC97_MIC
  1579. },
  1580. {
  1581. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1582. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1583. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1584. .name = "Mic Playback Volume",
  1585. .info = aureon_ac97_vol_info,
  1586. .get = aureon_ac97_vol_get,
  1587. .put = aureon_ac97_vol_put,
  1588. .private_value = AC97_MIC,
  1589. .tlv = { .p = db_scale_ac97_gain }
  1590. },
  1591. {
  1592. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1593. .name = "Mic Boost (+20dB)",
  1594. .info = aureon_ac97_micboost_info,
  1595. .get = aureon_ac97_micboost_get,
  1596. .put = aureon_ac97_micboost_put
  1597. },
  1598. {
  1599. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1600. .name = "Aux Playback Switch",
  1601. .info = aureon_ac97_mute_info,
  1602. .get = aureon_ac97_mute_get,
  1603. .put = aureon_ac97_mute_put,
  1604. .private_value = AC97_VIDEO,
  1605. },
  1606. {
  1607. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1608. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1609. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1610. .name = "Aux Playback Volume",
  1611. .info = aureon_ac97_vol_info,
  1612. .get = aureon_ac97_vol_get,
  1613. .put = aureon_ac97_vol_put,
  1614. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1615. .tlv = { .p = db_scale_ac97_gain }
  1616. },
  1617. {
  1618. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1619. .name = "Aux Source",
  1620. .info = aureon_universe_inmux_info,
  1621. .get = aureon_universe_inmux_get,
  1622. .put = aureon_universe_inmux_put
  1623. }
  1624. };
  1625. static const struct snd_kcontrol_new cs8415_controls[] __devinitdata = {
  1626. {
  1627. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1628. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH),
  1629. .info = aureon_cs8415_mute_info,
  1630. .get = aureon_cs8415_mute_get,
  1631. .put = aureon_cs8415_mute_put
  1632. },
  1633. {
  1634. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1635. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Source",
  1636. .info = aureon_cs8415_mux_info,
  1637. .get = aureon_cs8415_mux_get,
  1638. .put = aureon_cs8415_mux_put,
  1639. },
  1640. {
  1641. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1642. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ",CAPTURE,DEFAULT),
  1643. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1644. .info = aureon_cs8415_qsub_info,
  1645. .get = aureon_cs8415_qsub_get,
  1646. },
  1647. {
  1648. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1649. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  1650. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1651. .info = aureon_cs8415_spdif_info,
  1652. .get = aureon_cs8415_mask_get
  1653. },
  1654. {
  1655. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1656. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  1657. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1658. .info = aureon_cs8415_spdif_info,
  1659. .get = aureon_cs8415_spdif_get
  1660. },
  1661. {
  1662. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1663. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Rate",
  1664. .access =SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1665. .info = aureon_cs8415_rate_info,
  1666. .get = aureon_cs8415_rate_get
  1667. }
  1668. };
  1669. static int __devinit aureon_add_controls(struct snd_ice1712 *ice)
  1670. {
  1671. unsigned int i, counts;
  1672. int err;
  1673. counts = ARRAY_SIZE(aureon_dac_controls);
  1674. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1675. counts -= 2; /* no side */
  1676. for (i = 0; i < counts; i++) {
  1677. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1678. if (err < 0)
  1679. return err;
  1680. }
  1681. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1682. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1683. if (err < 0)
  1684. return err;
  1685. }
  1686. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1687. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1688. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1689. if (err < 0)
  1690. return err;
  1691. }
  1692. }
  1693. else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1694. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1695. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1696. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1697. if (err < 0)
  1698. return err;
  1699. }
  1700. }
  1701. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1702. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1703. unsigned char id;
  1704. snd_ice1712_save_gpio_status(ice);
  1705. id = aureon_cs8415_get(ice, CS8415_ID);
  1706. if (id != 0x41)
  1707. snd_printk(KERN_INFO "No CS8415 chip. Skipping CS8415 controls.\n");
  1708. else if ((id & 0x0F) != 0x01)
  1709. snd_printk(KERN_INFO "Detected unsupported CS8415 rev. (%c)\n", (char)((id & 0x0F) + 'A' - 1));
  1710. else {
  1711. for (i = 0; i< ARRAY_SIZE(cs8415_controls); i++) {
  1712. struct snd_kcontrol *kctl;
  1713. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1714. if (err < 0)
  1715. return err;
  1716. if (i > 1)
  1717. kctl->id.device = ice->pcm->device;
  1718. }
  1719. }
  1720. snd_ice1712_restore_gpio_status(ice);
  1721. }
  1722. return 0;
  1723. }
  1724. /*
  1725. * initialize the chip
  1726. */
  1727. static int __devinit aureon_init(struct snd_ice1712 *ice)
  1728. {
  1729. static const unsigned short wm_inits_aureon[] = {
  1730. /* These come first to reduce init pop noise */
  1731. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1732. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1733. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1734. 0x18, 0x000, /* All power-up */
  1735. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1736. 0x17, 0x022, /* 256fs, slave mode */
  1737. 0x00, 0, /* DAC1 analog mute */
  1738. 0x01, 0, /* DAC2 analog mute */
  1739. 0x02, 0, /* DAC3 analog mute */
  1740. 0x03, 0, /* DAC4 analog mute */
  1741. 0x04, 0, /* DAC5 analog mute */
  1742. 0x05, 0, /* DAC6 analog mute */
  1743. 0x06, 0, /* DAC7 analog mute */
  1744. 0x07, 0, /* DAC8 analog mute */
  1745. 0x08, 0x100, /* master analog mute */
  1746. 0x09, 0xff, /* DAC1 digital full */
  1747. 0x0a, 0xff, /* DAC2 digital full */
  1748. 0x0b, 0xff, /* DAC3 digital full */
  1749. 0x0c, 0xff, /* DAC4 digital full */
  1750. 0x0d, 0xff, /* DAC5 digital full */
  1751. 0x0e, 0xff, /* DAC6 digital full */
  1752. 0x0f, 0xff, /* DAC7 digital full */
  1753. 0x10, 0xff, /* DAC8 digital full */
  1754. 0x11, 0x1ff, /* master digital full */
  1755. 0x12, 0x000, /* phase normal */
  1756. 0x13, 0x090, /* unmute DAC L/R */
  1757. 0x14, 0x000, /* all unmute */
  1758. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1759. 0x19, 0x000, /* -12dB ADC/L */
  1760. 0x1a, 0x000, /* -12dB ADC/R */
  1761. (unsigned short)-1
  1762. };
  1763. static const unsigned short wm_inits_prodigy[] = {
  1764. /* These come first to reduce init pop noise */
  1765. 0x1b, 0x000, /* ADC Mux */
  1766. 0x1c, 0x009, /* Out Mux1 */
  1767. 0x1d, 0x009, /* Out Mux2 */
  1768. 0x18, 0x000, /* All power-up */
  1769. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1770. 0x17, 0x006, /* 128fs, slave mode */
  1771. 0x00, 0, /* DAC1 analog mute */
  1772. 0x01, 0, /* DAC2 analog mute */
  1773. 0x02, 0, /* DAC3 analog mute */
  1774. 0x03, 0, /* DAC4 analog mute */
  1775. 0x04, 0, /* DAC5 analog mute */
  1776. 0x05, 0, /* DAC6 analog mute */
  1777. 0x06, 0, /* DAC7 analog mute */
  1778. 0x07, 0, /* DAC8 analog mute */
  1779. 0x08, 0x100, /* master analog mute */
  1780. 0x09, 0x7f, /* DAC1 digital full */
  1781. 0x0a, 0x7f, /* DAC2 digital full */
  1782. 0x0b, 0x7f, /* DAC3 digital full */
  1783. 0x0c, 0x7f, /* DAC4 digital full */
  1784. 0x0d, 0x7f, /* DAC5 digital full */
  1785. 0x0e, 0x7f, /* DAC6 digital full */
  1786. 0x0f, 0x7f, /* DAC7 digital full */
  1787. 0x10, 0x7f, /* DAC8 digital full */
  1788. 0x11, 0x1FF, /* master digital full */
  1789. 0x12, 0x000, /* phase normal */
  1790. 0x13, 0x090, /* unmute DAC L/R */
  1791. 0x14, 0x000, /* all unmute */
  1792. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1793. 0x19, 0x000, /* -12dB ADC/L */
  1794. 0x1a, 0x000, /* -12dB ADC/R */
  1795. (unsigned short)-1
  1796. };
  1797. static const unsigned short cs_inits[] = {
  1798. 0x0441, /* RUN */
  1799. 0x0180, /* no mute, OMCK output on RMCK pin */
  1800. 0x0201, /* S/PDIF source on RXP1 */
  1801. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1802. (unsigned short)-1
  1803. };
  1804. unsigned int tmp;
  1805. const unsigned short *p;
  1806. int err, i;
  1807. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1808. ice->num_total_dacs = 6;
  1809. ice->num_total_adcs = 2;
  1810. } else {
  1811. /* aureon 7.1 and prodigy 7.1 */
  1812. ice->num_total_dacs = 8;
  1813. ice->num_total_adcs = 2;
  1814. }
  1815. /* to remeber the register values of CS8415 */
  1816. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1817. if (! ice->akm)
  1818. return -ENOMEM;
  1819. ice->akm_codecs = 1;
  1820. if ((err = aureon_ac97_init(ice)) != 0)
  1821. return err;
  1822. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1823. /* reset the wm codec as the SPI mode */
  1824. snd_ice1712_save_gpio_status(ice);
  1825. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1826. tmp = snd_ice1712_gpio_read(ice);
  1827. tmp &= ~AUREON_WM_RESET;
  1828. snd_ice1712_gpio_write(ice, tmp);
  1829. udelay(1);
  1830. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1831. snd_ice1712_gpio_write(ice, tmp);
  1832. udelay(1);
  1833. tmp |= AUREON_WM_RESET;
  1834. snd_ice1712_gpio_write(ice, tmp);
  1835. udelay(1);
  1836. /* initialize WM8770 codec */
  1837. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1838. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  1839. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
  1840. p = wm_inits_prodigy;
  1841. else
  1842. p = wm_inits_aureon;
  1843. for (; *p != (unsigned short)-1; p += 2)
  1844. wm_put(ice, p[0], p[1]);
  1845. /* initialize CS8415A codec */
  1846. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1847. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1848. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1849. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1850. ice->spec.aureon.cs8415_mux = 1;
  1851. aureon_set_headphone_amp(ice, 1);
  1852. }
  1853. snd_ice1712_restore_gpio_status(ice);
  1854. /* initialize PCA9554 pin directions & set default input*/
  1855. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1856. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1857. ice->spec.aureon.master[0] = WM_VOL_MUTE;
  1858. ice->spec.aureon.master[1] = WM_VOL_MUTE;
  1859. for (i = 0; i < ice->num_total_dacs; i++) {
  1860. ice->spec.aureon.vol[i] = WM_VOL_MUTE;
  1861. wm_set_vol(ice, i, ice->spec.aureon.vol[i], ice->spec.aureon.master[i % 2]);
  1862. }
  1863. return 0;
  1864. }
  1865. /*
  1866. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1867. * hence the driver needs to sets up it properly.
  1868. */
  1869. static const unsigned char aureon51_eeprom[] __devinitdata = {
  1870. [ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
  1871. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1872. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1873. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1874. [ICE_EEP2_GPIO_DIR] = 0xff,
  1875. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1876. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1877. [ICE_EEP2_GPIO_MASK] = 0x00,
  1878. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1879. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1880. [ICE_EEP2_GPIO_STATE] = 0x00,
  1881. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1882. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1883. };
  1884. static const unsigned char aureon71_eeprom[] __devinitdata = {
  1885. [ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
  1886. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1887. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1888. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1889. [ICE_EEP2_GPIO_DIR] = 0xff,
  1890. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1891. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1892. [ICE_EEP2_GPIO_MASK] = 0x00,
  1893. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1894. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1895. [ICE_EEP2_GPIO_STATE] = 0x00,
  1896. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1897. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1898. };
  1899. #define prodigy71_eeprom aureon71_eeprom
  1900. static const unsigned char prodigy71lt_eeprom[] __devinitdata = {
  1901. [ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
  1902. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1903. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1904. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1905. [ICE_EEP2_GPIO_DIR] = 0xff,
  1906. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1907. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1908. [ICE_EEP2_GPIO_MASK] = 0x00,
  1909. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1910. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1911. [ICE_EEP2_GPIO_STATE] = 0x00,
  1912. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1913. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1914. };
  1915. #define prodigy71xt_eeprom prodigy71lt_eeprom
  1916. /* entry point */
  1917. const struct snd_ice1712_card_info snd_vt1724_aureon_cards[] __devinitdata = {
  1918. {
  1919. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  1920. .name = "Terratec Aureon 5.1-Sky",
  1921. .model = "aureon51",
  1922. .chip_init = aureon_init,
  1923. .build_controls = aureon_add_controls,
  1924. .eeprom_size = sizeof(aureon51_eeprom),
  1925. .eeprom_data = aureon51_eeprom,
  1926. .driver = "Aureon51",
  1927. },
  1928. {
  1929. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  1930. .name = "Terratec Aureon 7.1-Space",
  1931. .model = "aureon71",
  1932. .chip_init = aureon_init,
  1933. .build_controls = aureon_add_controls,
  1934. .eeprom_size = sizeof(aureon71_eeprom),
  1935. .eeprom_data = aureon71_eeprom,
  1936. .driver = "Aureon71",
  1937. },
  1938. {
  1939. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  1940. .name = "Terratec Aureon 7.1-Universe",
  1941. .model = "universe",
  1942. .chip_init = aureon_init,
  1943. .build_controls = aureon_add_controls,
  1944. .eeprom_size = sizeof(aureon71_eeprom),
  1945. .eeprom_data = aureon71_eeprom,
  1946. .driver = "Aureon71Univ", /* keep in 15 letters */
  1947. },
  1948. {
  1949. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  1950. .name = "Audiotrak Prodigy 7.1",
  1951. .model = "prodigy71",
  1952. .chip_init = aureon_init,
  1953. .build_controls = aureon_add_controls,
  1954. .eeprom_size = sizeof(prodigy71_eeprom),
  1955. .eeprom_data = prodigy71_eeprom,
  1956. .driver = "Prodigy71", /* should be identical with Aureon71 */
  1957. },
  1958. {
  1959. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  1960. .name = "Audiotrak Prodigy 7.1 LT",
  1961. .model = "prodigy71lt",
  1962. .chip_init = aureon_init,
  1963. .build_controls = aureon_add_controls,
  1964. .eeprom_size = sizeof(prodigy71lt_eeprom),
  1965. .eeprom_data = prodigy71lt_eeprom,
  1966. .driver = "Prodigy71LT",
  1967. },
  1968. {
  1969. .subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
  1970. .name = "Audiotrak Prodigy 7.1 XT",
  1971. .model = "prodigy71xt",
  1972. .chip_init = aureon_init,
  1973. .build_controls = aureon_add_controls,
  1974. .eeprom_size = sizeof(prodigy71xt_eeprom),
  1975. .eeprom_data = prodigy71xt_eeprom,
  1976. .driver = "Prodigy71LT",
  1977. },
  1978. { } /* terminator */
  1979. };