es1938.c 55 KB

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  1. /*
  2. * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
  3. * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
  4. * Jaroslav Kysela <perex@suse.cz>,
  5. * Thomas Sailer <sailer@ife.ee.ethz.ch>,
  6. * Abramo Bagnara <abramo@alsa-project.org>,
  7. * Markus Gruber <gruber@eikon.tum.de>
  8. *
  9. * Rewritten from sonicvibes.c source.
  10. *
  11. * TODO:
  12. * Rewrite better spinlocks
  13. *
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  28. *
  29. */
  30. /*
  31. NOTES:
  32. - Capture data is written unaligned starting from dma_base + 1 so I need to
  33. disable mmap and to add a copy callback.
  34. - After several cycle of the following:
  35. while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
  36. a "playback write error (DMA or IRQ trouble?)" may happen.
  37. This is due to playback interrupts not generated.
  38. I suspect a timing issue.
  39. - Sometimes the interrupt handler is invoked wrongly during playback.
  40. This generates some harmless "Unexpected hw_pointer: wrong interrupt
  41. acknowledge".
  42. I've seen that using small period sizes.
  43. Reproducible with:
  44. mpg123 test.mp3 &
  45. hdparm -t -T /dev/hda
  46. */
  47. #include <sound/driver.h>
  48. #include <linux/init.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/pci.h>
  51. #include <linux/slab.h>
  52. #include <linux/gameport.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/delay.h>
  55. #include <linux/dma-mapping.h>
  56. #include <sound/core.h>
  57. #include <sound/control.h>
  58. #include <sound/pcm.h>
  59. #include <sound/opl3.h>
  60. #include <sound/mpu401.h>
  61. #include <sound/initval.h>
  62. #include <sound/tlv.h>
  63. #include <asm/io.h>
  64. MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
  65. MODULE_DESCRIPTION("ESS Solo-1");
  66. MODULE_LICENSE("GPL");
  67. MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
  68. "{ESS,ES1946},"
  69. "{ESS,ES1969},"
  70. "{TerraTec,128i PCI}}");
  71. #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
  72. #define SUPPORT_JOYSTICK 1
  73. #endif
  74. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  75. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  76. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  77. module_param_array(index, int, NULL, 0444);
  78. MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
  79. module_param_array(id, charp, NULL, 0444);
  80. MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
  81. module_param_array(enable, bool, NULL, 0444);
  82. MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
  83. #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
  84. #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
  85. #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
  86. #define SL_PCI_LEGACYCONTROL 0x40
  87. #define SL_PCI_CONFIG 0x50
  88. #define SL_PCI_DDMACONTROL 0x60
  89. #define ESSIO_REG_AUDIO2DMAADDR 0
  90. #define ESSIO_REG_AUDIO2DMACOUNT 4
  91. #define ESSIO_REG_AUDIO2MODE 6
  92. #define ESSIO_REG_IRQCONTROL 7
  93. #define ESSDM_REG_DMAADDR 0x00
  94. #define ESSDM_REG_DMACOUNT 0x04
  95. #define ESSDM_REG_DMACOMMAND 0x08
  96. #define ESSDM_REG_DMASTATUS 0x08
  97. #define ESSDM_REG_DMAMODE 0x0b
  98. #define ESSDM_REG_DMACLEAR 0x0d
  99. #define ESSDM_REG_DMAMASK 0x0f
  100. #define ESSSB_REG_FMLOWADDR 0x00
  101. #define ESSSB_REG_FMHIGHADDR 0x02
  102. #define ESSSB_REG_MIXERADDR 0x04
  103. #define ESSSB_REG_MIXERDATA 0x05
  104. #define ESSSB_IREG_AUDIO1 0x14
  105. #define ESSSB_IREG_MICMIX 0x1a
  106. #define ESSSB_IREG_RECSRC 0x1c
  107. #define ESSSB_IREG_MASTER 0x32
  108. #define ESSSB_IREG_FM 0x36
  109. #define ESSSB_IREG_AUXACD 0x38
  110. #define ESSSB_IREG_AUXB 0x3a
  111. #define ESSSB_IREG_PCSPEAKER 0x3c
  112. #define ESSSB_IREG_LINE 0x3e
  113. #define ESSSB_IREG_SPATCONTROL 0x50
  114. #define ESSSB_IREG_SPATLEVEL 0x52
  115. #define ESSSB_IREG_MASTER_LEFT 0x60
  116. #define ESSSB_IREG_MASTER_RIGHT 0x62
  117. #define ESSSB_IREG_MPU401CONTROL 0x64
  118. #define ESSSB_IREG_MICMIXRECORD 0x68
  119. #define ESSSB_IREG_AUDIO2RECORD 0x69
  120. #define ESSSB_IREG_AUXACDRECORD 0x6a
  121. #define ESSSB_IREG_FMRECORD 0x6b
  122. #define ESSSB_IREG_AUXBRECORD 0x6c
  123. #define ESSSB_IREG_MONO 0x6d
  124. #define ESSSB_IREG_LINERECORD 0x6e
  125. #define ESSSB_IREG_MONORECORD 0x6f
  126. #define ESSSB_IREG_AUDIO2SAMPLE 0x70
  127. #define ESSSB_IREG_AUDIO2MODE 0x71
  128. #define ESSSB_IREG_AUDIO2FILTER 0x72
  129. #define ESSSB_IREG_AUDIO2TCOUNTL 0x74
  130. #define ESSSB_IREG_AUDIO2TCOUNTH 0x76
  131. #define ESSSB_IREG_AUDIO2CONTROL1 0x78
  132. #define ESSSB_IREG_AUDIO2CONTROL2 0x7a
  133. #define ESSSB_IREG_AUDIO2 0x7c
  134. #define ESSSB_REG_RESET 0x06
  135. #define ESSSB_REG_READDATA 0x0a
  136. #define ESSSB_REG_WRITEDATA 0x0c
  137. #define ESSSB_REG_READSTATUS 0x0c
  138. #define ESSSB_REG_STATUS 0x0e
  139. #define ESS_CMD_EXTSAMPLERATE 0xa1
  140. #define ESS_CMD_FILTERDIV 0xa2
  141. #define ESS_CMD_DMACNTRELOADL 0xa4
  142. #define ESS_CMD_DMACNTRELOADH 0xa5
  143. #define ESS_CMD_ANALOGCONTROL 0xa8
  144. #define ESS_CMD_IRQCONTROL 0xb1
  145. #define ESS_CMD_DRQCONTROL 0xb2
  146. #define ESS_CMD_RECLEVEL 0xb4
  147. #define ESS_CMD_SETFORMAT 0xb6
  148. #define ESS_CMD_SETFORMAT2 0xb7
  149. #define ESS_CMD_DMACONTROL 0xb8
  150. #define ESS_CMD_DMATYPE 0xb9
  151. #define ESS_CMD_OFFSETLEFT 0xba
  152. #define ESS_CMD_OFFSETRIGHT 0xbb
  153. #define ESS_CMD_READREG 0xc0
  154. #define ESS_CMD_ENABLEEXT 0xc6
  155. #define ESS_CMD_PAUSEDMA 0xd0
  156. #define ESS_CMD_ENABLEAUDIO1 0xd1
  157. #define ESS_CMD_STOPAUDIO1 0xd3
  158. #define ESS_CMD_AUDIO1STATUS 0xd8
  159. #define ESS_CMD_CONTDMA 0xd4
  160. #define ESS_CMD_TESTIRQ 0xf2
  161. #define ESS_RECSRC_MIC 0
  162. #define ESS_RECSRC_AUXACD 2
  163. #define ESS_RECSRC_AUXB 5
  164. #define ESS_RECSRC_LINE 6
  165. #define ESS_RECSRC_NONE 7
  166. #define DAC1 0x01
  167. #define ADC1 0x02
  168. #define DAC2 0x04
  169. /*
  170. */
  171. #define SAVED_REG_SIZE 32 /* max. number of registers to save */
  172. struct es1938 {
  173. int irq;
  174. unsigned long io_port;
  175. unsigned long sb_port;
  176. unsigned long vc_port;
  177. unsigned long mpu_port;
  178. unsigned long game_port;
  179. unsigned long ddma_port;
  180. unsigned char irqmask;
  181. unsigned char revision;
  182. struct snd_kcontrol *hw_volume;
  183. struct snd_kcontrol *hw_switch;
  184. struct snd_kcontrol *master_volume;
  185. struct snd_kcontrol *master_switch;
  186. struct pci_dev *pci;
  187. struct snd_card *card;
  188. struct snd_pcm *pcm;
  189. struct snd_pcm_substream *capture_substream;
  190. struct snd_pcm_substream *playback1_substream;
  191. struct snd_pcm_substream *playback2_substream;
  192. struct snd_rawmidi *rmidi;
  193. unsigned int dma1_size;
  194. unsigned int dma2_size;
  195. unsigned int dma1_start;
  196. unsigned int dma2_start;
  197. unsigned int dma1_shift;
  198. unsigned int dma2_shift;
  199. unsigned int active;
  200. spinlock_t reg_lock;
  201. spinlock_t mixer_lock;
  202. struct snd_info_entry *proc_entry;
  203. #ifdef SUPPORT_JOYSTICK
  204. struct gameport *gameport;
  205. #endif
  206. #ifdef CONFIG_PM
  207. unsigned char saved_regs[SAVED_REG_SIZE];
  208. #endif
  209. };
  210. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
  211. static struct pci_device_id snd_es1938_ids[] = {
  212. { 0x125d, 0x1969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Solo-1 */
  213. { 0, }
  214. };
  215. MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
  216. #define RESET_LOOP_TIMEOUT 0x10000
  217. #define WRITE_LOOP_TIMEOUT 0x10000
  218. #define GET_LOOP_TIMEOUT 0x01000
  219. #undef REG_DEBUG
  220. /* -----------------------------------------------------------------
  221. * Write to a mixer register
  222. * -----------------------------------------------------------------*/
  223. static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
  224. {
  225. unsigned long flags;
  226. spin_lock_irqsave(&chip->mixer_lock, flags);
  227. outb(reg, SLSB_REG(chip, MIXERADDR));
  228. outb(val, SLSB_REG(chip, MIXERDATA));
  229. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  230. #ifdef REG_DEBUG
  231. snd_printk(KERN_DEBUG "Mixer reg %02x set to %02x\n", reg, val);
  232. #endif
  233. }
  234. /* -----------------------------------------------------------------
  235. * Read from a mixer register
  236. * -----------------------------------------------------------------*/
  237. static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
  238. {
  239. int data;
  240. unsigned long flags;
  241. spin_lock_irqsave(&chip->mixer_lock, flags);
  242. outb(reg, SLSB_REG(chip, MIXERADDR));
  243. data = inb(SLSB_REG(chip, MIXERDATA));
  244. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  245. #ifdef REG_DEBUG
  246. snd_printk(KERN_DEBUG "Mixer reg %02x now is %02x\n", reg, data);
  247. #endif
  248. return data;
  249. }
  250. /* -----------------------------------------------------------------
  251. * Write to some bits of a mixer register (return old value)
  252. * -----------------------------------------------------------------*/
  253. static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
  254. unsigned char mask, unsigned char val)
  255. {
  256. unsigned long flags;
  257. unsigned char old, new, oval;
  258. spin_lock_irqsave(&chip->mixer_lock, flags);
  259. outb(reg, SLSB_REG(chip, MIXERADDR));
  260. old = inb(SLSB_REG(chip, MIXERDATA));
  261. oval = old & mask;
  262. if (val != oval) {
  263. new = (old & ~mask) | (val & mask);
  264. outb(new, SLSB_REG(chip, MIXERDATA));
  265. #ifdef REG_DEBUG
  266. snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x\n",
  267. reg, old, new);
  268. #endif
  269. }
  270. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  271. return oval;
  272. }
  273. /* -----------------------------------------------------------------
  274. * Write command to Controller Registers
  275. * -----------------------------------------------------------------*/
  276. static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
  277. {
  278. int i;
  279. unsigned char v;
  280. for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
  281. if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
  282. outb(cmd, SLSB_REG(chip, WRITEDATA));
  283. return;
  284. }
  285. }
  286. printk(KERN_ERR "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
  287. }
  288. /* -----------------------------------------------------------------
  289. * Read the Read Data Buffer
  290. * -----------------------------------------------------------------*/
  291. static int snd_es1938_get_byte(struct es1938 *chip)
  292. {
  293. int i;
  294. unsigned char v;
  295. for (i = GET_LOOP_TIMEOUT; i; i--)
  296. if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
  297. return inb(SLSB_REG(chip, READDATA));
  298. snd_printk(KERN_ERR "get_byte timeout: status 0x02%x\n", v);
  299. return -ENODEV;
  300. }
  301. /* -----------------------------------------------------------------
  302. * Write value cmd register
  303. * -----------------------------------------------------------------*/
  304. static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
  305. {
  306. unsigned long flags;
  307. spin_lock_irqsave(&chip->reg_lock, flags);
  308. snd_es1938_write_cmd(chip, reg);
  309. snd_es1938_write_cmd(chip, val);
  310. spin_unlock_irqrestore(&chip->reg_lock, flags);
  311. #ifdef REG_DEBUG
  312. snd_printk(KERN_DEBUG "Reg %02x set to %02x\n", reg, val);
  313. #endif
  314. }
  315. /* -----------------------------------------------------------------
  316. * Read data from cmd register and return it
  317. * -----------------------------------------------------------------*/
  318. static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
  319. {
  320. unsigned char val;
  321. unsigned long flags;
  322. spin_lock_irqsave(&chip->reg_lock, flags);
  323. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  324. snd_es1938_write_cmd(chip, reg);
  325. val = snd_es1938_get_byte(chip);
  326. spin_unlock_irqrestore(&chip->reg_lock, flags);
  327. #ifdef REG_DEBUG
  328. snd_printk(KERN_DEBUG "Reg %02x now is %02x\n", reg, val);
  329. #endif
  330. return val;
  331. }
  332. /* -----------------------------------------------------------------
  333. * Write data to cmd register and return old value
  334. * -----------------------------------------------------------------*/
  335. static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
  336. unsigned char val)
  337. {
  338. unsigned long flags;
  339. unsigned char old, new, oval;
  340. spin_lock_irqsave(&chip->reg_lock, flags);
  341. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  342. snd_es1938_write_cmd(chip, reg);
  343. old = snd_es1938_get_byte(chip);
  344. oval = old & mask;
  345. if (val != oval) {
  346. snd_es1938_write_cmd(chip, reg);
  347. new = (old & ~mask) | (val & mask);
  348. snd_es1938_write_cmd(chip, new);
  349. #ifdef REG_DEBUG
  350. snd_printk(KERN_DEBUG "Reg %02x was %02x, set to %02x\n",
  351. reg, old, new);
  352. #endif
  353. }
  354. spin_unlock_irqrestore(&chip->reg_lock, flags);
  355. return oval;
  356. }
  357. /* --------------------------------------------------------------------
  358. * Reset the chip
  359. * --------------------------------------------------------------------*/
  360. static void snd_es1938_reset(struct es1938 *chip)
  361. {
  362. int i;
  363. outb(3, SLSB_REG(chip, RESET));
  364. inb(SLSB_REG(chip, RESET));
  365. outb(0, SLSB_REG(chip, RESET));
  366. for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
  367. if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
  368. if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
  369. goto __next;
  370. }
  371. }
  372. snd_printk(KERN_ERR "ESS Solo-1 reset failed\n");
  373. __next:
  374. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
  375. /* Demand transfer DMA: 4 bytes per DMA request */
  376. snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
  377. /* Change behaviour of register A1
  378. 4x oversampling
  379. 2nd channel DAC asynchronous */
  380. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
  381. /* enable/select DMA channel and IRQ channel */
  382. snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
  383. snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
  384. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
  385. /* Set spatializer parameters to recommended values */
  386. snd_es1938_mixer_write(chip, 0x54, 0x8f);
  387. snd_es1938_mixer_write(chip, 0x56, 0x95);
  388. snd_es1938_mixer_write(chip, 0x58, 0x94);
  389. snd_es1938_mixer_write(chip, 0x5a, 0x80);
  390. }
  391. /* --------------------------------------------------------------------
  392. * Reset the FIFOs
  393. * --------------------------------------------------------------------*/
  394. static void snd_es1938_reset_fifo(struct es1938 *chip)
  395. {
  396. outb(2, SLSB_REG(chip, RESET));
  397. outb(0, SLSB_REG(chip, RESET));
  398. }
  399. static struct snd_ratnum clocks[2] = {
  400. {
  401. .num = 793800,
  402. .den_min = 1,
  403. .den_max = 128,
  404. .den_step = 1,
  405. },
  406. {
  407. .num = 768000,
  408. .den_min = 1,
  409. .den_max = 128,
  410. .den_step = 1,
  411. }
  412. };
  413. static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
  414. .nrats = 2,
  415. .rats = clocks,
  416. };
  417. static void snd_es1938_rate_set(struct es1938 *chip,
  418. struct snd_pcm_substream *substream,
  419. int mode)
  420. {
  421. unsigned int bits, div0;
  422. struct snd_pcm_runtime *runtime = substream->runtime;
  423. if (runtime->rate_num == clocks[0].num)
  424. bits = 128 - runtime->rate_den;
  425. else
  426. bits = 256 - runtime->rate_den;
  427. /* set filter register */
  428. div0 = 256 - 7160000*20/(8*82*runtime->rate);
  429. if (mode == DAC2) {
  430. snd_es1938_mixer_write(chip, 0x70, bits);
  431. snd_es1938_mixer_write(chip, 0x72, div0);
  432. } else {
  433. snd_es1938_write(chip, 0xA1, bits);
  434. snd_es1938_write(chip, 0xA2, div0);
  435. }
  436. }
  437. /* --------------------------------------------------------------------
  438. * Configure Solo1 builtin DMA Controller
  439. * --------------------------------------------------------------------*/
  440. static void snd_es1938_playback1_setdma(struct es1938 *chip)
  441. {
  442. outb(0x00, SLIO_REG(chip, AUDIO2MODE));
  443. outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
  444. outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
  445. outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
  446. }
  447. static void snd_es1938_playback2_setdma(struct es1938 *chip)
  448. {
  449. /* Enable DMA controller */
  450. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  451. /* 1. Master reset */
  452. outb(0, SLDM_REG(chip, DMACLEAR));
  453. /* 2. Mask DMA */
  454. outb(1, SLDM_REG(chip, DMAMASK));
  455. outb(0x18, SLDM_REG(chip, DMAMODE));
  456. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  457. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  458. /* 3. Unmask DMA */
  459. outb(0, SLDM_REG(chip, DMAMASK));
  460. }
  461. static void snd_es1938_capture_setdma(struct es1938 *chip)
  462. {
  463. /* Enable DMA controller */
  464. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  465. /* 1. Master reset */
  466. outb(0, SLDM_REG(chip, DMACLEAR));
  467. /* 2. Mask DMA */
  468. outb(1, SLDM_REG(chip, DMAMASK));
  469. outb(0x14, SLDM_REG(chip, DMAMODE));
  470. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  471. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  472. /* 3. Unmask DMA */
  473. outb(0, SLDM_REG(chip, DMAMASK));
  474. }
  475. /* ----------------------------------------------------------------------
  476. *
  477. * *** PCM part ***
  478. */
  479. static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
  480. int cmd)
  481. {
  482. struct es1938 *chip = snd_pcm_substream_chip(substream);
  483. int val;
  484. switch (cmd) {
  485. case SNDRV_PCM_TRIGGER_START:
  486. case SNDRV_PCM_TRIGGER_RESUME:
  487. val = 0x0f;
  488. chip->active |= ADC1;
  489. break;
  490. case SNDRV_PCM_TRIGGER_STOP:
  491. case SNDRV_PCM_TRIGGER_SUSPEND:
  492. val = 0x00;
  493. chip->active &= ~ADC1;
  494. break;
  495. default:
  496. return -EINVAL;
  497. }
  498. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  499. return 0;
  500. }
  501. static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
  502. int cmd)
  503. {
  504. struct es1938 *chip = snd_pcm_substream_chip(substream);
  505. switch (cmd) {
  506. case SNDRV_PCM_TRIGGER_START:
  507. case SNDRV_PCM_TRIGGER_RESUME:
  508. /* According to the documentation this should be:
  509. 0x13 but that value may randomly swap stereo channels */
  510. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
  511. udelay(10);
  512. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
  513. /* This two stage init gives the FIFO -> DAC connection time to
  514. * settle before first data from DMA flows in. This should ensure
  515. * no swapping of stereo channels. Report a bug if otherwise :-) */
  516. outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
  517. chip->active |= DAC2;
  518. break;
  519. case SNDRV_PCM_TRIGGER_STOP:
  520. case SNDRV_PCM_TRIGGER_SUSPEND:
  521. outb(0, SLIO_REG(chip, AUDIO2MODE));
  522. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
  523. chip->active &= ~DAC2;
  524. break;
  525. default:
  526. return -EINVAL;
  527. }
  528. return 0;
  529. }
  530. static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
  531. int cmd)
  532. {
  533. struct es1938 *chip = snd_pcm_substream_chip(substream);
  534. int val;
  535. switch (cmd) {
  536. case SNDRV_PCM_TRIGGER_START:
  537. case SNDRV_PCM_TRIGGER_RESUME:
  538. val = 5;
  539. chip->active |= DAC1;
  540. break;
  541. case SNDRV_PCM_TRIGGER_STOP:
  542. case SNDRV_PCM_TRIGGER_SUSPEND:
  543. val = 0;
  544. chip->active &= ~DAC1;
  545. break;
  546. default:
  547. return -EINVAL;
  548. }
  549. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  550. return 0;
  551. }
  552. static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
  553. int cmd)
  554. {
  555. switch (substream->number) {
  556. case 0:
  557. return snd_es1938_playback1_trigger(substream, cmd);
  558. case 1:
  559. return snd_es1938_playback2_trigger(substream, cmd);
  560. }
  561. snd_BUG();
  562. return -EINVAL;
  563. }
  564. /* --------------------------------------------------------------------
  565. * First channel for Extended Mode Audio 1 ADC Operation
  566. * --------------------------------------------------------------------*/
  567. static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
  568. {
  569. struct es1938 *chip = snd_pcm_substream_chip(substream);
  570. struct snd_pcm_runtime *runtime = substream->runtime;
  571. int u, is8, mono;
  572. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  573. unsigned int count = snd_pcm_lib_period_bytes(substream);
  574. chip->dma1_size = size;
  575. chip->dma1_start = runtime->dma_addr;
  576. mono = (runtime->channels > 1) ? 0 : 1;
  577. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  578. u = snd_pcm_format_unsigned(runtime->format);
  579. chip->dma1_shift = 2 - mono - is8;
  580. snd_es1938_reset_fifo(chip);
  581. /* program type */
  582. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  583. /* set clock and counters */
  584. snd_es1938_rate_set(chip, substream, ADC1);
  585. count = 0x10000 - count;
  586. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  587. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  588. /* initialize and configure ADC */
  589. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
  590. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
  591. (u ? 0x00 : 0x20) |
  592. (is8 ? 0x00 : 0x04) |
  593. (mono ? 0x40 : 0x08));
  594. // snd_es1938_reset_fifo(chip);
  595. /* 11. configure system interrupt controller and DMA controller */
  596. snd_es1938_capture_setdma(chip);
  597. return 0;
  598. }
  599. /* ------------------------------------------------------------------------------
  600. * Second Audio channel DAC Operation
  601. * ------------------------------------------------------------------------------*/
  602. static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
  603. {
  604. struct es1938 *chip = snd_pcm_substream_chip(substream);
  605. struct snd_pcm_runtime *runtime = substream->runtime;
  606. int u, is8, mono;
  607. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  608. unsigned int count = snd_pcm_lib_period_bytes(substream);
  609. chip->dma2_size = size;
  610. chip->dma2_start = runtime->dma_addr;
  611. mono = (runtime->channels > 1) ? 0 : 1;
  612. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  613. u = snd_pcm_format_unsigned(runtime->format);
  614. chip->dma2_shift = 2 - mono - is8;
  615. snd_es1938_reset_fifo(chip);
  616. /* set clock and counters */
  617. snd_es1938_rate_set(chip, substream, DAC2);
  618. count >>= 1;
  619. count = 0x10000 - count;
  620. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
  621. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
  622. /* initialize and configure Audio 2 DAC */
  623. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
  624. (mono ? 0 : 2) | (is8 ? 0 : 1));
  625. /* program DMA */
  626. snd_es1938_playback1_setdma(chip);
  627. return 0;
  628. }
  629. static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
  630. {
  631. struct es1938 *chip = snd_pcm_substream_chip(substream);
  632. struct snd_pcm_runtime *runtime = substream->runtime;
  633. int u, is8, mono;
  634. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  635. unsigned int count = snd_pcm_lib_period_bytes(substream);
  636. chip->dma1_size = size;
  637. chip->dma1_start = runtime->dma_addr;
  638. mono = (runtime->channels > 1) ? 0 : 1;
  639. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  640. u = snd_pcm_format_unsigned(runtime->format);
  641. chip->dma1_shift = 2 - mono - is8;
  642. count = 0x10000 - count;
  643. /* reset */
  644. snd_es1938_reset_fifo(chip);
  645. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  646. /* set clock and counters */
  647. snd_es1938_rate_set(chip, substream, DAC1);
  648. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  649. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  650. /* initialized and configure DAC */
  651. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
  652. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
  653. snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
  654. 0x90 | (mono ? 0x40 : 0x08) |
  655. (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
  656. /* program DMA */
  657. snd_es1938_playback2_setdma(chip);
  658. return 0;
  659. }
  660. static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
  661. {
  662. switch (substream->number) {
  663. case 0:
  664. return snd_es1938_playback1_prepare(substream);
  665. case 1:
  666. return snd_es1938_playback2_prepare(substream);
  667. }
  668. snd_BUG();
  669. return -EINVAL;
  670. }
  671. static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
  672. {
  673. struct es1938 *chip = snd_pcm_substream_chip(substream);
  674. size_t ptr;
  675. size_t old, new;
  676. #if 1
  677. /* This stuff is *needed*, don't ask why - AB */
  678. old = inw(SLDM_REG(chip, DMACOUNT));
  679. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  680. old = new;
  681. ptr = chip->dma1_size - 1 - new;
  682. #else
  683. ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
  684. #endif
  685. return ptr >> chip->dma1_shift;
  686. }
  687. static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
  688. {
  689. struct es1938 *chip = snd_pcm_substream_chip(substream);
  690. size_t ptr;
  691. #if 1
  692. ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
  693. #else
  694. ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
  695. #endif
  696. return ptr >> chip->dma2_shift;
  697. }
  698. static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
  699. {
  700. struct es1938 *chip = snd_pcm_substream_chip(substream);
  701. size_t ptr;
  702. size_t old, new;
  703. #if 1
  704. /* This stuff is *needed*, don't ask why - AB */
  705. old = inw(SLDM_REG(chip, DMACOUNT));
  706. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  707. old = new;
  708. ptr = chip->dma1_size - 1 - new;
  709. #else
  710. ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
  711. #endif
  712. return ptr >> chip->dma1_shift;
  713. }
  714. static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
  715. {
  716. switch (substream->number) {
  717. case 0:
  718. return snd_es1938_playback1_pointer(substream);
  719. case 1:
  720. return snd_es1938_playback2_pointer(substream);
  721. }
  722. snd_BUG();
  723. return -EINVAL;
  724. }
  725. static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
  726. int channel,
  727. snd_pcm_uframes_t pos,
  728. void __user *dst,
  729. snd_pcm_uframes_t count)
  730. {
  731. struct snd_pcm_runtime *runtime = substream->runtime;
  732. struct es1938 *chip = snd_pcm_substream_chip(substream);
  733. pos <<= chip->dma1_shift;
  734. count <<= chip->dma1_shift;
  735. snd_assert(pos + count <= chip->dma1_size, return -EINVAL);
  736. if (pos + count < chip->dma1_size) {
  737. if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
  738. return -EFAULT;
  739. } else {
  740. if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
  741. return -EFAULT;
  742. if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
  743. return -EFAULT;
  744. }
  745. return 0;
  746. }
  747. /*
  748. * buffer management
  749. */
  750. static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
  751. struct snd_pcm_hw_params *hw_params)
  752. {
  753. int err;
  754. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  755. return err;
  756. return 0;
  757. }
  758. static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
  759. {
  760. return snd_pcm_lib_free_pages(substream);
  761. }
  762. /* ----------------------------------------------------------------------
  763. * Audio1 Capture (ADC)
  764. * ----------------------------------------------------------------------*/
  765. static struct snd_pcm_hardware snd_es1938_capture =
  766. {
  767. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  768. SNDRV_PCM_INFO_BLOCK_TRANSFER),
  769. .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  770. SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
  771. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  772. .rate_min = 6000,
  773. .rate_max = 48000,
  774. .channels_min = 1,
  775. .channels_max = 2,
  776. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  777. .period_bytes_min = 64,
  778. .period_bytes_max = 0x8000,
  779. .periods_min = 1,
  780. .periods_max = 1024,
  781. .fifo_size = 256,
  782. };
  783. /* -----------------------------------------------------------------------
  784. * Audio2 Playback (DAC)
  785. * -----------------------------------------------------------------------*/
  786. static struct snd_pcm_hardware snd_es1938_playback =
  787. {
  788. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  789. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  790. SNDRV_PCM_INFO_MMAP_VALID),
  791. .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  792. SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
  793. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  794. .rate_min = 6000,
  795. .rate_max = 48000,
  796. .channels_min = 1,
  797. .channels_max = 2,
  798. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  799. .period_bytes_min = 64,
  800. .period_bytes_max = 0x8000,
  801. .periods_min = 1,
  802. .periods_max = 1024,
  803. .fifo_size = 256,
  804. };
  805. static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
  806. {
  807. struct es1938 *chip = snd_pcm_substream_chip(substream);
  808. struct snd_pcm_runtime *runtime = substream->runtime;
  809. if (chip->playback2_substream)
  810. return -EAGAIN;
  811. chip->capture_substream = substream;
  812. runtime->hw = snd_es1938_capture;
  813. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  814. &hw_constraints_clocks);
  815. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  816. return 0;
  817. }
  818. static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
  819. {
  820. struct es1938 *chip = snd_pcm_substream_chip(substream);
  821. struct snd_pcm_runtime *runtime = substream->runtime;
  822. switch (substream->number) {
  823. case 0:
  824. chip->playback1_substream = substream;
  825. break;
  826. case 1:
  827. if (chip->capture_substream)
  828. return -EAGAIN;
  829. chip->playback2_substream = substream;
  830. break;
  831. default:
  832. snd_BUG();
  833. return -EINVAL;
  834. }
  835. runtime->hw = snd_es1938_playback;
  836. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  837. &hw_constraints_clocks);
  838. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  839. return 0;
  840. }
  841. static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
  842. {
  843. struct es1938 *chip = snd_pcm_substream_chip(substream);
  844. chip->capture_substream = NULL;
  845. return 0;
  846. }
  847. static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
  848. {
  849. struct es1938 *chip = snd_pcm_substream_chip(substream);
  850. switch (substream->number) {
  851. case 0:
  852. chip->playback1_substream = NULL;
  853. break;
  854. case 1:
  855. chip->playback2_substream = NULL;
  856. break;
  857. default:
  858. snd_BUG();
  859. return -EINVAL;
  860. }
  861. return 0;
  862. }
  863. static struct snd_pcm_ops snd_es1938_playback_ops = {
  864. .open = snd_es1938_playback_open,
  865. .close = snd_es1938_playback_close,
  866. .ioctl = snd_pcm_lib_ioctl,
  867. .hw_params = snd_es1938_pcm_hw_params,
  868. .hw_free = snd_es1938_pcm_hw_free,
  869. .prepare = snd_es1938_playback_prepare,
  870. .trigger = snd_es1938_playback_trigger,
  871. .pointer = snd_es1938_playback_pointer,
  872. };
  873. static struct snd_pcm_ops snd_es1938_capture_ops = {
  874. .open = snd_es1938_capture_open,
  875. .close = snd_es1938_capture_close,
  876. .ioctl = snd_pcm_lib_ioctl,
  877. .hw_params = snd_es1938_pcm_hw_params,
  878. .hw_free = snd_es1938_pcm_hw_free,
  879. .prepare = snd_es1938_capture_prepare,
  880. .trigger = snd_es1938_capture_trigger,
  881. .pointer = snd_es1938_capture_pointer,
  882. .copy = snd_es1938_capture_copy,
  883. };
  884. static int __devinit snd_es1938_new_pcm(struct es1938 *chip, int device)
  885. {
  886. struct snd_pcm *pcm;
  887. int err;
  888. if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
  889. return err;
  890. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
  891. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
  892. pcm->private_data = chip;
  893. pcm->info_flags = 0;
  894. strcpy(pcm->name, "ESS Solo-1");
  895. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  896. snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
  897. chip->pcm = pcm;
  898. return 0;
  899. }
  900. /* -------------------------------------------------------------------
  901. *
  902. * *** Mixer part ***
  903. */
  904. static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
  905. struct snd_ctl_elem_info *uinfo)
  906. {
  907. static char *texts[8] = {
  908. "Mic", "Mic Master", "CD", "AOUT",
  909. "Mic1", "Mix", "Line", "Master"
  910. };
  911. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  912. uinfo->count = 1;
  913. uinfo->value.enumerated.items = 8;
  914. if (uinfo->value.enumerated.item > 7)
  915. uinfo->value.enumerated.item = 7;
  916. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  917. return 0;
  918. }
  919. static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
  920. struct snd_ctl_elem_value *ucontrol)
  921. {
  922. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  923. ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
  924. return 0;
  925. }
  926. static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
  927. struct snd_ctl_elem_value *ucontrol)
  928. {
  929. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  930. unsigned char val = ucontrol->value.enumerated.item[0];
  931. if (val > 7)
  932. return -EINVAL;
  933. return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
  934. }
  935. static int snd_es1938_info_spatializer_enable(struct snd_kcontrol *kcontrol,
  936. struct snd_ctl_elem_info *uinfo)
  937. {
  938. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  939. uinfo->count = 1;
  940. uinfo->value.integer.min = 0;
  941. uinfo->value.integer.max = 1;
  942. return 0;
  943. }
  944. static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
  945. struct snd_ctl_elem_value *ucontrol)
  946. {
  947. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  948. unsigned char val = snd_es1938_mixer_read(chip, 0x50);
  949. ucontrol->value.integer.value[0] = !!(val & 8);
  950. return 0;
  951. }
  952. static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
  953. struct snd_ctl_elem_value *ucontrol)
  954. {
  955. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  956. unsigned char oval, nval;
  957. int change;
  958. nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
  959. oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
  960. change = nval != oval;
  961. if (change) {
  962. snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
  963. snd_es1938_mixer_write(chip, 0x50, nval);
  964. }
  965. return change;
  966. }
  967. static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
  968. struct snd_ctl_elem_info *uinfo)
  969. {
  970. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  971. uinfo->count = 2;
  972. uinfo->value.integer.min = 0;
  973. uinfo->value.integer.max = 63;
  974. return 0;
  975. }
  976. static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
  977. struct snd_ctl_elem_value *ucontrol)
  978. {
  979. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  980. ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
  981. ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
  982. return 0;
  983. }
  984. static int snd_es1938_info_hw_switch(struct snd_kcontrol *kcontrol,
  985. struct snd_ctl_elem_info *uinfo)
  986. {
  987. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  988. uinfo->count = 2;
  989. uinfo->value.integer.min = 0;
  990. uinfo->value.integer.max = 1;
  991. return 0;
  992. }
  993. static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
  994. struct snd_ctl_elem_value *ucontrol)
  995. {
  996. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  997. ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
  998. ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
  999. return 0;
  1000. }
  1001. static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
  1002. {
  1003. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1004. chip->master_volume = NULL;
  1005. chip->master_switch = NULL;
  1006. chip->hw_volume = NULL;
  1007. chip->hw_switch = NULL;
  1008. }
  1009. static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
  1010. unsigned char mask, unsigned char val)
  1011. {
  1012. if (reg < 0xa0)
  1013. return snd_es1938_mixer_bits(chip, reg, mask, val);
  1014. else
  1015. return snd_es1938_bits(chip, reg, mask, val);
  1016. }
  1017. static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
  1018. {
  1019. if (reg < 0xa0)
  1020. return snd_es1938_mixer_read(chip, reg);
  1021. else
  1022. return snd_es1938_read(chip, reg);
  1023. }
  1024. #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
  1025. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1026. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
  1027. .name = xname, .index = xindex, \
  1028. .info = snd_es1938_info_single, \
  1029. .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
  1030. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
  1031. .tlv = { .p = xtlv } }
  1032. #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
  1033. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1034. .info = snd_es1938_info_single, \
  1035. .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
  1036. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  1037. static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
  1038. struct snd_ctl_elem_info *uinfo)
  1039. {
  1040. int mask = (kcontrol->private_value >> 16) & 0xff;
  1041. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1042. uinfo->count = 1;
  1043. uinfo->value.integer.min = 0;
  1044. uinfo->value.integer.max = mask;
  1045. return 0;
  1046. }
  1047. static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
  1048. struct snd_ctl_elem_value *ucontrol)
  1049. {
  1050. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1051. int reg = kcontrol->private_value & 0xff;
  1052. int shift = (kcontrol->private_value >> 8) & 0xff;
  1053. int mask = (kcontrol->private_value >> 16) & 0xff;
  1054. int invert = (kcontrol->private_value >> 24) & 0xff;
  1055. int val;
  1056. val = snd_es1938_reg_read(chip, reg);
  1057. ucontrol->value.integer.value[0] = (val >> shift) & mask;
  1058. if (invert)
  1059. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1060. return 0;
  1061. }
  1062. static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
  1063. struct snd_ctl_elem_value *ucontrol)
  1064. {
  1065. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1066. int reg = kcontrol->private_value & 0xff;
  1067. int shift = (kcontrol->private_value >> 8) & 0xff;
  1068. int mask = (kcontrol->private_value >> 16) & 0xff;
  1069. int invert = (kcontrol->private_value >> 24) & 0xff;
  1070. unsigned char val;
  1071. val = (ucontrol->value.integer.value[0] & mask);
  1072. if (invert)
  1073. val = mask - val;
  1074. mask <<= shift;
  1075. val <<= shift;
  1076. return snd_es1938_reg_bits(chip, reg, mask, val) != val;
  1077. }
  1078. #define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
  1079. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1080. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
  1081. .name = xname, .index = xindex, \
  1082. .info = snd_es1938_info_double, \
  1083. .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
  1084. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
  1085. .tlv = { .p = xtlv } }
  1086. #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
  1087. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1088. .info = snd_es1938_info_double, \
  1089. .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
  1090. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
  1091. static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
  1092. struct snd_ctl_elem_info *uinfo)
  1093. {
  1094. int mask = (kcontrol->private_value >> 24) & 0xff;
  1095. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1096. uinfo->count = 2;
  1097. uinfo->value.integer.min = 0;
  1098. uinfo->value.integer.max = mask;
  1099. return 0;
  1100. }
  1101. static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
  1102. struct snd_ctl_elem_value *ucontrol)
  1103. {
  1104. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1105. int left_reg = kcontrol->private_value & 0xff;
  1106. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1107. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1108. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1109. int mask = (kcontrol->private_value >> 24) & 0xff;
  1110. int invert = (kcontrol->private_value >> 22) & 1;
  1111. unsigned char left, right;
  1112. left = snd_es1938_reg_read(chip, left_reg);
  1113. if (left_reg != right_reg)
  1114. right = snd_es1938_reg_read(chip, right_reg);
  1115. else
  1116. right = left;
  1117. ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
  1118. ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
  1119. if (invert) {
  1120. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1121. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  1122. }
  1123. return 0;
  1124. }
  1125. static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
  1126. struct snd_ctl_elem_value *ucontrol)
  1127. {
  1128. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1129. int left_reg = kcontrol->private_value & 0xff;
  1130. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1131. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1132. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1133. int mask = (kcontrol->private_value >> 24) & 0xff;
  1134. int invert = (kcontrol->private_value >> 22) & 1;
  1135. int change;
  1136. unsigned char val1, val2, mask1, mask2;
  1137. val1 = ucontrol->value.integer.value[0] & mask;
  1138. val2 = ucontrol->value.integer.value[1] & mask;
  1139. if (invert) {
  1140. val1 = mask - val1;
  1141. val2 = mask - val2;
  1142. }
  1143. val1 <<= shift_left;
  1144. val2 <<= shift_right;
  1145. mask1 = mask << shift_left;
  1146. mask2 = mask << shift_right;
  1147. if (left_reg != right_reg) {
  1148. change = 0;
  1149. if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
  1150. change = 1;
  1151. if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
  1152. change = 1;
  1153. } else {
  1154. change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
  1155. val1 | val2) != (val1 | val2));
  1156. }
  1157. return change;
  1158. }
  1159. static unsigned int db_scale_master[] = {
  1160. TLV_DB_RANGE_HEAD(2),
  1161. 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
  1162. 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
  1163. };
  1164. static unsigned int db_scale_audio1[] = {
  1165. TLV_DB_RANGE_HEAD(2),
  1166. 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
  1167. 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
  1168. };
  1169. static unsigned int db_scale_audio2[] = {
  1170. TLV_DB_RANGE_HEAD(2),
  1171. 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
  1172. 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
  1173. };
  1174. static unsigned int db_scale_mic[] = {
  1175. TLV_DB_RANGE_HEAD(2),
  1176. 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
  1177. 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
  1178. };
  1179. static unsigned int db_scale_line[] = {
  1180. TLV_DB_RANGE_HEAD(2),
  1181. 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
  1182. 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
  1183. };
  1184. static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
  1185. static struct snd_kcontrol_new snd_es1938_controls[] = {
  1186. ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
  1187. db_scale_master),
  1188. ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
  1189. {
  1190. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1191. .name = "Hardware Master Playback Volume",
  1192. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1193. .info = snd_es1938_info_hw_volume,
  1194. .get = snd_es1938_get_hw_volume,
  1195. },
  1196. {
  1197. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1198. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  1199. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1200. .name = "Hardware Master Playback Switch",
  1201. .info = snd_es1938_info_hw_switch,
  1202. .get = snd_es1938_get_hw_switch,
  1203. .tlv = { .p = db_scale_master },
  1204. },
  1205. ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
  1206. ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
  1207. db_scale_line),
  1208. ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
  1209. ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
  1210. db_scale_mic),
  1211. ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
  1212. db_scale_line),
  1213. ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
  1214. db_scale_mic),
  1215. ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
  1216. db_scale_line),
  1217. ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
  1218. db_scale_capture),
  1219. ES1938_SINGLE("PC Speaker Volume", 0, 0x3c, 0, 7, 0),
  1220. ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
  1221. ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
  1222. {
  1223. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1224. .name = "Capture Source",
  1225. .info = snd_es1938_info_mux,
  1226. .get = snd_es1938_get_mux,
  1227. .put = snd_es1938_put_mux,
  1228. },
  1229. ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
  1230. db_scale_line),
  1231. ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
  1232. db_scale_audio2),
  1233. ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
  1234. db_scale_mic),
  1235. ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
  1236. db_scale_line),
  1237. ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
  1238. db_scale_mic),
  1239. ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
  1240. db_scale_line),
  1241. ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
  1242. db_scale_line),
  1243. ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
  1244. db_scale_line),
  1245. ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
  1246. db_scale_audio2),
  1247. ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
  1248. db_scale_audio1),
  1249. ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
  1250. {
  1251. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1252. .name = "3D Control - Switch",
  1253. .info = snd_es1938_info_spatializer_enable,
  1254. .get = snd_es1938_get_spatializer_enable,
  1255. .put = snd_es1938_put_spatializer_enable,
  1256. },
  1257. ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
  1258. };
  1259. /* ---------------------------------------------------------------------------- */
  1260. /* ---------------------------------------------------------------------------- */
  1261. /*
  1262. * initialize the chip - used by resume callback, too
  1263. */
  1264. static void snd_es1938_chip_init(struct es1938 *chip)
  1265. {
  1266. /* reset chip */
  1267. snd_es1938_reset(chip);
  1268. /* configure native mode */
  1269. /* enable bus master */
  1270. pci_set_master(chip->pci);
  1271. /* disable legacy audio */
  1272. pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
  1273. /* set DDMA base */
  1274. pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
  1275. /* set DMA/IRQ policy */
  1276. pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
  1277. /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
  1278. outb(0xf0, SLIO_REG(chip, IRQCONTROL));
  1279. /* reset DMA */
  1280. outb(0, SLDM_REG(chip, DMACLEAR));
  1281. }
  1282. #ifdef CONFIG_PM
  1283. /*
  1284. * PM support
  1285. */
  1286. static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
  1287. 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
  1288. 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
  1289. 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
  1290. 0xa8, 0xb4,
  1291. };
  1292. static int es1938_suspend(struct pci_dev *pci, pm_message_t state)
  1293. {
  1294. struct snd_card *card = pci_get_drvdata(pci);
  1295. struct es1938 *chip = card->private_data;
  1296. unsigned char *s, *d;
  1297. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1298. snd_pcm_suspend_all(chip->pcm);
  1299. /* save mixer-related registers */
  1300. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
  1301. *d = snd_es1938_reg_read(chip, *s);
  1302. outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
  1303. if (chip->irq >= 0) {
  1304. synchronize_irq(chip->irq);
  1305. free_irq(chip->irq, chip);
  1306. chip->irq = -1;
  1307. }
  1308. pci_disable_device(pci);
  1309. pci_save_state(pci);
  1310. pci_set_power_state(pci, pci_choose_state(pci, state));
  1311. return 0;
  1312. }
  1313. static int es1938_resume(struct pci_dev *pci)
  1314. {
  1315. struct snd_card *card = pci_get_drvdata(pci);
  1316. struct es1938 *chip = card->private_data;
  1317. unsigned char *s, *d;
  1318. pci_set_power_state(pci, PCI_D0);
  1319. pci_restore_state(pci);
  1320. if (pci_enable_device(pci) < 0) {
  1321. printk(KERN_ERR "es1938: pci_enable_device failed, "
  1322. "disabling device\n");
  1323. snd_card_disconnect(card);
  1324. return -EIO;
  1325. }
  1326. if (request_irq(pci->irq, snd_es1938_interrupt,
  1327. IRQF_SHARED, "ES1938", chip)) {
  1328. printk(KERN_ERR "es1938: unable to grab IRQ %d, "
  1329. "disabling device\n", pci->irq);
  1330. snd_card_disconnect(card);
  1331. return -EIO;
  1332. }
  1333. chip->irq = pci->irq;
  1334. snd_es1938_chip_init(chip);
  1335. /* restore mixer-related registers */
  1336. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
  1337. if (*s < 0xa0)
  1338. snd_es1938_mixer_write(chip, *s, *d);
  1339. else
  1340. snd_es1938_write(chip, *s, *d);
  1341. }
  1342. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1343. return 0;
  1344. }
  1345. #endif /* CONFIG_PM */
  1346. #ifdef SUPPORT_JOYSTICK
  1347. static int __devinit snd_es1938_create_gameport(struct es1938 *chip)
  1348. {
  1349. struct gameport *gp;
  1350. chip->gameport = gp = gameport_allocate_port();
  1351. if (!gp) {
  1352. printk(KERN_ERR "es1938: cannot allocate memory for gameport\n");
  1353. return -ENOMEM;
  1354. }
  1355. gameport_set_name(gp, "ES1938");
  1356. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1357. gameport_set_dev_parent(gp, &chip->pci->dev);
  1358. gp->io = chip->game_port;
  1359. gameport_register_port(gp);
  1360. return 0;
  1361. }
  1362. static void snd_es1938_free_gameport(struct es1938 *chip)
  1363. {
  1364. if (chip->gameport) {
  1365. gameport_unregister_port(chip->gameport);
  1366. chip->gameport = NULL;
  1367. }
  1368. }
  1369. #else
  1370. static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
  1371. static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
  1372. #endif /* SUPPORT_JOYSTICK */
  1373. static int snd_es1938_free(struct es1938 *chip)
  1374. {
  1375. /* disable irqs */
  1376. outb(0x00, SLIO_REG(chip, IRQCONTROL));
  1377. if (chip->rmidi)
  1378. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
  1379. snd_es1938_free_gameport(chip);
  1380. if (chip->irq >= 0) {
  1381. synchronize_irq(chip->irq);
  1382. free_irq(chip->irq, chip);
  1383. }
  1384. pci_release_regions(chip->pci);
  1385. pci_disable_device(chip->pci);
  1386. kfree(chip);
  1387. return 0;
  1388. }
  1389. static int snd_es1938_dev_free(struct snd_device *device)
  1390. {
  1391. struct es1938 *chip = device->device_data;
  1392. return snd_es1938_free(chip);
  1393. }
  1394. static int __devinit snd_es1938_create(struct snd_card *card,
  1395. struct pci_dev * pci,
  1396. struct es1938 ** rchip)
  1397. {
  1398. struct es1938 *chip;
  1399. int err;
  1400. static struct snd_device_ops ops = {
  1401. .dev_free = snd_es1938_dev_free,
  1402. };
  1403. *rchip = NULL;
  1404. /* enable PCI device */
  1405. if ((err = pci_enable_device(pci)) < 0)
  1406. return err;
  1407. /* check, if we can restrict PCI DMA transfers to 24 bits */
  1408. if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
  1409. pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
  1410. snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
  1411. pci_disable_device(pci);
  1412. return -ENXIO;
  1413. }
  1414. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1415. if (chip == NULL) {
  1416. pci_disable_device(pci);
  1417. return -ENOMEM;
  1418. }
  1419. spin_lock_init(&chip->reg_lock);
  1420. spin_lock_init(&chip->mixer_lock);
  1421. chip->card = card;
  1422. chip->pci = pci;
  1423. chip->irq = -1;
  1424. if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
  1425. kfree(chip);
  1426. pci_disable_device(pci);
  1427. return err;
  1428. }
  1429. chip->io_port = pci_resource_start(pci, 0);
  1430. chip->sb_port = pci_resource_start(pci, 1);
  1431. chip->vc_port = pci_resource_start(pci, 2);
  1432. chip->mpu_port = pci_resource_start(pci, 3);
  1433. chip->game_port = pci_resource_start(pci, 4);
  1434. if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
  1435. "ES1938", chip)) {
  1436. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1437. snd_es1938_free(chip);
  1438. return -EBUSY;
  1439. }
  1440. chip->irq = pci->irq;
  1441. #ifdef ES1938_DDEBUG
  1442. snd_printk(KERN_DEBUG "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
  1443. chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
  1444. #endif
  1445. chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
  1446. snd_es1938_chip_init(chip);
  1447. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1448. snd_es1938_free(chip);
  1449. return err;
  1450. }
  1451. snd_card_set_dev(card, &pci->dev);
  1452. *rchip = chip;
  1453. return 0;
  1454. }
  1455. /* --------------------------------------------------------------------
  1456. * Interrupt handler
  1457. * -------------------------------------------------------------------- */
  1458. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
  1459. {
  1460. struct es1938 *chip = dev_id;
  1461. unsigned char status, audiostatus;
  1462. int handled = 0;
  1463. status = inb(SLIO_REG(chip, IRQCONTROL));
  1464. #if 0
  1465. printk("Es1938debug - interrupt status: =0x%x\n", status);
  1466. #endif
  1467. /* AUDIO 1 */
  1468. if (status & 0x10) {
  1469. #if 0
  1470. printk("Es1938debug - AUDIO channel 1 interrupt\n");
  1471. printk("Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
  1472. inw(SLDM_REG(chip, DMACOUNT)));
  1473. printk("Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
  1474. inl(SLDM_REG(chip, DMAADDR)));
  1475. printk("Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
  1476. inl(SLDM_REG(chip, DMASTATUS)));
  1477. #endif
  1478. /* clear irq */
  1479. handled = 1;
  1480. audiostatus = inb(SLSB_REG(chip, STATUS));
  1481. if (chip->active & ADC1)
  1482. snd_pcm_period_elapsed(chip->capture_substream);
  1483. else if (chip->active & DAC1)
  1484. snd_pcm_period_elapsed(chip->playback2_substream);
  1485. }
  1486. /* AUDIO 2 */
  1487. if (status & 0x20) {
  1488. #if 0
  1489. printk("Es1938debug - AUDIO channel 2 interrupt\n");
  1490. printk("Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
  1491. inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
  1492. printk("Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
  1493. inl(SLIO_REG(chip, AUDIO2DMAADDR)));
  1494. #endif
  1495. /* clear irq */
  1496. handled = 1;
  1497. snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
  1498. if (chip->active & DAC2)
  1499. snd_pcm_period_elapsed(chip->playback1_substream);
  1500. }
  1501. /* Hardware volume */
  1502. if (status & 0x40) {
  1503. int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
  1504. handled = 1;
  1505. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
  1506. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
  1507. if (!split) {
  1508. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  1509. &chip->master_switch->id);
  1510. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  1511. &chip->master_volume->id);
  1512. }
  1513. /* ack interrupt */
  1514. snd_es1938_mixer_write(chip, 0x66, 0x00);
  1515. }
  1516. /* MPU401 */
  1517. if (status & 0x80) {
  1518. // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
  1519. // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
  1520. // andreas@flying-snail.de
  1521. // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
  1522. if (chip->rmidi) {
  1523. handled = 1;
  1524. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
  1525. }
  1526. }
  1527. return IRQ_RETVAL(handled);
  1528. }
  1529. #define ES1938_DMA_SIZE 64
  1530. static int __devinit snd_es1938_mixer(struct es1938 *chip)
  1531. {
  1532. struct snd_card *card;
  1533. unsigned int idx;
  1534. int err;
  1535. card = chip->card;
  1536. strcpy(card->mixername, "ESS Solo-1");
  1537. for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
  1538. struct snd_kcontrol *kctl;
  1539. kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
  1540. switch (idx) {
  1541. case 0:
  1542. chip->master_volume = kctl;
  1543. kctl->private_free = snd_es1938_hwv_free;
  1544. break;
  1545. case 1:
  1546. chip->master_switch = kctl;
  1547. kctl->private_free = snd_es1938_hwv_free;
  1548. break;
  1549. case 2:
  1550. chip->hw_volume = kctl;
  1551. kctl->private_free = snd_es1938_hwv_free;
  1552. break;
  1553. case 3:
  1554. chip->hw_switch = kctl;
  1555. kctl->private_free = snd_es1938_hwv_free;
  1556. break;
  1557. }
  1558. if ((err = snd_ctl_add(card, kctl)) < 0)
  1559. return err;
  1560. }
  1561. return 0;
  1562. }
  1563. static int __devinit snd_es1938_probe(struct pci_dev *pci,
  1564. const struct pci_device_id *pci_id)
  1565. {
  1566. static int dev;
  1567. struct snd_card *card;
  1568. struct es1938 *chip;
  1569. struct snd_opl3 *opl3;
  1570. int idx, err;
  1571. if (dev >= SNDRV_CARDS)
  1572. return -ENODEV;
  1573. if (!enable[dev]) {
  1574. dev++;
  1575. return -ENOENT;
  1576. }
  1577. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1578. if (card == NULL)
  1579. return -ENOMEM;
  1580. for (idx = 0; idx < 5; idx++) {
  1581. if (pci_resource_start(pci, idx) == 0 ||
  1582. !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
  1583. snd_card_free(card);
  1584. return -ENODEV;
  1585. }
  1586. }
  1587. if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
  1588. snd_card_free(card);
  1589. return err;
  1590. }
  1591. card->private_data = chip;
  1592. strcpy(card->driver, "ES1938");
  1593. strcpy(card->shortname, "ESS ES1938 (Solo-1)");
  1594. sprintf(card->longname, "%s rev %i, irq %i",
  1595. card->shortname,
  1596. chip->revision,
  1597. chip->irq);
  1598. if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
  1599. snd_card_free(card);
  1600. return err;
  1601. }
  1602. if ((err = snd_es1938_mixer(chip)) < 0) {
  1603. snd_card_free(card);
  1604. return err;
  1605. }
  1606. if (snd_opl3_create(card,
  1607. SLSB_REG(chip, FMLOWADDR),
  1608. SLSB_REG(chip, FMHIGHADDR),
  1609. OPL3_HW_OPL3, 1, &opl3) < 0) {
  1610. printk(KERN_ERR "es1938: OPL3 not detected at 0x%lx\n",
  1611. SLSB_REG(chip, FMLOWADDR));
  1612. } else {
  1613. if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
  1614. snd_card_free(card);
  1615. return err;
  1616. }
  1617. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  1618. snd_card_free(card);
  1619. return err;
  1620. }
  1621. }
  1622. if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
  1623. chip->mpu_port, MPU401_INFO_INTEGRATED,
  1624. chip->irq, 0, &chip->rmidi) < 0) {
  1625. printk(KERN_ERR "es1938: unable to initialize MPU-401\n");
  1626. } else {
  1627. // this line is vital for MIDI interrupt handling on ess-solo1
  1628. // andreas@flying-snail.de
  1629. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
  1630. }
  1631. snd_es1938_create_gameport(chip);
  1632. if ((err = snd_card_register(card)) < 0) {
  1633. snd_card_free(card);
  1634. return err;
  1635. }
  1636. pci_set_drvdata(pci, card);
  1637. dev++;
  1638. return 0;
  1639. }
  1640. static void __devexit snd_es1938_remove(struct pci_dev *pci)
  1641. {
  1642. snd_card_free(pci_get_drvdata(pci));
  1643. pci_set_drvdata(pci, NULL);
  1644. }
  1645. static struct pci_driver driver = {
  1646. .name = "ESS ES1938 (Solo-1)",
  1647. .id_table = snd_es1938_ids,
  1648. .probe = snd_es1938_probe,
  1649. .remove = __devexit_p(snd_es1938_remove),
  1650. #ifdef CONFIG_PM
  1651. .suspend = es1938_suspend,
  1652. .resume = es1938_resume,
  1653. #endif
  1654. };
  1655. static int __init alsa_card_es1938_init(void)
  1656. {
  1657. return pci_register_driver(&driver);
  1658. }
  1659. static void __exit alsa_card_es1938_exit(void)
  1660. {
  1661. pci_unregister_driver(&driver);
  1662. }
  1663. module_init(alsa_card_es1938_init)
  1664. module_exit(alsa_card_es1938_exit)