atiixp.c 45 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717
  1. /*
  2. * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
  3. *
  4. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <sound/driver.h>
  22. #include <asm/io.h>
  23. #include <linux/delay.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/init.h>
  26. #include <linux/pci.h>
  27. #include <linux/slab.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/mutex.h>
  30. #include <sound/core.h>
  31. #include <sound/pcm.h>
  32. #include <sound/pcm_params.h>
  33. #include <sound/info.h>
  34. #include <sound/ac97_codec.h>
  35. #include <sound/initval.h>
  36. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  37. MODULE_DESCRIPTION("ATI IXP AC97 controller");
  38. MODULE_LICENSE("GPL");
  39. MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}");
  40. static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
  41. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  42. static int ac97_clock = 48000;
  43. static char *ac97_quirk;
  44. static int spdif_aclink = 1;
  45. static int ac97_codec = -1;
  46. module_param(index, int, 0444);
  47. MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
  48. module_param(id, charp, 0444);
  49. MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
  50. module_param(ac97_clock, int, 0444);
  51. MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
  52. module_param(ac97_quirk, charp, 0444);
  53. MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
  54. module_param(ac97_codec, int, 0444);
  55. MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
  56. module_param(spdif_aclink, bool, 0444);
  57. MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
  58. /* just for backward compatibility */
  59. static int enable;
  60. module_param(enable, bool, 0444);
  61. /*
  62. */
  63. #define ATI_REG_ISR 0x00 /* interrupt source */
  64. #define ATI_REG_ISR_IN_XRUN (1U<<0)
  65. #define ATI_REG_ISR_IN_STATUS (1U<<1)
  66. #define ATI_REG_ISR_OUT_XRUN (1U<<2)
  67. #define ATI_REG_ISR_OUT_STATUS (1U<<3)
  68. #define ATI_REG_ISR_SPDF_XRUN (1U<<4)
  69. #define ATI_REG_ISR_SPDF_STATUS (1U<<5)
  70. #define ATI_REG_ISR_PHYS_INTR (1U<<8)
  71. #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
  72. #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
  73. #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
  74. #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
  75. #define ATI_REG_ISR_NEW_FRAME (1U<<13)
  76. #define ATI_REG_IER 0x04 /* interrupt enable */
  77. #define ATI_REG_IER_IN_XRUN_EN (1U<<0)
  78. #define ATI_REG_IER_IO_STATUS_EN (1U<<1)
  79. #define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
  80. #define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
  81. #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
  82. #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
  83. #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
  84. #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
  85. #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
  86. #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
  87. #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
  88. #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
  89. #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
  90. #define ATI_REG_CMD 0x08 /* command */
  91. #define ATI_REG_CMD_POWERDOWN (1U<<0)
  92. #define ATI_REG_CMD_RECEIVE_EN (1U<<1)
  93. #define ATI_REG_CMD_SEND_EN (1U<<2)
  94. #define ATI_REG_CMD_STATUS_MEM (1U<<3)
  95. #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
  96. #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
  97. #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
  98. #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
  99. #define ATI_REG_CMD_IN_DMA_EN (1U<<8)
  100. #define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
  101. #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
  102. #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
  103. #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
  104. #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
  105. #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
  106. #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
  107. #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
  108. #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
  109. #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
  110. #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
  111. #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
  112. #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
  113. #define ATI_REG_CMD_PACKED_DIS (1U<<24)
  114. #define ATI_REG_CMD_BURST_EN (1U<<25)
  115. #define ATI_REG_CMD_PANIC_EN (1U<<26)
  116. #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
  117. #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
  118. #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
  119. #define ATI_REG_CMD_AC_SYNC (1U<<30)
  120. #define ATI_REG_CMD_AC_RESET (1U<<31)
  121. #define ATI_REG_PHYS_OUT_ADDR 0x0c
  122. #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
  123. #define ATI_REG_PHYS_OUT_RW (1U<<2)
  124. #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
  125. #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
  126. #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
  127. #define ATI_REG_PHYS_IN_ADDR 0x10
  128. #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
  129. #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
  130. #define ATI_REG_PHYS_IN_DATA_SHIFT 16
  131. #define ATI_REG_SLOTREQ 0x14
  132. #define ATI_REG_COUNTER 0x18
  133. #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
  134. #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
  135. #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
  136. #define ATI_REG_IN_DMA_LINKPTR 0x20
  137. #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
  138. #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
  139. #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
  140. #define ATI_REG_IN_DMA_DT_SIZE 0x30
  141. #define ATI_REG_OUT_DMA_SLOT 0x34
  142. #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
  143. #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
  144. #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
  145. #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
  146. #define ATI_REG_OUT_DMA_LINKPTR 0x38
  147. #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
  148. #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
  149. #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
  150. #define ATI_REG_OUT_DMA_DT_SIZE 0x48
  151. #define ATI_REG_SPDF_CMD 0x4c
  152. #define ATI_REG_SPDF_CMD_LFSR (1U<<4)
  153. #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
  154. #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
  155. #define ATI_REG_SPDF_DMA_LINKPTR 0x50
  156. #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
  157. #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
  158. #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
  159. #define ATI_REG_SPDF_DMA_DT_SIZE 0x60
  160. #define ATI_REG_MODEM_MIRROR 0x7c
  161. #define ATI_REG_AUDIO_MIRROR 0x80
  162. #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
  163. #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
  164. #define ATI_REG_FIFO_FLUSH 0x88
  165. #define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
  166. #define ATI_REG_FIFO_IN_FLUSH (1U<<1)
  167. /* LINKPTR */
  168. #define ATI_REG_LINKPTR_EN (1U<<0)
  169. /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
  170. #define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
  171. #define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
  172. #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
  173. #define ATI_REG_DMA_STATE (7U<<26)
  174. #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
  175. struct atiixp;
  176. /*
  177. * DMA packate descriptor
  178. */
  179. struct atiixp_dma_desc {
  180. u32 addr; /* DMA buffer address */
  181. u16 status; /* status bits */
  182. u16 size; /* size of the packet in dwords */
  183. u32 next; /* address of the next packet descriptor */
  184. };
  185. /*
  186. * stream enum
  187. */
  188. enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
  189. enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
  190. enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
  191. #define NUM_ATI_CODECS 3
  192. /*
  193. * constants and callbacks for each DMA type
  194. */
  195. struct atiixp_dma_ops {
  196. int type; /* ATI_DMA_XXX */
  197. unsigned int llp_offset; /* LINKPTR offset */
  198. unsigned int dt_cur; /* DT_CUR offset */
  199. /* called from open callback */
  200. void (*enable_dma)(struct atiixp *chip, int on);
  201. /* called from trigger (START/STOP) */
  202. void (*enable_transfer)(struct atiixp *chip, int on);
  203. /* called from trigger (STOP only) */
  204. void (*flush_dma)(struct atiixp *chip);
  205. };
  206. /*
  207. * DMA stream
  208. */
  209. struct atiixp_dma {
  210. const struct atiixp_dma_ops *ops;
  211. struct snd_dma_buffer desc_buf;
  212. struct snd_pcm_substream *substream; /* assigned PCM substream */
  213. unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
  214. unsigned int period_bytes, periods;
  215. int opened;
  216. int running;
  217. int suspended;
  218. int pcm_open_flag;
  219. int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
  220. unsigned int saved_curptr;
  221. };
  222. /*
  223. * ATI IXP chip
  224. */
  225. struct atiixp {
  226. struct snd_card *card;
  227. struct pci_dev *pci;
  228. unsigned long addr;
  229. void __iomem *remap_addr;
  230. int irq;
  231. struct snd_ac97_bus *ac97_bus;
  232. struct snd_ac97 *ac97[NUM_ATI_CODECS];
  233. spinlock_t reg_lock;
  234. struct atiixp_dma dmas[NUM_ATI_DMAS];
  235. struct ac97_pcm *pcms[NUM_ATI_PCMS];
  236. struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
  237. int max_channels; /* max. channels for PCM out */
  238. unsigned int codec_not_ready_bits; /* for codec detection */
  239. int spdif_over_aclink; /* passed from the module option */
  240. struct mutex open_mutex; /* playback open mutex */
  241. };
  242. /*
  243. */
  244. static struct pci_device_id snd_atiixp_ids[] = {
  245. { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
  246. { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
  247. { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
  248. { 0, }
  249. };
  250. MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
  251. static struct snd_pci_quirk atiixp_quirks[] __devinitdata = {
  252. SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
  253. { } /* terminator */
  254. };
  255. /*
  256. * lowlevel functions
  257. */
  258. /*
  259. * update the bits of the given register.
  260. * return 1 if the bits changed.
  261. */
  262. static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
  263. unsigned int mask, unsigned int value)
  264. {
  265. void __iomem *addr = chip->remap_addr + reg;
  266. unsigned int data, old_data;
  267. old_data = data = readl(addr);
  268. data &= ~mask;
  269. data |= value;
  270. if (old_data == data)
  271. return 0;
  272. writel(data, addr);
  273. return 1;
  274. }
  275. /*
  276. * macros for easy use
  277. */
  278. #define atiixp_write(chip,reg,value) \
  279. writel(value, chip->remap_addr + ATI_REG_##reg)
  280. #define atiixp_read(chip,reg) \
  281. readl(chip->remap_addr + ATI_REG_##reg)
  282. #define atiixp_update(chip,reg,mask,val) \
  283. snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
  284. /*
  285. * handling DMA packets
  286. *
  287. * we allocate a linear buffer for the DMA, and split it to each packet.
  288. * in a future version, a scatter-gather buffer should be implemented.
  289. */
  290. #define ATI_DESC_LIST_SIZE \
  291. PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
  292. /*
  293. * build packets ring for the given buffer size.
  294. *
  295. * IXP handles the buffer descriptors, which are connected as a linked
  296. * list. although we can change the list dynamically, in this version,
  297. * a static RING of buffer descriptors is used.
  298. *
  299. * the ring is built in this function, and is set up to the hardware.
  300. */
  301. static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
  302. struct snd_pcm_substream *substream,
  303. unsigned int periods,
  304. unsigned int period_bytes)
  305. {
  306. unsigned int i;
  307. u32 addr, desc_addr;
  308. unsigned long flags;
  309. if (periods > ATI_MAX_DESCRIPTORS)
  310. return -ENOMEM;
  311. if (dma->desc_buf.area == NULL) {
  312. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
  313. snd_dma_pci_data(chip->pci),
  314. ATI_DESC_LIST_SIZE,
  315. &dma->desc_buf) < 0)
  316. return -ENOMEM;
  317. dma->period_bytes = dma->periods = 0; /* clear */
  318. }
  319. if (dma->periods == periods && dma->period_bytes == period_bytes)
  320. return 0;
  321. /* reset DMA before changing the descriptor table */
  322. spin_lock_irqsave(&chip->reg_lock, flags);
  323. writel(0, chip->remap_addr + dma->ops->llp_offset);
  324. dma->ops->enable_dma(chip, 0);
  325. dma->ops->enable_dma(chip, 1);
  326. spin_unlock_irqrestore(&chip->reg_lock, flags);
  327. /* fill the entries */
  328. addr = (u32)substream->runtime->dma_addr;
  329. desc_addr = (u32)dma->desc_buf.addr;
  330. for (i = 0; i < periods; i++) {
  331. struct atiixp_dma_desc *desc;
  332. desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
  333. desc->addr = cpu_to_le32(addr);
  334. desc->status = 0;
  335. desc->size = period_bytes >> 2; /* in dwords */
  336. desc_addr += sizeof(struct atiixp_dma_desc);
  337. if (i == periods - 1)
  338. desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
  339. else
  340. desc->next = cpu_to_le32(desc_addr);
  341. addr += period_bytes;
  342. }
  343. writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
  344. chip->remap_addr + dma->ops->llp_offset);
  345. dma->period_bytes = period_bytes;
  346. dma->periods = periods;
  347. return 0;
  348. }
  349. /*
  350. * remove the ring buffer and release it if assigned
  351. */
  352. static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
  353. struct snd_pcm_substream *substream)
  354. {
  355. if (dma->desc_buf.area) {
  356. writel(0, chip->remap_addr + dma->ops->llp_offset);
  357. snd_dma_free_pages(&dma->desc_buf);
  358. dma->desc_buf.area = NULL;
  359. }
  360. }
  361. /*
  362. * AC97 interface
  363. */
  364. static int snd_atiixp_acquire_codec(struct atiixp *chip)
  365. {
  366. int timeout = 1000;
  367. while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
  368. if (! timeout--) {
  369. snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
  370. return -EBUSY;
  371. }
  372. udelay(1);
  373. }
  374. return 0;
  375. }
  376. static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
  377. {
  378. unsigned int data;
  379. int timeout;
  380. if (snd_atiixp_acquire_codec(chip) < 0)
  381. return 0xffff;
  382. data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
  383. ATI_REG_PHYS_OUT_ADDR_EN |
  384. ATI_REG_PHYS_OUT_RW |
  385. codec;
  386. atiixp_write(chip, PHYS_OUT_ADDR, data);
  387. if (snd_atiixp_acquire_codec(chip) < 0)
  388. return 0xffff;
  389. timeout = 1000;
  390. do {
  391. data = atiixp_read(chip, PHYS_IN_ADDR);
  392. if (data & ATI_REG_PHYS_IN_READ_FLAG)
  393. return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
  394. udelay(1);
  395. } while (--timeout);
  396. /* time out may happen during reset */
  397. if (reg < 0x7c)
  398. snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
  399. return 0xffff;
  400. }
  401. static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
  402. unsigned short reg, unsigned short val)
  403. {
  404. unsigned int data;
  405. if (snd_atiixp_acquire_codec(chip) < 0)
  406. return;
  407. data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
  408. ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
  409. ATI_REG_PHYS_OUT_ADDR_EN | codec;
  410. atiixp_write(chip, PHYS_OUT_ADDR, data);
  411. }
  412. static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
  413. unsigned short reg)
  414. {
  415. struct atiixp *chip = ac97->private_data;
  416. return snd_atiixp_codec_read(chip, ac97->num, reg);
  417. }
  418. static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  419. unsigned short val)
  420. {
  421. struct atiixp *chip = ac97->private_data;
  422. snd_atiixp_codec_write(chip, ac97->num, reg, val);
  423. }
  424. /*
  425. * reset AC link
  426. */
  427. static int snd_atiixp_aclink_reset(struct atiixp *chip)
  428. {
  429. int timeout;
  430. /* reset powerdoewn */
  431. if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
  432. udelay(10);
  433. /* perform a software reset */
  434. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
  435. atiixp_read(chip, CMD);
  436. udelay(10);
  437. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
  438. timeout = 10;
  439. while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
  440. /* do a hard reset */
  441. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
  442. ATI_REG_CMD_AC_SYNC);
  443. atiixp_read(chip, CMD);
  444. mdelay(1);
  445. atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
  446. if (--timeout) {
  447. snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
  448. break;
  449. }
  450. }
  451. /* deassert RESET and assert SYNC to make sure */
  452. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
  453. ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
  454. return 0;
  455. }
  456. #ifdef CONFIG_PM
  457. static int snd_atiixp_aclink_down(struct atiixp *chip)
  458. {
  459. // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
  460. // return -EBUSY;
  461. atiixp_update(chip, CMD,
  462. ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
  463. ATI_REG_CMD_POWERDOWN);
  464. return 0;
  465. }
  466. #endif
  467. /*
  468. * auto-detection of codecs
  469. *
  470. * the IXP chip can generate interrupts for the non-existing codecs.
  471. * NEW_FRAME interrupt is used to make sure that the interrupt is generated
  472. * even if all three codecs are connected.
  473. */
  474. #define ALL_CODEC_NOT_READY \
  475. (ATI_REG_ISR_CODEC0_NOT_READY |\
  476. ATI_REG_ISR_CODEC1_NOT_READY |\
  477. ATI_REG_ISR_CODEC2_NOT_READY)
  478. #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
  479. static int ac97_probing_bugs(struct pci_dev *pci)
  480. {
  481. const struct snd_pci_quirk *q;
  482. q = snd_pci_quirk_lookup(pci, atiixp_quirks);
  483. if (q) {
  484. snd_printdd(KERN_INFO "Atiixp quirk for %s. "
  485. "Forcing codec %d\n", q->name, q->value);
  486. return q->value;
  487. }
  488. /* this hardware doesn't need workarounds. Probe for codec */
  489. return -1;
  490. }
  491. static int snd_atiixp_codec_detect(struct atiixp *chip)
  492. {
  493. int timeout;
  494. chip->codec_not_ready_bits = 0;
  495. if (ac97_codec == -1)
  496. ac97_codec = ac97_probing_bugs(chip->pci);
  497. if (ac97_codec >= 0) {
  498. chip->codec_not_ready_bits |=
  499. CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
  500. return 0;
  501. }
  502. atiixp_write(chip, IER, CODEC_CHECK_BITS);
  503. /* wait for the interrupts */
  504. timeout = 50;
  505. while (timeout-- > 0) {
  506. mdelay(1);
  507. if (chip->codec_not_ready_bits)
  508. break;
  509. }
  510. atiixp_write(chip, IER, 0); /* disable irqs */
  511. if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
  512. snd_printk(KERN_ERR "atiixp: no codec detected!\n");
  513. return -ENXIO;
  514. }
  515. return 0;
  516. }
  517. /*
  518. * enable DMA and irqs
  519. */
  520. static int snd_atiixp_chip_start(struct atiixp *chip)
  521. {
  522. unsigned int reg;
  523. /* set up spdif, enable burst mode */
  524. reg = atiixp_read(chip, CMD);
  525. reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
  526. reg |= ATI_REG_CMD_BURST_EN;
  527. atiixp_write(chip, CMD, reg);
  528. reg = atiixp_read(chip, SPDF_CMD);
  529. reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
  530. atiixp_write(chip, SPDF_CMD, reg);
  531. /* clear all interrupt source */
  532. atiixp_write(chip, ISR, 0xffffffff);
  533. /* enable irqs */
  534. atiixp_write(chip, IER,
  535. ATI_REG_IER_IO_STATUS_EN |
  536. ATI_REG_IER_IN_XRUN_EN |
  537. ATI_REG_IER_OUT_XRUN_EN |
  538. ATI_REG_IER_SPDF_XRUN_EN |
  539. ATI_REG_IER_SPDF_STATUS_EN);
  540. return 0;
  541. }
  542. /*
  543. * disable DMA and IRQs
  544. */
  545. static int snd_atiixp_chip_stop(struct atiixp *chip)
  546. {
  547. /* clear interrupt source */
  548. atiixp_write(chip, ISR, atiixp_read(chip, ISR));
  549. /* disable irqs */
  550. atiixp_write(chip, IER, 0);
  551. return 0;
  552. }
  553. /*
  554. * PCM section
  555. */
  556. /*
  557. * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
  558. * position. when SG-buffer is implemented, the offset must be calculated
  559. * correctly...
  560. */
  561. static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
  562. {
  563. struct atiixp *chip = snd_pcm_substream_chip(substream);
  564. struct snd_pcm_runtime *runtime = substream->runtime;
  565. struct atiixp_dma *dma = runtime->private_data;
  566. unsigned int curptr;
  567. int timeout = 1000;
  568. while (timeout--) {
  569. curptr = readl(chip->remap_addr + dma->ops->dt_cur);
  570. if (curptr < dma->buf_addr)
  571. continue;
  572. curptr -= dma->buf_addr;
  573. if (curptr >= dma->buf_bytes)
  574. continue;
  575. return bytes_to_frames(runtime, curptr);
  576. }
  577. snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
  578. readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
  579. return 0;
  580. }
  581. /*
  582. * XRUN detected, and stop the PCM substream
  583. */
  584. static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
  585. {
  586. if (! dma->substream || ! dma->running)
  587. return;
  588. snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
  589. snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
  590. }
  591. /*
  592. * the period ack. update the substream.
  593. */
  594. static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
  595. {
  596. if (! dma->substream || ! dma->running)
  597. return;
  598. snd_pcm_period_elapsed(dma->substream);
  599. }
  600. /* set BUS_BUSY interrupt bit if any DMA is running */
  601. /* call with spinlock held */
  602. static void snd_atiixp_check_bus_busy(struct atiixp *chip)
  603. {
  604. unsigned int bus_busy;
  605. if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
  606. ATI_REG_CMD_RECEIVE_EN |
  607. ATI_REG_CMD_SPDF_OUT_EN))
  608. bus_busy = ATI_REG_IER_SET_BUS_BUSY;
  609. else
  610. bus_busy = 0;
  611. atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
  612. }
  613. /* common trigger callback
  614. * calling the lowlevel callbacks in it
  615. */
  616. static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  617. {
  618. struct atiixp *chip = snd_pcm_substream_chip(substream);
  619. struct atiixp_dma *dma = substream->runtime->private_data;
  620. int err = 0;
  621. snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
  622. spin_lock(&chip->reg_lock);
  623. switch (cmd) {
  624. case SNDRV_PCM_TRIGGER_START:
  625. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  626. case SNDRV_PCM_TRIGGER_RESUME:
  627. dma->ops->enable_transfer(chip, 1);
  628. dma->running = 1;
  629. dma->suspended = 0;
  630. break;
  631. case SNDRV_PCM_TRIGGER_STOP:
  632. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  633. case SNDRV_PCM_TRIGGER_SUSPEND:
  634. dma->ops->enable_transfer(chip, 0);
  635. dma->running = 0;
  636. dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
  637. break;
  638. default:
  639. err = -EINVAL;
  640. break;
  641. }
  642. if (! err) {
  643. snd_atiixp_check_bus_busy(chip);
  644. if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  645. dma->ops->flush_dma(chip);
  646. snd_atiixp_check_bus_busy(chip);
  647. }
  648. }
  649. spin_unlock(&chip->reg_lock);
  650. return err;
  651. }
  652. /*
  653. * lowlevel callbacks for each DMA type
  654. *
  655. * every callback is supposed to be called in chip->reg_lock spinlock
  656. */
  657. /* flush FIFO of analog OUT DMA */
  658. static void atiixp_out_flush_dma(struct atiixp *chip)
  659. {
  660. atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
  661. }
  662. /* enable/disable analog OUT DMA */
  663. static void atiixp_out_enable_dma(struct atiixp *chip, int on)
  664. {
  665. unsigned int data;
  666. data = atiixp_read(chip, CMD);
  667. if (on) {
  668. if (data & ATI_REG_CMD_OUT_DMA_EN)
  669. return;
  670. atiixp_out_flush_dma(chip);
  671. data |= ATI_REG_CMD_OUT_DMA_EN;
  672. } else
  673. data &= ~ATI_REG_CMD_OUT_DMA_EN;
  674. atiixp_write(chip, CMD, data);
  675. }
  676. /* start/stop transfer over OUT DMA */
  677. static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
  678. {
  679. atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
  680. on ? ATI_REG_CMD_SEND_EN : 0);
  681. }
  682. /* enable/disable analog IN DMA */
  683. static void atiixp_in_enable_dma(struct atiixp *chip, int on)
  684. {
  685. atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
  686. on ? ATI_REG_CMD_IN_DMA_EN : 0);
  687. }
  688. /* start/stop analog IN DMA */
  689. static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
  690. {
  691. if (on) {
  692. unsigned int data = atiixp_read(chip, CMD);
  693. if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
  694. data |= ATI_REG_CMD_RECEIVE_EN;
  695. #if 0 /* FIXME: this causes the endless loop */
  696. /* wait until slot 3/4 are finished */
  697. while ((atiixp_read(chip, COUNTER) &
  698. ATI_REG_COUNTER_SLOT) != 5)
  699. ;
  700. #endif
  701. atiixp_write(chip, CMD, data);
  702. }
  703. } else
  704. atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
  705. }
  706. /* flush FIFO of analog IN DMA */
  707. static void atiixp_in_flush_dma(struct atiixp *chip)
  708. {
  709. atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
  710. }
  711. /* enable/disable SPDIF OUT DMA */
  712. static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
  713. {
  714. atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
  715. on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
  716. }
  717. /* start/stop SPDIF OUT DMA */
  718. static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
  719. {
  720. unsigned int data;
  721. data = atiixp_read(chip, CMD);
  722. if (on)
  723. data |= ATI_REG_CMD_SPDF_OUT_EN;
  724. else
  725. data &= ~ATI_REG_CMD_SPDF_OUT_EN;
  726. atiixp_write(chip, CMD, data);
  727. }
  728. /* flush FIFO of SPDIF OUT DMA */
  729. static void atiixp_spdif_flush_dma(struct atiixp *chip)
  730. {
  731. int timeout;
  732. /* DMA off, transfer on */
  733. atiixp_spdif_enable_dma(chip, 0);
  734. atiixp_spdif_enable_transfer(chip, 1);
  735. timeout = 100;
  736. do {
  737. if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
  738. break;
  739. udelay(1);
  740. } while (timeout-- > 0);
  741. atiixp_spdif_enable_transfer(chip, 0);
  742. }
  743. /* set up slots and formats for SPDIF OUT */
  744. static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
  745. {
  746. struct atiixp *chip = snd_pcm_substream_chip(substream);
  747. spin_lock_irq(&chip->reg_lock);
  748. if (chip->spdif_over_aclink) {
  749. unsigned int data;
  750. /* enable slots 10/11 */
  751. atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
  752. ATI_REG_CMD_SPDF_CONFIG_01);
  753. data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
  754. data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
  755. ATI_REG_OUT_DMA_SLOT_BIT(11);
  756. data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
  757. atiixp_write(chip, OUT_DMA_SLOT, data);
  758. atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
  759. substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
  760. ATI_REG_CMD_INTERLEAVE_OUT : 0);
  761. } else {
  762. atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
  763. atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
  764. }
  765. spin_unlock_irq(&chip->reg_lock);
  766. return 0;
  767. }
  768. /* set up slots and formats for analog OUT */
  769. static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
  770. {
  771. struct atiixp *chip = snd_pcm_substream_chip(substream);
  772. unsigned int data;
  773. spin_lock_irq(&chip->reg_lock);
  774. data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
  775. switch (substream->runtime->channels) {
  776. case 8:
  777. data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
  778. ATI_REG_OUT_DMA_SLOT_BIT(11);
  779. /* fallthru */
  780. case 6:
  781. data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
  782. ATI_REG_OUT_DMA_SLOT_BIT(8);
  783. /* fallthru */
  784. case 4:
  785. data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
  786. ATI_REG_OUT_DMA_SLOT_BIT(9);
  787. /* fallthru */
  788. default:
  789. data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
  790. ATI_REG_OUT_DMA_SLOT_BIT(4);
  791. break;
  792. }
  793. /* set output threshold */
  794. data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
  795. atiixp_write(chip, OUT_DMA_SLOT, data);
  796. atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
  797. substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
  798. ATI_REG_CMD_INTERLEAVE_OUT : 0);
  799. /*
  800. * enable 6 channel re-ordering bit if needed
  801. */
  802. atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
  803. substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
  804. spin_unlock_irq(&chip->reg_lock);
  805. return 0;
  806. }
  807. /* set up slots and formats for analog IN */
  808. static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
  809. {
  810. struct atiixp *chip = snd_pcm_substream_chip(substream);
  811. spin_lock_irq(&chip->reg_lock);
  812. atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
  813. substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
  814. ATI_REG_CMD_INTERLEAVE_IN : 0);
  815. spin_unlock_irq(&chip->reg_lock);
  816. return 0;
  817. }
  818. /*
  819. * hw_params - allocate the buffer and set up buffer descriptors
  820. */
  821. static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
  822. struct snd_pcm_hw_params *hw_params)
  823. {
  824. struct atiixp *chip = snd_pcm_substream_chip(substream);
  825. struct atiixp_dma *dma = substream->runtime->private_data;
  826. int err;
  827. err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  828. if (err < 0)
  829. return err;
  830. dma->buf_addr = substream->runtime->dma_addr;
  831. dma->buf_bytes = params_buffer_bytes(hw_params);
  832. err = atiixp_build_dma_packets(chip, dma, substream,
  833. params_periods(hw_params),
  834. params_period_bytes(hw_params));
  835. if (err < 0)
  836. return err;
  837. if (dma->ac97_pcm_type >= 0) {
  838. struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
  839. /* PCM is bound to AC97 codec(s)
  840. * set up the AC97 codecs
  841. */
  842. if (dma->pcm_open_flag) {
  843. snd_ac97_pcm_close(pcm);
  844. dma->pcm_open_flag = 0;
  845. }
  846. err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
  847. params_channels(hw_params),
  848. pcm->r[0].slots);
  849. if (err >= 0)
  850. dma->pcm_open_flag = 1;
  851. }
  852. return err;
  853. }
  854. static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
  855. {
  856. struct atiixp *chip = snd_pcm_substream_chip(substream);
  857. struct atiixp_dma *dma = substream->runtime->private_data;
  858. if (dma->pcm_open_flag) {
  859. struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
  860. snd_ac97_pcm_close(pcm);
  861. dma->pcm_open_flag = 0;
  862. }
  863. atiixp_clear_dma_packets(chip, dma, substream);
  864. snd_pcm_lib_free_pages(substream);
  865. return 0;
  866. }
  867. /*
  868. * pcm hardware definition, identical for all DMA types
  869. */
  870. static struct snd_pcm_hardware snd_atiixp_pcm_hw =
  871. {
  872. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  873. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  874. SNDRV_PCM_INFO_PAUSE |
  875. SNDRV_PCM_INFO_RESUME |
  876. SNDRV_PCM_INFO_MMAP_VALID),
  877. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
  878. .rates = SNDRV_PCM_RATE_48000,
  879. .rate_min = 48000,
  880. .rate_max = 48000,
  881. .channels_min = 2,
  882. .channels_max = 2,
  883. .buffer_bytes_max = 256 * 1024,
  884. .period_bytes_min = 32,
  885. .period_bytes_max = 128 * 1024,
  886. .periods_min = 2,
  887. .periods_max = ATI_MAX_DESCRIPTORS,
  888. };
  889. static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
  890. struct atiixp_dma *dma, int pcm_type)
  891. {
  892. struct atiixp *chip = snd_pcm_substream_chip(substream);
  893. struct snd_pcm_runtime *runtime = substream->runtime;
  894. int err;
  895. snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
  896. if (dma->opened)
  897. return -EBUSY;
  898. dma->substream = substream;
  899. runtime->hw = snd_atiixp_pcm_hw;
  900. dma->ac97_pcm_type = pcm_type;
  901. if (pcm_type >= 0) {
  902. runtime->hw.rates = chip->pcms[pcm_type]->rates;
  903. snd_pcm_limit_hw_rates(runtime);
  904. } else {
  905. /* direct SPDIF */
  906. runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
  907. }
  908. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  909. return err;
  910. runtime->private_data = dma;
  911. /* enable DMA bits */
  912. spin_lock_irq(&chip->reg_lock);
  913. dma->ops->enable_dma(chip, 1);
  914. spin_unlock_irq(&chip->reg_lock);
  915. dma->opened = 1;
  916. return 0;
  917. }
  918. static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
  919. struct atiixp_dma *dma)
  920. {
  921. struct atiixp *chip = snd_pcm_substream_chip(substream);
  922. /* disable DMA bits */
  923. snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
  924. spin_lock_irq(&chip->reg_lock);
  925. dma->ops->enable_dma(chip, 0);
  926. spin_unlock_irq(&chip->reg_lock);
  927. dma->substream = NULL;
  928. dma->opened = 0;
  929. return 0;
  930. }
  931. /*
  932. */
  933. static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
  934. {
  935. struct atiixp *chip = snd_pcm_substream_chip(substream);
  936. int err;
  937. mutex_lock(&chip->open_mutex);
  938. err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
  939. mutex_unlock(&chip->open_mutex);
  940. if (err < 0)
  941. return err;
  942. substream->runtime->hw.channels_max = chip->max_channels;
  943. if (chip->max_channels > 2)
  944. /* channels must be even */
  945. snd_pcm_hw_constraint_step(substream->runtime, 0,
  946. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  947. return 0;
  948. }
  949. static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
  950. {
  951. struct atiixp *chip = snd_pcm_substream_chip(substream);
  952. int err;
  953. mutex_lock(&chip->open_mutex);
  954. err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
  955. mutex_unlock(&chip->open_mutex);
  956. return err;
  957. }
  958. static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
  959. {
  960. struct atiixp *chip = snd_pcm_substream_chip(substream);
  961. return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
  962. }
  963. static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
  964. {
  965. struct atiixp *chip = snd_pcm_substream_chip(substream);
  966. return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
  967. }
  968. static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
  969. {
  970. struct atiixp *chip = snd_pcm_substream_chip(substream);
  971. int err;
  972. mutex_lock(&chip->open_mutex);
  973. if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
  974. err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
  975. else
  976. err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
  977. mutex_unlock(&chip->open_mutex);
  978. return err;
  979. }
  980. static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
  981. {
  982. struct atiixp *chip = snd_pcm_substream_chip(substream);
  983. int err;
  984. mutex_lock(&chip->open_mutex);
  985. if (chip->spdif_over_aclink)
  986. err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
  987. else
  988. err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
  989. mutex_unlock(&chip->open_mutex);
  990. return err;
  991. }
  992. /* AC97 playback */
  993. static struct snd_pcm_ops snd_atiixp_playback_ops = {
  994. .open = snd_atiixp_playback_open,
  995. .close = snd_atiixp_playback_close,
  996. .ioctl = snd_pcm_lib_ioctl,
  997. .hw_params = snd_atiixp_pcm_hw_params,
  998. .hw_free = snd_atiixp_pcm_hw_free,
  999. .prepare = snd_atiixp_playback_prepare,
  1000. .trigger = snd_atiixp_pcm_trigger,
  1001. .pointer = snd_atiixp_pcm_pointer,
  1002. };
  1003. /* AC97 capture */
  1004. static struct snd_pcm_ops snd_atiixp_capture_ops = {
  1005. .open = snd_atiixp_capture_open,
  1006. .close = snd_atiixp_capture_close,
  1007. .ioctl = snd_pcm_lib_ioctl,
  1008. .hw_params = snd_atiixp_pcm_hw_params,
  1009. .hw_free = snd_atiixp_pcm_hw_free,
  1010. .prepare = snd_atiixp_capture_prepare,
  1011. .trigger = snd_atiixp_pcm_trigger,
  1012. .pointer = snd_atiixp_pcm_pointer,
  1013. };
  1014. /* SPDIF playback */
  1015. static struct snd_pcm_ops snd_atiixp_spdif_ops = {
  1016. .open = snd_atiixp_spdif_open,
  1017. .close = snd_atiixp_spdif_close,
  1018. .ioctl = snd_pcm_lib_ioctl,
  1019. .hw_params = snd_atiixp_pcm_hw_params,
  1020. .hw_free = snd_atiixp_pcm_hw_free,
  1021. .prepare = snd_atiixp_spdif_prepare,
  1022. .trigger = snd_atiixp_pcm_trigger,
  1023. .pointer = snd_atiixp_pcm_pointer,
  1024. };
  1025. static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
  1026. /* front PCM */
  1027. {
  1028. .exclusive = 1,
  1029. .r = { {
  1030. .slots = (1 << AC97_SLOT_PCM_LEFT) |
  1031. (1 << AC97_SLOT_PCM_RIGHT) |
  1032. (1 << AC97_SLOT_PCM_CENTER) |
  1033. (1 << AC97_SLOT_PCM_SLEFT) |
  1034. (1 << AC97_SLOT_PCM_SRIGHT) |
  1035. (1 << AC97_SLOT_LFE)
  1036. }
  1037. }
  1038. },
  1039. /* PCM IN #1 */
  1040. {
  1041. .stream = 1,
  1042. .exclusive = 1,
  1043. .r = { {
  1044. .slots = (1 << AC97_SLOT_PCM_LEFT) |
  1045. (1 << AC97_SLOT_PCM_RIGHT)
  1046. }
  1047. }
  1048. },
  1049. /* S/PDIF OUT (optional) */
  1050. {
  1051. .exclusive = 1,
  1052. .spdif = 1,
  1053. .r = { {
  1054. .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
  1055. (1 << AC97_SLOT_SPDIF_RIGHT2)
  1056. }
  1057. }
  1058. },
  1059. };
  1060. static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
  1061. .type = ATI_DMA_PLAYBACK,
  1062. .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
  1063. .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
  1064. .enable_dma = atiixp_out_enable_dma,
  1065. .enable_transfer = atiixp_out_enable_transfer,
  1066. .flush_dma = atiixp_out_flush_dma,
  1067. };
  1068. static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
  1069. .type = ATI_DMA_CAPTURE,
  1070. .llp_offset = ATI_REG_IN_DMA_LINKPTR,
  1071. .dt_cur = ATI_REG_IN_DMA_DT_CUR,
  1072. .enable_dma = atiixp_in_enable_dma,
  1073. .enable_transfer = atiixp_in_enable_transfer,
  1074. .flush_dma = atiixp_in_flush_dma,
  1075. };
  1076. static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
  1077. .type = ATI_DMA_SPDIF,
  1078. .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
  1079. .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
  1080. .enable_dma = atiixp_spdif_enable_dma,
  1081. .enable_transfer = atiixp_spdif_enable_transfer,
  1082. .flush_dma = atiixp_spdif_flush_dma,
  1083. };
  1084. static int __devinit snd_atiixp_pcm_new(struct atiixp *chip)
  1085. {
  1086. struct snd_pcm *pcm;
  1087. struct snd_ac97_bus *pbus = chip->ac97_bus;
  1088. int err, i, num_pcms;
  1089. /* initialize constants */
  1090. chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
  1091. chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
  1092. if (! chip->spdif_over_aclink)
  1093. chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
  1094. /* assign AC97 pcm */
  1095. if (chip->spdif_over_aclink)
  1096. num_pcms = 3;
  1097. else
  1098. num_pcms = 2;
  1099. err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
  1100. if (err < 0)
  1101. return err;
  1102. for (i = 0; i < num_pcms; i++)
  1103. chip->pcms[i] = &pbus->pcms[i];
  1104. chip->max_channels = 2;
  1105. if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
  1106. if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
  1107. chip->max_channels = 6;
  1108. else
  1109. chip->max_channels = 4;
  1110. }
  1111. /* PCM #0: analog I/O */
  1112. err = snd_pcm_new(chip->card, "ATI IXP AC97",
  1113. ATI_PCMDEV_ANALOG, 1, 1, &pcm);
  1114. if (err < 0)
  1115. return err;
  1116. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
  1117. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
  1118. pcm->private_data = chip;
  1119. strcpy(pcm->name, "ATI IXP AC97");
  1120. chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
  1121. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1122. snd_dma_pci_data(chip->pci),
  1123. 64*1024, 128*1024);
  1124. /* no SPDIF support on codec? */
  1125. if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
  1126. return 0;
  1127. /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
  1128. if (chip->pcms[ATI_PCM_SPDIF])
  1129. chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
  1130. /* PCM #1: spdif playback */
  1131. err = snd_pcm_new(chip->card, "ATI IXP IEC958",
  1132. ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
  1133. if (err < 0)
  1134. return err;
  1135. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
  1136. pcm->private_data = chip;
  1137. if (chip->spdif_over_aclink)
  1138. strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
  1139. else
  1140. strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
  1141. chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
  1142. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1143. snd_dma_pci_data(chip->pci),
  1144. 64*1024, 128*1024);
  1145. /* pre-select AC97 SPDIF slots 10/11 */
  1146. for (i = 0; i < NUM_ATI_CODECS; i++) {
  1147. if (chip->ac97[i])
  1148. snd_ac97_update_bits(chip->ac97[i],
  1149. AC97_EXTENDED_STATUS,
  1150. 0x03 << 4, 0x03 << 4);
  1151. }
  1152. return 0;
  1153. }
  1154. /*
  1155. * interrupt handler
  1156. */
  1157. static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
  1158. {
  1159. struct atiixp *chip = dev_id;
  1160. unsigned int status;
  1161. status = atiixp_read(chip, ISR);
  1162. if (! status)
  1163. return IRQ_NONE;
  1164. /* process audio DMA */
  1165. if (status & ATI_REG_ISR_OUT_XRUN)
  1166. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
  1167. else if (status & ATI_REG_ISR_OUT_STATUS)
  1168. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
  1169. if (status & ATI_REG_ISR_IN_XRUN)
  1170. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
  1171. else if (status & ATI_REG_ISR_IN_STATUS)
  1172. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
  1173. if (! chip->spdif_over_aclink) {
  1174. if (status & ATI_REG_ISR_SPDF_XRUN)
  1175. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
  1176. else if (status & ATI_REG_ISR_SPDF_STATUS)
  1177. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
  1178. }
  1179. /* for codec detection */
  1180. if (status & CODEC_CHECK_BITS) {
  1181. unsigned int detected;
  1182. detected = status & CODEC_CHECK_BITS;
  1183. spin_lock(&chip->reg_lock);
  1184. chip->codec_not_ready_bits |= detected;
  1185. atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
  1186. spin_unlock(&chip->reg_lock);
  1187. }
  1188. /* ack */
  1189. atiixp_write(chip, ISR, status);
  1190. return IRQ_HANDLED;
  1191. }
  1192. /*
  1193. * ac97 mixer section
  1194. */
  1195. static struct ac97_quirk ac97_quirks[] __devinitdata = {
  1196. {
  1197. .subvendor = 0x103c,
  1198. .subdevice = 0x006b,
  1199. .name = "HP Pavilion ZV5030US",
  1200. .type = AC97_TUNE_MUTE_LED
  1201. },
  1202. {
  1203. .subvendor = 0x103c,
  1204. .subdevice = 0x308b,
  1205. .name = "HP nx6125",
  1206. .type = AC97_TUNE_MUTE_LED
  1207. },
  1208. { } /* terminator */
  1209. };
  1210. static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock,
  1211. const char *quirk_override)
  1212. {
  1213. struct snd_ac97_bus *pbus;
  1214. struct snd_ac97_template ac97;
  1215. int i, err;
  1216. int codec_count;
  1217. static struct snd_ac97_bus_ops ops = {
  1218. .write = snd_atiixp_ac97_write,
  1219. .read = snd_atiixp_ac97_read,
  1220. };
  1221. static unsigned int codec_skip[NUM_ATI_CODECS] = {
  1222. ATI_REG_ISR_CODEC0_NOT_READY,
  1223. ATI_REG_ISR_CODEC1_NOT_READY,
  1224. ATI_REG_ISR_CODEC2_NOT_READY,
  1225. };
  1226. if (snd_atiixp_codec_detect(chip) < 0)
  1227. return -ENXIO;
  1228. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
  1229. return err;
  1230. pbus->clock = clock;
  1231. chip->ac97_bus = pbus;
  1232. codec_count = 0;
  1233. for (i = 0; i < NUM_ATI_CODECS; i++) {
  1234. if (chip->codec_not_ready_bits & codec_skip[i])
  1235. continue;
  1236. memset(&ac97, 0, sizeof(ac97));
  1237. ac97.private_data = chip;
  1238. ac97.pci = chip->pci;
  1239. ac97.num = i;
  1240. ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
  1241. if (! chip->spdif_over_aclink)
  1242. ac97.scaps |= AC97_SCAP_NO_SPDIF;
  1243. if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
  1244. chip->ac97[i] = NULL; /* to be sure */
  1245. snd_printdd("atiixp: codec %d not available for audio\n", i);
  1246. continue;
  1247. }
  1248. codec_count++;
  1249. }
  1250. if (! codec_count) {
  1251. snd_printk(KERN_ERR "atiixp: no codec available\n");
  1252. return -ENODEV;
  1253. }
  1254. snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
  1255. return 0;
  1256. }
  1257. #ifdef CONFIG_PM
  1258. /*
  1259. * power management
  1260. */
  1261. static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state)
  1262. {
  1263. struct snd_card *card = pci_get_drvdata(pci);
  1264. struct atiixp *chip = card->private_data;
  1265. int i;
  1266. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1267. for (i = 0; i < NUM_ATI_PCMDEVS; i++)
  1268. if (chip->pcmdevs[i]) {
  1269. struct atiixp_dma *dma = &chip->dmas[i];
  1270. if (dma->substream && dma->running)
  1271. dma->saved_curptr = readl(chip->remap_addr +
  1272. dma->ops->dt_cur);
  1273. snd_pcm_suspend_all(chip->pcmdevs[i]);
  1274. }
  1275. for (i = 0; i < NUM_ATI_CODECS; i++)
  1276. snd_ac97_suspend(chip->ac97[i]);
  1277. snd_atiixp_aclink_down(chip);
  1278. snd_atiixp_chip_stop(chip);
  1279. pci_disable_device(pci);
  1280. pci_save_state(pci);
  1281. pci_set_power_state(pci, pci_choose_state(pci, state));
  1282. return 0;
  1283. }
  1284. static int snd_atiixp_resume(struct pci_dev *pci)
  1285. {
  1286. struct snd_card *card = pci_get_drvdata(pci);
  1287. struct atiixp *chip = card->private_data;
  1288. int i;
  1289. pci_set_power_state(pci, PCI_D0);
  1290. pci_restore_state(pci);
  1291. if (pci_enable_device(pci) < 0) {
  1292. printk(KERN_ERR "atiixp: pci_enable_device failed, "
  1293. "disabling device\n");
  1294. snd_card_disconnect(card);
  1295. return -EIO;
  1296. }
  1297. pci_set_master(pci);
  1298. snd_atiixp_aclink_reset(chip);
  1299. snd_atiixp_chip_start(chip);
  1300. for (i = 0; i < NUM_ATI_CODECS; i++)
  1301. snd_ac97_resume(chip->ac97[i]);
  1302. for (i = 0; i < NUM_ATI_PCMDEVS; i++)
  1303. if (chip->pcmdevs[i]) {
  1304. struct atiixp_dma *dma = &chip->dmas[i];
  1305. if (dma->substream && dma->suspended) {
  1306. dma->ops->enable_dma(chip, 1);
  1307. dma->substream->ops->prepare(dma->substream);
  1308. writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
  1309. chip->remap_addr + dma->ops->llp_offset);
  1310. writel(dma->saved_curptr, chip->remap_addr +
  1311. dma->ops->dt_cur);
  1312. }
  1313. }
  1314. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1315. return 0;
  1316. }
  1317. #endif /* CONFIG_PM */
  1318. #ifdef CONFIG_PROC_FS
  1319. /*
  1320. * proc interface for register dump
  1321. */
  1322. static void snd_atiixp_proc_read(struct snd_info_entry *entry,
  1323. struct snd_info_buffer *buffer)
  1324. {
  1325. struct atiixp *chip = entry->private_data;
  1326. int i;
  1327. for (i = 0; i < 256; i += 4)
  1328. snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
  1329. }
  1330. static void __devinit snd_atiixp_proc_init(struct atiixp *chip)
  1331. {
  1332. struct snd_info_entry *entry;
  1333. if (! snd_card_proc_new(chip->card, "atiixp", &entry))
  1334. snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read);
  1335. }
  1336. #else /* !CONFIG_PROC_FS */
  1337. #define snd_atiixp_proc_init(chip)
  1338. #endif
  1339. /*
  1340. * destructor
  1341. */
  1342. static int snd_atiixp_free(struct atiixp *chip)
  1343. {
  1344. if (chip->irq < 0)
  1345. goto __hw_end;
  1346. snd_atiixp_chip_stop(chip);
  1347. synchronize_irq(chip->irq);
  1348. __hw_end:
  1349. if (chip->irq >= 0)
  1350. free_irq(chip->irq, chip);
  1351. if (chip->remap_addr)
  1352. iounmap(chip->remap_addr);
  1353. pci_release_regions(chip->pci);
  1354. pci_disable_device(chip->pci);
  1355. kfree(chip);
  1356. return 0;
  1357. }
  1358. static int snd_atiixp_dev_free(struct snd_device *device)
  1359. {
  1360. struct atiixp *chip = device->device_data;
  1361. return snd_atiixp_free(chip);
  1362. }
  1363. /*
  1364. * constructor for chip instance
  1365. */
  1366. static int __devinit snd_atiixp_create(struct snd_card *card,
  1367. struct pci_dev *pci,
  1368. struct atiixp **r_chip)
  1369. {
  1370. static struct snd_device_ops ops = {
  1371. .dev_free = snd_atiixp_dev_free,
  1372. };
  1373. struct atiixp *chip;
  1374. int err;
  1375. if ((err = pci_enable_device(pci)) < 0)
  1376. return err;
  1377. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1378. if (chip == NULL) {
  1379. pci_disable_device(pci);
  1380. return -ENOMEM;
  1381. }
  1382. spin_lock_init(&chip->reg_lock);
  1383. mutex_init(&chip->open_mutex);
  1384. chip->card = card;
  1385. chip->pci = pci;
  1386. chip->irq = -1;
  1387. if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
  1388. pci_disable_device(pci);
  1389. kfree(chip);
  1390. return err;
  1391. }
  1392. chip->addr = pci_resource_start(pci, 0);
  1393. chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
  1394. if (chip->remap_addr == NULL) {
  1395. snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
  1396. snd_atiixp_free(chip);
  1397. return -EIO;
  1398. }
  1399. if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
  1400. card->shortname, chip)) {
  1401. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1402. snd_atiixp_free(chip);
  1403. return -EBUSY;
  1404. }
  1405. chip->irq = pci->irq;
  1406. pci_set_master(pci);
  1407. synchronize_irq(chip->irq);
  1408. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1409. snd_atiixp_free(chip);
  1410. return err;
  1411. }
  1412. snd_card_set_dev(card, &pci->dev);
  1413. *r_chip = chip;
  1414. return 0;
  1415. }
  1416. static int __devinit snd_atiixp_probe(struct pci_dev *pci,
  1417. const struct pci_device_id *pci_id)
  1418. {
  1419. struct snd_card *card;
  1420. struct atiixp *chip;
  1421. unsigned char revision;
  1422. int err;
  1423. card = snd_card_new(index, id, THIS_MODULE, 0);
  1424. if (card == NULL)
  1425. return -ENOMEM;
  1426. pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
  1427. strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
  1428. strcpy(card->shortname, "ATI IXP");
  1429. if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
  1430. goto __error;
  1431. card->private_data = chip;
  1432. if ((err = snd_atiixp_aclink_reset(chip)) < 0)
  1433. goto __error;
  1434. chip->spdif_over_aclink = spdif_aclink;
  1435. if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
  1436. goto __error;
  1437. if ((err = snd_atiixp_pcm_new(chip)) < 0)
  1438. goto __error;
  1439. snd_atiixp_proc_init(chip);
  1440. snd_atiixp_chip_start(chip);
  1441. snprintf(card->longname, sizeof(card->longname),
  1442. "%s rev %x with %s at %#lx, irq %i", card->shortname, revision,
  1443. chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
  1444. chip->addr, chip->irq);
  1445. if ((err = snd_card_register(card)) < 0)
  1446. goto __error;
  1447. pci_set_drvdata(pci, card);
  1448. return 0;
  1449. __error:
  1450. snd_card_free(card);
  1451. return err;
  1452. }
  1453. static void __devexit snd_atiixp_remove(struct pci_dev *pci)
  1454. {
  1455. snd_card_free(pci_get_drvdata(pci));
  1456. pci_set_drvdata(pci, NULL);
  1457. }
  1458. static struct pci_driver driver = {
  1459. .name = "ATI IXP AC97 controller",
  1460. .id_table = snd_atiixp_ids,
  1461. .probe = snd_atiixp_probe,
  1462. .remove = __devexit_p(snd_atiixp_remove),
  1463. #ifdef CONFIG_PM
  1464. .suspend = snd_atiixp_suspend,
  1465. .resume = snd_atiixp_resume,
  1466. #endif
  1467. };
  1468. static int __init alsa_card_atiixp_init(void)
  1469. {
  1470. return pci_register_driver(&driver);
  1471. }
  1472. static void __exit alsa_card_atiixp_exit(void)
  1473. {
  1474. pci_unregister_driver(&driver);
  1475. }
  1476. module_init(alsa_card_atiixp_init)
  1477. module_exit(alsa_card_atiixp_exit)