ad1889.c 26 KB

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  1. /* Analog Devices 1889 audio driver
  2. *
  3. * This is a driver for the AD1889 PCI audio chipset found
  4. * on the HP PA-RISC [BCJ]-xxx0 workstations.
  5. *
  6. * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
  7. * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
  8. * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License, version 2, as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. * TODO:
  24. * Do we need to take care of CCS register?
  25. * Maybe we could use finer grained locking (separate locks for pb/cap)?
  26. * Wishlist:
  27. * Control Interface (mixer) support
  28. * Better AC97 support (VSR...)?
  29. * PM support
  30. * MIDI support
  31. * Game Port support
  32. * SG DMA support (this will need *alot* of work)
  33. */
  34. #include <linux/init.h>
  35. #include <linux/pci.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/slab.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/compiler.h>
  40. #include <linux/delay.h>
  41. #include <sound/driver.h>
  42. #include <sound/core.h>
  43. #include <sound/pcm.h>
  44. #include <sound/initval.h>
  45. #include <sound/ac97_codec.h>
  46. #include <asm/io.h>
  47. #include "ad1889.h"
  48. #include "ac97/ac97_id.h"
  49. #define AD1889_DRVVER "Version: 1.7"
  50. MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
  51. MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
  52. MODULE_LICENSE("GPL");
  53. MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
  54. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  55. module_param_array(index, int, NULL, 0444);
  56. MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
  57. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  58. module_param_array(id, charp, NULL, 0444);
  59. MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
  60. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  61. module_param_array(enable, bool, NULL, 0444);
  62. MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
  63. static char *ac97_quirk[SNDRV_CARDS];
  64. module_param_array(ac97_quirk, charp, NULL, 0444);
  65. MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
  66. #define DEVNAME "ad1889"
  67. #define PFX DEVNAME ": "
  68. /* let's use the global sound debug interfaces */
  69. #define ad1889_debug(fmt, arg...) snd_printd(KERN_DEBUG fmt, ## arg)
  70. /* keep track of some hw registers */
  71. struct ad1889_register_state {
  72. u16 reg; /* reg setup */
  73. u32 addr; /* dma base address */
  74. unsigned long size; /* DMA buffer size */
  75. };
  76. struct snd_ad1889 {
  77. struct snd_card *card;
  78. struct pci_dev *pci;
  79. int irq;
  80. unsigned long bar;
  81. void __iomem *iobase;
  82. struct snd_ac97 *ac97;
  83. struct snd_ac97_bus *ac97_bus;
  84. struct snd_pcm *pcm;
  85. struct snd_info_entry *proc;
  86. struct snd_pcm_substream *psubs;
  87. struct snd_pcm_substream *csubs;
  88. /* playback register state */
  89. struct ad1889_register_state wave;
  90. struct ad1889_register_state ramc;
  91. spinlock_t lock;
  92. };
  93. static inline u16
  94. ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
  95. {
  96. return readw(chip->iobase + reg);
  97. }
  98. static inline void
  99. ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
  100. {
  101. writew(val, chip->iobase + reg);
  102. }
  103. static inline u32
  104. ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
  105. {
  106. return readl(chip->iobase + reg);
  107. }
  108. static inline void
  109. ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
  110. {
  111. writel(val, chip->iobase + reg);
  112. }
  113. static inline void
  114. ad1889_unmute(struct snd_ad1889 *chip)
  115. {
  116. u16 st;
  117. st = ad1889_readw(chip, AD_DS_WADA) &
  118. ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
  119. ad1889_writew(chip, AD_DS_WADA, st);
  120. ad1889_readw(chip, AD_DS_WADA);
  121. }
  122. static inline void
  123. ad1889_mute(struct snd_ad1889 *chip)
  124. {
  125. u16 st;
  126. st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
  127. ad1889_writew(chip, AD_DS_WADA, st);
  128. ad1889_readw(chip, AD_DS_WADA);
  129. }
  130. static inline void
  131. ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
  132. {
  133. ad1889_writel(chip, AD_DMA_ADCBA, address);
  134. ad1889_writel(chip, AD_DMA_ADCCA, address);
  135. }
  136. static inline void
  137. ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
  138. {
  139. ad1889_writel(chip, AD_DMA_ADCBC, count);
  140. ad1889_writel(chip, AD_DMA_ADCCC, count);
  141. }
  142. static inline void
  143. ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
  144. {
  145. ad1889_writel(chip, AD_DMA_ADCIB, count);
  146. ad1889_writel(chip, AD_DMA_ADCIC, count);
  147. }
  148. static inline void
  149. ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
  150. {
  151. ad1889_writel(chip, AD_DMA_WAVBA, address);
  152. ad1889_writel(chip, AD_DMA_WAVCA, address);
  153. }
  154. static inline void
  155. ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
  156. {
  157. ad1889_writel(chip, AD_DMA_WAVBC, count);
  158. ad1889_writel(chip, AD_DMA_WAVCC, count);
  159. }
  160. static inline void
  161. ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
  162. {
  163. ad1889_writel(chip, AD_DMA_WAVIB, count);
  164. ad1889_writel(chip, AD_DMA_WAVIC, count);
  165. }
  166. static void
  167. ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
  168. {
  169. u16 reg;
  170. if (channel & AD_CHAN_WAV) {
  171. /* Disable wave channel */
  172. reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
  173. ad1889_writew(chip, AD_DS_WSMC, reg);
  174. chip->wave.reg = reg;
  175. /* disable IRQs */
  176. reg = ad1889_readw(chip, AD_DMA_WAV);
  177. reg &= AD_DMA_IM_DIS;
  178. reg &= ~AD_DMA_LOOP;
  179. ad1889_writew(chip, AD_DMA_WAV, reg);
  180. /* clear IRQ and address counters and pointers */
  181. ad1889_load_wave_buffer_address(chip, 0x0);
  182. ad1889_load_wave_buffer_count(chip, 0x0);
  183. ad1889_load_wave_interrupt_count(chip, 0x0);
  184. /* flush */
  185. ad1889_readw(chip, AD_DMA_WAV);
  186. }
  187. if (channel & AD_CHAN_ADC) {
  188. /* Disable ADC channel */
  189. reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
  190. ad1889_writew(chip, AD_DS_RAMC, reg);
  191. chip->ramc.reg = reg;
  192. reg = ad1889_readw(chip, AD_DMA_ADC);
  193. reg &= AD_DMA_IM_DIS;
  194. reg &= ~AD_DMA_LOOP;
  195. ad1889_writew(chip, AD_DMA_ADC, reg);
  196. ad1889_load_adc_buffer_address(chip, 0x0);
  197. ad1889_load_adc_buffer_count(chip, 0x0);
  198. ad1889_load_adc_interrupt_count(chip, 0x0);
  199. /* flush */
  200. ad1889_readw(chip, AD_DMA_ADC);
  201. }
  202. }
  203. static u16
  204. snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  205. {
  206. struct snd_ad1889 *chip = ac97->private_data;
  207. return ad1889_readw(chip, AD_AC97_BASE + reg);
  208. }
  209. static void
  210. snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
  211. {
  212. struct snd_ad1889 *chip = ac97->private_data;
  213. ad1889_writew(chip, AD_AC97_BASE + reg, val);
  214. }
  215. static int
  216. snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
  217. {
  218. int retry = 400; /* average needs 352 msec */
  219. while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
  220. && --retry)
  221. mdelay(1);
  222. if (!retry) {
  223. snd_printk(KERN_ERR PFX "[%s] Link is not ready.\n",
  224. __FUNCTION__);
  225. return -EIO;
  226. }
  227. ad1889_debug("[%s] ready after %d ms\n", __FUNCTION__, 400 - retry);
  228. return 0;
  229. }
  230. static int
  231. snd_ad1889_hw_params(struct snd_pcm_substream *substream,
  232. struct snd_pcm_hw_params *hw_params)
  233. {
  234. return snd_pcm_lib_malloc_pages(substream,
  235. params_buffer_bytes(hw_params));
  236. }
  237. static int
  238. snd_ad1889_hw_free(struct snd_pcm_substream *substream)
  239. {
  240. return snd_pcm_lib_free_pages(substream);
  241. }
  242. static struct snd_pcm_hardware snd_ad1889_playback_hw = {
  243. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  244. SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  245. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  246. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  247. .rate_min = 8000, /* docs say 7000, but we're lazy */
  248. .rate_max = 48000,
  249. .channels_min = 1,
  250. .channels_max = 2,
  251. .buffer_bytes_max = BUFFER_BYTES_MAX,
  252. .period_bytes_min = PERIOD_BYTES_MIN,
  253. .period_bytes_max = PERIOD_BYTES_MAX,
  254. .periods_min = PERIODS_MIN,
  255. .periods_max = PERIODS_MAX,
  256. /*.fifo_size = 0,*/
  257. };
  258. static struct snd_pcm_hardware snd_ad1889_capture_hw = {
  259. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  260. SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  261. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  262. .rates = SNDRV_PCM_RATE_48000,
  263. .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
  264. .rate_max = 48000,
  265. .channels_min = 1,
  266. .channels_max = 2,
  267. .buffer_bytes_max = BUFFER_BYTES_MAX,
  268. .period_bytes_min = PERIOD_BYTES_MIN,
  269. .period_bytes_max = PERIOD_BYTES_MAX,
  270. .periods_min = PERIODS_MIN,
  271. .periods_max = PERIODS_MAX,
  272. /*.fifo_size = 0,*/
  273. };
  274. static int
  275. snd_ad1889_playback_open(struct snd_pcm_substream *ss)
  276. {
  277. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  278. struct snd_pcm_runtime *rt = ss->runtime;
  279. chip->psubs = ss;
  280. rt->hw = snd_ad1889_playback_hw;
  281. return 0;
  282. }
  283. static int
  284. snd_ad1889_capture_open(struct snd_pcm_substream *ss)
  285. {
  286. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  287. struct snd_pcm_runtime *rt = ss->runtime;
  288. chip->csubs = ss;
  289. rt->hw = snd_ad1889_capture_hw;
  290. return 0;
  291. }
  292. static int
  293. snd_ad1889_playback_close(struct snd_pcm_substream *ss)
  294. {
  295. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  296. chip->psubs = NULL;
  297. return 0;
  298. }
  299. static int
  300. snd_ad1889_capture_close(struct snd_pcm_substream *ss)
  301. {
  302. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  303. chip->csubs = NULL;
  304. return 0;
  305. }
  306. static int
  307. snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
  308. {
  309. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  310. struct snd_pcm_runtime *rt = ss->runtime;
  311. unsigned int size = snd_pcm_lib_buffer_bytes(ss);
  312. unsigned int count = snd_pcm_lib_period_bytes(ss);
  313. u16 reg;
  314. ad1889_channel_reset(chip, AD_CHAN_WAV);
  315. reg = ad1889_readw(chip, AD_DS_WSMC);
  316. /* Mask out 16-bit / Stereo */
  317. reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
  318. if (snd_pcm_format_width(rt->format) == 16)
  319. reg |= AD_DS_WSMC_WA16;
  320. if (rt->channels > 1)
  321. reg |= AD_DS_WSMC_WAST;
  322. /* let's make sure we don't clobber ourselves */
  323. spin_lock_irq(&chip->lock);
  324. chip->wave.size = size;
  325. chip->wave.reg = reg;
  326. chip->wave.addr = rt->dma_addr;
  327. ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
  328. /* Set sample rates on the codec */
  329. ad1889_writew(chip, AD_DS_WAS, rt->rate);
  330. /* Set up DMA */
  331. ad1889_load_wave_buffer_address(chip, chip->wave.addr);
  332. ad1889_load_wave_buffer_count(chip, size);
  333. ad1889_load_wave_interrupt_count(chip, count);
  334. /* writes flush */
  335. ad1889_readw(chip, AD_DS_WSMC);
  336. spin_unlock_irq(&chip->lock);
  337. ad1889_debug("prepare playback: addr = 0x%x, count = %u, "
  338. "size = %u, reg = 0x%x, rate = %u\n", chip->wave.addr,
  339. count, size, reg, rt->rate);
  340. return 0;
  341. }
  342. static int
  343. snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
  344. {
  345. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  346. struct snd_pcm_runtime *rt = ss->runtime;
  347. unsigned int size = snd_pcm_lib_buffer_bytes(ss);
  348. unsigned int count = snd_pcm_lib_period_bytes(ss);
  349. u16 reg;
  350. ad1889_channel_reset(chip, AD_CHAN_ADC);
  351. reg = ad1889_readw(chip, AD_DS_RAMC);
  352. /* Mask out 16-bit / Stereo */
  353. reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
  354. if (snd_pcm_format_width(rt->format) == 16)
  355. reg |= AD_DS_RAMC_AD16;
  356. if (rt->channels > 1)
  357. reg |= AD_DS_RAMC_ADST;
  358. /* let's make sure we don't clobber ourselves */
  359. spin_lock_irq(&chip->lock);
  360. chip->ramc.size = size;
  361. chip->ramc.reg = reg;
  362. chip->ramc.addr = rt->dma_addr;
  363. ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
  364. /* Set up DMA */
  365. ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
  366. ad1889_load_adc_buffer_count(chip, size);
  367. ad1889_load_adc_interrupt_count(chip, count);
  368. /* writes flush */
  369. ad1889_readw(chip, AD_DS_RAMC);
  370. spin_unlock_irq(&chip->lock);
  371. ad1889_debug("prepare capture: addr = 0x%x, count = %u, "
  372. "size = %u, reg = 0x%x, rate = %u\n", chip->ramc.addr,
  373. count, size, reg, rt->rate);
  374. return 0;
  375. }
  376. /* this is called in atomic context with IRQ disabled.
  377. Must be as fast as possible and not sleep.
  378. DMA should be *triggered* by this call.
  379. The WSMC "WAEN" bit triggers DMA Wave On/Off */
  380. static int
  381. snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
  382. {
  383. u16 wsmc;
  384. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  385. wsmc = ad1889_readw(chip, AD_DS_WSMC);
  386. switch (cmd) {
  387. case SNDRV_PCM_TRIGGER_START:
  388. /* enable DMA loop & interrupts */
  389. ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
  390. wsmc |= AD_DS_WSMC_WAEN;
  391. /* 1 to clear CHSS bit */
  392. ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
  393. ad1889_unmute(chip);
  394. break;
  395. case SNDRV_PCM_TRIGGER_STOP:
  396. ad1889_mute(chip);
  397. wsmc &= ~AD_DS_WSMC_WAEN;
  398. break;
  399. default:
  400. snd_BUG();
  401. return -EINVAL;
  402. }
  403. chip->wave.reg = wsmc;
  404. ad1889_writew(chip, AD_DS_WSMC, wsmc);
  405. ad1889_readw(chip, AD_DS_WSMC); /* flush */
  406. /* reset the chip when STOP - will disable IRQs */
  407. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  408. ad1889_channel_reset(chip, AD_CHAN_WAV);
  409. return 0;
  410. }
  411. /* this is called in atomic context with IRQ disabled.
  412. Must be as fast as possible and not sleep.
  413. DMA should be *triggered* by this call.
  414. The RAMC "ADEN" bit triggers DMA ADC On/Off */
  415. static int
  416. snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
  417. {
  418. u16 ramc;
  419. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  420. ramc = ad1889_readw(chip, AD_DS_RAMC);
  421. switch (cmd) {
  422. case SNDRV_PCM_TRIGGER_START:
  423. /* enable DMA loop & interrupts */
  424. ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
  425. ramc |= AD_DS_RAMC_ADEN;
  426. /* 1 to clear CHSS bit */
  427. ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
  428. break;
  429. case SNDRV_PCM_TRIGGER_STOP:
  430. ramc &= ~AD_DS_RAMC_ADEN;
  431. break;
  432. default:
  433. return -EINVAL;
  434. }
  435. chip->ramc.reg = ramc;
  436. ad1889_writew(chip, AD_DS_RAMC, ramc);
  437. ad1889_readw(chip, AD_DS_RAMC); /* flush */
  438. /* reset the chip when STOP - will disable IRQs */
  439. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  440. ad1889_channel_reset(chip, AD_CHAN_ADC);
  441. return 0;
  442. }
  443. /* Called in atomic context with IRQ disabled */
  444. static snd_pcm_uframes_t
  445. snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
  446. {
  447. size_t ptr = 0;
  448. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  449. if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
  450. return 0;
  451. ptr = ad1889_readl(chip, AD_DMA_WAVCA);
  452. ptr -= chip->wave.addr;
  453. snd_assert((ptr >= 0) && (ptr < chip->wave.size), return 0);
  454. return bytes_to_frames(ss->runtime, ptr);
  455. }
  456. /* Called in atomic context with IRQ disabled */
  457. static snd_pcm_uframes_t
  458. snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
  459. {
  460. size_t ptr = 0;
  461. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  462. if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
  463. return 0;
  464. ptr = ad1889_readl(chip, AD_DMA_ADCCA);
  465. ptr -= chip->ramc.addr;
  466. snd_assert((ptr >= 0) && (ptr < chip->ramc.size), return 0);
  467. return bytes_to_frames(ss->runtime, ptr);
  468. }
  469. static struct snd_pcm_ops snd_ad1889_playback_ops = {
  470. .open = snd_ad1889_playback_open,
  471. .close = snd_ad1889_playback_close,
  472. .ioctl = snd_pcm_lib_ioctl,
  473. .hw_params = snd_ad1889_hw_params,
  474. .hw_free = snd_ad1889_hw_free,
  475. .prepare = snd_ad1889_playback_prepare,
  476. .trigger = snd_ad1889_playback_trigger,
  477. .pointer = snd_ad1889_playback_pointer,
  478. };
  479. static struct snd_pcm_ops snd_ad1889_capture_ops = {
  480. .open = snd_ad1889_capture_open,
  481. .close = snd_ad1889_capture_close,
  482. .ioctl = snd_pcm_lib_ioctl,
  483. .hw_params = snd_ad1889_hw_params,
  484. .hw_free = snd_ad1889_hw_free,
  485. .prepare = snd_ad1889_capture_prepare,
  486. .trigger = snd_ad1889_capture_trigger,
  487. .pointer = snd_ad1889_capture_pointer,
  488. };
  489. static irqreturn_t
  490. snd_ad1889_interrupt(int irq, void *dev_id)
  491. {
  492. unsigned long st;
  493. struct snd_ad1889 *chip = dev_id;
  494. st = ad1889_readl(chip, AD_DMA_DISR);
  495. /* clear ISR */
  496. ad1889_writel(chip, AD_DMA_DISR, st);
  497. st &= AD_INTR_MASK;
  498. if (unlikely(!st))
  499. return IRQ_NONE;
  500. if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
  501. ad1889_debug("Unexpected master or target abort interrupt!\n");
  502. if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
  503. snd_pcm_period_elapsed(chip->psubs);
  504. if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
  505. snd_pcm_period_elapsed(chip->csubs);
  506. return IRQ_HANDLED;
  507. }
  508. static int __devinit
  509. snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm)
  510. {
  511. int err;
  512. struct snd_pcm *pcm;
  513. if (rpcm)
  514. *rpcm = NULL;
  515. err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
  516. if (err < 0)
  517. return err;
  518. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  519. &snd_ad1889_playback_ops);
  520. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  521. &snd_ad1889_capture_ops);
  522. pcm->private_data = chip;
  523. pcm->info_flags = 0;
  524. strcpy(pcm->name, chip->card->shortname);
  525. chip->pcm = pcm;
  526. chip->psubs = NULL;
  527. chip->csubs = NULL;
  528. err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  529. snd_dma_pci_data(chip->pci),
  530. BUFFER_BYTES_MAX / 2,
  531. BUFFER_BYTES_MAX);
  532. if (err < 0) {
  533. snd_printk(KERN_ERR PFX "buffer allocation error: %d\n", err);
  534. return err;
  535. }
  536. if (rpcm)
  537. *rpcm = pcm;
  538. return 0;
  539. }
  540. static void
  541. snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  542. {
  543. struct snd_ad1889 *chip = entry->private_data;
  544. u16 reg;
  545. int tmp;
  546. reg = ad1889_readw(chip, AD_DS_WSMC);
  547. snd_iprintf(buffer, "Wave output: %s\n",
  548. (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
  549. snd_iprintf(buffer, "Wave Channels: %s\n",
  550. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  551. snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
  552. (reg & AD_DS_WSMC_WA16) ? 16 : 8);
  553. /* WARQ is at offset 12 */
  554. tmp = (reg & AD_DS_WSMC_WARQ) ?
  555. (((reg & AD_DS_WSMC_WARQ >> 12) & 0x01) ? 12 : 18) : 4;
  556. tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
  557. snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
  558. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  559. snd_iprintf(buffer, "Synthesis output: %s\n",
  560. reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
  561. /* SYRQ is at offset 4 */
  562. tmp = (reg & AD_DS_WSMC_SYRQ) ?
  563. (((reg & AD_DS_WSMC_SYRQ >> 4) & 0x01) ? 12 : 18) : 4;
  564. tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
  565. snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
  566. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  567. reg = ad1889_readw(chip, AD_DS_RAMC);
  568. snd_iprintf(buffer, "ADC input: %s\n",
  569. (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
  570. snd_iprintf(buffer, "ADC Channels: %s\n",
  571. (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
  572. snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
  573. (reg & AD_DS_RAMC_AD16) ? 16 : 8);
  574. /* ACRQ is at offset 4 */
  575. tmp = (reg & AD_DS_RAMC_ACRQ) ?
  576. (((reg & AD_DS_RAMC_ACRQ >> 4) & 0x01) ? 12 : 18) : 4;
  577. tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
  578. snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
  579. (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
  580. snd_iprintf(buffer, "Resampler input: %s\n",
  581. reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
  582. /* RERQ is at offset 12 */
  583. tmp = (reg & AD_DS_RAMC_RERQ) ?
  584. (((reg & AD_DS_RAMC_RERQ >> 12) & 0x01) ? 12 : 18) : 4;
  585. tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
  586. snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
  587. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  588. /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
  589. suggests that LSB is -3dB, which is more coherent with the logarithmic
  590. nature of the dB scale */
  591. reg = ad1889_readw(chip, AD_DS_WADA);
  592. snd_iprintf(buffer, "Left: %s, -%d dB\n",
  593. (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
  594. ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
  595. reg = ad1889_readw(chip, AD_DS_WADA);
  596. snd_iprintf(buffer, "Right: %s, -%d dB\n",
  597. (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
  598. ((reg & AD_DS_WADA_RWAA) >> 8) * 3);
  599. reg = ad1889_readw(chip, AD_DS_WAS);
  600. snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
  601. reg = ad1889_readw(chip, AD_DS_RES);
  602. snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
  603. }
  604. static void __devinit
  605. snd_ad1889_proc_init(struct snd_ad1889 *chip)
  606. {
  607. struct snd_info_entry *entry;
  608. if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
  609. snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read);
  610. }
  611. static struct ac97_quirk ac97_quirks[] = {
  612. {
  613. .subvendor = 0x11d4, /* AD */
  614. .subdevice = 0x1889, /* AD1889 */
  615. .codec_id = AC97_ID_AD1819,
  616. .name = "AD1889",
  617. .type = AC97_TUNE_HP_ONLY
  618. },
  619. { } /* terminator */
  620. };
  621. static void __devinit
  622. snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
  623. {
  624. u16 reg;
  625. reg = ad1889_readw(chip, AD_AC97_ACIC);
  626. reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
  627. ad1889_writew(chip, AD_AC97_ACIC, reg);
  628. ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
  629. udelay(10);
  630. /* Interface Enable */
  631. reg |= AD_AC97_ACIC_ACIE;
  632. ad1889_writew(chip, AD_AC97_ACIC, reg);
  633. snd_ad1889_ac97_ready(chip);
  634. /* Audio Stream Output | Variable Sample Rate Mode */
  635. reg = ad1889_readw(chip, AD_AC97_ACIC);
  636. reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
  637. ad1889_writew(chip, AD_AC97_ACIC, reg);
  638. ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
  639. }
  640. static void
  641. snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
  642. {
  643. struct snd_ad1889 *chip = bus->private_data;
  644. chip->ac97_bus = NULL;
  645. }
  646. static void
  647. snd_ad1889_ac97_free(struct snd_ac97 *ac97)
  648. {
  649. struct snd_ad1889 *chip = ac97->private_data;
  650. chip->ac97 = NULL;
  651. }
  652. static int __devinit
  653. snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
  654. {
  655. int err;
  656. struct snd_ac97_template ac97;
  657. static struct snd_ac97_bus_ops ops = {
  658. .write = snd_ad1889_ac97_write,
  659. .read = snd_ad1889_ac97_read,
  660. };
  661. /* doing that here, it works. */
  662. snd_ad1889_ac97_xinit(chip);
  663. err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
  664. if (err < 0)
  665. return err;
  666. chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
  667. memset(&ac97, 0, sizeof(ac97));
  668. ac97.private_data = chip;
  669. ac97.private_free = snd_ad1889_ac97_free;
  670. ac97.pci = chip->pci;
  671. err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
  672. if (err < 0)
  673. return err;
  674. snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
  675. return 0;
  676. }
  677. static int
  678. snd_ad1889_free(struct snd_ad1889 *chip)
  679. {
  680. if (chip->irq < 0)
  681. goto skip_hw;
  682. spin_lock_irq(&chip->lock);
  683. ad1889_mute(chip);
  684. /* Turn off interrupt on count and zero DMA registers */
  685. ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
  686. /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
  687. ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
  688. ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
  689. spin_unlock_irq(&chip->lock);
  690. synchronize_irq(chip->irq);
  691. if (chip->irq >= 0)
  692. free_irq(chip->irq, chip);
  693. skip_hw:
  694. if (chip->iobase)
  695. iounmap(chip->iobase);
  696. pci_release_regions(chip->pci);
  697. pci_disable_device(chip->pci);
  698. kfree(chip);
  699. return 0;
  700. }
  701. static int
  702. snd_ad1889_dev_free(struct snd_device *device)
  703. {
  704. struct snd_ad1889 *chip = device->device_data;
  705. return snd_ad1889_free(chip);
  706. }
  707. static int __devinit
  708. snd_ad1889_init(struct snd_ad1889 *chip)
  709. {
  710. ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
  711. ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
  712. mdelay(10);
  713. /* enable Master and Target abort interrupts */
  714. ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
  715. return 0;
  716. }
  717. static int __devinit
  718. snd_ad1889_create(struct snd_card *card,
  719. struct pci_dev *pci,
  720. struct snd_ad1889 **rchip)
  721. {
  722. int err;
  723. struct snd_ad1889 *chip;
  724. static struct snd_device_ops ops = {
  725. .dev_free = snd_ad1889_dev_free,
  726. };
  727. *rchip = NULL;
  728. if ((err = pci_enable_device(pci)) < 0)
  729. return err;
  730. /* check PCI availability (32bit DMA) */
  731. if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0 ||
  732. pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK) < 0) {
  733. printk(KERN_ERR PFX "error setting 32-bit DMA mask.\n");
  734. pci_disable_device(pci);
  735. return -ENXIO;
  736. }
  737. /* allocate chip specific data with zero-filled memory */
  738. if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
  739. pci_disable_device(pci);
  740. return -ENOMEM;
  741. }
  742. chip->card = card;
  743. card->private_data = chip;
  744. chip->pci = pci;
  745. chip->irq = -1;
  746. /* (1) PCI resource allocation */
  747. if ((err = pci_request_regions(pci, card->driver)) < 0)
  748. goto free_and_ret;
  749. chip->bar = pci_resource_start(pci, 0);
  750. chip->iobase = ioremap_nocache(chip->bar, pci_resource_len(pci, 0));
  751. if (chip->iobase == NULL) {
  752. printk(KERN_ERR PFX "unable to reserve region.\n");
  753. err = -EBUSY;
  754. goto free_and_ret;
  755. }
  756. pci_set_master(pci);
  757. spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
  758. if (request_irq(pci->irq, snd_ad1889_interrupt,
  759. IRQF_SHARED, card->driver, chip)) {
  760. printk(KERN_ERR PFX "cannot obtain IRQ %d\n", pci->irq);
  761. snd_ad1889_free(chip);
  762. return -EBUSY;
  763. }
  764. chip->irq = pci->irq;
  765. synchronize_irq(chip->irq);
  766. /* (2) initialization of the chip hardware */
  767. if ((err = snd_ad1889_init(chip)) < 0) {
  768. snd_ad1889_free(chip);
  769. return err;
  770. }
  771. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  772. snd_ad1889_free(chip);
  773. return err;
  774. }
  775. snd_card_set_dev(card, &pci->dev);
  776. *rchip = chip;
  777. return 0;
  778. free_and_ret:
  779. kfree(chip);
  780. pci_disable_device(pci);
  781. return err;
  782. }
  783. static int __devinit
  784. snd_ad1889_probe(struct pci_dev *pci,
  785. const struct pci_device_id *pci_id)
  786. {
  787. int err;
  788. static int devno;
  789. struct snd_card *card;
  790. struct snd_ad1889 *chip;
  791. /* (1) */
  792. if (devno >= SNDRV_CARDS)
  793. return -ENODEV;
  794. if (!enable[devno]) {
  795. devno++;
  796. return -ENOENT;
  797. }
  798. /* (2) */
  799. card = snd_card_new(index[devno], id[devno], THIS_MODULE, 0);
  800. /* XXX REVISIT: we can probably allocate chip in this call */
  801. if (card == NULL)
  802. return -ENOMEM;
  803. strcpy(card->driver, "AD1889");
  804. strcpy(card->shortname, "Analog Devices AD1889");
  805. /* (3) */
  806. err = snd_ad1889_create(card, pci, &chip);
  807. if (err < 0)
  808. goto free_and_ret;
  809. /* (4) */
  810. sprintf(card->longname, "%s at 0x%lx irq %i",
  811. card->shortname, chip->bar, chip->irq);
  812. /* (5) */
  813. /* register AC97 mixer */
  814. err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
  815. if (err < 0)
  816. goto free_and_ret;
  817. err = snd_ad1889_pcm_init(chip, 0, NULL);
  818. if (err < 0)
  819. goto free_and_ret;
  820. /* register proc interface */
  821. snd_ad1889_proc_init(chip);
  822. /* (6) */
  823. err = snd_card_register(card);
  824. if (err < 0)
  825. goto free_and_ret;
  826. /* (7) */
  827. pci_set_drvdata(pci, card);
  828. devno++;
  829. return 0;
  830. free_and_ret:
  831. snd_card_free(card);
  832. return err;
  833. }
  834. static void __devexit
  835. snd_ad1889_remove(struct pci_dev *pci)
  836. {
  837. snd_card_free(pci_get_drvdata(pci));
  838. pci_set_drvdata(pci, NULL);
  839. }
  840. static struct pci_device_id snd_ad1889_ids[] = {
  841. { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
  842. { 0, },
  843. };
  844. MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
  845. static struct pci_driver ad1889_pci = {
  846. .name = "AD1889 Audio",
  847. .id_table = snd_ad1889_ids,
  848. .probe = snd_ad1889_probe,
  849. .remove = __devexit_p(snd_ad1889_remove),
  850. };
  851. static int __init
  852. alsa_ad1889_init(void)
  853. {
  854. return pci_register_driver(&ad1889_pci);
  855. }
  856. static void __exit
  857. alsa_ad1889_fini(void)
  858. {
  859. pci_unregister_driver(&ad1889_pci);
  860. }
  861. module_init(alsa_ad1889_init);
  862. module_exit(alsa_ad1889_fini);