s3c6400_ac97.c 15 KB

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  1. /*
  2. * linux/sound/oss/s3c64xx-ac97.c -- AC97 interface for the S3C
  3. *
  4. * $Id: s3c6400_ac97.c,v 1.5 2008/01/31 07:22:14 eyryu Exp $
  5. * Copyright (C) 2007, Ryu Euiyoul <ryu.real@gmail.com>
  6. * All rights reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/slab.h>
  17. #include <linux/pci.h>
  18. #include <linux/completion.h>
  19. #include <linux/delay.h>
  20. #include <linux/poll.h>
  21. #include <linux/sound.h>
  22. #include <linux/soundcard.h>
  23. #include <linux/ac97_codec.h>
  24. #include <linux/major.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/platform_device.h>
  27. #include <asm/hardware.h>
  28. #include <asm/irq.h>
  29. #include <asm/uaccess.h>
  30. #include <asm/semaphore.h>
  31. #include <asm/dma.h>
  32. #include <asm/io.h>
  33. #include <asm/arch/regs-s3c6400-clock.h>
  34. #include <asm/arch/regs-ac97.h>
  35. #include <asm/arch/regs-gpio.h>
  36. #include "s3c6400_pcm.h"
  37. extern struct class_simple *sound_class;
  38. static int waitingForMask = AC_GLBSTAT_RI;
  39. static int s3c64xx_ac97_refcount;
  40. static int audio_channels;
  41. static struct clk *ac97_clock;
  42. extern struct clk *clk_get(struct device *dev, const char *id);
  43. extern int clk_enable(struct clk *clk);
  44. extern void clk_disable(struct clk *clk);
  45. static DEFINE_MUTEX(ac97_mutex);
  46. static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
  47. static unsigned short s3c64xx_ac97_read(struct ac97_codec *codec,
  48. unsigned char reg)
  49. {
  50. unsigned int ___stat;
  51. unsigned char ___addr;
  52. unsigned short ___data;
  53. unsigned long ac_glbctrl;
  54. unsigned long ac_codec_cmd;
  55. mutex_lock(&ac97_mutex);
  56. waitingForMask = AC_GLBSTAT_RI;
  57. //ac_codec_cmd = __raw_readl(AC_CODEC_CMD);
  58. ac_codec_cmd = AC_CMD_R | AC_CMD_ADDR(reg);
  59. __raw_writel(ac_codec_cmd, AC_CODEC_CMD);
  60. udelay(1000);
  61. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  62. ac_glbctrl |= AC_GLBCTRL_RIE;
  63. __raw_writel(ac_glbctrl,AC_GLBCTRL);
  64. ___stat = __raw_readl(AC_CODEC_STAT);
  65. ___addr = (___stat >> 16) & 0x7f;
  66. ___data = (___stat & 0xffff);
  67. wait_event_timeout(gsr_wq,___addr==reg,1);
  68. if (___addr != reg) {
  69. printk(KERN_ERR"AC97: read error (ac97_reg=%x addr=%x)\n", reg, ___addr);
  70. printk(KERN_ERR"Check audio codec jumpper settings\n\n");
  71. goto out;
  72. }
  73. out: mutex_unlock(&ac97_mutex);
  74. return ___data;
  75. }
  76. static void s3c64xx_ac97_write(struct ac97_codec *codec, u8 reg, u16 val)
  77. {
  78. unsigned int ___stat;
  79. unsigned short ___data;
  80. unsigned long ac_glbctrl;
  81. unsigned long ac_codec_cmd;
  82. mutex_lock(&ac97_mutex);
  83. waitingForMask = AC_GLBSTAT_RI;
  84. ac_codec_cmd = AC_CMD_ADDR(reg) | AC_CMD_DATA(val);
  85. __raw_writel(ac_codec_cmd, AC_CODEC_CMD);
  86. udelay(50);
  87. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  88. ac_glbctrl |= AC_GLBCTRL_RIE;
  89. __raw_writel(ac_glbctrl,AC_GLBCTRL);
  90. ac_codec_cmd = __raw_readl(AC_CODEC_CMD);
  91. ac_codec_cmd |= AC_CMD_R; /* By default it shud be read enabled. No? */
  92. __raw_writel(ac_codec_cmd, AC_CODEC_CMD);
  93. ___stat = __raw_readl(AC_CODEC_CMD);
  94. ___data = (___stat & 0xffff);
  95. wait_event_timeout(gsr_wq,___data==val,1);
  96. if(___data!=val){
  97. printk("%s: write error (ac97_val=%x data=%x)\n",
  98. __FUNCTION__, val, ___data);
  99. }
  100. mutex_unlock(&ac97_mutex);
  101. }
  102. static irqreturn_t s3c64xx_ac97_isr(int irq, void *dev_id)
  103. {
  104. int gsr;
  105. unsigned long ac_glbctrl;
  106. gsr = __raw_readl(AC_GLBSTAT) & waitingForMask;
  107. if (gsr) {
  108. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  109. ac_glbctrl &= ~AC_GLBCTRL_RIE;
  110. __raw_writel(ac_glbctrl,AC_GLBCTRL);
  111. wake_up(&gsr_wq);
  112. }
  113. return IRQ_HANDLED;
  114. }
  115. static struct ac97_codec s3c64xx_ac97_codec = {
  116. .codec_read = s3c64xx_ac97_read,
  117. .codec_write = s3c64xx_ac97_write,
  118. .codec_wait = NULL,
  119. };
  120. void codec_reset_settings(int mode)
  121. {
  122. if(mode == MODE_PLAY) {
  123. s3c64xx_ac97_write(0,0x2A,0x0001);
  124. s3c64xx_ac97_write(0,0x2C,0xbb80);
  125. s3c64xx_ac97_write(0,0x02,0x8080); // Mute SPK volume
  126. s3c64xx_ac97_write(0,0x04,0x0606); // Set Headphone volume
  127. s3c64xx_ac97_write(0,0x06,0x8080); // Mute OUT3,4
  128. s3c64xx_ac97_write(0,0x08,0xc880); // Mute MONOIN to hp,spk mixer
  129. s3c64xx_ac97_write(0,0x0a,0xff1f); // Mute LINE to headphone,spk,mono mixer path
  130. s3c64xx_ac97_write(0,0x0c,0x6808); // Mute DAC to spk,mono mixer
  131. s3c64xx_ac97_write(0,0x26,1<<8); // Disables stereo ADCs and record mux PGA
  132. s3c64xx_ac97_write(0,0x1c,0x00aa);
  133. s3c64xx_ac97_write(0,0x3c,0xf933);
  134. s3c64xx_ac97_write(0,0x3e,0xf8ff);
  135. s3c64xx_ac97_write(0,0x42,0x00ff);
  136. }
  137. else {
  138. s3c64xx_ac97_write(0,0x2A,0x0001);
  139. s3c64xx_ac97_write(0,0x5C,0x0000); // Select ADC slot 6 ( MIC case )
  140. s3c64xx_ac97_write(0,0x0c,0xe808); // Mute DAC to hp,spk,mono mixer
  141. s3c64xx_ac97_write(0,0x26,1<<9); // Disables stereo DAC
  142. s3c64xx_ac97_write(0,0x22,0x4040); // Mic setting
  143. s3c64xx_ac97_write(0,0x12,0x0f0f); // Recording Volume
  144. s3c64xx_ac97_write(0,0x0a,0xe808); // Mute LINE to headphone,spk,mono mixer path and set input gain
  145. s3c64xx_ac97_write(0,0x14,0xd612); // Recording source (LINEL,R)
  146. s3c64xx_ac97_write(0,0x3c,0xf8cf); // Power on left,right ADC
  147. s3c64xx_ac97_write(0,0x3e,0xff9f); // Enable LINEL,R PGA
  148. }
  149. }
  150. int s3c64xx_ac97_get(struct ac97_codec *codec)
  151. {
  152. int ret = 0;
  153. unsigned long clkcon;
  154. unsigned long ac_glbctrl;
  155. if (!s3c64xx_ac97_refcount) {
  156. clkcon = __raw_readl( S3C_PCLK_GATE);
  157. clkcon |= S3C_CLKCON_PCLK_AC97;
  158. __raw_writel(clkcon,S3C_PCLK_GATE);
  159. clkcon = __raw_readl( S3C_PCLK_GATE);
  160. // Cold reset
  161. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  162. ac_glbctrl = AC_GLBCTRL_COLD;
  163. __raw_writel(ac_glbctrl, AC_GLBCTRL);
  164. udelay(1000);
  165. // Controller and Codec normal mode
  166. __raw_writel(0, AC_GLBCTRL);
  167. udelay(1000);
  168. //AC-link on
  169. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  170. ac_glbctrl = AC_GLBCTRL_AE;
  171. __raw_writel(ac_glbctrl, AC_GLBCTRL);
  172. udelay(1000);
  173. // Controller and Codec normal mode
  174. __raw_writel(0, AC_GLBCTRL);
  175. udelay(1000);
  176. // Warm reset
  177. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  178. ac_glbctrl = AC_GLBCTRL_WARM;
  179. __raw_writel(ac_glbctrl, AC_GLBCTRL);
  180. udelay(1000);
  181. // Controller and Codec normal mode
  182. __raw_writel(0, AC_GLBCTRL);
  183. udelay(1000);
  184. //AC-link on
  185. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  186. ac_glbctrl = AC_GLBCTRL_AE;
  187. __raw_writel(ac_glbctrl, AC_GLBCTRL);
  188. udelay(1000);
  189. // Controller and Codec normal mode
  190. __raw_writel(0, AC_GLBCTRL);
  191. udelay(1000);
  192. //Transfer data enable using AC-link
  193. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  194. ac_glbctrl |= AC_GLBCTRL_TE;
  195. __raw_writel(ac_glbctrl, AC_GLBCTRL);
  196. udelay(1000);
  197. /* Enable both always */
  198. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  199. ac_glbctrl |= AC_GLBCTRL_POMODE_DMA | AC_GLBCTRL_PIMODE_DMA | AC_GLBCTRL_MIMODE_DMA;
  200. __raw_writel(ac_glbctrl, AC_GLBCTRL);
  201. ret = request_irq(IRQ_AC97, s3c64xx_ac97_isr, SA_INTERRUPT,"AC97", NULL);
  202. if (ret)
  203. goto out;
  204. s3c64xx_ac97_write(0,0x26,(1<<8));
  205. ac_glbctrl = __raw_readl(AC_GLBCTRL);
  206. ac_glbctrl |= (1<<2);
  207. __raw_writel(ac_glbctrl,AC_GLBCTRL);
  208. udelay(1000);
  209. ret = ac97_probe_codec(codec);
  210. if (ret != 1) {
  211. free_irq(IRQ_AC97, NULL);
  212. __raw_writel(0, AC_GLBCTRL);
  213. clkcon &= ~ S3C_CLKCON_PCLK_AC97;
  214. __raw_writel(clkcon,S3C_PCLK_GATE);
  215. goto out;
  216. }
  217. ret = 0;
  218. }
  219. s3c64xx_ac97_refcount++;
  220. out:
  221. codec = &s3c64xx_ac97_codec;
  222. return ret;
  223. }
  224. void s3c64xx_ac97_put(void)
  225. {
  226. unsigned long clkcon;
  227. unsigned long ac_glbctrl;
  228. s3c64xx_ac97_refcount--;
  229. if (!s3c64xx_ac97_refcount) {
  230. ac_glbctrl = 0x0;
  231. __raw_writel(ac_glbctrl, AC_GLBCTRL);
  232. clkcon = __raw_readl( S3C_PCLK_GATE);
  233. clkcon &= ~S3C_CLKCON_PCLK_AC97;
  234. __raw_writel(clkcon,S3C_PCLK_GATE);
  235. free_irq(IRQ_AC97, NULL);
  236. }
  237. }
  238. EXPORT_SYMBOL(s3c64xx_ac97_get);
  239. EXPORT_SYMBOL(s3c64xx_ac97_put);
  240. static int mixer_ioctl(struct inode *inode, struct file *file,
  241. unsigned int cmd, unsigned long arg)
  242. {
  243. int ret;
  244. printk(KERN_DEBUG "??? Mixer_ioctl : cmd %x\n",cmd);
  245. #if 0
  246. int val, mask;
  247. if (_SIOC_DIR(cmd) == (_SIOC_WRITE | _SIOC_READ)) { /* trap only the write command */
  248. switch (_IOC_NR(cmd)) {
  249. case SOUND_MIXER_RECSRC: /* See if its an ioctl to set the _other_ record-source */
  250. val = s3c64xx_ac97_codec.recmask_io(&s3c64xx_ac97_codec, 1, 0);
  251. get_user(mask, (int *) arg);
  252. /* Req=LINE or Stereo and Curr=MIC */
  253. if (((mask & (1 << SOUND_MIXER_LINE)) || (mask & (1 << SOUND_MIXER_IGAIN)))
  254. && (val & (1 << SOUND_MIXER_MIC))) {
  255. if (audio_state.read_busy == FLAG_UP) {
  256. audio_state.read_busy = FLAG_REC_CHG;
  257. /* Wait until current 'read' is through. */
  258. sleep_on(&audio_state.rbq);
  259. }
  260. mask = 1 << SOUND_MIXER_LINE; /* No stereo */
  261. /* All Analog Mode, ADC Input select=>left slot3, right slot4 */
  262. s3c64xx_ac97_write(NULL, 0x6E, 0x0000);
  263. printk("Input source is now LineIn \n");
  264. } else {
  265. /* Req=MIC and Curr=LINE or Stereo */
  266. if (((val & (1 << SOUND_MIXER_LINE)) || (val & (1 << SOUND_MIXER_IGAIN)))
  267. && (mask & (1 << SOUND_MIXER_MIC))) {
  268. if (audio_state.read_busy == FLAG_UP) {
  269. audio_state.read_busy = FLAG_REC_CHG;
  270. /* Wait until current 'read' is through. */
  271. sleep_on(&ac97_audio_state.rbq);
  272. }
  273. mask = 1 << SOUND_MIXER_MIC;
  274. /* ADC Input Slot => left slot6, right slot9, MIC GAIN = 20 */
  275. s3c64xx_ac97_write(NULL, 0x6E,0x0020);
  276. printk("Input source is now MIC \n");
  277. } else if (val == mask) {
  278. printk("Input source is the same.\n");
  279. return 0;
  280. } else {
  281. printk("Requested input source is not present.\n");
  282. printk("Req=0x08%X and Curr=0x08%X\n", mask, val);
  283. return -EINVAL; /* Can't do anything. */
  284. }
  285. }
  286. put_user(mask, (int *) arg);
  287. ret = s3c64xx_ac97_codec.mixer_ioctl(&s3c64xx_ac97_codec, cmd, arg);
  288. switch_stream(audio_state.input_stream);
  289. if (audio_state.read_busy == FLAG_REC_CHG) {
  290. wake_up(&audio_state.rbq);
  291. audio_state.read_busy = FLAG_DOWN; /* audio_read will set it. */
  292. }
  293. return ret;
  294. default:
  295. break;
  296. }
  297. }
  298. #endif
  299. ret = s3c64xx_ac97_codec.mixer_ioctl(&s3c64xx_ac97_codec, cmd, arg);
  300. return ret;
  301. }
  302. static struct file_operations mixer_fops = {
  303. ioctl:mixer_ioctl,
  304. llseek:no_llseek,
  305. owner:THIS_MODULE
  306. };
  307. static int codec_adc_rate;
  308. static int codec_dac_rate;
  309. static int ac97_ioctl(struct inode *inode, struct file *file,
  310. unsigned int cmd, unsigned long arg)
  311. {
  312. int ret;
  313. long val = 0;
  314. audio_state_t *state = file->private_data;
  315. switch (cmd) {
  316. case SNDCTL_DSP_STEREO:
  317. if (get_user(val, (int *) arg))
  318. return -EINVAL;
  319. audio_channels = (val) ? 2 : 1;
  320. state->sound_mode = audio_channels;
  321. return 0;
  322. case SNDCTL_DSP_CHANNELS:
  323. if (get_user(val, (int *) arg))
  324. return -EINVAL;
  325. if (val != 1 && val != 2)
  326. return -EINVAL;
  327. audio_channels = val;
  328. state->sound_mode = audio_channels;
  329. return put_user(val, (int *) arg);
  330. case SOUND_PCM_READ_CHANNELS:
  331. return put_user(audio_channels, (long *) arg);
  332. case SNDCTL_DSP_SPEED:
  333. ret = get_user(val, (long *) arg);
  334. if (ret)
  335. return ret;
  336. if (file->f_mode & FMODE_READ)
  337. codec_adc_rate = ac97_set_adc_rate(&s3c64xx_ac97_codec, val);
  338. if (file->f_mode & FMODE_WRITE)
  339. codec_dac_rate = ac97_set_dac_rate(&s3c64xx_ac97_codec, val);
  340. /* fall through */
  341. case SOUND_PCM_READ_RATE:
  342. if (file->f_mode & FMODE_READ)
  343. val = codec_adc_rate;
  344. if (file->f_mode & FMODE_WRITE)
  345. val = codec_dac_rate;
  346. return put_user(val, (long *) arg);
  347. case SNDCTL_DSP_SETFMT:
  348. case SNDCTL_DSP_GETFMTS:
  349. /* FIXME: can we do other fmts? */
  350. return put_user(AFMT_S16_LE, (long *) arg);
  351. default:
  352. /* Maybe this is meant for the mixer (As per OSS Docs) */
  353. return mixer_ioctl(inode, file, cmd, arg);
  354. }
  355. return 0;
  356. }
  357. static void s3c64xx_ac97_config_pins(void)
  358. {
  359. s3c_gpio_cfgpin(S3C_GPD0,S3C_GPD0_AC97_BITCLK);
  360. s3c_gpio_cfgpin(S3C_GPD1,S3C_GPD1_AC97_RESET);
  361. s3c_gpio_cfgpin(S3C_GPD2,S3C_GPD2_AC97_SYNC);
  362. s3c_gpio_cfgpin(S3C_GPD3,S3C_GPD3_AC97_SDI);
  363. s3c_gpio_cfgpin(S3C_GPD4,S3C_GPD4_AC97_SDO);
  364. s3c_gpio_pullup(S3C_GPD0,0);
  365. s3c_gpio_pullup(S3C_GPD1,0);
  366. s3c_gpio_pullup(S3C_GPD2,0);
  367. s3c_gpio_pullup(S3C_GPD3,0);
  368. s3c_gpio_pullup(S3C_GPD4,0);
  369. }
  370. static int s3c64xx_select_clk(void)
  371. {
  372. ac97_clock = NULL;
  373. ac97_clock = clk_get(NULL, "ac97");
  374. if (!ac97_clock) {
  375. printk(KERN_DEBUG "failed to get ac97 clock source\n");
  376. return -ENOENT;
  377. }
  378. clk_enable(ac97_clock);
  379. return 0;
  380. }
  381. static int s3c64xx_init_ac97(void)
  382. {
  383. int ret;
  384. struct ac97_codec *codec = &s3c64xx_ac97_codec;
  385. ret = s3c64xx_ac97_get(codec);
  386. if (ret)
  387. return ret;
  388. return 0;
  389. }
  390. /* AC97 GPIO configuration*/
  391. static int s3c64xx_audio_init(int *dummy)
  392. {
  393. s3c64xx_ac97_config_pins();
  394. udelay(1000);
  395. s3c64xx_select_clk();
  396. if(s3c64xx_init_ac97())
  397. {
  398. printk("Audio init failed \n");
  399. return -EBUSY;
  400. }
  401. return 0;
  402. }
  403. static void s3c64xx_audio_shutdown(void *dummy)
  404. {
  405. /* Disable the AC97 clock */
  406. clk_disable(ac97_clock);
  407. }
  408. static audio_stream_t output_stream = {
  409. id: "s3c64xx audio out ",
  410. subchannel: DMACH_AC97_PCM_OUT,
  411. };
  412. static audio_stream_t input_stream_line = {
  413. id: "s3c64xx audio line in ",
  414. subchannel: DMACH_AC97_PCM_IN,
  415. };
  416. static audio_stream_t input_stream_mic = {
  417. id: "s3c64xx audio mic in ",
  418. subchannel: DMACH_AC97_MIC_IN,
  419. };
  420. static audio_state_t audio_state = {
  421. .output_stream = &output_stream,
  422. .input_stream_line = &input_stream_line,
  423. .input_stream_mic = &input_stream_mic,
  424. .hw_shutdown = s3c64xx_audio_shutdown,
  425. .client_ioctl = ac97_ioctl,
  426. };
  427. extern int s3c_audio_attach(struct inode *inode, struct file *file,
  428. audio_state_t *state);
  429. static int ac97_audio_open(struct inode *inode, struct file *file)
  430. {
  431. init_MUTEX(&audio_state.sem);
  432. return s3c_audio_attach(inode, file, &audio_state);
  433. }
  434. static struct file_operations ac97_audio_fops = {
  435. open:ac97_audio_open,
  436. owner:THIS_MODULE
  437. };
  438. #ifdef CONFIG_PM
  439. int s3c64xx_ac97_suspend(void)
  440. {
  441. s3c64xx_ac97_put();
  442. return 0;
  443. }
  444. int s3c64xx_ac97_resume(void)
  445. {
  446. int dummy;
  447. struct ac97_codec *codec = &s3c64xx_ac97_codec;
  448. printk(KERN_DEBUG "audio resume \n");
  449. s3c64xx_audio_init(dummy);
  450. return 0;
  451. }
  452. static int s3c64xx_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
  453. {
  454. printk(KERN_DEBUG "audio pm callback \n");
  455. switch(rqst) {
  456. case PM_SUSPEND:
  457. s3c64xx_ac97_suspend();
  458. break;
  459. case PM_RESUME:
  460. s3c64xx_ac97_resume();
  461. break;
  462. }
  463. return 0;
  464. }
  465. #else
  466. #define s3c64xx_ac97_suspend NULL
  467. #define s3c64xx_ac97_resume NULL
  468. #endif
  469. static int audio_dev_id, mixer_dev_id;
  470. static int s3c64xx_audio_probe(struct device * dev)
  471. {
  472. unsigned int ret,dummy;
  473. ret = s3c64xx_audio_init(&dummy);
  474. if (ret)
  475. return ret;
  476. audio_dev_id = register_sound_dsp(&ac97_audio_fops, -1);
  477. mixer_dev_id = register_sound_mixer(&mixer_fops, -1);
  478. printk(KERN_INFO "Sound: S3C-AC97: dsp id %d mixer id %d\n",
  479. audio_dev_id, mixer_dev_id);
  480. flush_scheduled_work();
  481. #ifdef CONFIG_PM
  482. pm_register(PM_SYS_DEV, PM_SYS_UNKNOWN, s3c64xx_pm_callback);
  483. #endif
  484. return 0;
  485. }
  486. static int s3c64xx_audio_remove(struct device * dev)
  487. {
  488. unregister_sound_dsp(audio_dev_id);
  489. unregister_sound_mixer(mixer_dev_id);
  490. s3c64xx_ac97_put();
  491. return 0;
  492. }
  493. static struct device_driver s3c64xx_ac97_driver = {
  494. .name = "s3c-ac97",
  495. .bus = &platform_bus_type,
  496. .probe = s3c64xx_audio_probe,
  497. .remove = s3c64xx_audio_remove,
  498. #ifdef CONFIG_PM
  499. .suspend = s3c64xx_ac97_suspend,
  500. .resume = s3c64xx_ac97_resume,
  501. #endif
  502. };
  503. static int __init s3c64xx_ac97_init(void)
  504. {
  505. return driver_register(&s3c64xx_ac97_driver);
  506. }
  507. static void __exit s3c64xx_ac97_exit(void)
  508. {
  509. driver_unregister(&s3c64xx_ac97_driver);
  510. }
  511. module_init(s3c64xx_ac97_init);
  512. module_exit(s3c64xx_ac97_exit);