opl3_hw.h 6.9 KB

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  1. /*
  2. * opl3_hw.h - Definitions of the OPL-3 registers
  3. *
  4. *
  5. * Copyright (C) by Hannu Savolainen 1993-1997
  6. *
  7. * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
  8. * Version 2 (June 1991). See the "COPYING" file distributed with this software
  9. * for more info.
  10. *
  11. *
  12. * The OPL-3 mode is switched on by writing 0x01, to the offset 5
  13. * of the right side.
  14. *
  15. * Another special register at the right side is at offset 4. It contains
  16. * a bit mask defining which voices are used as 4 OP voices.
  17. *
  18. * The percussive mode is implemented in the left side only.
  19. *
  20. * With the above exceptions the both sides can be operated independently.
  21. *
  22. * A 4 OP voice can be created by setting the corresponding
  23. * bit at offset 4 of the right side.
  24. *
  25. * For example setting the rightmost bit (0x01) changes the
  26. * first voice on the right side to the 4 OP mode. The fourth
  27. * voice is made inaccessible.
  28. *
  29. * If a voice is set to the 2 OP mode, it works like 2 OP modes
  30. * of the original YM3812 (AdLib). In addition the voice can
  31. * be connected the left, right or both stereo channels. It can
  32. * even be left unconnected. This works with 4 OP voices also.
  33. *
  34. * The stereo connection bits are located in the FEEDBACK_CONNECTION
  35. * register of the voice (0xC0-0xC8). In 4 OP voices these bits are
  36. * in the second half of the voice.
  37. */
  38. /*
  39. * Register numbers for the global registers
  40. */
  41. #define TEST_REGISTER 0x01
  42. #define ENABLE_WAVE_SELECT 0x20
  43. #define TIMER1_REGISTER 0x02
  44. #define TIMER2_REGISTER 0x03
  45. #define TIMER_CONTROL_REGISTER 0x04 /* Left side */
  46. #define IRQ_RESET 0x80
  47. #define TIMER1_MASK 0x40
  48. #define TIMER2_MASK 0x20
  49. #define TIMER1_START 0x01
  50. #define TIMER2_START 0x02
  51. #define CONNECTION_SELECT_REGISTER 0x04 /* Right side */
  52. #define RIGHT_4OP_0 0x01
  53. #define RIGHT_4OP_1 0x02
  54. #define RIGHT_4OP_2 0x04
  55. #define LEFT_4OP_0 0x08
  56. #define LEFT_4OP_1 0x10
  57. #define LEFT_4OP_2 0x20
  58. #define OPL3_MODE_REGISTER 0x05 /* Right side */
  59. #define OPL3_ENABLE 0x01
  60. #define OPL4_ENABLE 0x02
  61. #define KBD_SPLIT_REGISTER 0x08 /* Left side */
  62. #define COMPOSITE_SINE_WAVE_MODE 0x80 /* Don't use with OPL-3? */
  63. #define KEYBOARD_SPLIT 0x40
  64. #define PERCOSSION_REGISTER 0xbd /* Left side only */
  65. #define TREMOLO_DEPTH 0x80
  66. #define VIBRATO_DEPTH 0x40
  67. #define PERCOSSION_ENABLE 0x20
  68. #define BASSDRUM_ON 0x10
  69. #define SNAREDRUM_ON 0x08
  70. #define TOMTOM_ON 0x04
  71. #define CYMBAL_ON 0x02
  72. #define HIHAT_ON 0x01
  73. /*
  74. * Offsets to the register banks for operators. To get the
  75. * register number just add the operator offset to the bank offset
  76. *
  77. * AM/VIB/EG/KSR/Multiple (0x20 to 0x35)
  78. */
  79. #define AM_VIB 0x20
  80. #define TREMOLO_ON 0x80
  81. #define VIBRATO_ON 0x40
  82. #define SUSTAIN_ON 0x20
  83. #define KSR 0x10 /* Key scaling rate */
  84. #define MULTIPLE_MASK 0x0f /* Frequency multiplier */
  85. /*
  86. * KSL/Total level (0x40 to 0x55)
  87. */
  88. #define KSL_LEVEL 0x40
  89. #define KSL_MASK 0xc0 /* Envelope scaling bits */
  90. #define TOTAL_LEVEL_MASK 0x3f /* Strength (volume) of OP */
  91. /*
  92. * Attack / Decay rate (0x60 to 0x75)
  93. */
  94. #define ATTACK_DECAY 0x60
  95. #define ATTACK_MASK 0xf0
  96. #define DECAY_MASK 0x0f
  97. /*
  98. * Sustain level / Release rate (0x80 to 0x95)
  99. */
  100. #define SUSTAIN_RELEASE 0x80
  101. #define SUSTAIN_MASK 0xf0
  102. #define RELEASE_MASK 0x0f
  103. /*
  104. * Wave select (0xE0 to 0xF5)
  105. */
  106. #define WAVE_SELECT 0xe0
  107. /*
  108. * Offsets to the register banks for voices. Just add to the
  109. * voice number to get the register number.
  110. *
  111. * F-Number low bits (0xA0 to 0xA8).
  112. */
  113. #define FNUM_LOW 0xa0
  114. /*
  115. * F-number high bits / Key on / Block (octave) (0xB0 to 0xB8)
  116. */
  117. #define KEYON_BLOCK 0xb0
  118. #define KEYON_BIT 0x20
  119. #define BLOCKNUM_MASK 0x1c
  120. #define FNUM_HIGH_MASK 0x03
  121. /*
  122. * Feedback / Connection (0xc0 to 0xc8)
  123. *
  124. * These registers have two new bits when the OPL-3 mode
  125. * is selected. These bits controls connecting the voice
  126. * to the stereo channels. For 4 OP voices this bit is
  127. * defined in the second half of the voice (add 3 to the
  128. * register offset).
  129. *
  130. * For 4 OP voices the connection bit is used in the
  131. * both halves (gives 4 ways to connect the operators).
  132. */
  133. #define FEEDBACK_CONNECTION 0xc0
  134. #define FEEDBACK_MASK 0x0e /* Valid just for 1st OP of a voice */
  135. #define CONNECTION_BIT 0x01
  136. /*
  137. * In the 4 OP mode there is four possible configurations how the
  138. * operators can be connected together (in 2 OP modes there is just
  139. * AM or FM). The 4 OP connection mode is defined by the rightmost
  140. * bit of the FEEDBACK_CONNECTION (0xC0-0xC8) on the both halves.
  141. *
  142. * First half Second half Mode
  143. *
  144. * +---+
  145. * v |
  146. * 0 0 >+-1-+--2--3--4-->
  147. *
  148. *
  149. *
  150. * +---+
  151. * | |
  152. * 0 1 >+-1-+--2-+
  153. * |->
  154. * >--3----4-+
  155. *
  156. * +---+
  157. * | |
  158. * 1 0 >+-1-+-----+
  159. * |->
  160. * >--2--3--4-+
  161. *
  162. * +---+
  163. * | |
  164. * 1 1 >+-1-+--+
  165. * |
  166. * >--2--3-+->
  167. * |
  168. * >--4----+
  169. */
  170. #define STEREO_BITS 0x30 /* OPL-3 only */
  171. #define VOICE_TO_LEFT 0x10
  172. #define VOICE_TO_RIGHT 0x20
  173. /*
  174. * Definition table for the physical voices
  175. */
  176. struct physical_voice_info {
  177. unsigned char voice_num;
  178. unsigned char voice_mode; /* 0=unavailable, 2=2 OP, 4=4 OP */
  179. unsigned short ioaddr; /* I/O port (left or right side) */
  180. unsigned char op[4]; /* Operator offsets */
  181. };
  182. /*
  183. * There is 18 possible 2 OP voices
  184. * (9 in the left and 9 in the right).
  185. * The first OP is the modulator and 2nd is the carrier.
  186. *
  187. * The first three voices in the both sides may be connected
  188. * with another voice to a 4 OP voice. For example voice 0
  189. * can be connected with voice 3. The operators of voice 3 are
  190. * used as operators 3 and 4 of the new 4 OP voice.
  191. * In this case the 2 OP voice number 0 is the 'first half' and
  192. * voice 3 is the second.
  193. */
  194. #define USE_LEFT 0
  195. #define USE_RIGHT 1
  196. static struct physical_voice_info pv_map[18] =
  197. {
  198. /* No Mode Side OP1 OP2 OP3 OP4 */
  199. /* --------------------------------------------------- */
  200. { 0, 2, USE_LEFT, {0x00, 0x03, 0x08, 0x0b}},
  201. { 1, 2, USE_LEFT, {0x01, 0x04, 0x09, 0x0c}},
  202. { 2, 2, USE_LEFT, {0x02, 0x05, 0x0a, 0x0d}},
  203. { 3, 2, USE_LEFT, {0x08, 0x0b, 0x00, 0x00}},
  204. { 4, 2, USE_LEFT, {0x09, 0x0c, 0x00, 0x00}},
  205. { 5, 2, USE_LEFT, {0x0a, 0x0d, 0x00, 0x00}},
  206. { 6, 2, USE_LEFT, {0x10, 0x13, 0x00, 0x00}}, /* Used by percussive voices */
  207. { 7, 2, USE_LEFT, {0x11, 0x14, 0x00, 0x00}}, /* if the percussive mode */
  208. { 8, 2, USE_LEFT, {0x12, 0x15, 0x00, 0x00}}, /* is selected */
  209. { 0, 2, USE_RIGHT, {0x00, 0x03, 0x08, 0x0b}},
  210. { 1, 2, USE_RIGHT, {0x01, 0x04, 0x09, 0x0c}},
  211. { 2, 2, USE_RIGHT, {0x02, 0x05, 0x0a, 0x0d}},
  212. { 3, 2, USE_RIGHT, {0x08, 0x0b, 0x00, 0x00}},
  213. { 4, 2, USE_RIGHT, {0x09, 0x0c, 0x00, 0x00}},
  214. { 5, 2, USE_RIGHT, {0x0a, 0x0d, 0x00, 0x00}},
  215. { 6, 2, USE_RIGHT, {0x10, 0x13, 0x00, 0x00}},
  216. { 7, 2, USE_RIGHT, {0x11, 0x14, 0x00, 0x00}},
  217. { 8, 2, USE_RIGHT, {0x12, 0x15, 0x00, 0x00}}
  218. };
  219. /*
  220. * DMA buffer calls
  221. */