nec_vrc5477.c 54 KB

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  1. /***********************************************************************
  2. * Copyright 2001 MontaVista Software Inc.
  3. * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  4. *
  5. * drivers/sound/nec_vrc5477.c
  6. * AC97 sound dirver for NEC Vrc5477 chip (an integrated,
  7. * multi-function controller chip for MIPS CPUs)
  8. *
  9. * VRA support Copyright 2001 Bradley D. LaRonde <brad@ltc.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. ***********************************************************************
  16. */
  17. /*
  18. * This code is derived from ite8172.c, which is written by Steve Longerbeam.
  19. *
  20. * Features:
  21. * Currently we only support the following capabilities:
  22. * . mono output to PCM L/R (line out).
  23. * . stereo output to PCM L/R (line out).
  24. * . mono input from PCM L (line in).
  25. * . stereo output from PCM (line in).
  26. * . sampling rate at 48k or variable sampling rate
  27. * . support /dev/dsp, /dev/mixer devices, standard OSS devices.
  28. * . only support 16-bit PCM format (hardware limit, no software
  29. * translation)
  30. * . support duplex, but no trigger or realtime.
  31. *
  32. * Specifically the following are not supported:
  33. * . app-set frag size.
  34. * . mmap'ed buffer access
  35. */
  36. /*
  37. * Original comments from ite8172.c file.
  38. */
  39. /*
  40. *
  41. * Notes:
  42. *
  43. * 1. Much of the OSS buffer allocation, ioctl's, and mmap'ing are
  44. * taken, slightly modified or not at all, from the ES1371 driver,
  45. * so refer to the credits in es1371.c for those. The rest of the
  46. * code (probe, open, read, write, the ISR, etc.) is new.
  47. * 2. The following support is untested:
  48. * * Memory mapping the audio buffers, and the ioctl controls that go
  49. * with it.
  50. * * S/PDIF output.
  51. * 3. The following is not supported:
  52. * * I2S input.
  53. * * legacy audio mode.
  54. * 4. Support for volume button interrupts is implemented but doesn't
  55. * work yet.
  56. *
  57. * Revision history
  58. * 02.08.2001 0.1 Initial release
  59. */
  60. #include <linux/module.h>
  61. #include <linux/string.h>
  62. #include <linux/kernel.h>
  63. #include <linux/ioport.h>
  64. #include <linux/sched.h>
  65. #include <linux/delay.h>
  66. #include <linux/sound.h>
  67. #include <linux/slab.h>
  68. #include <linux/soundcard.h>
  69. #include <linux/pci.h>
  70. #include <linux/init.h>
  71. #include <linux/poll.h>
  72. #include <linux/bitops.h>
  73. #include <linux/proc_fs.h>
  74. #include <linux/spinlock.h>
  75. #include <linux/smp_lock.h>
  76. #include <linux/ac97_codec.h>
  77. #include <linux/mutex.h>
  78. #include <asm/io.h>
  79. #include <asm/dma.h>
  80. #include <asm/uaccess.h>
  81. /* -------------------debug macros -------------------------------------- */
  82. /* #undef VRC5477_AC97_DEBUG */
  83. #define VRC5477_AC97_DEBUG
  84. #undef VRC5477_AC97_VERBOSE_DEBUG
  85. /* #define VRC5477_AC97_VERBOSE_DEBUG */
  86. #if defined(VRC5477_AC97_VERBOSE_DEBUG)
  87. #define VRC5477_AC97_DEBUG
  88. #endif
  89. #if defined(VRC5477_AC97_DEBUG)
  90. #define ASSERT(x) if (!(x)) { \
  91. panic("assertion failed at %s:%d: %s\n", __FILE__, __LINE__, #x); }
  92. #else
  93. #define ASSERT(x)
  94. #endif /* VRC5477_AC97_DEBUG */
  95. #if defined(VRC5477_AC97_VERBOSE_DEBUG)
  96. static u16 inTicket; /* check sync between intr & write */
  97. static u16 outTicket;
  98. #endif
  99. /* --------------------------------------------------------------------- */
  100. #undef OSS_DOCUMENTED_MIXER_SEMANTICS
  101. static const unsigned sample_shift[] = { 0, 1, 1, 2 };
  102. #define VRC5477_INT_CLR 0x0
  103. #define VRC5477_INT_STATUS 0x0
  104. #define VRC5477_CODEC_WR 0x4
  105. #define VRC5477_CODEC_RD 0x8
  106. #define VRC5477_CTRL 0x18
  107. #define VRC5477_ACLINK_CTRL 0x1c
  108. #define VRC5477_INT_MASK 0x24
  109. #define VRC5477_DAC1_CTRL 0x30
  110. #define VRC5477_DAC1L 0x34
  111. #define VRC5477_DAC1_BADDR 0x38
  112. #define VRC5477_DAC2_CTRL 0x3c
  113. #define VRC5477_DAC2L 0x40
  114. #define VRC5477_DAC2_BADDR 0x44
  115. #define VRC5477_DAC3_CTRL 0x48
  116. #define VRC5477_DAC3L 0x4c
  117. #define VRC5477_DAC3_BADDR 0x50
  118. #define VRC5477_ADC1_CTRL 0x54
  119. #define VRC5477_ADC1L 0x58
  120. #define VRC5477_ADC1_BADDR 0x5c
  121. #define VRC5477_ADC2_CTRL 0x60
  122. #define VRC5477_ADC2L 0x64
  123. #define VRC5477_ADC2_BADDR 0x68
  124. #define VRC5477_ADC3_CTRL 0x6c
  125. #define VRC5477_ADC3L 0x70
  126. #define VRC5477_ADC3_BADDR 0x74
  127. #define VRC5477_CODEC_WR_RWC (1 << 23)
  128. #define VRC5477_CODEC_RD_RRDYA (1 << 31)
  129. #define VRC5477_CODEC_RD_RRDYD (1 << 30)
  130. #define VRC5477_ACLINK_CTRL_RST_ON (1 << 15)
  131. #define VRC5477_ACLINK_CTRL_RST_TIME 0x7f
  132. #define VRC5477_ACLINK_CTRL_SYNC_ON (1 << 30)
  133. #define VRC5477_ACLINK_CTRL_CK_STOP_ON (1 << 31)
  134. #define VRC5477_CTRL_DAC2ENB (1 << 15)
  135. #define VRC5477_CTRL_ADC2ENB (1 << 14)
  136. #define VRC5477_CTRL_DAC1ENB (1 << 13)
  137. #define VRC5477_CTRL_ADC1ENB (1 << 12)
  138. #define VRC5477_INT_MASK_NMASK (1 << 31)
  139. #define VRC5477_INT_MASK_DAC1END (1 << 5)
  140. #define VRC5477_INT_MASK_DAC2END (1 << 4)
  141. #define VRC5477_INT_MASK_DAC3END (1 << 3)
  142. #define VRC5477_INT_MASK_ADC1END (1 << 2)
  143. #define VRC5477_INT_MASK_ADC2END (1 << 1)
  144. #define VRC5477_INT_MASK_ADC3END (1 << 0)
  145. #define VRC5477_DMA_ACTIVATION (1 << 31)
  146. #define VRC5477_DMA_WIP (1 << 30)
  147. #define VRC5477_AC97_MODULE_NAME "NEC_Vrc5477_audio"
  148. #define PFX VRC5477_AC97_MODULE_NAME ": "
  149. /* --------------------------------------------------------------------- */
  150. struct vrc5477_ac97_state {
  151. /* list of vrc5477_ac97 devices */
  152. struct list_head devs;
  153. /* the corresponding pci_dev structure */
  154. struct pci_dev *dev;
  155. /* soundcore stuff */
  156. int dev_audio;
  157. /* hardware resources */
  158. unsigned long io;
  159. unsigned int irq;
  160. #ifdef VRC5477_AC97_DEBUG
  161. /* debug /proc entry */
  162. struct proc_dir_entry *ps;
  163. struct proc_dir_entry *ac97_ps;
  164. #endif /* VRC5477_AC97_DEBUG */
  165. struct ac97_codec *codec;
  166. unsigned dacChannels, adcChannels;
  167. unsigned short dacRate, adcRate;
  168. unsigned short extended_status;
  169. spinlock_t lock;
  170. struct mutex open_mutex;
  171. mode_t open_mode;
  172. wait_queue_head_t open_wait;
  173. struct dmabuf {
  174. void *lbuf, *rbuf;
  175. dma_addr_t lbufDma, rbufDma;
  176. unsigned bufOrder;
  177. unsigned numFrag;
  178. unsigned fragShift;
  179. unsigned fragSize; /* redundant */
  180. unsigned fragTotalSize; /* = numFrag * fragSize(real) */
  181. unsigned nextIn;
  182. unsigned nextOut;
  183. int count;
  184. unsigned error; /* over/underrun */
  185. wait_queue_head_t wait;
  186. /* OSS stuff */
  187. unsigned stopped:1;
  188. unsigned ready:1;
  189. } dma_dac, dma_adc;
  190. #define WORK_BUF_SIZE 2048
  191. struct {
  192. u16 lchannel;
  193. u16 rchannel;
  194. } workBuf[WORK_BUF_SIZE/4];
  195. };
  196. /* --------------------------------------------------------------------- */
  197. static LIST_HEAD(devs);
  198. /* --------------------------------------------------------------------- */
  199. static inline unsigned ld2(unsigned int x)
  200. {
  201. unsigned r = 0;
  202. if (x >= 0x10000) {
  203. x >>= 16;
  204. r += 16;
  205. }
  206. if (x >= 0x100) {
  207. x >>= 8;
  208. r += 8;
  209. }
  210. if (x >= 0x10) {
  211. x >>= 4;
  212. r += 4;
  213. }
  214. if (x >= 4) {
  215. x >>= 2;
  216. r += 2;
  217. }
  218. if (x >= 2)
  219. r++;
  220. return r;
  221. }
  222. /* --------------------------------------------------------------------- */
  223. static u16 rdcodec(struct ac97_codec *codec, u8 addr)
  224. {
  225. struct vrc5477_ac97_state *s =
  226. (struct vrc5477_ac97_state *)codec->private_data;
  227. unsigned long flags;
  228. u32 result;
  229. spin_lock_irqsave(&s->lock, flags);
  230. /* wait until we can access codec registers */
  231. while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
  232. /* write the address and "read" command to codec */
  233. addr = addr & 0x7f;
  234. outl((addr << 16) | VRC5477_CODEC_WR_RWC, s->io + VRC5477_CODEC_WR);
  235. /* get the return result */
  236. udelay(100); /* workaround hardware bug */
  237. while ( (result = inl(s->io + VRC5477_CODEC_RD)) &
  238. (VRC5477_CODEC_RD_RRDYA | VRC5477_CODEC_RD_RRDYD) ) {
  239. /* we get either addr or data, or both */
  240. if (result & VRC5477_CODEC_RD_RRDYA) {
  241. ASSERT(addr == ((result >> 16) & 0x7f) );
  242. }
  243. if (result & VRC5477_CODEC_RD_RRDYD) {
  244. break;
  245. }
  246. }
  247. spin_unlock_irqrestore(&s->lock, flags);
  248. return result & 0xffff;
  249. }
  250. static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
  251. {
  252. struct vrc5477_ac97_state *s =
  253. (struct vrc5477_ac97_state *)codec->private_data;
  254. unsigned long flags;
  255. spin_lock_irqsave(&s->lock, flags);
  256. /* wait until we can access codec registers */
  257. while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
  258. /* write the address and value to codec */
  259. outl((addr << 16) | data, s->io + VRC5477_CODEC_WR);
  260. spin_unlock_irqrestore(&s->lock, flags);
  261. }
  262. static void waitcodec(struct ac97_codec *codec)
  263. {
  264. struct vrc5477_ac97_state *s =
  265. (struct vrc5477_ac97_state *)codec->private_data;
  266. /* wait until we can access codec registers */
  267. while (inl(s->io + VRC5477_CODEC_WR) & 0x80000000);
  268. }
  269. static int ac97_codec_not_present(struct ac97_codec *codec)
  270. {
  271. struct vrc5477_ac97_state *s =
  272. (struct vrc5477_ac97_state *)codec->private_data;
  273. unsigned long flags;
  274. unsigned short count = 0xffff;
  275. spin_lock_irqsave(&s->lock, flags);
  276. /* wait until we can access codec registers */
  277. do {
  278. if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
  279. break;
  280. } while (--count);
  281. if (count == 0) {
  282. spin_unlock_irqrestore(&s->lock, flags);
  283. return -1;
  284. }
  285. /* write 0 to reset */
  286. outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
  287. /* test whether we get a response from ac97 chip */
  288. count = 0xffff;
  289. do {
  290. if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
  291. break;
  292. } while (--count);
  293. if (count == 0) {
  294. spin_unlock_irqrestore(&s->lock, flags);
  295. return -1;
  296. }
  297. spin_unlock_irqrestore(&s->lock, flags);
  298. return 0;
  299. }
  300. /* --------------------------------------------------------------------- */
  301. static void vrc5477_ac97_delay(int msec)
  302. {
  303. unsigned long tmo;
  304. signed long tmo2;
  305. if (in_interrupt())
  306. return;
  307. tmo = jiffies + (msec*HZ)/1000;
  308. for (;;) {
  309. tmo2 = tmo - jiffies;
  310. if (tmo2 <= 0)
  311. break;
  312. schedule_timeout(tmo2);
  313. }
  314. }
  315. static void set_adc_rate(struct vrc5477_ac97_state *s, unsigned rate)
  316. {
  317. wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, rate);
  318. s->adcRate = rate;
  319. }
  320. static void set_dac_rate(struct vrc5477_ac97_state *s, unsigned rate)
  321. {
  322. if(s->extended_status & AC97_EXTSTAT_VRA) {
  323. wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, rate);
  324. s->dacRate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
  325. }
  326. }
  327. static int ac97_codec_not_present(struct ac97_codec *codec)
  328. {
  329. struct vrc5477_ac97_state *s =
  330. (struct vrc5477_ac97_state *)codec->private_data;
  331. unsigned long flags;
  332. unsigned short count = 0xffff;
  333. spin_lock_irqsave(&s->lock, flags);
  334. /* wait until we can access codec registers */
  335. do {
  336. if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
  337. break;
  338. } while (--count);
  339. if (count == 0) {
  340. spin_unlock_irqrestore(&s->lock, flags);
  341. return -1;
  342. }
  343. /* write 0 to reset */
  344. outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
  345. /* test whether we get a response from ac97 chip */
  346. count = 0xffff;
  347. do {
  348. if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
  349. break;
  350. } while (--count);
  351. if (count == 0) {
  352. spin_unlock_irqrestore(&s->lock, flags);
  353. return -1;
  354. }
  355. spin_unlock_irqrestore(&s->lock, flags);
  356. return 0;
  357. }
  358. /* --------------------------------------------------------------------- */
  359. static inline void
  360. stop_dac(struct vrc5477_ac97_state *s)
  361. {
  362. struct dmabuf* db = &s->dma_dac;
  363. unsigned long flags;
  364. u32 temp;
  365. spin_lock_irqsave(&s->lock, flags);
  366. if (db->stopped) {
  367. spin_unlock_irqrestore(&s->lock, flags);
  368. return;
  369. }
  370. /* deactivate the dma */
  371. outl(0, s->io + VRC5477_DAC1_CTRL);
  372. outl(0, s->io + VRC5477_DAC2_CTRL);
  373. /* wait for DAM completely stop */
  374. while (inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
  375. while (inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
  376. /* disable dac slots in aclink */
  377. temp = inl(s->io + VRC5477_CTRL);
  378. temp &= ~ (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
  379. outl (temp, s->io + VRC5477_CTRL);
  380. /* disable interrupts */
  381. temp = inl(s->io + VRC5477_INT_MASK);
  382. temp &= ~ (VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END);
  383. outl (temp, s->io + VRC5477_INT_MASK);
  384. /* clear pending ones */
  385. outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END,
  386. s->io + VRC5477_INT_CLR);
  387. db->stopped = 1;
  388. spin_unlock_irqrestore(&s->lock, flags);
  389. }
  390. static void start_dac(struct vrc5477_ac97_state *s)
  391. {
  392. struct dmabuf* db = &s->dma_dac;
  393. unsigned long flags;
  394. u32 dmaLength;
  395. u32 temp;
  396. spin_lock_irqsave(&s->lock, flags);
  397. if (!db->stopped) {
  398. spin_unlock_irqrestore(&s->lock, flags);
  399. return;
  400. }
  401. /* we should have some data to do the DMA trasnfer */
  402. ASSERT(db->count >= db->fragSize);
  403. /* clear pending fales interrupts */
  404. outl(VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END,
  405. s->io + VRC5477_INT_CLR);
  406. /* enable interrupts */
  407. temp = inl(s->io + VRC5477_INT_MASK);
  408. temp |= VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
  409. outl(temp, s->io + VRC5477_INT_MASK);
  410. /* setup dma base addr */
  411. outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC1_BADDR);
  412. if (s->dacChannels == 1) {
  413. outl(db->lbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
  414. } else {
  415. outl(db->rbufDma + db->nextOut, s->io + VRC5477_DAC2_BADDR);
  416. }
  417. /* set dma length, in the unit of 0x10 bytes */
  418. dmaLength = db->fragSize >> 4;
  419. outl(dmaLength, s->io + VRC5477_DAC1L);
  420. outl(dmaLength, s->io + VRC5477_DAC2L);
  421. /* activate dma */
  422. outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC1_CTRL);
  423. outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_DAC2_CTRL);
  424. /* enable dac slots - we should hear the music now! */
  425. temp = inl(s->io + VRC5477_CTRL);
  426. temp |= (VRC5477_CTRL_DAC1ENB | VRC5477_CTRL_DAC2ENB);
  427. outl (temp, s->io + VRC5477_CTRL);
  428. /* it is time to setup next dma transfer */
  429. ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
  430. ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
  431. temp = db->nextOut + db->fragSize;
  432. if (temp >= db->fragTotalSize) {
  433. ASSERT(temp == db->fragTotalSize);
  434. temp = 0;
  435. }
  436. outl(db->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
  437. if (s->dacChannels == 1) {
  438. outl(db->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
  439. } else {
  440. outl(db->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
  441. }
  442. db->stopped = 0;
  443. #if defined(VRC5477_AC97_VERBOSE_DEBUG)
  444. outTicket = *(u16*)(db->lbuf+db->nextOut);
  445. if (db->count > db->fragSize) {
  446. ASSERT((u16)(outTicket+1) == *(u16*)(db->lbuf+temp));
  447. }
  448. #endif
  449. spin_unlock_irqrestore(&s->lock, flags);
  450. }
  451. static inline void stop_adc(struct vrc5477_ac97_state *s)
  452. {
  453. struct dmabuf* db = &s->dma_adc;
  454. unsigned long flags;
  455. u32 temp;
  456. spin_lock_irqsave(&s->lock, flags);
  457. if (db->stopped) {
  458. spin_unlock_irqrestore(&s->lock, flags);
  459. return;
  460. }
  461. /* deactivate the dma */
  462. outl(0, s->io + VRC5477_ADC1_CTRL);
  463. outl(0, s->io + VRC5477_ADC2_CTRL);
  464. /* disable adc slots in aclink */
  465. temp = inl(s->io + VRC5477_CTRL);
  466. temp &= ~ (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
  467. outl (temp, s->io + VRC5477_CTRL);
  468. /* disable interrupts */
  469. temp = inl(s->io + VRC5477_INT_MASK);
  470. temp &= ~ (VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END);
  471. outl (temp, s->io + VRC5477_INT_MASK);
  472. /* clear pending ones */
  473. outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END,
  474. s->io + VRC5477_INT_CLR);
  475. db->stopped = 1;
  476. spin_unlock_irqrestore(&s->lock, flags);
  477. }
  478. static void start_adc(struct vrc5477_ac97_state *s)
  479. {
  480. struct dmabuf* db = &s->dma_adc;
  481. unsigned long flags;
  482. u32 dmaLength;
  483. u32 temp;
  484. spin_lock_irqsave(&s->lock, flags);
  485. if (!db->stopped) {
  486. spin_unlock_irqrestore(&s->lock, flags);
  487. return;
  488. }
  489. /* we should at least have some free space in the buffer */
  490. ASSERT(db->count < db->fragTotalSize - db->fragSize * 2);
  491. /* clear pending ones */
  492. outl(VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END,
  493. s->io + VRC5477_INT_CLR);
  494. /* enable interrupts */
  495. temp = inl(s->io + VRC5477_INT_MASK);
  496. temp |= VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
  497. outl(temp, s->io + VRC5477_INT_MASK);
  498. /* setup dma base addr */
  499. outl(db->lbufDma + db->nextIn, s->io + VRC5477_ADC1_BADDR);
  500. outl(db->rbufDma + db->nextIn, s->io + VRC5477_ADC2_BADDR);
  501. /* setup dma length */
  502. dmaLength = db->fragSize >> 4;
  503. outl(dmaLength, s->io + VRC5477_ADC1L);
  504. outl(dmaLength, s->io + VRC5477_ADC2L);
  505. /* activate dma */
  506. outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC1_CTRL);
  507. outl(VRC5477_DMA_ACTIVATION, s->io + VRC5477_ADC2_CTRL);
  508. /* enable adc slots */
  509. temp = inl(s->io + VRC5477_CTRL);
  510. temp |= (VRC5477_CTRL_ADC1ENB | VRC5477_CTRL_ADC2ENB);
  511. outl (temp, s->io + VRC5477_CTRL);
  512. /* it is time to setup next dma transfer */
  513. temp = db->nextIn + db->fragSize;
  514. if (temp >= db->fragTotalSize) {
  515. ASSERT(temp == db->fragTotalSize);
  516. temp = 0;
  517. }
  518. outl(db->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
  519. outl(db->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
  520. db->stopped = 0;
  521. spin_unlock_irqrestore(&s->lock, flags);
  522. }
  523. /* --------------------------------------------------------------------- */
  524. #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
  525. #define DMABUF_MINORDER 1
  526. static inline void dealloc_dmabuf(struct vrc5477_ac97_state *s,
  527. struct dmabuf *db)
  528. {
  529. if (db->lbuf) {
  530. ASSERT(db->rbuf);
  531. pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
  532. db->lbuf, db->lbufDma);
  533. pci_free_consistent(s->dev, PAGE_SIZE << db->bufOrder,
  534. db->rbuf, db->rbufDma);
  535. db->lbuf = db->rbuf = NULL;
  536. }
  537. db->nextIn = db->nextOut = 0;
  538. db->ready = 0;
  539. }
  540. static int prog_dmabuf(struct vrc5477_ac97_state *s,
  541. struct dmabuf *db,
  542. unsigned rate)
  543. {
  544. int order;
  545. unsigned bufsize;
  546. if (!db->lbuf) {
  547. ASSERT(!db->rbuf);
  548. db->ready = 0;
  549. for (order = DMABUF_DEFAULTORDER;
  550. order >= DMABUF_MINORDER;
  551. order--) {
  552. db->lbuf = pci_alloc_consistent(s->dev,
  553. PAGE_SIZE << order,
  554. &db->lbufDma);
  555. db->rbuf = pci_alloc_consistent(s->dev,
  556. PAGE_SIZE << order,
  557. &db->rbufDma);
  558. if (db->lbuf && db->rbuf) break;
  559. if (db->lbuf) {
  560. ASSERT(!db->rbuf);
  561. pci_free_consistent(s->dev,
  562. PAGE_SIZE << order,
  563. db->lbuf,
  564. db->lbufDma);
  565. }
  566. }
  567. if (!db->lbuf) {
  568. ASSERT(!db->rbuf);
  569. return -ENOMEM;
  570. }
  571. db->bufOrder = order;
  572. }
  573. db->count = 0;
  574. db->nextIn = db->nextOut = 0;
  575. bufsize = PAGE_SIZE << db->bufOrder;
  576. db->fragShift = ld2(rate * 2 / 100);
  577. if (db->fragShift < 4) db->fragShift = 4;
  578. db->numFrag = bufsize >> db->fragShift;
  579. while (db->numFrag < 4 && db->fragShift > 4) {
  580. db->fragShift--;
  581. db->numFrag = bufsize >> db->fragShift;
  582. }
  583. db->fragSize = 1 << db->fragShift;
  584. db->fragTotalSize = db->numFrag << db->fragShift;
  585. memset(db->lbuf, 0, db->fragTotalSize);
  586. memset(db->rbuf, 0, db->fragTotalSize);
  587. db->ready = 1;
  588. return 0;
  589. }
  590. static inline int prog_dmabuf_adc(struct vrc5477_ac97_state *s)
  591. {
  592. stop_adc(s);
  593. return prog_dmabuf(s, &s->dma_adc, s->adcRate);
  594. }
  595. static inline int prog_dmabuf_dac(struct vrc5477_ac97_state *s)
  596. {
  597. stop_dac(s);
  598. return prog_dmabuf(s, &s->dma_dac, s->dacRate);
  599. }
  600. /* --------------------------------------------------------------------- */
  601. /* hold spinlock for the following! */
  602. static inline void vrc5477_ac97_adc_interrupt(struct vrc5477_ac97_state *s)
  603. {
  604. struct dmabuf* adc = &s->dma_adc;
  605. unsigned temp;
  606. /* we need two frags avaiable because one is already being used
  607. * and the other will be used when next interrupt happens.
  608. */
  609. if (adc->count >= adc->fragTotalSize - adc->fragSize) {
  610. stop_adc(s);
  611. adc->error++;
  612. printk(KERN_INFO PFX "adc overrun\n");
  613. return;
  614. }
  615. /* set the base addr for next DMA transfer */
  616. temp = adc->nextIn + 2*adc->fragSize;
  617. if (temp >= adc->fragTotalSize) {
  618. ASSERT( (temp == adc->fragTotalSize) ||
  619. (temp == adc->fragTotalSize + adc->fragSize) );
  620. temp -= adc->fragTotalSize;
  621. }
  622. outl(adc->lbufDma + temp, s->io + VRC5477_ADC1_BADDR);
  623. outl(adc->rbufDma + temp, s->io + VRC5477_ADC2_BADDR);
  624. /* adjust nextIn */
  625. adc->nextIn += adc->fragSize;
  626. if (adc->nextIn >= adc->fragTotalSize) {
  627. ASSERT(adc->nextIn == adc->fragTotalSize);
  628. adc->nextIn = 0;
  629. }
  630. /* adjust count */
  631. adc->count += adc->fragSize;
  632. /* wake up anybody listening */
  633. if (waitqueue_active(&adc->wait)) {
  634. wake_up_interruptible(&adc->wait);
  635. }
  636. }
  637. static inline void vrc5477_ac97_dac_interrupt(struct vrc5477_ac97_state *s)
  638. {
  639. struct dmabuf* dac = &s->dma_dac;
  640. unsigned temp;
  641. /* next DMA transfer should already started */
  642. // ASSERT(inl(s->io + VRC5477_DAC1_CTRL) & VRC5477_DMA_WIP);
  643. // ASSERT(inl(s->io + VRC5477_DAC2_CTRL) & VRC5477_DMA_WIP);
  644. /* let us set for next next DMA transfer */
  645. temp = dac->nextOut + dac->fragSize*2;
  646. if (temp >= dac->fragTotalSize) {
  647. ASSERT( (temp == dac->fragTotalSize) ||
  648. (temp == dac->fragTotalSize + dac->fragSize) );
  649. temp -= dac->fragTotalSize;
  650. }
  651. outl(dac->lbufDma + temp, s->io + VRC5477_DAC1_BADDR);
  652. if (s->dacChannels == 1) {
  653. outl(dac->lbufDma + temp, s->io + VRC5477_DAC2_BADDR);
  654. } else {
  655. outl(dac->rbufDma + temp, s->io + VRC5477_DAC2_BADDR);
  656. }
  657. #if defined(VRC5477_AC97_VERBOSE_DEBUG)
  658. if (*(u16*)(dac->lbuf + dac->nextOut) != outTicket) {
  659. printk("assert fail: - %d vs %d\n",
  660. *(u16*)(dac->lbuf + dac->nextOut),
  661. outTicket);
  662. ASSERT(1 == 0);
  663. }
  664. #endif
  665. /* adjust nextOut pointer */
  666. dac->nextOut += dac->fragSize;
  667. if (dac->nextOut >= dac->fragTotalSize) {
  668. ASSERT(dac->nextOut == dac->fragTotalSize);
  669. dac->nextOut = 0;
  670. }
  671. /* adjust count */
  672. dac->count -= dac->fragSize;
  673. if (dac->count <=0 ) {
  674. /* buffer under run */
  675. dac->count = 0;
  676. dac->nextIn = dac->nextOut;
  677. stop_dac(s);
  678. }
  679. #if defined(VRC5477_AC97_VERBOSE_DEBUG)
  680. if (dac->count) {
  681. outTicket ++;
  682. ASSERT(*(u16*)(dac->lbuf + dac->nextOut) == outTicket);
  683. }
  684. #endif
  685. /* we cannot have both under run and someone is waiting on us */
  686. ASSERT(! (waitqueue_active(&dac->wait) && (dac->count <= 0)) );
  687. /* wake up anybody listening */
  688. if (waitqueue_active(&dac->wait))
  689. wake_up_interruptible(&dac->wait);
  690. }
  691. static irqreturn_t vrc5477_ac97_interrupt(int irq, void *dev_id)
  692. {
  693. struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)dev_id;
  694. u32 irqStatus;
  695. u32 adcInterrupts, dacInterrupts;
  696. spin_lock(&s->lock);
  697. /* get irqStatus and clear the detected ones */
  698. irqStatus = inl(s->io + VRC5477_INT_STATUS);
  699. outl(irqStatus, s->io + VRC5477_INT_CLR);
  700. /* let us see what we get */
  701. dacInterrupts = VRC5477_INT_MASK_DAC1END | VRC5477_INT_MASK_DAC2END;
  702. adcInterrupts = VRC5477_INT_MASK_ADC1END | VRC5477_INT_MASK_ADC2END;
  703. if (irqStatus & dacInterrupts) {
  704. /* we should get both interrupts, but just in case ... */
  705. if (irqStatus & VRC5477_INT_MASK_DAC1END) {
  706. vrc5477_ac97_dac_interrupt(s);
  707. }
  708. if ( (irqStatus & dacInterrupts) != dacInterrupts ) {
  709. printk(KERN_WARNING "vrc5477_ac97 : dac interrupts not in sync!!!\n");
  710. stop_dac(s);
  711. start_dac(s);
  712. }
  713. } else if (irqStatus & adcInterrupts) {
  714. /* we should get both interrupts, but just in case ... */
  715. if(irqStatus & VRC5477_INT_MASK_ADC1END) {
  716. vrc5477_ac97_adc_interrupt(s);
  717. }
  718. if ( (irqStatus & adcInterrupts) != adcInterrupts ) {
  719. printk(KERN_WARNING "vrc5477_ac97 : adc interrupts not in sync!!!\n");
  720. stop_adc(s);
  721. start_adc(s);
  722. }
  723. }
  724. spin_unlock(&s->lock);
  725. return IRQ_HANDLED;
  726. }
  727. /* --------------------------------------------------------------------- */
  728. static int vrc5477_ac97_open_mixdev(struct inode *inode, struct file *file)
  729. {
  730. int minor = iminor(inode);
  731. struct list_head *list;
  732. struct vrc5477_ac97_state *s;
  733. for (list = devs.next; ; list = list->next) {
  734. if (list == &devs)
  735. return -ENODEV;
  736. s = list_entry(list, struct vrc5477_ac97_state, devs);
  737. if (s->codec->dev_mixer == minor)
  738. break;
  739. }
  740. file->private_data = s;
  741. return nonseekable_open(inode, file);
  742. }
  743. static int vrc5477_ac97_release_mixdev(struct inode *inode, struct file *file)
  744. {
  745. return 0;
  746. }
  747. static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
  748. unsigned long arg)
  749. {
  750. return codec->mixer_ioctl(codec, cmd, arg);
  751. }
  752. static int vrc5477_ac97_ioctl_mixdev(struct inode *inode, struct file *file,
  753. unsigned int cmd, unsigned long arg)
  754. {
  755. struct vrc5477_ac97_state *s =
  756. (struct vrc5477_ac97_state *)file->private_data;
  757. struct ac97_codec *codec = s->codec;
  758. return mixdev_ioctl(codec, cmd, arg);
  759. }
  760. static /*const*/ struct file_operations vrc5477_ac97_mixer_fops = {
  761. .owner = THIS_MODULE,
  762. .llseek = no_llseek,
  763. .ioctl = vrc5477_ac97_ioctl_mixdev,
  764. .open = vrc5477_ac97_open_mixdev,
  765. .release = vrc5477_ac97_release_mixdev,
  766. };
  767. /* --------------------------------------------------------------------- */
  768. static int drain_dac(struct vrc5477_ac97_state *s, int nonblock)
  769. {
  770. unsigned long flags;
  771. int count, tmo;
  772. if (!s->dma_dac.ready)
  773. return 0;
  774. for (;;) {
  775. spin_lock_irqsave(&s->lock, flags);
  776. count = s->dma_dac.count;
  777. spin_unlock_irqrestore(&s->lock, flags);
  778. if (count <= 0)
  779. break;
  780. if (signal_pending(current))
  781. break;
  782. if (nonblock)
  783. return -EBUSY;
  784. tmo = 1000 * count / s->dacRate / 2;
  785. vrc5477_ac97_delay(tmo);
  786. }
  787. if (signal_pending(current))
  788. return -ERESTARTSYS;
  789. return 0;
  790. }
  791. /* --------------------------------------------------------------------- */
  792. static inline int
  793. copy_two_channel_adc_to_user(struct vrc5477_ac97_state *s,
  794. char *buffer,
  795. int copyCount)
  796. {
  797. struct dmabuf *db = &s->dma_adc;
  798. int bufStart = db->nextOut;
  799. for (; copyCount > 0; ) {
  800. int i;
  801. int count = copyCount;
  802. if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
  803. for (i=0; i< count/2; i++) {
  804. s->workBuf[i].lchannel =
  805. *(u16*)(db->lbuf + bufStart + i*2);
  806. s->workBuf[i].rchannel =
  807. *(u16*)(db->rbuf + bufStart + i*2);
  808. }
  809. if (copy_to_user(buffer, s->workBuf, count*2)) {
  810. return -1;
  811. }
  812. copyCount -= count;
  813. bufStart += count;
  814. ASSERT(bufStart <= db->fragTotalSize);
  815. buffer += count *2;
  816. }
  817. return 0;
  818. }
  819. /* return the total bytes that is copied */
  820. static inline int
  821. copy_adc_to_user(struct vrc5477_ac97_state *s,
  822. char * buffer,
  823. size_t count,
  824. int avail)
  825. {
  826. struct dmabuf *db = &s->dma_adc;
  827. int copyCount=0;
  828. int copyFragCount=0;
  829. int totalCopyCount = 0;
  830. int totalCopyFragCount = 0;
  831. unsigned long flags;
  832. /* adjust count to signel channel byte count */
  833. count >>= s->adcChannels - 1;
  834. /* we may have to "copy" twice as ring buffer wraps around */
  835. for (; (avail > 0) && (count > 0); ) {
  836. /* determine max possible copy count for single channel */
  837. copyCount = count;
  838. if (copyCount > avail) {
  839. copyCount = avail;
  840. }
  841. if (copyCount + db->nextOut > db->fragTotalSize) {
  842. copyCount = db->fragTotalSize - db->nextOut;
  843. ASSERT((copyCount % db->fragSize) == 0);
  844. }
  845. copyFragCount = (copyCount-1) >> db->fragShift;
  846. copyFragCount = (copyFragCount+1) << db->fragShift;
  847. ASSERT(copyFragCount >= copyCount);
  848. /* we copy differently based on adc channels */
  849. if (s->adcChannels == 1) {
  850. if (copy_to_user(buffer,
  851. db->lbuf + db->nextOut,
  852. copyCount))
  853. return -1;
  854. } else {
  855. /* *sigh* we have to mix two streams into one */
  856. if (copy_two_channel_adc_to_user(s, buffer, copyCount))
  857. return -1;
  858. }
  859. count -= copyCount;
  860. totalCopyCount += copyCount;
  861. avail -= copyFragCount;
  862. totalCopyFragCount += copyFragCount;
  863. buffer += copyCount << (s->adcChannels-1);
  864. db->nextOut += copyFragCount;
  865. if (db->nextOut >= db->fragTotalSize) {
  866. ASSERT(db->nextOut == db->fragTotalSize);
  867. db->nextOut = 0;
  868. }
  869. ASSERT((copyFragCount % db->fragSize) == 0);
  870. ASSERT( (count == 0) || (copyCount == copyFragCount));
  871. }
  872. spin_lock_irqsave(&s->lock, flags);
  873. db->count -= totalCopyFragCount;
  874. spin_unlock_irqrestore(&s->lock, flags);
  875. return totalCopyCount << (s->adcChannels-1);
  876. }
  877. static ssize_t
  878. vrc5477_ac97_read(struct file *file,
  879. char *buffer,
  880. size_t count,
  881. loff_t *ppos)
  882. {
  883. struct vrc5477_ac97_state *s =
  884. (struct vrc5477_ac97_state *)file->private_data;
  885. struct dmabuf *db = &s->dma_adc;
  886. ssize_t ret = 0;
  887. unsigned long flags;
  888. int copyCount;
  889. size_t avail;
  890. if (!access_ok(VERIFY_WRITE, buffer, count))
  891. return -EFAULT;
  892. ASSERT(db->ready);
  893. while (count > 0) {
  894. // wait for samples in capture buffer
  895. do {
  896. spin_lock_irqsave(&s->lock, flags);
  897. if (db->stopped)
  898. start_adc(s);
  899. avail = db->count;
  900. spin_unlock_irqrestore(&s->lock, flags);
  901. if (avail <= 0) {
  902. if (file->f_flags & O_NONBLOCK) {
  903. if (!ret)
  904. ret = -EAGAIN;
  905. return ret;
  906. }
  907. interruptible_sleep_on(&db->wait);
  908. if (signal_pending(current)) {
  909. if (!ret)
  910. ret = -ERESTARTSYS;
  911. return ret;
  912. }
  913. }
  914. } while (avail <= 0);
  915. ASSERT( (avail % db->fragSize) == 0);
  916. copyCount = copy_adc_to_user(s, buffer, count, avail);
  917. if (copyCount <=0 ) {
  918. if (!ret) ret = -EFAULT;
  919. return ret;
  920. }
  921. count -= copyCount;
  922. buffer += copyCount;
  923. ret += copyCount;
  924. } // while (count > 0)
  925. return ret;
  926. }
  927. static inline int
  928. copy_two_channel_dac_from_user(struct vrc5477_ac97_state *s,
  929. const char *buffer,
  930. int copyCount)
  931. {
  932. struct dmabuf *db = &s->dma_dac;
  933. int bufStart = db->nextIn;
  934. ASSERT(db->ready);
  935. for (; copyCount > 0; ) {
  936. int i;
  937. int count = copyCount;
  938. if (count > WORK_BUF_SIZE/2) count = WORK_BUF_SIZE/2;
  939. if (copy_from_user(s->workBuf, buffer, count*2)) {
  940. return -1;
  941. }
  942. for (i=0; i< count/2; i++) {
  943. *(u16*)(db->lbuf + bufStart + i*2) =
  944. s->workBuf[i].lchannel;
  945. *(u16*)(db->rbuf + bufStart + i*2) =
  946. s->workBuf[i].rchannel;
  947. }
  948. copyCount -= count;
  949. bufStart += count;
  950. ASSERT(bufStart <= db->fragTotalSize);
  951. buffer += count *2;
  952. }
  953. return 0;
  954. }
  955. /* return the total bytes that is copied */
  956. static inline int
  957. copy_dac_from_user(struct vrc5477_ac97_state *s,
  958. const char *buffer,
  959. size_t count,
  960. int avail)
  961. {
  962. struct dmabuf *db = &s->dma_dac;
  963. int copyCount=0;
  964. int copyFragCount=0;
  965. int totalCopyCount = 0;
  966. int totalCopyFragCount = 0;
  967. unsigned long flags;
  968. #if defined(VRC5477_AC97_VERBOSE_DEBUG)
  969. int i;
  970. #endif
  971. /* adjust count to signel channel byte count */
  972. count >>= s->dacChannels - 1;
  973. /* we may have to "copy" twice as ring buffer wraps around */
  974. for (; (avail > 0) && (count > 0); ) {
  975. /* determine max possible copy count for single channel */
  976. copyCount = count;
  977. if (copyCount > avail) {
  978. copyCount = avail;
  979. }
  980. if (copyCount + db->nextIn > db->fragTotalSize) {
  981. copyCount = db->fragTotalSize - db->nextIn;
  982. ASSERT(copyCount > 0);
  983. }
  984. copyFragCount = copyCount;
  985. ASSERT(copyFragCount >= copyCount);
  986. /* we copy differently based on the number channels */
  987. if (s->dacChannels == 1) {
  988. if (copy_from_user(db->lbuf + db->nextIn,
  989. buffer,
  990. copyCount))
  991. return -1;
  992. /* fill gaps with 0 */
  993. memset(db->lbuf + db->nextIn + copyCount,
  994. 0,
  995. copyFragCount - copyCount);
  996. } else {
  997. /* we have demux the stream into two separate ones */
  998. if (copy_two_channel_dac_from_user(s, buffer, copyCount))
  999. return -1;
  1000. /* fill gaps with 0 */
  1001. memset(db->lbuf + db->nextIn + copyCount,
  1002. 0,
  1003. copyFragCount - copyCount);
  1004. memset(db->rbuf + db->nextIn + copyCount,
  1005. 0,
  1006. copyFragCount - copyCount);
  1007. }
  1008. #if defined(VRC5477_AC97_VERBOSE_DEBUG)
  1009. for (i=0; i< copyFragCount; i+= db->fragSize) {
  1010. *(u16*)(db->lbuf + db->nextIn + i) = inTicket ++;
  1011. }
  1012. #endif
  1013. count -= copyCount;
  1014. totalCopyCount += copyCount;
  1015. avail -= copyFragCount;
  1016. totalCopyFragCount += copyFragCount;
  1017. buffer += copyCount << (s->dacChannels - 1);
  1018. db->nextIn += copyFragCount;
  1019. if (db->nextIn >= db->fragTotalSize) {
  1020. ASSERT(db->nextIn == db->fragTotalSize);
  1021. db->nextIn = 0;
  1022. }
  1023. ASSERT( (count == 0) || (copyCount == copyFragCount));
  1024. }
  1025. spin_lock_irqsave(&s->lock, flags);
  1026. db->count += totalCopyFragCount;
  1027. if (db->stopped) {
  1028. start_dac(s);
  1029. }
  1030. /* nextIn should not be equal to nextOut unless we are full */
  1031. ASSERT( ( (db->count == db->fragTotalSize) &&
  1032. (db->nextIn == db->nextOut) ) ||
  1033. ( (db->count < db->fragTotalSize) &&
  1034. (db->nextIn != db->nextOut) ) );
  1035. spin_unlock_irqrestore(&s->lock, flags);
  1036. return totalCopyCount << (s->dacChannels-1);
  1037. }
  1038. static ssize_t vrc5477_ac97_write(struct file *file, const char *buffer,
  1039. size_t count, loff_t *ppos)
  1040. {
  1041. struct vrc5477_ac97_state *s =
  1042. (struct vrc5477_ac97_state *)file->private_data;
  1043. struct dmabuf *db = &s->dma_dac;
  1044. ssize_t ret;
  1045. unsigned long flags;
  1046. int copyCount, avail;
  1047. if (!access_ok(VERIFY_READ, buffer, count))
  1048. return -EFAULT;
  1049. ret = 0;
  1050. while (count > 0) {
  1051. // wait for space in playback buffer
  1052. do {
  1053. spin_lock_irqsave(&s->lock, flags);
  1054. avail = db->fragTotalSize - db->count;
  1055. spin_unlock_irqrestore(&s->lock, flags);
  1056. if (avail <= 0) {
  1057. if (file->f_flags & O_NONBLOCK) {
  1058. if (!ret)
  1059. ret = -EAGAIN;
  1060. return ret;
  1061. }
  1062. interruptible_sleep_on(&db->wait);
  1063. if (signal_pending(current)) {
  1064. if (!ret)
  1065. ret = -ERESTARTSYS;
  1066. return ret;
  1067. }
  1068. }
  1069. } while (avail <= 0);
  1070. copyCount = copy_dac_from_user(s, buffer, count, avail);
  1071. if (copyCount < 0) {
  1072. if (!ret) ret = -EFAULT;
  1073. return ret;
  1074. }
  1075. count -= copyCount;
  1076. buffer += copyCount;
  1077. ret += copyCount;
  1078. } // while (count > 0)
  1079. return ret;
  1080. }
  1081. /* No kernel lock - we have our own spinlock */
  1082. static unsigned int vrc5477_ac97_poll(struct file *file,
  1083. struct poll_table_struct *wait)
  1084. {
  1085. struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
  1086. unsigned long flags;
  1087. unsigned int mask = 0;
  1088. if (file->f_mode & FMODE_WRITE)
  1089. poll_wait(file, &s->dma_dac.wait, wait);
  1090. if (file->f_mode & FMODE_READ)
  1091. poll_wait(file, &s->dma_adc.wait, wait);
  1092. spin_lock_irqsave(&s->lock, flags);
  1093. if (file->f_mode & FMODE_READ) {
  1094. if (s->dma_adc.count >= (signed)s->dma_adc.fragSize)
  1095. mask |= POLLIN | POLLRDNORM;
  1096. }
  1097. if (file->f_mode & FMODE_WRITE) {
  1098. if ((signed)s->dma_dac.fragTotalSize >=
  1099. s->dma_dac.count + (signed)s->dma_dac.fragSize)
  1100. mask |= POLLOUT | POLLWRNORM;
  1101. }
  1102. spin_unlock_irqrestore(&s->lock, flags);
  1103. return mask;
  1104. }
  1105. #ifdef VRC5477_AC97_DEBUG
  1106. static struct ioctl_str_t {
  1107. unsigned int cmd;
  1108. const char* str;
  1109. } ioctl_str[] = {
  1110. {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
  1111. {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
  1112. {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
  1113. {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
  1114. {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
  1115. {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
  1116. {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
  1117. {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
  1118. {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
  1119. {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
  1120. {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
  1121. {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
  1122. {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
  1123. {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
  1124. {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
  1125. {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
  1126. {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
  1127. {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
  1128. {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
  1129. {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
  1130. {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
  1131. {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
  1132. {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
  1133. {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
  1134. {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
  1135. {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
  1136. {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
  1137. {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
  1138. {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
  1139. {OSS_GETVERSION, "OSS_GETVERSION"},
  1140. {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
  1141. {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
  1142. {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
  1143. {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
  1144. };
  1145. #endif
  1146. static int vrc5477_ac97_ioctl(struct inode *inode, struct file *file,
  1147. unsigned int cmd, unsigned long arg)
  1148. {
  1149. struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)file->private_data;
  1150. unsigned long flags;
  1151. audio_buf_info abinfo;
  1152. int count;
  1153. int val, ret;
  1154. #ifdef VRC5477_AC97_DEBUG
  1155. for (count = 0; count < ARRAY_SIZE(ioctl_str); count++) {
  1156. if (ioctl_str[count].cmd == cmd)
  1157. break;
  1158. }
  1159. if (count < ARRAY_SIZE(ioctl_str))
  1160. printk(KERN_INFO PFX "ioctl %s\n", ioctl_str[count].str);
  1161. else
  1162. printk(KERN_INFO PFX "ioctl unknown, 0x%x\n", cmd);
  1163. #endif
  1164. switch (cmd) {
  1165. case OSS_GETVERSION:
  1166. return put_user(SOUND_VERSION, (int *)arg);
  1167. case SNDCTL_DSP_SYNC:
  1168. if (file->f_mode & FMODE_WRITE)
  1169. return drain_dac(s, file->f_flags & O_NONBLOCK);
  1170. return 0;
  1171. case SNDCTL_DSP_SETDUPLEX:
  1172. return 0;
  1173. case SNDCTL_DSP_GETCAPS:
  1174. return put_user(DSP_CAP_DUPLEX, (int *)arg);
  1175. case SNDCTL_DSP_RESET:
  1176. if (file->f_mode & FMODE_WRITE) {
  1177. stop_dac(s);
  1178. synchronize_irq(s->irq);
  1179. s->dma_dac.count = 0;
  1180. s->dma_dac.nextIn = s->dma_dac.nextOut = 0;
  1181. }
  1182. if (file->f_mode & FMODE_READ) {
  1183. stop_adc(s);
  1184. synchronize_irq(s->irq);
  1185. s->dma_adc.count = 0;
  1186. s->dma_adc.nextIn = s->dma_adc.nextOut = 0;
  1187. }
  1188. return 0;
  1189. case SNDCTL_DSP_SPEED:
  1190. if (get_user(val, (int *)arg))
  1191. return -EFAULT;
  1192. if (val >= 0) {
  1193. if (file->f_mode & FMODE_READ) {
  1194. stop_adc(s);
  1195. set_adc_rate(s, val);
  1196. if ((ret = prog_dmabuf_adc(s)))
  1197. return ret;
  1198. }
  1199. if (file->f_mode & FMODE_WRITE) {
  1200. stop_dac(s);
  1201. set_dac_rate(s, val);
  1202. if ((ret = prog_dmabuf_dac(s)))
  1203. return ret;
  1204. }
  1205. }
  1206. return put_user((file->f_mode & FMODE_READ) ?
  1207. s->adcRate : s->dacRate, (int *)arg);
  1208. case SNDCTL_DSP_STEREO:
  1209. if (get_user(val, (int *)arg))
  1210. return -EFAULT;
  1211. if (file->f_mode & FMODE_READ) {
  1212. stop_adc(s);
  1213. if (val)
  1214. s->adcChannels = 2;
  1215. else
  1216. s->adcChannels = 1;
  1217. if ((ret = prog_dmabuf_adc(s)))
  1218. return ret;
  1219. }
  1220. if (file->f_mode & FMODE_WRITE) {
  1221. stop_dac(s);
  1222. if (val)
  1223. s->dacChannels = 2;
  1224. else
  1225. s->dacChannels = 1;
  1226. if ((ret = prog_dmabuf_dac(s)))
  1227. return ret;
  1228. }
  1229. return 0;
  1230. case SNDCTL_DSP_CHANNELS:
  1231. if (get_user(val, (int *)arg))
  1232. return -EFAULT;
  1233. if (val != 0) {
  1234. if ( (val != 1) && (val != 2)) val = 2;
  1235. if (file->f_mode & FMODE_READ) {
  1236. stop_adc(s);
  1237. s->dacChannels = val;
  1238. if ((ret = prog_dmabuf_adc(s)))
  1239. return ret;
  1240. }
  1241. if (file->f_mode & FMODE_WRITE) {
  1242. stop_dac(s);
  1243. s->dacChannels = val;
  1244. if ((ret = prog_dmabuf_dac(s)))
  1245. return ret;
  1246. }
  1247. }
  1248. return put_user(val, (int *)arg);
  1249. case SNDCTL_DSP_GETFMTS: /* Returns a mask */
  1250. return put_user(AFMT_S16_LE, (int *)arg);
  1251. case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
  1252. if (get_user(val, (int *)arg))
  1253. return -EFAULT;
  1254. if (val != AFMT_QUERY) {
  1255. if (val != AFMT_S16_LE) return -EINVAL;
  1256. if (file->f_mode & FMODE_READ) {
  1257. stop_adc(s);
  1258. if ((ret = prog_dmabuf_adc(s)))
  1259. return ret;
  1260. }
  1261. if (file->f_mode & FMODE_WRITE) {
  1262. stop_dac(s);
  1263. if ((ret = prog_dmabuf_dac(s)))
  1264. return ret;
  1265. }
  1266. } else {
  1267. val = AFMT_S16_LE;
  1268. }
  1269. return put_user(val, (int *)arg);
  1270. case SNDCTL_DSP_POST:
  1271. return 0;
  1272. case SNDCTL_DSP_GETTRIGGER:
  1273. case SNDCTL_DSP_SETTRIGGER:
  1274. /* NO trigger */
  1275. return -EINVAL;
  1276. case SNDCTL_DSP_GETOSPACE:
  1277. if (!(file->f_mode & FMODE_WRITE))
  1278. return -EINVAL;
  1279. abinfo.fragsize = s->dma_dac.fragSize << (s->dacChannels-1);
  1280. spin_lock_irqsave(&s->lock, flags);
  1281. count = s->dma_dac.count;
  1282. spin_unlock_irqrestore(&s->lock, flags);
  1283. abinfo.bytes = (s->dma_dac.fragTotalSize - count) <<
  1284. (s->dacChannels-1);
  1285. abinfo.fragstotal = s->dma_dac.numFrag;
  1286. abinfo.fragments = abinfo.bytes >> s->dma_dac.fragShift >>
  1287. (s->dacChannels-1);
  1288. return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
  1289. case SNDCTL_DSP_GETISPACE:
  1290. if (!(file->f_mode & FMODE_READ))
  1291. return -EINVAL;
  1292. abinfo.fragsize = s->dma_adc.fragSize << (s->adcChannels-1);
  1293. spin_lock_irqsave(&s->lock, flags);
  1294. count = s->dma_adc.count;
  1295. spin_unlock_irqrestore(&s->lock, flags);
  1296. if (count < 0)
  1297. count = 0;
  1298. abinfo.bytes = count << (s->adcChannels-1);
  1299. abinfo.fragstotal = s->dma_adc.numFrag;
  1300. abinfo.fragments = (abinfo.bytes >> s->dma_adc.fragShift) >>
  1301. (s->adcChannels-1);
  1302. return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
  1303. case SNDCTL_DSP_NONBLOCK:
  1304. file->f_flags |= O_NONBLOCK;
  1305. return 0;
  1306. case SNDCTL_DSP_GETODELAY:
  1307. if (!(file->f_mode & FMODE_WRITE))
  1308. return -EINVAL;
  1309. spin_lock_irqsave(&s->lock, flags);
  1310. count = s->dma_dac.count;
  1311. spin_unlock_irqrestore(&s->lock, flags);
  1312. return put_user(count, (int *)arg);
  1313. case SNDCTL_DSP_GETIPTR:
  1314. case SNDCTL_DSP_GETOPTR:
  1315. /* we cannot get DMA ptr */
  1316. return -EINVAL;
  1317. case SNDCTL_DSP_GETBLKSIZE:
  1318. if (file->f_mode & FMODE_WRITE)
  1319. return put_user(s->dma_dac.fragSize << (s->dacChannels-1), (int *)arg);
  1320. else
  1321. return put_user(s->dma_adc.fragSize << (s->adcChannels-1), (int *)arg);
  1322. case SNDCTL_DSP_SETFRAGMENT:
  1323. /* we ignore fragment size request */
  1324. return 0;
  1325. case SNDCTL_DSP_SUBDIVIDE:
  1326. /* what is this for? [jsun] */
  1327. return 0;
  1328. case SOUND_PCM_READ_RATE:
  1329. return put_user((file->f_mode & FMODE_READ) ?
  1330. s->adcRate : s->dacRate, (int *)arg);
  1331. case SOUND_PCM_READ_CHANNELS:
  1332. if (file->f_mode & FMODE_READ)
  1333. return put_user(s->adcChannels, (int *)arg);
  1334. else
  1335. return put_user(s->dacChannels ? 2 : 1, (int *)arg);
  1336. case SOUND_PCM_READ_BITS:
  1337. return put_user(16, (int *)arg);
  1338. case SOUND_PCM_WRITE_FILTER:
  1339. case SNDCTL_DSP_SETSYNCRO:
  1340. case SOUND_PCM_READ_FILTER:
  1341. return -EINVAL;
  1342. }
  1343. return mixdev_ioctl(s->codec, cmd, arg);
  1344. }
  1345. static int vrc5477_ac97_open(struct inode *inode, struct file *file)
  1346. {
  1347. int minor = iminor(inode);
  1348. DECLARE_WAITQUEUE(wait, current);
  1349. unsigned long flags;
  1350. struct list_head *list;
  1351. struct vrc5477_ac97_state *s;
  1352. int ret=0;
  1353. nonseekable_open(inode, file);
  1354. for (list = devs.next; ; list = list->next) {
  1355. if (list == &devs)
  1356. return -ENODEV;
  1357. s = list_entry(list, struct vrc5477_ac97_state, devs);
  1358. if (!((s->dev_audio ^ minor) & ~0xf))
  1359. break;
  1360. }
  1361. file->private_data = s;
  1362. /* wait for device to become free */
  1363. mutex_lock(&s->open_mutex);
  1364. while (s->open_mode & file->f_mode) {
  1365. if (file->f_flags & O_NONBLOCK) {
  1366. mutex_unlock(&s->open_mutex);
  1367. return -EBUSY;
  1368. }
  1369. add_wait_queue(&s->open_wait, &wait);
  1370. __set_current_state(TASK_INTERRUPTIBLE);
  1371. mutex_unlock(&s->open_mutex);
  1372. schedule();
  1373. remove_wait_queue(&s->open_wait, &wait);
  1374. set_current_state(TASK_RUNNING);
  1375. if (signal_pending(current))
  1376. return -ERESTARTSYS;
  1377. mutex_lock(&s->open_mutex);
  1378. }
  1379. spin_lock_irqsave(&s->lock, flags);
  1380. if (file->f_mode & FMODE_READ) {
  1381. /* set default settings */
  1382. set_adc_rate(s, 48000);
  1383. s->adcChannels = 2;
  1384. ret = prog_dmabuf_adc(s);
  1385. if (ret) goto bailout;
  1386. }
  1387. if (file->f_mode & FMODE_WRITE) {
  1388. /* set default settings */
  1389. set_dac_rate(s, 48000);
  1390. s->dacChannels = 2;
  1391. ret = prog_dmabuf_dac(s);
  1392. if (ret) goto bailout;
  1393. }
  1394. s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
  1395. bailout:
  1396. spin_unlock_irqrestore(&s->lock, flags);
  1397. mutex_unlock(&s->open_mutex);
  1398. return ret;
  1399. }
  1400. static int vrc5477_ac97_release(struct inode *inode, struct file *file)
  1401. {
  1402. struct vrc5477_ac97_state *s =
  1403. (struct vrc5477_ac97_state *)file->private_data;
  1404. lock_kernel();
  1405. if (file->f_mode & FMODE_WRITE)
  1406. drain_dac(s, file->f_flags & O_NONBLOCK);
  1407. mutex_lock(&s->open_mutex);
  1408. if (file->f_mode & FMODE_WRITE) {
  1409. stop_dac(s);
  1410. dealloc_dmabuf(s, &s->dma_dac);
  1411. }
  1412. if (file->f_mode & FMODE_READ) {
  1413. stop_adc(s);
  1414. dealloc_dmabuf(s, &s->dma_adc);
  1415. }
  1416. s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
  1417. mutex_unlock(&s->open_mutex);
  1418. wake_up(&s->open_wait);
  1419. unlock_kernel();
  1420. return 0;
  1421. }
  1422. static /*const*/ struct file_operations vrc5477_ac97_audio_fops = {
  1423. .owner = THIS_MODULE,
  1424. .llseek = no_llseek,
  1425. .read = vrc5477_ac97_read,
  1426. .write = vrc5477_ac97_write,
  1427. .poll = vrc5477_ac97_poll,
  1428. .ioctl = vrc5477_ac97_ioctl,
  1429. // .mmap = vrc5477_ac97_mmap,
  1430. .open = vrc5477_ac97_open,
  1431. .release = vrc5477_ac97_release,
  1432. };
  1433. /* --------------------------------------------------------------------- */
  1434. /* --------------------------------------------------------------------- */
  1435. /*
  1436. * for debugging purposes, we'll create a proc device that dumps the
  1437. * CODEC chipstate
  1438. */
  1439. #ifdef VRC5477_AC97_DEBUG
  1440. struct {
  1441. const char *regname;
  1442. unsigned regaddr;
  1443. } vrc5477_ac97_regs[] = {
  1444. {"VRC5477_INT_STATUS", VRC5477_INT_STATUS},
  1445. {"VRC5477_CODEC_WR", VRC5477_CODEC_WR},
  1446. {"VRC5477_CODEC_RD", VRC5477_CODEC_RD},
  1447. {"VRC5477_CTRL", VRC5477_CTRL},
  1448. {"VRC5477_ACLINK_CTRL", VRC5477_ACLINK_CTRL},
  1449. {"VRC5477_INT_MASK", VRC5477_INT_MASK},
  1450. {"VRC5477_DAC1_CTRL", VRC5477_DAC1_CTRL},
  1451. {"VRC5477_DAC1L", VRC5477_DAC1L},
  1452. {"VRC5477_DAC1_BADDR", VRC5477_DAC1_BADDR},
  1453. {"VRC5477_DAC2_CTRL", VRC5477_DAC2_CTRL},
  1454. {"VRC5477_DAC2L", VRC5477_DAC2L},
  1455. {"VRC5477_DAC2_BADDR", VRC5477_DAC2_BADDR},
  1456. {"VRC5477_DAC3_CTRL", VRC5477_DAC3_CTRL},
  1457. {"VRC5477_DAC3L", VRC5477_DAC3L},
  1458. {"VRC5477_DAC3_BADDR", VRC5477_DAC3_BADDR},
  1459. {"VRC5477_ADC1_CTRL", VRC5477_ADC1_CTRL},
  1460. {"VRC5477_ADC1L", VRC5477_ADC1L},
  1461. {"VRC5477_ADC1_BADDR", VRC5477_ADC1_BADDR},
  1462. {"VRC5477_ADC2_CTRL", VRC5477_ADC2_CTRL},
  1463. {"VRC5477_ADC2L", VRC5477_ADC2L},
  1464. {"VRC5477_ADC2_BADDR", VRC5477_ADC2_BADDR},
  1465. {"VRC5477_ADC3_CTRL", VRC5477_ADC3_CTRL},
  1466. {"VRC5477_ADC3L", VRC5477_ADC3L},
  1467. {"VRC5477_ADC3_BADDR", VRC5477_ADC3_BADDR},
  1468. {NULL, 0x0}
  1469. };
  1470. static int proc_vrc5477_ac97_dump (char *buf, char **start, off_t fpos,
  1471. int length, int *eof, void *data)
  1472. {
  1473. struct vrc5477_ac97_state *s;
  1474. int cnt, len = 0;
  1475. if (list_empty(&devs))
  1476. return 0;
  1477. s = list_entry(devs.next, struct vrc5477_ac97_state, devs);
  1478. /* print out header */
  1479. len += sprintf(buf + len, "\n\t\tVrc5477 Audio Debug\n\n");
  1480. // print out digital controller state
  1481. len += sprintf (buf + len, "NEC Vrc5477 Audio Controller registers\n");
  1482. len += sprintf (buf + len, "---------------------------------\n");
  1483. for (cnt=0; vrc5477_ac97_regs[cnt].regname != NULL; cnt++) {
  1484. len+= sprintf (buf + len, "%-20s = %08x\n",
  1485. vrc5477_ac97_regs[cnt].regname,
  1486. inl(s->io + vrc5477_ac97_regs[cnt].regaddr));
  1487. }
  1488. /* print out driver state */
  1489. len += sprintf (buf + len, "NEC Vrc5477 Audio driver states\n");
  1490. len += sprintf (buf + len, "---------------------------------\n");
  1491. len += sprintf (buf + len, "dacChannels = %d\n", s->dacChannels);
  1492. len += sprintf (buf + len, "adcChannels = %d\n", s->adcChannels);
  1493. len += sprintf (buf + len, "dacRate = %d\n", s->dacRate);
  1494. len += sprintf (buf + len, "adcRate = %d\n", s->adcRate);
  1495. len += sprintf (buf + len, "dma_dac is %s ready\n",
  1496. s->dma_dac.ready? "" : "not");
  1497. if (s->dma_dac.ready) {
  1498. len += sprintf (buf + len, "dma_dac is %s stopped.\n",
  1499. s->dma_dac.stopped? "" : "not");
  1500. len += sprintf (buf + len, "dma_dac.fragSize = %x\n",
  1501. s->dma_dac.fragSize);
  1502. len += sprintf (buf + len, "dma_dac.fragShift = %x\n",
  1503. s->dma_dac.fragShift);
  1504. len += sprintf (buf + len, "dma_dac.numFrag = %x\n",
  1505. s->dma_dac.numFrag);
  1506. len += sprintf (buf + len, "dma_dac.fragTotalSize = %x\n",
  1507. s->dma_dac.fragTotalSize);
  1508. len += sprintf (buf + len, "dma_dac.nextIn = %x\n",
  1509. s->dma_dac.nextIn);
  1510. len += sprintf (buf + len, "dma_dac.nextOut = %x\n",
  1511. s->dma_dac.nextOut);
  1512. len += sprintf (buf + len, "dma_dac.count = %x\n",
  1513. s->dma_dac.count);
  1514. }
  1515. len += sprintf (buf + len, "dma_adc is %s ready\n",
  1516. s->dma_adc.ready? "" : "not");
  1517. if (s->dma_adc.ready) {
  1518. len += sprintf (buf + len, "dma_adc is %s stopped.\n",
  1519. s->dma_adc.stopped? "" : "not");
  1520. len += sprintf (buf + len, "dma_adc.fragSize = %x\n",
  1521. s->dma_adc.fragSize);
  1522. len += sprintf (buf + len, "dma_adc.fragShift = %x\n",
  1523. s->dma_adc.fragShift);
  1524. len += sprintf (buf + len, "dma_adc.numFrag = %x\n",
  1525. s->dma_adc.numFrag);
  1526. len += sprintf (buf + len, "dma_adc.fragTotalSize = %x\n",
  1527. s->dma_adc.fragTotalSize);
  1528. len += sprintf (buf + len, "dma_adc.nextIn = %x\n",
  1529. s->dma_adc.nextIn);
  1530. len += sprintf (buf + len, "dma_adc.nextOut = %x\n",
  1531. s->dma_adc.nextOut);
  1532. len += sprintf (buf + len, "dma_adc.count = %x\n",
  1533. s->dma_adc.count);
  1534. }
  1535. /* print out CODEC state */
  1536. len += sprintf (buf + len, "\nAC97 CODEC registers\n");
  1537. len += sprintf (buf + len, "----------------------\n");
  1538. for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
  1539. len+= sprintf (buf + len, "reg %02x = %04x\n",
  1540. cnt, rdcodec(s->codec, cnt));
  1541. if (fpos >=len){
  1542. *start = buf;
  1543. *eof =1;
  1544. return 0;
  1545. }
  1546. *start = buf + fpos;
  1547. if ((len -= fpos) > length)
  1548. return length;
  1549. *eof =1;
  1550. return len;
  1551. }
  1552. #endif /* VRC5477_AC97_DEBUG */
  1553. /* --------------------------------------------------------------------- */
  1554. /* maximum number of devices; only used for command line params */
  1555. #define NR_DEVICE 5
  1556. static unsigned int devindex;
  1557. MODULE_AUTHOR("Monta Vista Software, jsun@mvista.com or jsun@junsun.net");
  1558. MODULE_DESCRIPTION("NEC Vrc5477 audio (AC97) Driver");
  1559. MODULE_LICENSE("GPL");
  1560. static int __devinit vrc5477_ac97_probe(struct pci_dev *pcidev,
  1561. const struct pci_device_id *pciid)
  1562. {
  1563. struct vrc5477_ac97_state *s;
  1564. #ifdef VRC5477_AC97_DEBUG
  1565. char proc_str[80];
  1566. #endif
  1567. if (pcidev->irq == 0)
  1568. return -1;
  1569. if (!(s = kzalloc(sizeof(struct vrc5477_ac97_state), GFP_KERNEL))) {
  1570. printk(KERN_ERR PFX "alloc of device struct failed\n");
  1571. return -1;
  1572. }
  1573. init_waitqueue_head(&s->dma_adc.wait);
  1574. init_waitqueue_head(&s->dma_dac.wait);
  1575. init_waitqueue_head(&s->open_wait);
  1576. mutex_init(&s->open_mutex);
  1577. spin_lock_init(&s->lock);
  1578. s->dev = pcidev;
  1579. s->io = pci_resource_start(pcidev, 0);
  1580. s->irq = pcidev->irq;
  1581. s->codec = ac97_alloc_codec();
  1582. s->codec->private_data = s;
  1583. s->codec->id = 0;
  1584. s->codec->codec_read = rdcodec;
  1585. s->codec->codec_write = wrcodec;
  1586. s->codec->codec_wait = waitcodec;
  1587. /* setting some other default values such as
  1588. * adcChannels, adcRate is done in open() so that
  1589. * no persistent state across file opens.
  1590. */
  1591. /* test if get response from ac97, if not return */
  1592. if (ac97_codec_not_present(s->codec)) {
  1593. printk(KERN_ERR PFX "no ac97 codec\n");
  1594. goto err_region;
  1595. }
  1596. /* test if get response from ac97, if not return */
  1597. if (ac97_codec_not_present(&(s->codec))) {
  1598. printk(KERN_ERR PFX "no ac97 codec\n");
  1599. goto err_region;
  1600. }
  1601. if (!request_region(s->io, pci_resource_len(pcidev,0),
  1602. VRC5477_AC97_MODULE_NAME)) {
  1603. printk(KERN_ERR PFX "io ports %#lx->%#lx in use\n",
  1604. s->io, s->io + pci_resource_len(pcidev,0)-1);
  1605. goto err_region;
  1606. }
  1607. if (request_irq(s->irq, vrc5477_ac97_interrupt, IRQF_DISABLED,
  1608. VRC5477_AC97_MODULE_NAME, s)) {
  1609. printk(KERN_ERR PFX "irq %u in use\n", s->irq);
  1610. goto err_irq;
  1611. }
  1612. printk(KERN_INFO PFX "IO at %#lx, IRQ %d\n", s->io, s->irq);
  1613. /* register devices */
  1614. if ((s->dev_audio = register_sound_dsp(&vrc5477_ac97_audio_fops, -1)) < 0)
  1615. goto err_dev1;
  1616. if ((s->codec->dev_mixer =
  1617. register_sound_mixer(&vrc5477_ac97_mixer_fops, -1)) < 0)
  1618. goto err_dev2;
  1619. #ifdef VRC5477_AC97_DEBUG
  1620. /* initialize the debug proc device */
  1621. s->ps = create_proc_read_entry(VRC5477_AC97_MODULE_NAME, 0, NULL,
  1622. proc_vrc5477_ac97_dump, NULL);
  1623. #endif /* VRC5477_AC97_DEBUG */
  1624. /* enable pci io and bus mastering */
  1625. if (pci_enable_device(pcidev))
  1626. goto err_dev3;
  1627. pci_set_master(pcidev);
  1628. /* cold reset the AC97 */
  1629. outl(VRC5477_ACLINK_CTRL_RST_ON | VRC5477_ACLINK_CTRL_RST_TIME,
  1630. s->io + VRC5477_ACLINK_CTRL);
  1631. while (inl(s->io + VRC5477_ACLINK_CTRL) & VRC5477_ACLINK_CTRL_RST_ON);
  1632. /* codec init */
  1633. if (!ac97_probe_codec(s->codec))
  1634. goto err_dev3;
  1635. #ifdef VRC5477_AC97_DEBUG
  1636. sprintf(proc_str, "driver/%s/%d/ac97",
  1637. VRC5477_AC97_MODULE_NAME, s->codec->id);
  1638. s->ac97_ps = create_proc_read_entry (proc_str, 0, NULL,
  1639. ac97_read_proc, s->codec);
  1640. /* TODO : why this proc file does not show up? */
  1641. #endif
  1642. /* Try to enable variable rate audio mode. */
  1643. wrcodec(s->codec, AC97_EXTENDED_STATUS,
  1644. rdcodec(s->codec, AC97_EXTENDED_STATUS) | AC97_EXTSTAT_VRA);
  1645. /* Did we enable it? */
  1646. if(rdcodec(s->codec, AC97_EXTENDED_STATUS) & AC97_EXTSTAT_VRA)
  1647. s->extended_status |= AC97_EXTSTAT_VRA;
  1648. else {
  1649. s->dacRate = 48000;
  1650. printk(KERN_INFO PFX "VRA mode not enabled; rate fixed at %d.",
  1651. s->dacRate);
  1652. }
  1653. /* let us get the default volumne louder */
  1654. wrcodec(s->codec, 0x2, 0x1010); /* master volume, middle */
  1655. wrcodec(s->codec, 0xc, 0x10); /* phone volume, middle */
  1656. // wrcodec(s->codec, 0xe, 0x10); /* misc volume, middle */
  1657. wrcodec(s->codec, 0x10, 0x8000); /* line-in 2 line-out disable */
  1658. wrcodec(s->codec, 0x18, 0x0707); /* PCM out (line out) middle */
  1659. /* by default we select line in the input */
  1660. wrcodec(s->codec, 0x1a, 0x0404);
  1661. wrcodec(s->codec, 0x1c, 0x0f0f);
  1662. wrcodec(s->codec, 0x1e, 0x07);
  1663. /* enable the master interrupt but disable all others */
  1664. outl(VRC5477_INT_MASK_NMASK, s->io + VRC5477_INT_MASK);
  1665. /* store it in the driver field */
  1666. pci_set_drvdata(pcidev, s);
  1667. pcidev->dma_mask = 0xffffffff;
  1668. /* put it into driver list */
  1669. list_add_tail(&s->devs, &devs);
  1670. /* increment devindex */
  1671. if (devindex < NR_DEVICE-1)
  1672. devindex++;
  1673. return 0;
  1674. err_dev3:
  1675. unregister_sound_mixer(s->codec->dev_mixer);
  1676. err_dev2:
  1677. unregister_sound_dsp(s->dev_audio);
  1678. err_dev1:
  1679. printk(KERN_ERR PFX "cannot register misc device\n");
  1680. free_irq(s->irq, s);
  1681. err_irq:
  1682. release_region(s->io, pci_resource_len(pcidev,0));
  1683. err_region:
  1684. ac97_release_codec(codec);
  1685. kfree(s);
  1686. return -1;
  1687. }
  1688. static void __devexit vrc5477_ac97_remove(struct pci_dev *dev)
  1689. {
  1690. struct vrc5477_ac97_state *s = pci_get_drvdata(dev);
  1691. if (!s)
  1692. return;
  1693. list_del(&s->devs);
  1694. #ifdef VRC5477_AC97_DEBUG
  1695. if (s->ps)
  1696. remove_proc_entry(VRC5477_AC97_MODULE_NAME, NULL);
  1697. #endif /* VRC5477_AC97_DEBUG */
  1698. synchronize_irq();
  1699. free_irq(s->irq, s);
  1700. release_region(s->io, pci_resource_len(dev,0));
  1701. unregister_sound_dsp(s->dev_audio);
  1702. unregister_sound_mixer(s->codec->dev_mixer);
  1703. ac97_release_codec(s->codec);
  1704. kfree(s);
  1705. pci_set_drvdata(dev, NULL);
  1706. }
  1707. static struct pci_device_id id_table[] = {
  1708. { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC5477_AC97,
  1709. PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
  1710. { 0, }
  1711. };
  1712. MODULE_DEVICE_TABLE(pci, id_table);
  1713. static struct pci_driver vrc5477_ac97_driver = {
  1714. .name = VRC5477_AC97_MODULE_NAME,
  1715. .id_table = id_table,
  1716. .probe = vrc5477_ac97_probe,
  1717. .remove = __devexit_p(vrc5477_ac97_remove)
  1718. };
  1719. static int __init init_vrc5477_ac97(void)
  1720. {
  1721. printk("Vrc5477 AC97 driver: version v0.2 time " __TIME__ " " __DATE__ " by Jun Sun\n");
  1722. return pci_register_driver(&vrc5477_ac97_driver);
  1723. }
  1724. static void __exit cleanup_vrc5477_ac97(void)
  1725. {
  1726. printk(KERN_INFO PFX "unloading\n");
  1727. pci_unregister_driver(&vrc5477_ac97_driver);
  1728. }
  1729. module_init(init_vrc5477_ac97);
  1730. module_exit(cleanup_vrc5477_ac97);