ad1889.h 3.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135
  1. #ifndef _AD1889_H_
  2. #define _AD1889_H_
  3. #define AD_DS_WSMC 0x00 /* DMA input wave/syn mixer control */
  4. #define AD_DS_RAMC 0x02 /* DMA output resamp/ADC mixer control */
  5. #define AD_DS_WADA 0x04 /* DMA input wave attenuation */
  6. #define AD_DS_SYDA 0x06 /* DMA input syn attentuation */
  7. #define AD_DS_WAS 0x08 /* wave input sample rate */
  8. #define AD_DS_RES 0x0a /* resampler output sample rate */
  9. #define AD_DS_CCS 0x0c /* chip control/status */
  10. #define AD_DMA_RESBA 0x40 /* RES base addr */
  11. #define AD_DMA_RESCA 0x44 /* RES current addr */
  12. #define AD_DMA_RESBC 0x48 /* RES base cnt */
  13. #define AD_DMA_RESCC 0x4c /* RES current count */
  14. #define AD_DMA_ADCBA 0x50 /* ADC */
  15. #define AD_DMA_ADCCA 0x54
  16. #define AD_DMA_ADCBC 0x58
  17. #define AD_DMA_ADCCC 0x5c
  18. #define AD_DMA_SYNBA 0x60 /* SYN */
  19. #define AD_DMA_SYNCA 0x64
  20. #define AD_DMA_SYNBC 0x68
  21. #define AD_DMA_SYNCC 0x6c
  22. #define AD_DMA_WAVBA 0x70 /* WAV */
  23. #define AD_DMA_WAVCA 0x74
  24. #define AD_DMA_WAVBC 0x78
  25. #define AD_DMA_WAVCC 0x7c
  26. #define AD_DMA_RESICC 0x80 /* RES interrupt current count */
  27. #define AD_DMA_RESIBC 0x84 /* RES interrupt base count */
  28. #define AD_DMA_ADCICC 0x88 /* ADC interrupt current count */
  29. #define AD_DMA_ADCIBC 0x8c /* ADC interrupt base count */
  30. #define AD_DMA_SYNICC 0x90 /* SYN interrupt current count */
  31. #define AD_DMA_SYNIBC 0x94 /* SYN interrupt base count */
  32. #define AD_DMA_WAVICC 0x98 /* WAV interrupt current count */
  33. #define AD_DMA_WAVIBC 0x9c /* WAV interrupt base count */
  34. #define AD_DMA_RESCTRL 0xa0 /* RES PCI control/status */
  35. #define AD_DMA_ADCCTRL 0xa8 /* ADC PCI control/status */
  36. #define AD_DMA_SYNCTRL 0xb0 /* SYN PCI control/status */
  37. #define AD_DMA_WAVCTRL 0xb8 /* WAV PCI control/status */
  38. #define AD_DMA_DISR 0xc0 /* PCI DMA intr status */
  39. #define AD_DMA_CHSS 0xc4 /* PCI DMA channel stop status */
  40. #define AD_GPIO_IPC 0xc8 /* IO port ctrl */
  41. #define AD_GPIO_OP 0xca /* IO output status */
  42. #define AD_GPIO_IP 0xcc /* IO input status */
  43. /* AC97 registers, 0x100 - 0x17f; see ac97.h */
  44. #define AD_AC97_BASE 0x100 /* ac97 base register */
  45. #define AD_AC97_ACIC 0x180 /* AC Link interface ctrl */
  46. /* OPL3; BAR1 */
  47. #define AD_OPL_M0AS 0x00 /* Music0 address/status */
  48. #define AD_OPL_M0DATA 0x01 /* Music0 data */
  49. #define AD_OPL_M1A 0x02 /* Music1 address */
  50. #define AD_OPL_M1DATA 0x03 /* Music1 data */
  51. /* 0x04-0x0f reserved */
  52. /* MIDI; BAR2 */
  53. #define AD_MIDA 0x00 /* MIDI data */
  54. #define AD_MISC 0x01 /* MIDI status/cmd */
  55. /* 0x02-0xff reserved */
  56. #define AD_DS_IOMEMSIZE 512
  57. #define AD_OPL_MEMSIZE 16
  58. #define AD_MIDI_MEMSIZE 16
  59. #define AD_WAV_STATE 0
  60. #define AD_ADC_STATE 1
  61. #define AD_MAX_STATES 2
  62. #define DMA_SIZE (128*1024)
  63. #define DMA_FLAG_MAPPED 1
  64. struct ad1889_dev;
  65. typedef struct ad1889_state {
  66. struct ad1889_dev *card;
  67. mode_t open_mode;
  68. struct dmabuf {
  69. unsigned int rate;
  70. unsigned char fmt, enable;
  71. /* buf management */
  72. size_t rawbuf_size;
  73. void *rawbuf;
  74. dma_addr_t dma_handle; /* mapped address */
  75. unsigned long dma_len; /* number of bytes mapped */
  76. /* indexes into rawbuf for setting up DMA engine */
  77. volatile unsigned long rd_ptr, wr_ptr;
  78. wait_queue_head_t wait; /* to wait for buf servicing */
  79. /* OSS bits */
  80. unsigned int mapped:1;
  81. unsigned int ready:1;
  82. unsigned int ossfragshift;
  83. int ossmaxfrags;
  84. unsigned int subdivision;
  85. } dmabuf;
  86. struct mutex mutex;
  87. } ad1889_state_t;
  88. typedef struct ad1889_dev {
  89. void __iomem *regbase;
  90. struct pci_dev *pci;
  91. spinlock_t lock;
  92. int dev_audio;
  93. /* states; one per channel; right now only WAV and ADC */
  94. struct ad1889_state state[AD_MAX_STATES];
  95. /* AC97 codec */
  96. struct ac97_codec *ac97_codec;
  97. u16 ac97_features;
  98. /* debugging stuff */
  99. struct stats {
  100. unsigned int wav_intrs, adc_intrs;
  101. unsigned int blocks, underrun, error;
  102. } stats;
  103. } ad1889_dev_t;
  104. typedef struct ad1889_reg {
  105. const char *name;
  106. int offset;
  107. int width;
  108. } ad1889_reg_t;
  109. #endif