ac97.h 7.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201
  1. /*
  2. * ac97.h
  3. *
  4. * definitions for the AC97, Intel's Audio Codec 97 Spec
  5. * also includes support for a generic AC97 interface
  6. */
  7. #ifndef _AC97_H_
  8. #define _AC97_H_
  9. #include "sound_config.h"
  10. #include "sound_calls.h"
  11. #define AC97_RESET 0x0000 //
  12. #define AC97_MASTER_VOL_STEREO 0x0002 // Line Out
  13. #define AC97_HEADPHONE_VOL 0x0004 //
  14. #define AC97_MASTER_VOL_MONO 0x0006 // TAD Output
  15. #define AC97_MASTER_TONE 0x0008 //
  16. #define AC97_PCBEEP_VOL 0x000a // none
  17. #define AC97_PHONE_VOL 0x000c // TAD Input (mono)
  18. #define AC97_MIC_VOL 0x000e // MIC Input (mono)
  19. #define AC97_LINEIN_VOL 0x0010 // Line Input (stereo)
  20. #define AC97_CD_VOL 0x0012 // CD Input (stereo)
  21. #define AC97_VIDEO_VOL 0x0014 // none
  22. #define AC97_AUX_VOL 0x0016 // Aux Input (stereo)
  23. #define AC97_PCMOUT_VOL 0x0018 // Wave Output (stereo)
  24. #define AC97_RECORD_SELECT 0x001a //
  25. #define AC97_RECORD_GAIN 0x001c
  26. #define AC97_RECORD_GAIN_MIC 0x001e
  27. #define AC97_GENERAL_PURPOSE 0x0020
  28. #define AC97_3D_CONTROL 0x0022
  29. #define AC97_MODEM_RATE 0x0024
  30. #define AC97_POWER_CONTROL 0x0026
  31. /* registers 0x0028 - 0x0058 are reserved */
  32. /* AC'97 2.0 */
  33. #define AC97_EXTENDED_ID 0x0028 /* Extended Audio ID */
  34. #define AC97_EXTENDED_STATUS 0x002A /* Extended Audio Status */
  35. #define AC97_PCM_FRONT_DAC_RATE 0x002C /* PCM Front DAC Rate */
  36. #define AC97_PCM_SURR_DAC_RATE 0x002E /* PCM Surround DAC Rate */
  37. #define AC97_PCM_LFE_DAC_RATE 0x0030 /* PCM LFE DAC Rate */
  38. #define AC97_PCM_LR_ADC_RATE 0x0032 /* PCM LR DAC Rate */
  39. #define AC97_PCM_MIC_ADC_RATE 0x0034 /* PCM MIC ADC Rate */
  40. #define AC97_CENTER_LFE_MASTER 0x0036 /* Center + LFE Master Volume */
  41. #define AC97_SURROUND_MASTER 0x0038 /* Surround (Rear) Master Volume */
  42. #define AC97_RESERVED_3A 0x003A /* Reserved */
  43. /* range 0x3c-0x58 - MODEM */
  44. /* registers 0x005a - 0x007a are vendor reserved */
  45. #define AC97_VENDOR_ID1 0x007c
  46. #define AC97_VENDOR_ID2 0x007e
  47. /* volume control bit defines */
  48. #define AC97_MUTE 0x8000
  49. #define AC97_MICBOOST 0x0040
  50. #define AC97_LEFTVOL 0x3f00
  51. #define AC97_RIGHTVOL 0x003f
  52. /* record mux defines */
  53. #define AC97_RECMUX_MIC 0x0000
  54. #define AC97_RECMUX_CD 0x0101
  55. #define AC97_RECMUX_VIDEO 0x0202 /* not used */
  56. #define AC97_RECMUX_AUX 0x0303
  57. #define AC97_RECMUX_LINE 0x0404
  58. #define AC97_RECMUX_STEREO_MIX 0x0505
  59. #define AC97_RECMUX_MONO_MIX 0x0606
  60. #define AC97_RECMUX_PHONE 0x0707
  61. /* general purpose register bit defines */
  62. #define AC97_GP_LPBK 0x0080 /* Loopback mode */
  63. #define AC97_GP_MS 0x0100 /* Mic Select 0=Mic1, 1=Mic2 */
  64. #define AC97_GP_MIX 0x0200 /* Mono output select 0=Mix, 1=Mic */
  65. #define AC97_GP_RLBK 0x0400 /* Remote Loopback - Modem line codec */
  66. #define AC97_GP_LLBK 0x0800 /* Local Loopback - Modem Line codec */
  67. #define AC97_GP_LD 0x1000 /* Loudness 1=on */
  68. #define AC97_GP_3D 0x2000 /* 3D Enhancement 1=on */
  69. #define AC97_GP_ST 0x4000 /* Stereo Enhancement 1=on */
  70. #define AC97_GP_POP 0x8000 /* Pcm Out Path, 0=pre 3D, 1=post 3D */
  71. /* powerdown control and status bit defines */
  72. /* status */
  73. #define AC97_PWR_MDM 0x0010 /* Modem section ready */
  74. #define AC97_PWR_REF 0x0008 /* Vref nominal */
  75. #define AC97_PWR_ANL 0x0004 /* Analog section ready */
  76. #define AC97_PWR_DAC 0x0002 /* DAC section ready */
  77. #define AC97_PWR_ADC 0x0001 /* ADC section ready */
  78. /* control */
  79. #define AC97_PWR_PR0 0x0100 /* ADC and Mux powerdown */
  80. #define AC97_PWR_PR1 0x0200 /* DAC powerdown */
  81. #define AC97_PWR_PR2 0x0400 /* Output mixer powerdown (Vref on) */
  82. #define AC97_PWR_PR3 0x0800 /* Output mixer powerdown (Vref off) */
  83. #define AC97_PWR_PR4 0x1000 /* AC-link powerdown */
  84. #define AC97_PWR_PR5 0x2000 /* Internal Clk disable */
  85. #define AC97_PWR_PR6 0x4000 /* HP amp powerdown */
  86. #define AC97_PWR_PR7 0x8000 /* Modem off - if supported */
  87. /* useful power states */
  88. #define AC97_PWR_D0 0x0000 /* everything on */
  89. #define AC97_PWR_D1 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR4
  90. #define AC97_PWR_D2 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4
  91. #define AC97_PWR_D3 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4
  92. #define AC97_PWR_ANLOFF AC97_PWR_PR2|AC97_PWR_PR3 /* analog section off */
  93. /* Total number of defined registers. */
  94. #define AC97_REG_CNT 64
  95. /* Generic AC97 mixer interface. */
  96. /* Structure describing access to the hardware. */
  97. struct ac97_hwint
  98. {
  99. /* Perform any hardware-specific reset and initialization. Returns
  100. 0 on success, or a negative error code. */
  101. int (*reset_device) (struct ac97_hwint *dev);
  102. /* Returns the contents of the specified register REG. The caller
  103. should check to see if the desired contents are available in
  104. the cache first, if applicable. Returns a positive unsigned value
  105. representing the contents of the register, or a negative error
  106. code. */
  107. int (*read_reg) (struct ac97_hwint *dev, u8 reg);
  108. /* Writes VALUE to register REG. Returns 0 on success, or a
  109. negative error code. */
  110. int (*write_reg) (struct ac97_hwint *dev, u8 reg, u16 value);
  111. /* Hardware-specific information. */
  112. void *driver_private;
  113. /* Three OSS masks. */
  114. int mixer_devmask;
  115. int mixer_stereomask;
  116. int mixer_recmask;
  117. /* The mixer cache. The indices correspond to the AC97 hardware register
  118. number / 2, since the register numbers are always an even number.
  119. Unknown values are set to -1; unsupported registers contain a
  120. -2. */
  121. int last_written_mixer_values[AC97_REG_CNT];
  122. /* A cache of values written via OSS; we need these so we can return
  123. the values originally written by the user.
  124. Why the original user values? Because the real-world hardware
  125. has less precision, and some existing applications assume that
  126. they will get back the exact value that they wrote (aumix).
  127. A -1 value indicates that no value has been written to this mixer
  128. channel via OSS. */
  129. int last_written_OSS_values[SOUND_MIXER_NRDEVICES];
  130. };
  131. /* Values stored in the register cache. */
  132. #define AC97_REGVAL_UNKNOWN -1
  133. #define AC97_REG_UNSUPPORTED -2
  134. struct ac97_mixer_value_list
  135. {
  136. /* Mixer channel to set. List is terminated by a value of -1. */
  137. int oss_channel;
  138. /* The scaled value to set it to; values generally range from 0-100. */
  139. union {
  140. struct {
  141. u8 left, right;
  142. } stereo;
  143. u8 mono;
  144. } value;
  145. };
  146. /* Initialize the ac97 mixer by resetting it. */
  147. extern int ac97_init (struct ac97_hwint *dev);
  148. /* Sets the mixer DEV to the values in VALUE_LIST. Returns 0 on success,
  149. or a negative error code. */
  150. extern int ac97_set_values (struct ac97_hwint *dev,
  151. struct ac97_mixer_value_list *value_list);
  152. /* Writes the specified VALUE to the AC97 register REG in the mixer.
  153. Takes care of setting the last-written cache as well. */
  154. extern int ac97_put_register (struct ac97_hwint *dev, u8 reg, u16 value);
  155. /* Default ioctl. */
  156. extern int ac97_mixer_ioctl (struct ac97_hwint *dev, unsigned int cmd,
  157. void __user * arg);
  158. #endif
  159. /*
  160. * Local variables:
  161. * c-basic-offset: 4
  162. * End:
  163. */