ad1848_lib.c 38 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of AD1848/AD1847/CS4248
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #define SNDRV_MAIN_OBJECT_FILE
  22. #include <sound/driver.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/slab.h>
  27. #include <linux/ioport.h>
  28. #include <sound/core.h>
  29. #include <sound/ad1848.h>
  30. #include <sound/control.h>
  31. #include <sound/tlv.h>
  32. #include <sound/pcm_params.h>
  33. #include <asm/io.h>
  34. #include <asm/dma.h>
  35. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  36. MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
  37. MODULE_LICENSE("GPL");
  38. #if 0
  39. #define SNDRV_DEBUG_MCE
  40. #endif
  41. /*
  42. * Some variables
  43. */
  44. static unsigned char freq_bits[14] = {
  45. /* 5510 */ 0x00 | AD1848_XTAL2,
  46. /* 6620 */ 0x0E | AD1848_XTAL2,
  47. /* 8000 */ 0x00 | AD1848_XTAL1,
  48. /* 9600 */ 0x0E | AD1848_XTAL1,
  49. /* 11025 */ 0x02 | AD1848_XTAL2,
  50. /* 16000 */ 0x02 | AD1848_XTAL1,
  51. /* 18900 */ 0x04 | AD1848_XTAL2,
  52. /* 22050 */ 0x06 | AD1848_XTAL2,
  53. /* 27042 */ 0x04 | AD1848_XTAL1,
  54. /* 32000 */ 0x06 | AD1848_XTAL1,
  55. /* 33075 */ 0x0C | AD1848_XTAL2,
  56. /* 37800 */ 0x08 | AD1848_XTAL2,
  57. /* 44100 */ 0x0A | AD1848_XTAL2,
  58. /* 48000 */ 0x0C | AD1848_XTAL1
  59. };
  60. static unsigned int rates[14] = {
  61. 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
  62. 27042, 32000, 33075, 37800, 44100, 48000
  63. };
  64. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  65. .count = 14,
  66. .list = rates,
  67. .mask = 0,
  68. };
  69. static unsigned char snd_ad1848_original_image[16] =
  70. {
  71. 0x00, /* 00 - lic */
  72. 0x00, /* 01 - ric */
  73. 0x9f, /* 02 - la1ic */
  74. 0x9f, /* 03 - ra1ic */
  75. 0x9f, /* 04 - la2ic */
  76. 0x9f, /* 05 - ra2ic */
  77. 0xbf, /* 06 - loc */
  78. 0xbf, /* 07 - roc */
  79. 0x20, /* 08 - dfr */
  80. AD1848_AUTOCALIB, /* 09 - ic */
  81. 0x00, /* 0a - pc */
  82. 0x00, /* 0b - ti */
  83. 0x00, /* 0c - mi */
  84. 0x00, /* 0d - lbc */
  85. 0x00, /* 0e - dru */
  86. 0x00, /* 0f - drl */
  87. };
  88. /*
  89. * Basic I/O functions
  90. */
  91. void snd_ad1848_out(struct snd_ad1848 *chip,
  92. unsigned char reg,
  93. unsigned char value)
  94. {
  95. int timeout;
  96. for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  97. udelay(100);
  98. #ifdef CONFIG_SND_DEBUG
  99. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  100. snd_printk(KERN_WARNING "auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
  101. #endif
  102. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  103. outb(chip->image[reg] = value, AD1848P(chip, REG));
  104. mb();
  105. #if 0
  106. printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
  107. #endif
  108. }
  109. EXPORT_SYMBOL(snd_ad1848_out);
  110. static void snd_ad1848_dout(struct snd_ad1848 *chip,
  111. unsigned char reg, unsigned char value)
  112. {
  113. int timeout;
  114. for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  115. udelay(100);
  116. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  117. outb(value, AD1848P(chip, REG));
  118. mb();
  119. }
  120. static unsigned char snd_ad1848_in(struct snd_ad1848 *chip, unsigned char reg)
  121. {
  122. int timeout;
  123. for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  124. udelay(100);
  125. #ifdef CONFIG_SND_DEBUG
  126. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  127. snd_printk(KERN_WARNING "auto calibration time out - reg = 0x%x\n", reg);
  128. #endif
  129. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  130. mb();
  131. return inb(AD1848P(chip, REG));
  132. }
  133. #if 0
  134. static void snd_ad1848_debug(struct snd_ad1848 *chip)
  135. {
  136. printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
  137. printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
  138. printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
  139. printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
  140. printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
  141. printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
  142. printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
  143. printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
  144. printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
  145. printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
  146. printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
  147. printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
  148. printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
  149. printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
  150. printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
  151. printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
  152. printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
  153. printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
  154. }
  155. #endif
  156. /*
  157. * AD1848 detection / MCE routines
  158. */
  159. static void snd_ad1848_mce_up(struct snd_ad1848 *chip)
  160. {
  161. unsigned long flags;
  162. int timeout;
  163. for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  164. udelay(100);
  165. #ifdef CONFIG_SND_DEBUG
  166. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  167. snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
  168. #endif
  169. spin_lock_irqsave(&chip->reg_lock, flags);
  170. chip->mce_bit |= AD1848_MCE;
  171. timeout = inb(AD1848P(chip, REGSEL));
  172. if (timeout == 0x80)
  173. snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
  174. if (!(timeout & AD1848_MCE))
  175. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  176. spin_unlock_irqrestore(&chip->reg_lock, flags);
  177. }
  178. static void snd_ad1848_mce_down(struct snd_ad1848 *chip)
  179. {
  180. unsigned long flags;
  181. int timeout;
  182. signed long time;
  183. spin_lock_irqsave(&chip->reg_lock, flags);
  184. for (timeout = 5; timeout > 0; timeout--)
  185. inb(AD1848P(chip, REGSEL));
  186. /* end of cleanup sequence */
  187. for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  188. udelay(100);
  189. #if 0
  190. printk("(1) timeout = %i\n", timeout);
  191. #endif
  192. #ifdef CONFIG_SND_DEBUG
  193. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  194. snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
  195. #endif
  196. chip->mce_bit &= ~AD1848_MCE;
  197. timeout = inb(AD1848P(chip, REGSEL));
  198. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  199. if (timeout == 0x80)
  200. snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
  201. if ((timeout & AD1848_MCE) == 0) {
  202. spin_unlock_irqrestore(&chip->reg_lock, flags);
  203. return;
  204. }
  205. /* calibration process */
  206. for (timeout = 500; timeout > 0 && (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0; timeout--);
  207. if ((snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0) {
  208. snd_printd("mce_down - auto calibration time out (1)\n");
  209. spin_unlock_irqrestore(&chip->reg_lock, flags);
  210. return;
  211. }
  212. #if 0
  213. printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
  214. #endif
  215. time = HZ / 4;
  216. while (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) {
  217. spin_unlock_irqrestore(&chip->reg_lock, flags);
  218. if (time <= 0) {
  219. snd_printk(KERN_ERR "mce_down - auto calibration time out (2)\n");
  220. return;
  221. }
  222. time = schedule_timeout_interruptible(time);
  223. spin_lock_irqsave(&chip->reg_lock, flags);
  224. }
  225. #if 0
  226. printk("(3) jiffies = %li\n", jiffies);
  227. #endif
  228. time = HZ / 10;
  229. while (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) {
  230. spin_unlock_irqrestore(&chip->reg_lock, flags);
  231. if (time <= 0) {
  232. snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
  233. return;
  234. }
  235. time = schedule_timeout_interruptible(time);
  236. spin_lock_irqsave(&chip->reg_lock, flags);
  237. }
  238. spin_unlock_irqrestore(&chip->reg_lock, flags);
  239. #if 0
  240. printk("(4) jiffies = %li\n", jiffies);
  241. snd_printk("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
  242. #endif
  243. }
  244. static unsigned int snd_ad1848_get_count(unsigned char format,
  245. unsigned int size)
  246. {
  247. switch (format & 0xe0) {
  248. case AD1848_LINEAR_16:
  249. size >>= 1;
  250. break;
  251. }
  252. if (format & AD1848_STEREO)
  253. size >>= 1;
  254. return size;
  255. }
  256. static int snd_ad1848_trigger(struct snd_ad1848 *chip, unsigned char what,
  257. int channel, int cmd)
  258. {
  259. int result = 0;
  260. #if 0
  261. printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
  262. #endif
  263. spin_lock(&chip->reg_lock);
  264. if (cmd == SNDRV_PCM_TRIGGER_START) {
  265. if (chip->image[AD1848_IFACE_CTRL] & what) {
  266. spin_unlock(&chip->reg_lock);
  267. return 0;
  268. }
  269. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
  270. chip->mode |= AD1848_MODE_RUNNING;
  271. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  272. if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
  273. spin_unlock(&chip->reg_lock);
  274. return 0;
  275. }
  276. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
  277. chip->mode &= ~AD1848_MODE_RUNNING;
  278. } else {
  279. result = -EINVAL;
  280. }
  281. spin_unlock(&chip->reg_lock);
  282. return result;
  283. }
  284. /*
  285. * CODEC I/O
  286. */
  287. static unsigned char snd_ad1848_get_rate(unsigned int rate)
  288. {
  289. int i;
  290. for (i = 0; i < 14; i++)
  291. if (rate == rates[i])
  292. return freq_bits[i];
  293. snd_BUG();
  294. return freq_bits[13];
  295. }
  296. static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
  297. unsigned int cmd, void *arg)
  298. {
  299. return snd_pcm_lib_ioctl(substream, cmd, arg);
  300. }
  301. static unsigned char snd_ad1848_get_format(int format, int channels)
  302. {
  303. unsigned char rformat;
  304. rformat = AD1848_LINEAR_8;
  305. switch (format) {
  306. case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
  307. case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
  308. case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
  309. }
  310. if (channels > 1)
  311. rformat |= AD1848_STEREO;
  312. #if 0
  313. snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
  314. #endif
  315. return rformat;
  316. }
  317. static void snd_ad1848_calibrate_mute(struct snd_ad1848 *chip, int mute)
  318. {
  319. unsigned long flags;
  320. mute = mute ? 1 : 0;
  321. spin_lock_irqsave(&chip->reg_lock, flags);
  322. if (chip->calibrate_mute == mute) {
  323. spin_unlock_irqrestore(&chip->reg_lock, flags);
  324. return;
  325. }
  326. if (!mute) {
  327. snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
  328. snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
  329. }
  330. snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
  331. snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
  332. snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
  333. snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
  334. snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
  335. snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
  336. chip->calibrate_mute = mute;
  337. spin_unlock_irqrestore(&chip->reg_lock, flags);
  338. }
  339. static void snd_ad1848_set_data_format(struct snd_ad1848 *chip, struct snd_pcm_hw_params *hw_params)
  340. {
  341. if (hw_params == NULL) {
  342. chip->image[AD1848_DATA_FORMAT] = 0x20;
  343. } else {
  344. chip->image[AD1848_DATA_FORMAT] =
  345. snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
  346. snd_ad1848_get_rate(params_rate(hw_params));
  347. }
  348. // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
  349. }
  350. static int snd_ad1848_open(struct snd_ad1848 *chip, unsigned int mode)
  351. {
  352. unsigned long flags;
  353. mutex_lock(&chip->open_mutex);
  354. if (chip->mode & AD1848_MODE_OPEN) {
  355. mutex_unlock(&chip->open_mutex);
  356. return -EAGAIN;
  357. }
  358. snd_ad1848_mce_down(chip);
  359. #ifdef SNDRV_DEBUG_MCE
  360. snd_printk("open: (1)\n");
  361. #endif
  362. snd_ad1848_mce_up(chip);
  363. spin_lock_irqsave(&chip->reg_lock, flags);
  364. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  365. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
  366. AD1848_CALIB_MODE);
  367. chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
  368. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  369. spin_unlock_irqrestore(&chip->reg_lock, flags);
  370. snd_ad1848_mce_down(chip);
  371. #ifdef SNDRV_DEBUG_MCE
  372. snd_printk("open: (2)\n");
  373. #endif
  374. snd_ad1848_set_data_format(chip, NULL);
  375. snd_ad1848_mce_up(chip);
  376. spin_lock_irqsave(&chip->reg_lock, flags);
  377. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  378. spin_unlock_irqrestore(&chip->reg_lock, flags);
  379. snd_ad1848_mce_down(chip);
  380. #ifdef SNDRV_DEBUG_MCE
  381. snd_printk("open: (3)\n");
  382. #endif
  383. /* ok. now enable and ack CODEC IRQ */
  384. spin_lock_irqsave(&chip->reg_lock, flags);
  385. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  386. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  387. chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
  388. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  389. spin_unlock_irqrestore(&chip->reg_lock, flags);
  390. chip->mode = mode;
  391. mutex_unlock(&chip->open_mutex);
  392. return 0;
  393. }
  394. static void snd_ad1848_close(struct snd_ad1848 *chip)
  395. {
  396. unsigned long flags;
  397. mutex_lock(&chip->open_mutex);
  398. if (!chip->mode) {
  399. mutex_unlock(&chip->open_mutex);
  400. return;
  401. }
  402. /* disable IRQ */
  403. spin_lock_irqsave(&chip->reg_lock, flags);
  404. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  405. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  406. chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
  407. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  408. spin_unlock_irqrestore(&chip->reg_lock, flags);
  409. /* now disable capture & playback */
  410. snd_ad1848_mce_up(chip);
  411. spin_lock_irqsave(&chip->reg_lock, flags);
  412. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  413. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  414. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  415. spin_unlock_irqrestore(&chip->reg_lock, flags);
  416. snd_ad1848_mce_down(chip);
  417. /* clear IRQ again */
  418. spin_lock_irqsave(&chip->reg_lock, flags);
  419. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  420. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  421. spin_unlock_irqrestore(&chip->reg_lock, flags);
  422. chip->mode = 0;
  423. mutex_unlock(&chip->open_mutex);
  424. }
  425. /*
  426. * ok.. exported functions..
  427. */
  428. static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
  429. int cmd)
  430. {
  431. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  432. return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
  433. }
  434. static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
  435. int cmd)
  436. {
  437. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  438. return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
  439. }
  440. static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
  441. struct snd_pcm_hw_params *hw_params)
  442. {
  443. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  444. unsigned long flags;
  445. int err;
  446. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  447. return err;
  448. snd_ad1848_calibrate_mute(chip, 1);
  449. snd_ad1848_set_data_format(chip, hw_params);
  450. snd_ad1848_mce_up(chip);
  451. spin_lock_irqsave(&chip->reg_lock, flags);
  452. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  453. spin_unlock_irqrestore(&chip->reg_lock, flags);
  454. snd_ad1848_mce_down(chip);
  455. snd_ad1848_calibrate_mute(chip, 0);
  456. return 0;
  457. }
  458. static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
  459. {
  460. return snd_pcm_lib_free_pages(substream);
  461. }
  462. static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
  463. {
  464. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  465. struct snd_pcm_runtime *runtime = substream->runtime;
  466. unsigned long flags;
  467. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  468. unsigned int count = snd_pcm_lib_period_bytes(substream);
  469. chip->dma_size = size;
  470. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
  471. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  472. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  473. spin_lock_irqsave(&chip->reg_lock, flags);
  474. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  475. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  476. spin_unlock_irqrestore(&chip->reg_lock, flags);
  477. return 0;
  478. }
  479. static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
  480. struct snd_pcm_hw_params *hw_params)
  481. {
  482. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  483. unsigned long flags;
  484. int err;
  485. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  486. return err;
  487. snd_ad1848_calibrate_mute(chip, 1);
  488. snd_ad1848_set_data_format(chip, hw_params);
  489. snd_ad1848_mce_up(chip);
  490. spin_lock_irqsave(&chip->reg_lock, flags);
  491. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  492. spin_unlock_irqrestore(&chip->reg_lock, flags);
  493. snd_ad1848_mce_down(chip);
  494. snd_ad1848_calibrate_mute(chip, 0);
  495. return 0;
  496. }
  497. static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
  498. {
  499. return snd_pcm_lib_free_pages(substream);
  500. }
  501. static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
  502. {
  503. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  504. struct snd_pcm_runtime *runtime = substream->runtime;
  505. unsigned long flags;
  506. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  507. unsigned int count = snd_pcm_lib_period_bytes(substream);
  508. chip->dma_size = size;
  509. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  510. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  511. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  512. spin_lock_irqsave(&chip->reg_lock, flags);
  513. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  514. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  515. spin_unlock_irqrestore(&chip->reg_lock, flags);
  516. return 0;
  517. }
  518. static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
  519. {
  520. struct snd_ad1848 *chip = dev_id;
  521. if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
  522. (chip->mode & AD1848_MODE_RUNNING))
  523. snd_pcm_period_elapsed(chip->playback_substream);
  524. if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
  525. (chip->mode & AD1848_MODE_RUNNING))
  526. snd_pcm_period_elapsed(chip->capture_substream);
  527. outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
  528. return IRQ_HANDLED;
  529. }
  530. static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
  531. {
  532. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  533. size_t ptr;
  534. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
  535. return 0;
  536. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  537. return bytes_to_frames(substream->runtime, ptr);
  538. }
  539. static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
  540. {
  541. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  542. size_t ptr;
  543. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
  544. return 0;
  545. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  546. return bytes_to_frames(substream->runtime, ptr);
  547. }
  548. /*
  549. */
  550. static void snd_ad1848_thinkpad_twiddle(struct snd_ad1848 *chip, int on) {
  551. int tmp;
  552. if (!chip->thinkpad_flag) return;
  553. outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
  554. tmp = inb(AD1848_THINKPAD_CTL_PORT2);
  555. if (on)
  556. /* turn it on */
  557. tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
  558. else
  559. /* turn it off */
  560. tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
  561. outb(tmp, AD1848_THINKPAD_CTL_PORT2);
  562. }
  563. #ifdef CONFIG_PM
  564. static void snd_ad1848_suspend(struct snd_ad1848 *chip)
  565. {
  566. snd_pcm_suspend_all(chip->pcm);
  567. if (chip->thinkpad_flag)
  568. snd_ad1848_thinkpad_twiddle(chip, 0);
  569. }
  570. static void snd_ad1848_resume(struct snd_ad1848 *chip)
  571. {
  572. int i;
  573. if (chip->thinkpad_flag)
  574. snd_ad1848_thinkpad_twiddle(chip, 1);
  575. /* clear any pendings IRQ */
  576. inb(AD1848P(chip, STATUS));
  577. outb(0, AD1848P(chip, STATUS));
  578. mb();
  579. snd_ad1848_mce_down(chip);
  580. for (i = 0; i < 16; i++)
  581. snd_ad1848_out(chip, i, chip->image[i]);
  582. snd_ad1848_mce_up(chip);
  583. snd_ad1848_mce_down(chip);
  584. }
  585. #endif /* CONFIG_PM */
  586. static int snd_ad1848_probe(struct snd_ad1848 * chip)
  587. {
  588. unsigned long flags;
  589. int i, id, rev, ad1847;
  590. unsigned char *ptr;
  591. #if 0
  592. snd_ad1848_debug(chip);
  593. #endif
  594. id = ad1847 = 0;
  595. for (i = 0; i < 1000; i++) {
  596. mb();
  597. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  598. udelay(500);
  599. else {
  600. spin_lock_irqsave(&chip->reg_lock, flags);
  601. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  602. snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
  603. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
  604. rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
  605. if (rev == 0x65) {
  606. spin_unlock_irqrestore(&chip->reg_lock, flags);
  607. id = 1;
  608. ad1847 = 1;
  609. break;
  610. }
  611. if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
  612. spin_unlock_irqrestore(&chip->reg_lock, flags);
  613. id = 1;
  614. break;
  615. }
  616. spin_unlock_irqrestore(&chip->reg_lock, flags);
  617. }
  618. }
  619. if (id != 1)
  620. return -ENODEV; /* no valid device found */
  621. if (chip->hardware == AD1848_HW_DETECT) {
  622. if (ad1847) {
  623. chip->hardware = AD1848_HW_AD1847;
  624. } else {
  625. chip->hardware = AD1848_HW_AD1848;
  626. rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
  627. if (rev & 0x80) {
  628. chip->hardware = AD1848_HW_CS4248;
  629. } else if ((rev & 0x0f) == 0x0a) {
  630. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
  631. for (i = 0; i < 16; ++i) {
  632. if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
  633. chip->hardware = AD1848_HW_CMI8330;
  634. break;
  635. }
  636. }
  637. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  638. }
  639. }
  640. }
  641. spin_lock_irqsave(&chip->reg_lock, flags);
  642. inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
  643. outb(0, AD1848P(chip, STATUS));
  644. mb();
  645. spin_unlock_irqrestore(&chip->reg_lock, flags);
  646. chip->image[AD1848_MISC_INFO] = 0x00;
  647. chip->image[AD1848_IFACE_CTRL] =
  648. (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
  649. ptr = (unsigned char *) &chip->image;
  650. snd_ad1848_mce_down(chip);
  651. spin_lock_irqsave(&chip->reg_lock, flags);
  652. for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
  653. snd_ad1848_out(chip, i, *ptr++);
  654. spin_unlock_irqrestore(&chip->reg_lock, flags);
  655. snd_ad1848_mce_up(chip);
  656. snd_ad1848_mce_down(chip);
  657. return 0; /* all things are ok.. */
  658. }
  659. /*
  660. */
  661. static struct snd_pcm_hardware snd_ad1848_playback =
  662. {
  663. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  664. SNDRV_PCM_INFO_MMAP_VALID),
  665. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  666. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  667. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  668. .rate_min = 5510,
  669. .rate_max = 48000,
  670. .channels_min = 1,
  671. .channels_max = 2,
  672. .buffer_bytes_max = (128*1024),
  673. .period_bytes_min = 64,
  674. .period_bytes_max = (128*1024),
  675. .periods_min = 1,
  676. .periods_max = 1024,
  677. .fifo_size = 0,
  678. };
  679. static struct snd_pcm_hardware snd_ad1848_capture =
  680. {
  681. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  682. SNDRV_PCM_INFO_MMAP_VALID),
  683. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  684. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  685. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  686. .rate_min = 5510,
  687. .rate_max = 48000,
  688. .channels_min = 1,
  689. .channels_max = 2,
  690. .buffer_bytes_max = (128*1024),
  691. .period_bytes_min = 64,
  692. .period_bytes_max = (128*1024),
  693. .periods_min = 1,
  694. .periods_max = 1024,
  695. .fifo_size = 0,
  696. };
  697. /*
  698. */
  699. static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
  700. {
  701. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  702. struct snd_pcm_runtime *runtime = substream->runtime;
  703. int err;
  704. if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
  705. return err;
  706. chip->playback_substream = substream;
  707. runtime->hw = snd_ad1848_playback;
  708. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  709. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  710. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  711. return 0;
  712. }
  713. static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
  714. {
  715. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  716. struct snd_pcm_runtime *runtime = substream->runtime;
  717. int err;
  718. if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
  719. return err;
  720. chip->capture_substream = substream;
  721. runtime->hw = snd_ad1848_capture;
  722. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  723. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  724. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  725. return 0;
  726. }
  727. static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
  728. {
  729. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  730. chip->mode &= ~AD1848_MODE_PLAY;
  731. chip->playback_substream = NULL;
  732. snd_ad1848_close(chip);
  733. return 0;
  734. }
  735. static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
  736. {
  737. struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
  738. chip->mode &= ~AD1848_MODE_CAPTURE;
  739. chip->capture_substream = NULL;
  740. snd_ad1848_close(chip);
  741. return 0;
  742. }
  743. static int snd_ad1848_free(struct snd_ad1848 *chip)
  744. {
  745. release_and_free_resource(chip->res_port);
  746. if (chip->irq >= 0)
  747. free_irq(chip->irq, (void *) chip);
  748. if (chip->dma >= 0) {
  749. snd_dma_disable(chip->dma);
  750. free_dma(chip->dma);
  751. }
  752. kfree(chip);
  753. return 0;
  754. }
  755. static int snd_ad1848_dev_free(struct snd_device *device)
  756. {
  757. struct snd_ad1848 *chip = device->device_data;
  758. return snd_ad1848_free(chip);
  759. }
  760. static const char *snd_ad1848_chip_id(struct snd_ad1848 *chip)
  761. {
  762. switch (chip->hardware) {
  763. case AD1848_HW_AD1847: return "AD1847";
  764. case AD1848_HW_AD1848: return "AD1848";
  765. case AD1848_HW_CS4248: return "CS4248";
  766. case AD1848_HW_CMI8330: return "CMI8330/C3D";
  767. default: return "???";
  768. }
  769. }
  770. int snd_ad1848_create(struct snd_card *card,
  771. unsigned long port,
  772. int irq, int dma,
  773. unsigned short hardware,
  774. struct snd_ad1848 ** rchip)
  775. {
  776. static struct snd_device_ops ops = {
  777. .dev_free = snd_ad1848_dev_free,
  778. };
  779. struct snd_ad1848 *chip;
  780. int err;
  781. *rchip = NULL;
  782. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  783. if (chip == NULL)
  784. return -ENOMEM;
  785. spin_lock_init(&chip->reg_lock);
  786. mutex_init(&chip->open_mutex);
  787. chip->card = card;
  788. chip->port = port;
  789. chip->irq = -1;
  790. chip->dma = -1;
  791. chip->hardware = hardware;
  792. memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
  793. if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
  794. snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
  795. snd_ad1848_free(chip);
  796. return -EBUSY;
  797. }
  798. if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
  799. snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
  800. snd_ad1848_free(chip);
  801. return -EBUSY;
  802. }
  803. chip->irq = irq;
  804. if (request_dma(dma, "AD1848")) {
  805. snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
  806. snd_ad1848_free(chip);
  807. return -EBUSY;
  808. }
  809. chip->dma = dma;
  810. if (hardware == AD1848_HW_THINKPAD) {
  811. chip->thinkpad_flag = 1;
  812. chip->hardware = AD1848_HW_DETECT; /* reset */
  813. snd_ad1848_thinkpad_twiddle(chip, 1);
  814. }
  815. if (snd_ad1848_probe(chip) < 0) {
  816. snd_ad1848_free(chip);
  817. return -ENODEV;
  818. }
  819. /* Register device */
  820. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  821. snd_ad1848_free(chip);
  822. return err;
  823. }
  824. #ifdef CONFIG_PM
  825. chip->suspend = snd_ad1848_suspend;
  826. chip->resume = snd_ad1848_resume;
  827. #endif
  828. *rchip = chip;
  829. return 0;
  830. }
  831. EXPORT_SYMBOL(snd_ad1848_create);
  832. static struct snd_pcm_ops snd_ad1848_playback_ops = {
  833. .open = snd_ad1848_playback_open,
  834. .close = snd_ad1848_playback_close,
  835. .ioctl = snd_ad1848_ioctl,
  836. .hw_params = snd_ad1848_playback_hw_params,
  837. .hw_free = snd_ad1848_playback_hw_free,
  838. .prepare = snd_ad1848_playback_prepare,
  839. .trigger = snd_ad1848_playback_trigger,
  840. .pointer = snd_ad1848_playback_pointer,
  841. };
  842. static struct snd_pcm_ops snd_ad1848_capture_ops = {
  843. .open = snd_ad1848_capture_open,
  844. .close = snd_ad1848_capture_close,
  845. .ioctl = snd_ad1848_ioctl,
  846. .hw_params = snd_ad1848_capture_hw_params,
  847. .hw_free = snd_ad1848_capture_hw_free,
  848. .prepare = snd_ad1848_capture_prepare,
  849. .trigger = snd_ad1848_capture_trigger,
  850. .pointer = snd_ad1848_capture_pointer,
  851. };
  852. int snd_ad1848_pcm(struct snd_ad1848 *chip, int device, struct snd_pcm **rpcm)
  853. {
  854. struct snd_pcm *pcm;
  855. int err;
  856. if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
  857. return err;
  858. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
  859. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
  860. pcm->private_data = chip;
  861. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  862. strcpy(pcm->name, snd_ad1848_chip_id(chip));
  863. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  864. snd_dma_isa_data(),
  865. 64*1024, chip->dma > 3 ? 128*1024 : 64*1024);
  866. chip->pcm = pcm;
  867. if (rpcm)
  868. *rpcm = pcm;
  869. return 0;
  870. }
  871. EXPORT_SYMBOL(snd_ad1848_pcm);
  872. const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
  873. {
  874. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  875. &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
  876. }
  877. EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
  878. /*
  879. * MIXER part
  880. */
  881. static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  882. {
  883. static char *texts[4] = {
  884. "Line", "Aux", "Mic", "Mix"
  885. };
  886. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  887. uinfo->count = 2;
  888. uinfo->value.enumerated.items = 4;
  889. if (uinfo->value.enumerated.item > 3)
  890. uinfo->value.enumerated.item = 3;
  891. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  892. return 0;
  893. }
  894. static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  895. {
  896. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  897. unsigned long flags;
  898. spin_lock_irqsave(&chip->reg_lock, flags);
  899. ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
  900. ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
  901. spin_unlock_irqrestore(&chip->reg_lock, flags);
  902. return 0;
  903. }
  904. static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  905. {
  906. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  907. unsigned long flags;
  908. unsigned short left, right;
  909. int change;
  910. if (ucontrol->value.enumerated.item[0] > 3 ||
  911. ucontrol->value.enumerated.item[1] > 3)
  912. return -EINVAL;
  913. left = ucontrol->value.enumerated.item[0] << 6;
  914. right = ucontrol->value.enumerated.item[1] << 6;
  915. spin_lock_irqsave(&chip->reg_lock, flags);
  916. left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
  917. right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
  918. change = left != chip->image[AD1848_LEFT_INPUT] ||
  919. right != chip->image[AD1848_RIGHT_INPUT];
  920. snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
  921. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
  922. spin_unlock_irqrestore(&chip->reg_lock, flags);
  923. return change;
  924. }
  925. static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  926. {
  927. int mask = (kcontrol->private_value >> 16) & 0xff;
  928. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  929. uinfo->count = 1;
  930. uinfo->value.integer.min = 0;
  931. uinfo->value.integer.max = mask;
  932. return 0;
  933. }
  934. static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  935. {
  936. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  937. unsigned long flags;
  938. int reg = kcontrol->private_value & 0xff;
  939. int shift = (kcontrol->private_value >> 8) & 0xff;
  940. int mask = (kcontrol->private_value >> 16) & 0xff;
  941. int invert = (kcontrol->private_value >> 24) & 0xff;
  942. spin_lock_irqsave(&chip->reg_lock, flags);
  943. ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
  944. spin_unlock_irqrestore(&chip->reg_lock, flags);
  945. if (invert)
  946. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  947. return 0;
  948. }
  949. static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  950. {
  951. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  952. unsigned long flags;
  953. int reg = kcontrol->private_value & 0xff;
  954. int shift = (kcontrol->private_value >> 8) & 0xff;
  955. int mask = (kcontrol->private_value >> 16) & 0xff;
  956. int invert = (kcontrol->private_value >> 24) & 0xff;
  957. int change;
  958. unsigned short val;
  959. val = (ucontrol->value.integer.value[0] & mask);
  960. if (invert)
  961. val = mask - val;
  962. val <<= shift;
  963. spin_lock_irqsave(&chip->reg_lock, flags);
  964. val = (chip->image[reg] & ~(mask << shift)) | val;
  965. change = val != chip->image[reg];
  966. snd_ad1848_out(chip, reg, val);
  967. spin_unlock_irqrestore(&chip->reg_lock, flags);
  968. return change;
  969. }
  970. static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  971. {
  972. int mask = (kcontrol->private_value >> 24) & 0xff;
  973. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  974. uinfo->count = 2;
  975. uinfo->value.integer.min = 0;
  976. uinfo->value.integer.max = mask;
  977. return 0;
  978. }
  979. static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  980. {
  981. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  982. unsigned long flags;
  983. int left_reg = kcontrol->private_value & 0xff;
  984. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  985. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  986. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  987. int mask = (kcontrol->private_value >> 24) & 0xff;
  988. int invert = (kcontrol->private_value >> 22) & 1;
  989. spin_lock_irqsave(&chip->reg_lock, flags);
  990. ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
  991. ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
  992. spin_unlock_irqrestore(&chip->reg_lock, flags);
  993. if (invert) {
  994. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  995. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  996. }
  997. return 0;
  998. }
  999. static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1000. {
  1001. struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
  1002. unsigned long flags;
  1003. int left_reg = kcontrol->private_value & 0xff;
  1004. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1005. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1006. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1007. int mask = (kcontrol->private_value >> 24) & 0xff;
  1008. int invert = (kcontrol->private_value >> 22) & 1;
  1009. int change;
  1010. unsigned short val1, val2;
  1011. val1 = ucontrol->value.integer.value[0] & mask;
  1012. val2 = ucontrol->value.integer.value[1] & mask;
  1013. if (invert) {
  1014. val1 = mask - val1;
  1015. val2 = mask - val2;
  1016. }
  1017. val1 <<= shift_left;
  1018. val2 <<= shift_right;
  1019. spin_lock_irqsave(&chip->reg_lock, flags);
  1020. if (left_reg != right_reg) {
  1021. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  1022. val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
  1023. change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
  1024. snd_ad1848_out(chip, left_reg, val1);
  1025. snd_ad1848_out(chip, right_reg, val2);
  1026. } else {
  1027. val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1028. change = val1 != chip->image[left_reg];
  1029. snd_ad1848_out(chip, left_reg, val1);
  1030. }
  1031. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1032. return change;
  1033. }
  1034. /*
  1035. */
  1036. int snd_ad1848_add_ctl_elem(struct snd_ad1848 *chip,
  1037. const struct ad1848_mix_elem *c)
  1038. {
  1039. static struct snd_kcontrol_new newctls[] = {
  1040. [AD1848_MIX_SINGLE] = {
  1041. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1042. .info = snd_ad1848_info_single,
  1043. .get = snd_ad1848_get_single,
  1044. .put = snd_ad1848_put_single,
  1045. },
  1046. [AD1848_MIX_DOUBLE] = {
  1047. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1048. .info = snd_ad1848_info_double,
  1049. .get = snd_ad1848_get_double,
  1050. .put = snd_ad1848_put_double,
  1051. },
  1052. [AD1848_MIX_CAPTURE] = {
  1053. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1054. .info = snd_ad1848_info_mux,
  1055. .get = snd_ad1848_get_mux,
  1056. .put = snd_ad1848_put_mux,
  1057. },
  1058. };
  1059. struct snd_kcontrol *ctl;
  1060. int err;
  1061. ctl = snd_ctl_new1(&newctls[c->type], chip);
  1062. if (! ctl)
  1063. return -ENOMEM;
  1064. strlcpy(ctl->id.name, c->name, sizeof(ctl->id.name));
  1065. ctl->id.index = c->index;
  1066. ctl->private_value = c->private_value;
  1067. if (c->tlv) {
  1068. ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  1069. ctl->tlv.p = c->tlv;
  1070. }
  1071. if ((err = snd_ctl_add(chip->card, ctl)) < 0)
  1072. return err;
  1073. return 0;
  1074. }
  1075. EXPORT_SYMBOL(snd_ad1848_add_ctl_elem);
  1076. static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
  1077. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
  1078. static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
  1079. static struct ad1848_mix_elem snd_ad1848_controls[] = {
  1080. AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
  1081. AD1848_DOUBLE_TLV("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
  1082. db_scale_6bit),
  1083. AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  1084. AD1848_DOUBLE_TLV("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
  1085. db_scale_5bit_12db_max),
  1086. AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  1087. AD1848_DOUBLE_TLV("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
  1088. db_scale_5bit_12db_max),
  1089. AD1848_DOUBLE_TLV("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
  1090. db_scale_rec_gain),
  1091. {
  1092. .name = "Capture Source",
  1093. .type = AD1848_MIX_CAPTURE,
  1094. },
  1095. AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
  1096. AD1848_SINGLE_TLV("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0,
  1097. db_scale_6bit),
  1098. };
  1099. int snd_ad1848_mixer(struct snd_ad1848 *chip)
  1100. {
  1101. struct snd_card *card;
  1102. struct snd_pcm *pcm;
  1103. unsigned int idx;
  1104. int err;
  1105. snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
  1106. pcm = chip->pcm;
  1107. card = chip->card;
  1108. strcpy(card->mixername, pcm->name);
  1109. for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
  1110. if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
  1111. return err;
  1112. return 0;
  1113. }
  1114. EXPORT_SYMBOL(snd_ad1848_mixer);
  1115. /*
  1116. * INIT part
  1117. */
  1118. static int __init alsa_ad1848_init(void)
  1119. {
  1120. return 0;
  1121. }
  1122. static void __exit alsa_ad1848_exit(void)
  1123. {
  1124. }
  1125. module_init(alsa_ad1848_init)
  1126. module_exit(alsa_ad1848_exit)