cs8427.c 18 KB

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  1. /*
  2. * Routines for control of the CS8427 via i2c bus
  3. * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
  4. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <sound/driver.h>
  23. #include <linux/slab.h>
  24. #include <linux/delay.h>
  25. #include <linux/init.h>
  26. #include <sound/core.h>
  27. #include <sound/control.h>
  28. #include <sound/pcm.h>
  29. #include <sound/cs8427.h>
  30. #include <sound/asoundef.h>
  31. static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
  32. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  33. MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
  34. MODULE_LICENSE("GPL");
  35. #define CS8427_ADDR (0x20>>1) /* fixed address */
  36. struct cs8427_stream {
  37. struct snd_pcm_substream *substream;
  38. char hw_status[24]; /* hardware status */
  39. char def_status[24]; /* default status */
  40. char pcm_status[24]; /* PCM private status */
  41. char hw_udata[32];
  42. struct snd_kcontrol *pcm_ctl;
  43. };
  44. struct cs8427 {
  45. unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
  46. unsigned int rate;
  47. unsigned int reset_timeout;
  48. struct cs8427_stream playback;
  49. struct cs8427_stream capture;
  50. };
  51. static unsigned char swapbits(unsigned char val)
  52. {
  53. int bit;
  54. unsigned char res = 0;
  55. for (bit = 0; bit < 8; bit++) {
  56. res <<= 1;
  57. res |= val & 1;
  58. val >>= 1;
  59. }
  60. return res;
  61. }
  62. int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
  63. unsigned char val)
  64. {
  65. int err;
  66. unsigned char buf[2];
  67. buf[0] = reg & 0x7f;
  68. buf[1] = val;
  69. if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
  70. snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
  71. "to CS8427 (%i)\n", buf[0], buf[1], err);
  72. return err < 0 ? err : -EIO;
  73. }
  74. return 0;
  75. }
  76. EXPORT_SYMBOL(snd_cs8427_reg_write);
  77. static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
  78. {
  79. int err;
  80. unsigned char buf;
  81. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  82. snd_printk(KERN_ERR "unable to send register 0x%x byte "
  83. "to CS8427\n", reg);
  84. return err < 0 ? err : -EIO;
  85. }
  86. if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
  87. snd_printk(KERN_ERR "unable to read register 0x%x byte "
  88. "from CS8427\n", reg);
  89. return err < 0 ? err : -EIO;
  90. }
  91. return buf;
  92. }
  93. static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
  94. {
  95. struct cs8427 *chip = device->private_data;
  96. int err;
  97. udata = udata ? CS8427_BSEL : 0;
  98. if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
  99. chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
  100. chip->regmap[CS8427_REG_CSDATABUF] |= udata;
  101. err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
  102. chip->regmap[CS8427_REG_CSDATABUF]);
  103. if (err < 0)
  104. return err;
  105. }
  106. return 0;
  107. }
  108. static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
  109. int udata,
  110. unsigned char *ndata,
  111. int count)
  112. {
  113. struct cs8427 *chip = device->private_data;
  114. char *hw_data = udata ?
  115. chip->playback.hw_udata : chip->playback.hw_status;
  116. char data[32];
  117. int err, idx;
  118. if (!memcmp(hw_data, ndata, count))
  119. return 0;
  120. if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
  121. return err;
  122. memcpy(hw_data, ndata, count);
  123. if (udata) {
  124. memset(data, 0, sizeof(data));
  125. if (memcmp(hw_data, data, count) == 0) {
  126. chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
  127. chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
  128. CS8427_EFTUI;
  129. err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
  130. chip->regmap[CS8427_REG_UDATABUF]);
  131. return err < 0 ? err : 0;
  132. }
  133. }
  134. data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
  135. for (idx = 0; idx < count; idx++)
  136. data[idx + 1] = swapbits(ndata[idx]);
  137. if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
  138. return -EIO;
  139. return 1;
  140. }
  141. static void snd_cs8427_free(struct snd_i2c_device *device)
  142. {
  143. kfree(device->private_data);
  144. }
  145. int snd_cs8427_create(struct snd_i2c_bus *bus,
  146. unsigned char addr,
  147. unsigned int reset_timeout,
  148. struct snd_i2c_device **r_cs8427)
  149. {
  150. static unsigned char initvals1[] = {
  151. CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
  152. /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
  153. TCBL=output */
  154. CS8427_SWCLK | CS8427_TCBLDIR,
  155. /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
  156. normal stereo operation */
  157. 0x00,
  158. /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
  159. Rx=>serial */
  160. CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
  161. /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
  162. output time base = OMCK, input time base = recovered input clock,
  163. recovered input clock source is ILRCK changed to AES3INPUT
  164. (workaround, see snd_cs8427_reset) */
  165. CS8427_RXDILRCK,
  166. /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
  167. 24-bit, 64*Fsi */
  168. CS8427_SIDEL | CS8427_SILRPOL,
  169. /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
  170. = I2S, 24-bit, 64*Fsi */
  171. CS8427_SODEL | CS8427_SOLRPOL,
  172. };
  173. static unsigned char initvals2[] = {
  174. CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
  175. /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
  176. biphase, parity status bits */
  177. /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
  178. 0xff, /* set everything */
  179. /* CS8427_REG_CSDATABUF:
  180. Registers 32-55 window to CS buffer
  181. Inhibit D->E transfers from overwriting first 5 bytes of CS data.
  182. Inhibit D->E transfers (all) of CS data.
  183. Allow E->F transfer of CS data.
  184. One byte mode; both A/B channels get same written CB data.
  185. A channel info is output to chip's EMPH* pin. */
  186. CS8427_CBMR | CS8427_DETCI,
  187. /* CS8427_REG_UDATABUF:
  188. Use internal buffer to transmit User (U) data.
  189. Chip's U pin is an output.
  190. Transmit all O's for user data.
  191. Inhibit D->E transfers.
  192. Inhibit E->F transfers. */
  193. CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
  194. };
  195. int err;
  196. struct cs8427 *chip;
  197. struct snd_i2c_device *device;
  198. unsigned char buf[24];
  199. if ((err = snd_i2c_device_create(bus, "CS8427",
  200. CS8427_ADDR | (addr & 7),
  201. &device)) < 0)
  202. return err;
  203. chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
  204. if (chip == NULL) {
  205. snd_i2c_device_free(device);
  206. return -ENOMEM;
  207. }
  208. device->private_free = snd_cs8427_free;
  209. snd_i2c_lock(bus);
  210. err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
  211. if (err != CS8427_VER8427A) {
  212. snd_i2c_unlock(bus);
  213. snd_printk(KERN_ERR "unable to find CS8427 signature "
  214. "(expected 0x%x, read 0x%x),\n",
  215. CS8427_VER8427A, err);
  216. snd_printk(KERN_ERR " initialization is not completed\n");
  217. return -EFAULT;
  218. }
  219. /* turn off run bit while making changes to configuration */
  220. err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
  221. if (err < 0)
  222. goto __fail;
  223. /* send initial values */
  224. memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
  225. if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
  226. err = err < 0 ? err : -EIO;
  227. goto __fail;
  228. }
  229. /* Turn off CS8427 interrupt stuff that is not used in hardware */
  230. memset(buf, 0, 7);
  231. /* from address 9 to 15 */
  232. buf[0] = 9; /* register */
  233. if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
  234. goto __fail;
  235. /* send transfer initialization sequence */
  236. memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
  237. if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
  238. err = err < 0 ? err : -EIO;
  239. goto __fail;
  240. }
  241. /* write default channel status bytes */
  242. buf[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 0));
  243. buf[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 8));
  244. buf[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 16));
  245. buf[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 24));
  246. memset(buf + 4, 0, 24 - 4);
  247. if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
  248. goto __fail;
  249. memcpy(chip->playback.def_status, buf, 24);
  250. memcpy(chip->playback.pcm_status, buf, 24);
  251. snd_i2c_unlock(bus);
  252. /* turn on run bit and rock'n'roll */
  253. if (reset_timeout < 1)
  254. reset_timeout = 1;
  255. chip->reset_timeout = reset_timeout;
  256. snd_cs8427_reset(device);
  257. #if 0 // it's nice for read tests
  258. {
  259. char buf[128];
  260. int xx;
  261. buf[0] = 0x81;
  262. snd_i2c_sendbytes(device, buf, 1);
  263. snd_i2c_readbytes(device, buf, 127);
  264. for (xx = 0; xx < 127; xx++)
  265. printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
  266. }
  267. #endif
  268. if (r_cs8427)
  269. *r_cs8427 = device;
  270. return 0;
  271. __fail:
  272. snd_i2c_unlock(bus);
  273. snd_i2c_device_free(device);
  274. return err < 0 ? err : -EIO;
  275. }
  276. EXPORT_SYMBOL(snd_cs8427_create);
  277. /*
  278. * Reset the chip using run bit, also lock PLL using ILRCK and
  279. * put back AES3INPUT. This workaround is described in latest
  280. * CS8427 datasheet, otherwise TXDSERIAL will not work.
  281. */
  282. static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
  283. {
  284. struct cs8427 *chip;
  285. unsigned long end_time;
  286. int data, aes3input = 0;
  287. snd_assert(cs8427, return);
  288. chip = cs8427->private_data;
  289. snd_i2c_lock(cs8427->bus);
  290. if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
  291. CS8427_RXDAES3INPUT) /* AES3 bit is set */
  292. aes3input = 1;
  293. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
  294. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  295. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  296. udelay(200);
  297. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
  298. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  299. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  300. udelay(200);
  301. snd_i2c_unlock(cs8427->bus);
  302. end_time = jiffies + chip->reset_timeout;
  303. while (time_after_eq(end_time, jiffies)) {
  304. snd_i2c_lock(cs8427->bus);
  305. data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
  306. snd_i2c_unlock(cs8427->bus);
  307. if (!(data & CS8427_UNLOCK))
  308. break;
  309. schedule_timeout_uninterruptible(1);
  310. }
  311. snd_i2c_lock(cs8427->bus);
  312. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
  313. if (aes3input)
  314. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
  315. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  316. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  317. snd_i2c_unlock(cs8427->bus);
  318. }
  319. static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
  320. struct snd_ctl_elem_info *uinfo)
  321. {
  322. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  323. uinfo->count = 1;
  324. uinfo->value.integer.min = 0;
  325. uinfo->value.integer.max = 255;
  326. return 0;
  327. }
  328. static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
  329. struct snd_ctl_elem_value *ucontrol)
  330. {
  331. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  332. int data;
  333. snd_i2c_lock(device->bus);
  334. data = snd_cs8427_reg_read(device, kcontrol->private_value);
  335. snd_i2c_unlock(device->bus);
  336. if (data < 0)
  337. return data;
  338. ucontrol->value.integer.value[0] = data;
  339. return 0;
  340. }
  341. static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
  342. struct snd_ctl_elem_info *uinfo)
  343. {
  344. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  345. uinfo->count = 10;
  346. return 0;
  347. }
  348. static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
  349. struct snd_ctl_elem_value *ucontrol)
  350. {
  351. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  352. unsigned char reg = CS8427_REG_QSUBCODE;
  353. int err;
  354. snd_i2c_lock(device->bus);
  355. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  356. snd_printk(KERN_ERR "unable to send register 0x%x byte "
  357. "to CS8427\n", reg);
  358. snd_i2c_unlock(device->bus);
  359. return err < 0 ? err : -EIO;
  360. }
  361. err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
  362. if (err != 10) {
  363. snd_printk(KERN_ERR "unable to read Q-subcode bytes "
  364. "from CS8427\n");
  365. snd_i2c_unlock(device->bus);
  366. return err < 0 ? err : -EIO;
  367. }
  368. snd_i2c_unlock(device->bus);
  369. return 0;
  370. }
  371. static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
  372. struct snd_ctl_elem_info *uinfo)
  373. {
  374. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  375. uinfo->count = 1;
  376. return 0;
  377. }
  378. static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
  379. struct snd_ctl_elem_value *ucontrol)
  380. {
  381. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  382. struct cs8427 *chip = device->private_data;
  383. snd_i2c_lock(device->bus);
  384. memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
  385. snd_i2c_unlock(device->bus);
  386. return 0;
  387. }
  388. static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
  389. struct snd_ctl_elem_value *ucontrol)
  390. {
  391. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  392. struct cs8427 *chip = device->private_data;
  393. unsigned char *status = kcontrol->private_value ?
  394. chip->playback.pcm_status : chip->playback.def_status;
  395. struct snd_pcm_runtime *runtime = chip->playback.substream ?
  396. chip->playback.substream->runtime : NULL;
  397. int err, change;
  398. snd_i2c_lock(device->bus);
  399. change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
  400. memcpy(status, ucontrol->value.iec958.status, 24);
  401. if (change && (kcontrol->private_value ?
  402. runtime != NULL : runtime == NULL)) {
  403. err = snd_cs8427_send_corudata(device, 0, status, 24);
  404. if (err < 0)
  405. change = err;
  406. }
  407. snd_i2c_unlock(device->bus);
  408. return change;
  409. }
  410. static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
  411. struct snd_ctl_elem_info *uinfo)
  412. {
  413. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  414. uinfo->count = 1;
  415. return 0;
  416. }
  417. static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
  418. struct snd_ctl_elem_value *ucontrol)
  419. {
  420. memset(ucontrol->value.iec958.status, 0xff, 24);
  421. return 0;
  422. }
  423. static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
  424. {
  425. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  426. .info = snd_cs8427_in_status_info,
  427. .name = "IEC958 CS8427 Input Status",
  428. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  429. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  430. .get = snd_cs8427_in_status_get,
  431. .private_value = 15,
  432. },
  433. {
  434. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  435. .info = snd_cs8427_in_status_info,
  436. .name = "IEC958 CS8427 Error Status",
  437. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  438. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  439. .get = snd_cs8427_in_status_get,
  440. .private_value = 16,
  441. },
  442. {
  443. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  444. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  445. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  446. .info = snd_cs8427_spdif_mask_info,
  447. .get = snd_cs8427_spdif_mask_get,
  448. },
  449. {
  450. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  451. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  452. .info = snd_cs8427_spdif_info,
  453. .get = snd_cs8427_spdif_get,
  454. .put = snd_cs8427_spdif_put,
  455. .private_value = 0
  456. },
  457. {
  458. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  459. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  460. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  461. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  462. .info = snd_cs8427_spdif_info,
  463. .get = snd_cs8427_spdif_get,
  464. .put = snd_cs8427_spdif_put,
  465. .private_value = 1
  466. },
  467. {
  468. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  469. .info = snd_cs8427_qsubcode_info,
  470. .name = "IEC958 Q-subcode Capture Default",
  471. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  472. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  473. .get = snd_cs8427_qsubcode_get
  474. }};
  475. int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
  476. struct snd_pcm_substream *play_substream,
  477. struct snd_pcm_substream *cap_substream)
  478. {
  479. struct cs8427 *chip = cs8427->private_data;
  480. struct snd_kcontrol *kctl;
  481. unsigned int idx;
  482. int err;
  483. snd_assert(play_substream && cap_substream, return -EINVAL);
  484. for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
  485. kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
  486. if (kctl == NULL)
  487. return -ENOMEM;
  488. kctl->id.device = play_substream->pcm->device;
  489. kctl->id.subdevice = play_substream->number;
  490. err = snd_ctl_add(cs8427->bus->card, kctl);
  491. if (err < 0)
  492. return err;
  493. if (! strcmp(kctl->id.name,
  494. SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
  495. chip->playback.pcm_ctl = kctl;
  496. }
  497. chip->playback.substream = play_substream;
  498. chip->capture.substream = cap_substream;
  499. snd_assert(chip->playback.pcm_ctl, return -EIO);
  500. return 0;
  501. }
  502. EXPORT_SYMBOL(snd_cs8427_iec958_build);
  503. int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
  504. {
  505. struct cs8427 *chip;
  506. snd_assert(cs8427, return -ENXIO);
  507. chip = cs8427->private_data;
  508. if (active)
  509. memcpy(chip->playback.pcm_status,
  510. chip->playback.def_status, 24);
  511. chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  512. snd_ctl_notify(cs8427->bus->card,
  513. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  514. &chip->playback.pcm_ctl->id);
  515. return 0;
  516. }
  517. EXPORT_SYMBOL(snd_cs8427_iec958_active);
  518. int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
  519. {
  520. struct cs8427 *chip;
  521. char *status;
  522. int err, reset;
  523. snd_assert(cs8427, return -ENXIO);
  524. chip = cs8427->private_data;
  525. status = chip->playback.pcm_status;
  526. snd_i2c_lock(cs8427->bus);
  527. if (status[0] & IEC958_AES0_PROFESSIONAL) {
  528. status[0] &= ~IEC958_AES0_PRO_FS;
  529. switch (rate) {
  530. case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
  531. case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
  532. case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
  533. default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
  534. }
  535. } else {
  536. status[3] &= ~IEC958_AES3_CON_FS;
  537. switch (rate) {
  538. case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
  539. case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
  540. case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
  541. }
  542. }
  543. err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
  544. if (err > 0)
  545. snd_ctl_notify(cs8427->bus->card,
  546. SNDRV_CTL_EVENT_MASK_VALUE,
  547. &chip->playback.pcm_ctl->id);
  548. reset = chip->rate != rate;
  549. chip->rate = rate;
  550. snd_i2c_unlock(cs8427->bus);
  551. if (reset)
  552. snd_cs8427_reset(cs8427);
  553. return err < 0 ? err : 0;
  554. }
  555. EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
  556. static int __init alsa_cs8427_module_init(void)
  557. {
  558. return 0;
  559. }
  560. static void __exit alsa_cs8427_module_exit(void)
  561. {
  562. }
  563. module_init(alsa_cs8427_module_init)
  564. module_exit(alsa_cs8427_module_exit)