vx_uer.c 7.7 KB

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  1. /*
  2. * Driver for Digigram VX soundcards
  3. *
  4. * IEC958 stuff
  5. *
  6. * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <sound/driver.h>
  23. #include <linux/delay.h>
  24. #include <sound/core.h>
  25. #include <sound/vx_core.h>
  26. #include "vx_cmd.h"
  27. /*
  28. * vx_modify_board_clock - tell the board that its clock has been modified
  29. * @sync: DSP needs to resynchronize its FIFO
  30. */
  31. static int vx_modify_board_clock(struct vx_core *chip, int sync)
  32. {
  33. struct vx_rmh rmh;
  34. vx_init_rmh(&rmh, CMD_MODIFY_CLOCK);
  35. /* Ask the DSP to resynchronize its FIFO. */
  36. if (sync)
  37. rmh.Cmd[0] |= CMD_MODIFY_CLOCK_S_BIT;
  38. return vx_send_msg(chip, &rmh);
  39. }
  40. /*
  41. * vx_modify_board_inputs - resync audio inputs
  42. */
  43. static int vx_modify_board_inputs(struct vx_core *chip)
  44. {
  45. struct vx_rmh rmh;
  46. vx_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS);
  47. rmh.Cmd[0] |= 1 << 0; /* reference: AUDIO 0 */
  48. return vx_send_msg(chip, &rmh);
  49. }
  50. /*
  51. * vx_read_one_cbit - read one bit from UER config
  52. * @index: the bit index
  53. * returns 0 or 1.
  54. */
  55. static int vx_read_one_cbit(struct vx_core *chip, int index)
  56. {
  57. unsigned long flags;
  58. int val;
  59. spin_lock_irqsave(&chip->lock, flags);
  60. if (chip->type >= VX_TYPE_VXPOCKET) {
  61. vx_outb(chip, CSUER, 1); /* read */
  62. vx_outb(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK);
  63. val = (vx_inb(chip, RUER) >> 7) & 0x01;
  64. } else {
  65. vx_outl(chip, CSUER, 1); /* read */
  66. vx_outl(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK);
  67. val = (vx_inl(chip, RUER) >> 7) & 0x01;
  68. }
  69. spin_unlock_irqrestore(&chip->lock, flags);
  70. return val;
  71. }
  72. /*
  73. * vx_write_one_cbit - write one bit to UER config
  74. * @index: the bit index
  75. * @val: bit value, 0 or 1
  76. */
  77. static void vx_write_one_cbit(struct vx_core *chip, int index, int val)
  78. {
  79. unsigned long flags;
  80. val = !!val; /* 0 or 1 */
  81. spin_lock_irqsave(&chip->lock, flags);
  82. if (vx_is_pcmcia(chip)) {
  83. vx_outb(chip, CSUER, 0); /* write */
  84. vx_outb(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK));
  85. } else {
  86. vx_outl(chip, CSUER, 0); /* write */
  87. vx_outl(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK));
  88. }
  89. spin_unlock_irqrestore(&chip->lock, flags);
  90. }
  91. /*
  92. * vx_read_uer_status - read the current UER status
  93. * @mode: pointer to store the UER mode, VX_UER_MODE_XXX
  94. *
  95. * returns the frequency of UER, or 0 if not sync,
  96. * or a negative error code.
  97. */
  98. static int vx_read_uer_status(struct vx_core *chip, int *mode)
  99. {
  100. int val, freq;
  101. /* Default values */
  102. freq = 0;
  103. /* Read UER status */
  104. if (vx_is_pcmcia(chip))
  105. val = vx_inb(chip, CSUER);
  106. else
  107. val = vx_inl(chip, CSUER);
  108. if (val < 0)
  109. return val;
  110. /* If clock is present, read frequency */
  111. if (val & VX_SUER_CLOCK_PRESENT_MASK) {
  112. switch (val & VX_SUER_FREQ_MASK) {
  113. case VX_SUER_FREQ_32KHz_MASK:
  114. freq = 32000;
  115. break;
  116. case VX_SUER_FREQ_44KHz_MASK:
  117. freq = 44100;
  118. break;
  119. case VX_SUER_FREQ_48KHz_MASK:
  120. freq = 48000;
  121. break;
  122. }
  123. }
  124. if (val & VX_SUER_DATA_PRESENT_MASK)
  125. /* bit 0 corresponds to consumer/professional bit */
  126. *mode = vx_read_one_cbit(chip, 0) ?
  127. VX_UER_MODE_PROFESSIONAL : VX_UER_MODE_CONSUMER;
  128. else
  129. *mode = VX_UER_MODE_NOT_PRESENT;
  130. return freq;
  131. }
  132. /*
  133. * compute the sample clock value from frequency
  134. *
  135. * The formula is as follows:
  136. *
  137. * HexFreq = (dword) ((double) ((double) 28224000 / (double) Frequency))
  138. * switch ( HexFreq & 0x00000F00 )
  139. * case 0x00000100: ;
  140. * case 0x00000200:
  141. * case 0x00000300: HexFreq -= 0x00000201 ;
  142. * case 0x00000400:
  143. * case 0x00000500:
  144. * case 0x00000600:
  145. * case 0x00000700: HexFreq = (dword) (((double) 28224000 / (double) (Frequency*2)) - 1)
  146. * default : HexFreq = (dword) ((double) 28224000 / (double) (Frequency*4)) - 0x000001FF
  147. */
  148. static int vx_calc_clock_from_freq(struct vx_core *chip, int freq)
  149. {
  150. int hexfreq;
  151. snd_assert(freq > 0, return 0);
  152. hexfreq = (28224000 * 10) / freq;
  153. hexfreq = (hexfreq + 5) / 10;
  154. /* max freq = 55125 Hz */
  155. snd_assert(hexfreq > 0x00000200, return 0);
  156. if (hexfreq <= 0x03ff)
  157. return hexfreq - 0x00000201;
  158. if (hexfreq <= 0x07ff)
  159. return (hexfreq / 2) - 1;
  160. if (hexfreq <= 0x0fff)
  161. return (hexfreq / 4) + 0x000001ff;
  162. return 0x5fe; /* min freq = 6893 Hz */
  163. }
  164. /*
  165. * vx_change_clock_source - change the clock source
  166. * @source: the new source
  167. */
  168. static void vx_change_clock_source(struct vx_core *chip, int source)
  169. {
  170. unsigned long flags;
  171. /* we mute DAC to prevent clicks */
  172. vx_toggle_dac_mute(chip, 1);
  173. spin_lock_irqsave(&chip->lock, flags);
  174. chip->ops->set_clock_source(chip, source);
  175. chip->clock_source = source;
  176. spin_unlock_irqrestore(&chip->lock, flags);
  177. /* unmute */
  178. vx_toggle_dac_mute(chip, 0);
  179. }
  180. /*
  181. * set the internal clock
  182. */
  183. void vx_set_internal_clock(struct vx_core *chip, unsigned int freq)
  184. {
  185. int clock;
  186. unsigned long flags;
  187. /* Get real clock value */
  188. clock = vx_calc_clock_from_freq(chip, freq);
  189. snd_printdd(KERN_DEBUG "set internal clock to 0x%x from freq %d\n", clock, freq);
  190. spin_lock_irqsave(&chip->lock, flags);
  191. if (vx_is_pcmcia(chip)) {
  192. vx_outb(chip, HIFREQ, (clock >> 8) & 0x0f);
  193. vx_outb(chip, LOFREQ, clock & 0xff);
  194. } else {
  195. vx_outl(chip, HIFREQ, (clock >> 8) & 0x0f);
  196. vx_outl(chip, LOFREQ, clock & 0xff);
  197. }
  198. spin_unlock_irqrestore(&chip->lock, flags);
  199. }
  200. /*
  201. * set the iec958 status bits
  202. * @bits: 32-bit status bits
  203. */
  204. void vx_set_iec958_status(struct vx_core *chip, unsigned int bits)
  205. {
  206. int i;
  207. if (chip->chip_status & VX_STAT_IS_STALE)
  208. return;
  209. for (i = 0; i < 32; i++)
  210. vx_write_one_cbit(chip, i, bits & (1 << i));
  211. }
  212. /*
  213. * vx_set_clock - change the clock and audio source if necessary
  214. */
  215. int vx_set_clock(struct vx_core *chip, unsigned int freq)
  216. {
  217. int src_changed = 0;
  218. if (chip->chip_status & VX_STAT_IS_STALE)
  219. return 0;
  220. /* change the audio source if possible */
  221. vx_sync_audio_source(chip);
  222. if (chip->clock_mode == VX_CLOCK_MODE_EXTERNAL ||
  223. (chip->clock_mode == VX_CLOCK_MODE_AUTO &&
  224. chip->audio_source == VX_AUDIO_SRC_DIGITAL)) {
  225. if (chip->clock_source != UER_SYNC) {
  226. vx_change_clock_source(chip, UER_SYNC);
  227. mdelay(6);
  228. src_changed = 1;
  229. }
  230. } else if (chip->clock_mode == VX_CLOCK_MODE_INTERNAL ||
  231. (chip->clock_mode == VX_CLOCK_MODE_AUTO &&
  232. chip->audio_source != VX_AUDIO_SRC_DIGITAL)) {
  233. if (chip->clock_source != INTERNAL_QUARTZ) {
  234. vx_change_clock_source(chip, INTERNAL_QUARTZ);
  235. src_changed = 1;
  236. }
  237. if (chip->freq == freq)
  238. return 0;
  239. vx_set_internal_clock(chip, freq);
  240. if (src_changed)
  241. vx_modify_board_inputs(chip);
  242. }
  243. if (chip->freq == freq)
  244. return 0;
  245. chip->freq = freq;
  246. vx_modify_board_clock(chip, 1);
  247. return 0;
  248. }
  249. /*
  250. * vx_change_frequency - called from interrupt handler
  251. */
  252. int vx_change_frequency(struct vx_core *chip)
  253. {
  254. int freq;
  255. if (chip->chip_status & VX_STAT_IS_STALE)
  256. return 0;
  257. if (chip->clock_source == INTERNAL_QUARTZ)
  258. return 0;
  259. /*
  260. * Read the real UER board frequency
  261. */
  262. freq = vx_read_uer_status(chip, &chip->uer_detected);
  263. if (freq < 0)
  264. return freq;
  265. /*
  266. * The frequency computed by the DSP is good and
  267. * is different from the previous computed.
  268. */
  269. if (freq == 48000 || freq == 44100 || freq == 32000)
  270. chip->freq_detected = freq;
  271. return 0;
  272. }