Makefile.build 10 KB

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  1. # ==========================================================================
  2. # Building
  3. # ==========================================================================
  4. src := $(obj)
  5. PHONY := __build
  6. __build:
  7. # Read .config if it exist, otherwise ignore
  8. -include include/config/auto.conf
  9. include scripts/Kbuild.include
  10. # The filename Kbuild has precedence over Makefile
  11. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  12. include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
  13. include scripts/Makefile.lib
  14. ifdef host-progs
  15. ifneq ($(hostprogs-y),$(host-progs))
  16. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  17. hostprogs-y += $(host-progs)
  18. endif
  19. endif
  20. # Do not include host rules unles needed
  21. ifneq ($(hostprogs-y)$(hostprogs-m),)
  22. include scripts/Makefile.host
  23. endif
  24. ifneq ($(KBUILD_SRC),)
  25. # Create output directory if not already present
  26. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  27. # Create directories for object files if directory does not exist
  28. # Needed when obj-y := dir/file.o syntax is used
  29. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  30. endif
  31. ifdef EXTRA_TARGETS
  32. $(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
  33. endif
  34. ifdef build-targets
  35. $(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
  36. endif
  37. ifdef export-objs
  38. $(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
  39. endif
  40. ifdef O_TARGET
  41. $(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
  42. endif
  43. ifdef L_TARGET
  44. $(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
  45. endif
  46. ifdef list-multi
  47. $(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
  48. endif
  49. ifndef obj
  50. $(warning kbuild: Makefile.build is included improperly)
  51. endif
  52. # ===========================================================================
  53. ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  54. lib-target := $(obj)/lib.a
  55. endif
  56. ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
  57. builtin-target := $(obj)/built-in.o
  58. endif
  59. # We keep a list of all modules in $(MODVERDIR)
  60. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  61. $(if $(KBUILD_MODULES),$(obj-m)) \
  62. $(subdir-ym) $(always)
  63. @:
  64. # Linus' kernel sanity checking tool
  65. ifneq ($(KBUILD_CHECKSRC),0)
  66. ifeq ($(KBUILD_CHECKSRC),2)
  67. quiet_cmd_force_checksrc = CHECK $<
  68. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  69. else
  70. quiet_cmd_checksrc = CHECK $<
  71. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  72. endif
  73. endif
  74. # Compile C sources (.c)
  75. # ---------------------------------------------------------------------------
  76. # Default is built-in, unless we know otherwise
  77. modkern_cflags := $(CFLAGS_KERNEL)
  78. quiet_modtag := $(empty) $(empty)
  79. $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
  80. $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
  81. $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
  82. $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
  83. $(real-objs-m) : quiet_modtag := [M]
  84. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  85. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  86. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  87. $(obj-m) : quiet_modtag := [M]
  88. # Default for not multi-part modules
  89. modname = $(basetarget)
  90. $(multi-objs-m) : modname = $(modname-multi)
  91. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  92. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  93. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  94. $(multi-objs-y) : modname = $(modname-multi)
  95. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  96. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  97. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  98. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  99. cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
  100. %.s: %.c FORCE
  101. $(call if_changed_dep,cc_s_c)
  102. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  103. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  104. %.i: %.c FORCE
  105. $(call if_changed_dep,cc_i_c)
  106. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  107. cmd_cc_symtypes_c = \
  108. $(CPP) -D__GENKSYMS__ $(c_flags) $< \
  109. | $(GENKSYMS) -T $@ >/dev/null; \
  110. test -s $@ || rm -f $@
  111. %.symtypes : %.c FORCE
  112. $(call if_changed_dep,cc_symtypes_c)
  113. # C (.c) files
  114. # The C file is compiled and updated dependency information is generated.
  115. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  116. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  117. ifndef CONFIG_MODVERSIONS
  118. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  119. else
  120. # When module versioning is enabled the following steps are executed:
  121. # o compile a .tmp_<file>.o from <file>.c
  122. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  123. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  124. # are done.
  125. # o otherwise, we calculate symbol versions using the good old
  126. # genksyms on the preprocessed source and postprocess them in a way
  127. # that they are usable as a linker script
  128. # o generate <file>.o from .tmp_<file>.o using the linker to
  129. # replace the unresolved symbols __crc_exported_symbol with
  130. # the actual value of the checksum generated by genksyms
  131. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  132. cmd_modversions = \
  133. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  134. $(CPP) -D__GENKSYMS__ $(c_flags) $< \
  135. | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
  136. -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \
  137. > $(@D)/.tmp_$(@F:.o=.ver); \
  138. \
  139. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  140. -T $(@D)/.tmp_$(@F:.o=.ver); \
  141. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  142. else \
  143. mv -f $(@D)/.tmp_$(@F) $@; \
  144. fi;
  145. endif
  146. define rule_cc_o_c
  147. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  148. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  149. $(cmd_modversions) \
  150. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  151. $(dot-target).tmp; \
  152. rm -f $(depfile); \
  153. mv -f $(dot-target).tmp $(dot-target).cmd
  154. endef
  155. # Built-in and composite module parts
  156. %.o: %.c FORCE
  157. $(call cmd,force_checksrc)
  158. $(call if_changed_rule,cc_o_c)
  159. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  160. $(single-used-m): %.o: %.c FORCE
  161. $(call cmd,force_checksrc)
  162. $(call if_changed_rule,cc_o_c)
  163. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  164. quiet_cmd_cc_lst_c = MKLST $@
  165. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  166. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  167. System.map $(OBJDUMP) > $@
  168. %.lst: %.c FORCE
  169. $(call if_changed_dep,cc_lst_c)
  170. # Compile assembler sources (.S)
  171. # ---------------------------------------------------------------------------
  172. modkern_aflags := $(AFLAGS_KERNEL)
  173. $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
  174. $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
  175. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  176. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  177. %.s: %.S FORCE
  178. $(call if_changed_dep,as_s_S)
  179. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  180. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  181. %.o: %.S FORCE
  182. $(call if_changed_dep,as_o_S)
  183. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  184. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  185. # Linker scripts preprocessor (.lds.S -> .lds)
  186. # ---------------------------------------------------------------------------
  187. quiet_cmd_cpp_lds_S = LDS $@
  188. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
  189. %.lds: %.lds.S FORCE
  190. $(call if_changed_dep,cpp_lds_S)
  191. # Build the compiled-in targets
  192. # ---------------------------------------------------------------------------
  193. # To build objects in subdirs, we need to descend into the directories
  194. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  195. #
  196. # Rule to compile a set of .o files into one .o file
  197. #
  198. ifdef builtin-target
  199. quiet_cmd_link_o_target = LD $@
  200. # If the list of objects to link is empty, just create an empty built-in.o
  201. cmd_link_o_target = $(if $(strip $(obj-y)),\
  202. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
  203. rm -f $@; $(AR) rcs $@)
  204. $(builtin-target): $(obj-y) FORCE
  205. $(call if_changed,link_o_target)
  206. targets += $(builtin-target)
  207. endif # builtin-target
  208. #
  209. # Rule to compile a set of .o files into one .a file
  210. #
  211. ifdef lib-target
  212. quiet_cmd_link_l_target = AR $@
  213. cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
  214. $(lib-target): $(lib-y) FORCE
  215. $(call if_changed,link_l_target)
  216. targets += $(lib-target)
  217. endif
  218. #
  219. # Rule to link composite objects
  220. #
  221. # Composite objects are specified in kbuild makefile as follows:
  222. # <composite-object>-objs := <list of .o files>
  223. # or
  224. # <composite-object>-y := <list of .o files>
  225. link_multi_deps = \
  226. $(filter $(addprefix $(obj)/, \
  227. $($(subst $(obj)/,,$(@:.o=-objs))) \
  228. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  229. quiet_cmd_link_multi-y = LD $@
  230. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
  231. quiet_cmd_link_multi-m = LD [M] $@
  232. cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
  233. # We would rather have a list of rules like
  234. # foo.o: $(foo-objs)
  235. # but that's not so easy, so we rather make all composite objects depend
  236. # on the set of all their parts
  237. $(multi-used-y) : %.o: $(multi-objs-y) FORCE
  238. $(call if_changed,link_multi-y)
  239. $(multi-used-m) : %.o: $(multi-objs-m) FORCE
  240. $(call if_changed,link_multi-m)
  241. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  242. targets += $(multi-used-y) $(multi-used-m)
  243. # Descending
  244. # ---------------------------------------------------------------------------
  245. PHONY += $(subdir-ym)
  246. $(subdir-ym):
  247. $(Q)$(MAKE) $(build)=$@
  248. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  249. # ---------------------------------------------------------------------------
  250. PHONY += FORCE
  251. FORCE:
  252. # Read all saved command lines and dependencies for the $(targets) we
  253. # may be building above, using $(if_changed{,_dep}). As an
  254. # optimization, we don't need to read them if the target does not
  255. # exist, we will rebuild anyway in that case.
  256. targets := $(wildcard $(sort $(targets)))
  257. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  258. ifneq ($(cmd_files),)
  259. include $(cmd_files)
  260. endif
  261. # Declare the contents of the .PHONY variable as phony. We keep that
  262. # information in a variable se we can use it in if_changed and friends.
  263. .PHONY: $(PHONY)