tx3912.h 2.0 KB

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  1. /*
  2. * linux/include/video/tx3912.h
  3. *
  4. * Copyright (C) 2001 Steven Hill (sjhill@realitydiluted.com)
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. *
  10. * Includes for TMPR3912/05 and PR31700 LCD controller registers
  11. */
  12. #include <asm/tx3912.h>
  13. #define VidCtrl1 REG_AT(0x028)
  14. #define VidCtrl2 REG_AT(0x02C)
  15. #define VidCtrl3 REG_AT(0x030)
  16. #define VidCtrl4 REG_AT(0x034)
  17. #define VidCtrl5 REG_AT(0x038)
  18. #define VidCtrl6 REG_AT(0x03C)
  19. #define VidCtrl7 REG_AT(0x040)
  20. #define VidCtrl8 REG_AT(0x044)
  21. #define VidCtrl9 REG_AT(0x048)
  22. #define VidCtrl10 REG_AT(0x04C)
  23. #define VidCtrl11 REG_AT(0x050)
  24. #define VidCtrl12 REG_AT(0x054)
  25. #define VidCtrl13 REG_AT(0x058)
  26. #define VidCtrl14 REG_AT(0x05C)
  27. /* Video Control 1 Register */
  28. #define LINECNT 0xffc00000
  29. #define LINECNT_SHIFT 22
  30. #define LOADDLY BIT(21)
  31. #define BAUDVAL (BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16))
  32. #define BAUDVAL_SHIFT 16
  33. #define VIDDONEVAL (BIT(15) | BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9))
  34. #define VIDDONEVAL_SHIFT 9
  35. #define ENFREEZEFRAME BIT(8)
  36. #define TX3912_VIDCTRL1_BITSEL_MASK 0x000000c0
  37. #define TX3912_VIDCTRL1_2BIT_GRAY 0x00000040
  38. #define TX3912_VIDCTRL1_4BIT_GRAY 0x00000080
  39. #define TX3912_VIDCTRL1_8BIT_COLOR 0x000000c0
  40. #define BITSEL_SHIFT 6
  41. #define DISPSPLIT BIT(5)
  42. #define DISP8 BIT(4)
  43. #define DFMODE BIT(3)
  44. #define INVVID BIT(2)
  45. #define DISPON BIT(1)
  46. #define ENVID BIT(0)
  47. /* Video Control 2 Register */
  48. #define VIDRATE_MASK 0xffc00000
  49. #define VIDRATE_SHIFT 22
  50. #define HORZVAL_MASK 0x001ff000
  51. #define HORZVAL_SHIFT 12
  52. #define LINEVAL_MASK 0x000001ff
  53. /* Video Control 3 Register */
  54. #define TX3912_VIDCTRL3_VIDBANK_MASK 0xfff00000
  55. #define TX3912_VIDCTRL3_VIDBASEHI_MASK 0x000ffff0
  56. /* Video Control 4 Register */
  57. #define TX3912_VIDCTRL4_VIDBASELO_MASK 0x000ffff0