tdfx.h 5.7 KB

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  1. #ifndef _TDFX_H
  2. #define _TDFX_H
  3. /* membase0 register offsets */
  4. #define STATUS 0x00
  5. #define PCIINIT0 0x04
  6. #define SIPMONITOR 0x08
  7. #define LFBMEMORYCONFIG 0x0c
  8. #define MISCINIT0 0x10
  9. #define MISCINIT1 0x14
  10. #define DRAMINIT0 0x18
  11. #define DRAMINIT1 0x1c
  12. #define AGPINIT 0x20
  13. #define TMUGBEINIT 0x24
  14. #define VGAINIT0 0x28
  15. #define VGAINIT1 0x2c
  16. #define DRAMCOMMAND 0x30
  17. #define DRAMDATA 0x34
  18. /* reserved 0x38 */
  19. /* reserved 0x3c */
  20. #define PLLCTRL0 0x40
  21. #define PLLCTRL1 0x44
  22. #define PLLCTRL2 0x48
  23. #define DACMODE 0x4c
  24. #define DACADDR 0x50
  25. #define DACDATA 0x54
  26. #define RGBMAXDELTA 0x58
  27. #define VIDPROCCFG 0x5c
  28. #define HWCURPATADDR 0x60
  29. #define HWCURLOC 0x64
  30. #define HWCURC0 0x68
  31. #define HWCURC1 0x6c
  32. #define VIDINFORMAT 0x70
  33. #define VIDINSTATUS 0x74
  34. #define VIDSERPARPORT 0x78
  35. #define VIDINXDELTA 0x7c
  36. #define VIDININITERR 0x80
  37. #define VIDINYDELTA 0x84
  38. #define VIDPIXBUFTHOLD 0x88
  39. #define VIDCHRMIN 0x8c
  40. #define VIDCHRMAX 0x90
  41. #define VIDCURLIN 0x94
  42. #define VIDSCREENSIZE 0x98
  43. #define VIDOVRSTARTCRD 0x9c
  44. #define VIDOVRENDCRD 0xa0
  45. #define VIDOVRDUDX 0xa4
  46. #define VIDOVRDUDXOFF 0xa8
  47. #define VIDOVRDVDY 0xac
  48. /* ... */
  49. #define VIDOVRDVDYOFF 0xe0
  50. #define VIDDESKSTART 0xe4
  51. #define VIDDESKSTRIDE 0xe8
  52. #define VIDINADDR0 0xec
  53. #define VIDINADDR1 0xf0
  54. #define VIDINADDR2 0xf4
  55. #define VIDINSTRIDE 0xf8
  56. #define VIDCUROVRSTART 0xfc
  57. #define INTCTRL (0x00100000 + 0x04)
  58. #define CLIP0MIN (0x00100000 + 0x08)
  59. #define CLIP0MAX (0x00100000 + 0x0c)
  60. #define DSTBASE (0x00100000 + 0x10)
  61. #define DSTFORMAT (0x00100000 + 0x14)
  62. #define SRCBASE (0x00100000 + 0x34)
  63. #define COMMANDEXTRA_2D (0x00100000 + 0x38)
  64. #define CLIP1MIN (0x00100000 + 0x4c)
  65. #define CLIP1MAX (0x00100000 + 0x50)
  66. #define SRCFORMAT (0x00100000 + 0x54)
  67. #define SRCSIZE (0x00100000 + 0x58)
  68. #define SRCXY (0x00100000 + 0x5c)
  69. #define COLORBACK (0x00100000 + 0x60)
  70. #define COLORFORE (0x00100000 + 0x64)
  71. #define DSTSIZE (0x00100000 + 0x68)
  72. #define DSTXY (0x00100000 + 0x6c)
  73. #define COMMAND_2D (0x00100000 + 0x70)
  74. #define LAUNCH_2D (0x00100000 + 0x80)
  75. #define COMMAND_3D (0x00200000 + 0x120)
  76. /* register bitfields (not all, only as needed) */
  77. #define BIT(x) (1UL << (x))
  78. /* COMMAND_2D reg. values */
  79. #define TDFX_ROP_COPY 0xcc // src
  80. #define TDFX_ROP_INVERT 0x55 // NOT dst
  81. #define TDFX_ROP_XOR 0x66 // src XOR dst
  82. #define AUTOINC_DSTX BIT(10)
  83. #define AUTOINC_DSTY BIT(11)
  84. #define COMMAND_2D_FILLRECT 0x05
  85. #define COMMAND_2D_S2S_BITBLT 0x01 // screen to screen
  86. #define COMMAND_2D_H2S_BITBLT 0x03 // host to screen
  87. #define COMMAND_3D_NOP 0x00
  88. #define STATUS_RETRACE BIT(6)
  89. #define STATUS_BUSY BIT(9)
  90. #define MISCINIT1_CLUT_INV BIT(0)
  91. #define MISCINIT1_2DBLOCK_DIS BIT(15)
  92. #define DRAMINIT0_SGRAM_NUM BIT(26)
  93. #define DRAMINIT0_SGRAM_TYPE BIT(27)
  94. #define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27)|BIT(28)|BIT(29))
  95. #define DRAMINIT0_SGRAM_TYPE_SHIFT 27
  96. #define DRAMINIT1_MEM_SDRAM BIT(30)
  97. #define VGAINIT0_VGA_DISABLE BIT(0)
  98. #define VGAINIT0_EXT_TIMING BIT(1)
  99. #define VGAINIT0_8BIT_DAC BIT(2)
  100. #define VGAINIT0_EXT_ENABLE BIT(6)
  101. #define VGAINIT0_WAKEUP_3C3 BIT(8)
  102. #define VGAINIT0_LEGACY_DISABLE BIT(9)
  103. #define VGAINIT0_ALT_READBACK BIT(10)
  104. #define VGAINIT0_FAST_BLINK BIT(11)
  105. #define VGAINIT0_EXTSHIFTOUT BIT(12)
  106. #define VGAINIT0_DECODE_3C6 BIT(13)
  107. #define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22)
  108. #define VGAINIT1_MASK 0x1fffff
  109. #define VIDCFG_VIDPROC_ENABLE BIT(0)
  110. #define VIDCFG_CURS_X11 BIT(1)
  111. #define VIDCFG_INTERLACE BIT(3)
  112. #define VIDCFG_HALF_MODE BIT(4)
  113. #define VIDCFG_DESK_ENABLE BIT(7)
  114. #define VIDCFG_CLUT_BYPASS BIT(10)
  115. #define VIDCFG_2X BIT(26)
  116. #define VIDCFG_HWCURSOR_ENABLE BIT(27)
  117. #define VIDCFG_PIXFMT_SHIFT 18
  118. #define DACMODE_2X BIT(0)
  119. /* VGA rubbish, need to change this for multihead support */
  120. #define MISC_W 0x3c2
  121. #define MISC_R 0x3cc
  122. #define SEQ_I 0x3c4
  123. #define SEQ_D 0x3c5
  124. #define CRT_I 0x3d4
  125. #define CRT_D 0x3d5
  126. #define ATT_IW 0x3c0
  127. #define IS1_R 0x3da
  128. #define GRA_I 0x3ce
  129. #define GRA_D 0x3cf
  130. #ifdef __KERNEL__
  131. struct banshee_reg {
  132. /* VGA rubbish */
  133. unsigned char att[21];
  134. unsigned char crt[25];
  135. unsigned char gra[ 9];
  136. unsigned char misc[1];
  137. unsigned char seq[ 5];
  138. /* Banshee extensions */
  139. unsigned char ext[2];
  140. unsigned long vidcfg;
  141. unsigned long vidpll;
  142. unsigned long mempll;
  143. unsigned long gfxpll;
  144. unsigned long dacmode;
  145. unsigned long vgainit0;
  146. unsigned long vgainit1;
  147. unsigned long screensize;
  148. unsigned long stride;
  149. unsigned long cursloc;
  150. unsigned long curspataddr;
  151. unsigned long cursc0;
  152. unsigned long cursc1;
  153. unsigned long startaddr;
  154. unsigned long clip0min;
  155. unsigned long clip0max;
  156. unsigned long clip1min;
  157. unsigned long clip1max;
  158. unsigned long srcbase;
  159. unsigned long dstbase;
  160. unsigned long miscinit0;
  161. };
  162. struct tdfx_par {
  163. u32 max_pixclock;
  164. u32 palette[16];
  165. void __iomem *regbase_virt;
  166. unsigned long iobase;
  167. u32 baseline;
  168. struct {
  169. int w,u,d;
  170. unsigned long enable,disable;
  171. struct timer_list timer;
  172. } hwcursor;
  173. spinlock_t DAClock;
  174. };
  175. #endif /* __KERNEL__ */
  176. #endif /* _TDFX_H */