vx_core.h 16 KB

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  1. /*
  2. * Driver for Digigram VX soundcards
  3. *
  4. * Hardware core part
  5. *
  6. * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #ifndef __SOUND_VX_COMMON_H
  23. #define __SOUND_VX_COMMON_H
  24. #include <sound/pcm.h>
  25. #include <sound/hwdep.h>
  26. #include <linux/interrupt.h>
  27. #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
  28. #if !defined(CONFIG_USE_VXLOADER) && !defined(CONFIG_SND_VX_LIB) /* built-in kernel */
  29. #define SND_VX_FW_LOADER /* use the standard firmware loader */
  30. #endif
  31. #endif
  32. struct firmware;
  33. struct device;
  34. #define VX_DRIVER_VERSION 0x010000 /* 1.0.0 */
  35. /*
  36. */
  37. #define SIZE_MAX_CMD 0x10
  38. #define SIZE_MAX_STATUS 0x10
  39. struct vx_rmh {
  40. u16 LgCmd; /* length of the command to send (WORDs) */
  41. u16 LgStat; /* length of the status received (WORDs) */
  42. u32 Cmd[SIZE_MAX_CMD];
  43. u32 Stat[SIZE_MAX_STATUS];
  44. u16 DspStat; /* status type, RMP_SSIZE_XXX */
  45. };
  46. typedef u64 pcx_time_t;
  47. #define VX_MAX_PIPES 16
  48. #define VX_MAX_PERIODS 32
  49. #define VX_MAX_CODECS 2
  50. struct vx_ibl_info {
  51. int size; /* the current IBL size (0 = query) in bytes */
  52. int max_size; /* max. IBL size in bytes */
  53. int min_size; /* min. IBL size in bytes */
  54. int granularity; /* granularity */
  55. };
  56. struct vx_pipe {
  57. int number;
  58. unsigned int is_capture: 1;
  59. unsigned int data_mode: 1;
  60. unsigned int running: 1;
  61. unsigned int prepared: 1;
  62. int channels;
  63. unsigned int differed_type;
  64. pcx_time_t pcx_time;
  65. struct snd_pcm_substream *substream;
  66. int hbuf_size; /* H-buffer size in bytes */
  67. int buffer_bytes; /* the ALSA pcm buffer size in bytes */
  68. int period_bytes; /* the ALSA pcm period size in bytes */
  69. int hw_ptr; /* the current hardware pointer in bytes */
  70. int position; /* the current position in frames (playback only) */
  71. int transferred; /* the transferred size (per period) in frames */
  72. int align; /* size of alignment */
  73. u64 cur_count; /* current sample position (for playback) */
  74. unsigned int references; /* an output pipe may be used for monitoring and/or playback */
  75. struct vx_pipe *monitoring_pipe; /* pointer to the monitoring pipe (capture pipe only)*/
  76. struct tasklet_struct start_tq;
  77. };
  78. struct vx_core;
  79. struct snd_vx_ops {
  80. /* low-level i/o */
  81. unsigned char (*in8)(struct vx_core *chip, int reg);
  82. unsigned int (*in32)(struct vx_core *chip, int reg);
  83. void (*out8)(struct vx_core *chip, int reg, unsigned char val);
  84. void (*out32)(struct vx_core *chip, int reg, unsigned int val);
  85. /* irq */
  86. int (*test_and_ack)(struct vx_core *chip);
  87. void (*validate_irq)(struct vx_core *chip, int enable);
  88. /* codec */
  89. void (*write_codec)(struct vx_core *chip, int codec, unsigned int data);
  90. void (*akm_write)(struct vx_core *chip, int reg, unsigned int data);
  91. void (*reset_codec)(struct vx_core *chip);
  92. void (*change_audio_source)(struct vx_core *chip, int src);
  93. void (*set_clock_source)(struct vx_core *chp, int src);
  94. /* chip init */
  95. int (*load_dsp)(struct vx_core *chip, int idx, const struct firmware *fw);
  96. void (*reset_dsp)(struct vx_core *chip);
  97. void (*reset_board)(struct vx_core *chip, int cold_reset);
  98. int (*add_controls)(struct vx_core *chip);
  99. /* pcm */
  100. void (*dma_write)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
  101. struct vx_pipe *pipe, int count);
  102. void (*dma_read)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
  103. struct vx_pipe *pipe, int count);
  104. };
  105. struct snd_vx_hardware {
  106. const char *name;
  107. int type; /* VX_TYPE_XXX */
  108. /* hardware specs */
  109. unsigned int num_codecs;
  110. unsigned int num_ins;
  111. unsigned int num_outs;
  112. unsigned int output_level_max;
  113. const unsigned int *output_level_db_scale;
  114. };
  115. /* hwdep id string */
  116. #define SND_VX_HWDEP_ID "VX Loader"
  117. /* hardware type */
  118. enum {
  119. /* VX222 PCI */
  120. VX_TYPE_BOARD, /* old VX222 PCI */
  121. VX_TYPE_V2, /* VX222 V2 PCI */
  122. VX_TYPE_MIC, /* VX222 Mic PCI */
  123. /* VX-pocket */
  124. VX_TYPE_VXPOCKET, /* VXpocket V2 */
  125. VX_TYPE_VXP440, /* VXpocket 440 */
  126. VX_TYPE_NUMS
  127. };
  128. /* chip status */
  129. enum {
  130. VX_STAT_XILINX_LOADED = (1 << 0), /* devices are registered */
  131. VX_STAT_DEVICE_INIT = (1 << 1), /* devices are registered */
  132. VX_STAT_CHIP_INIT = (1 << 2), /* all operational */
  133. VX_STAT_IN_SUSPEND = (1 << 10), /* in suspend phase */
  134. VX_STAT_IS_STALE = (1 << 15) /* device is stale */
  135. };
  136. /* min/max values for analog output for old codecs */
  137. #define VX_ANALOG_OUT_LEVEL_MAX 0xe3
  138. struct vx_core {
  139. /* ALSA stuff */
  140. struct snd_card *card;
  141. struct snd_pcm *pcm[VX_MAX_CODECS];
  142. int type; /* VX_TYPE_XXX */
  143. int irq;
  144. /* ports are defined externally */
  145. /* low-level functions */
  146. struct snd_vx_hardware *hw;
  147. struct snd_vx_ops *ops;
  148. spinlock_t lock;
  149. spinlock_t irq_lock;
  150. struct tasklet_struct tq;
  151. unsigned int chip_status;
  152. unsigned int pcm_running;
  153. struct device *dev;
  154. struct snd_hwdep *hwdep;
  155. struct vx_rmh irq_rmh; /* RMH used in interrupts */
  156. unsigned int audio_info; /* see VX_AUDIO_INFO */
  157. unsigned int audio_ins;
  158. unsigned int audio_outs;
  159. struct vx_pipe **playback_pipes;
  160. struct vx_pipe **capture_pipes;
  161. /* clock and audio sources */
  162. unsigned int audio_source; /* current audio input source */
  163. unsigned int audio_source_target;
  164. unsigned int clock_mode; /* clock mode (VX_CLOCK_MODE_XXX) */
  165. unsigned int clock_source; /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
  166. unsigned int freq; /* current frequency */
  167. unsigned int freq_detected; /* detected frequency from digital in */
  168. unsigned int uer_detected; /* VX_UER_MODE_XXX */
  169. unsigned int uer_bits; /* IEC958 status bits */
  170. struct vx_ibl_info ibl; /* IBL information */
  171. /* mixer setting */
  172. int output_level[VX_MAX_CODECS][2]; /* analog output level */
  173. int audio_gain[2][4]; /* digital audio level (playback/capture) */
  174. unsigned char audio_active[4]; /* mute/unmute on digital playback */
  175. int audio_monitor[4]; /* playback hw-monitor level */
  176. unsigned char audio_monitor_active[4]; /* playback hw-monitor mute/unmute */
  177. struct mutex mixer_mutex;
  178. const struct firmware *firmware[4]; /* loaded firmware data */
  179. };
  180. /*
  181. * constructor
  182. */
  183. struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
  184. struct snd_vx_ops *ops, int extra_size);
  185. int snd_vx_setup_firmware(struct vx_core *chip);
  186. int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *dsp);
  187. int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *dsp);
  188. int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp);
  189. void snd_vx_free_firmware(struct vx_core *chip);
  190. /*
  191. * interrupt handler; exported for pcmcia
  192. */
  193. irqreturn_t snd_vx_irq_handler(int irq, void *dev);
  194. /*
  195. * lowlevel functions
  196. */
  197. static inline int vx_test_and_ack(struct vx_core *chip)
  198. {
  199. snd_assert(chip->ops->test_and_ack, return -ENXIO);
  200. return chip->ops->test_and_ack(chip);
  201. }
  202. static inline void vx_validate_irq(struct vx_core *chip, int enable)
  203. {
  204. snd_assert(chip->ops->validate_irq, return);
  205. chip->ops->validate_irq(chip, enable);
  206. }
  207. static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg)
  208. {
  209. snd_assert(chip->ops->in8, return 0);
  210. return chip->ops->in8(chip, reg);
  211. }
  212. static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg)
  213. {
  214. snd_assert(chip->ops->in32, return 0);
  215. return chip->ops->in32(chip, reg);
  216. }
  217. static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val)
  218. {
  219. snd_assert(chip->ops->out8, return);
  220. chip->ops->out8(chip, reg, val);
  221. }
  222. static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val)
  223. {
  224. snd_assert(chip->ops->out32, return);
  225. chip->ops->out32(chip, reg, val);
  226. }
  227. #define vx_inb(chip,reg) snd_vx_inb(chip, VX_##reg)
  228. #define vx_outb(chip,reg,val) snd_vx_outb(chip, VX_##reg,val)
  229. #define vx_inl(chip,reg) snd_vx_inl(chip, VX_##reg)
  230. #define vx_outl(chip,reg,val) snd_vx_outl(chip, VX_##reg,val)
  231. static inline void vx_reset_dsp(struct vx_core *chip)
  232. {
  233. snd_assert(chip->ops->reset_dsp, return);
  234. chip->ops->reset_dsp(chip);
  235. }
  236. int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh);
  237. int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh);
  238. int vx_send_rih(struct vx_core *chip, int cmd);
  239. int vx_send_rih_nolock(struct vx_core *chip, int cmd);
  240. void vx_reset_codec(struct vx_core *chip, int cold_reset);
  241. /*
  242. * check the bit on the specified register
  243. * returns zero if a bit matches, or a negative error code.
  244. * exported for vxpocket driver
  245. */
  246. int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time);
  247. #define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
  248. #define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
  249. #define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)
  250. /*
  251. * pseudo-DMA transfer
  252. */
  253. static inline void vx_pseudo_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
  254. struct vx_pipe *pipe, int count)
  255. {
  256. snd_assert(chip->ops->dma_write, return);
  257. chip->ops->dma_write(chip, runtime, pipe, count);
  258. }
  259. static inline void vx_pseudo_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
  260. struct vx_pipe *pipe, int count)
  261. {
  262. snd_assert(chip->ops->dma_read, return);
  263. chip->ops->dma_read(chip, runtime, pipe, count);
  264. }
  265. /* error with hardware code,
  266. * the return value is -(VX_ERR_MASK | actual-hw-error-code)
  267. */
  268. #define VX_ERR_MASK 0x1000000
  269. #define vx_get_error(err) (-(err) & ~VX_ERR_MASK)
  270. /*
  271. * pcm stuff
  272. */
  273. int snd_vx_pcm_new(struct vx_core *chip);
  274. void vx_pcm_update_intr(struct vx_core *chip, unsigned int events);
  275. /*
  276. * mixer stuff
  277. */
  278. int snd_vx_mixer_new(struct vx_core *chip);
  279. void vx_toggle_dac_mute(struct vx_core *chip, int mute);
  280. int vx_sync_audio_source(struct vx_core *chip);
  281. int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active);
  282. /*
  283. * IEC958 & clock stuff
  284. */
  285. void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
  286. int vx_set_clock(struct vx_core *chip, unsigned int freq);
  287. void vx_set_internal_clock(struct vx_core *chip, unsigned int freq);
  288. int vx_change_frequency(struct vx_core *chip);
  289. /*
  290. * PM
  291. */
  292. int snd_vx_suspend(struct vx_core *card, pm_message_t state);
  293. int snd_vx_resume(struct vx_core *card);
  294. /*
  295. * hardware constants
  296. */
  297. #define vx_has_new_dsp(chip) ((chip)->type != VX_TYPE_BOARD)
  298. #define vx_is_pcmcia(chip) ((chip)->type >= VX_TYPE_VXPOCKET)
  299. /* audio input source */
  300. enum {
  301. VX_AUDIO_SRC_DIGITAL,
  302. VX_AUDIO_SRC_LINE,
  303. VX_AUDIO_SRC_MIC
  304. };
  305. /* clock source */
  306. enum {
  307. INTERNAL_QUARTZ,
  308. UER_SYNC
  309. };
  310. /* clock mode */
  311. enum {
  312. VX_CLOCK_MODE_AUTO, /* depending on the current audio source */
  313. VX_CLOCK_MODE_INTERNAL, /* fixed to internal quartz */
  314. VX_CLOCK_MODE_EXTERNAL /* fixed to UER sync */
  315. };
  316. /* SPDIF/UER type */
  317. enum {
  318. VX_UER_MODE_CONSUMER,
  319. VX_UER_MODE_PROFESSIONAL,
  320. VX_UER_MODE_NOT_PRESENT,
  321. };
  322. /* register indices */
  323. enum {
  324. VX_ICR,
  325. VX_CVR,
  326. VX_ISR,
  327. VX_IVR,
  328. VX_RXH,
  329. VX_TXH = VX_RXH,
  330. VX_RXM,
  331. VX_TXM = VX_RXM,
  332. VX_RXL,
  333. VX_TXL = VX_RXL,
  334. VX_DMA,
  335. VX_CDSP,
  336. VX_RFREQ,
  337. VX_RUER_V2,
  338. VX_GAIN,
  339. VX_DATA = VX_GAIN,
  340. VX_MEMIRQ,
  341. VX_ACQ,
  342. VX_BIT0,
  343. VX_BIT1,
  344. VX_MIC0,
  345. VX_MIC1,
  346. VX_MIC2,
  347. VX_MIC3,
  348. VX_PLX0,
  349. VX_PLX1,
  350. VX_PLX2,
  351. VX_LOFREQ, // V2: ACQ, VP: RFREQ
  352. VX_HIFREQ, // V2: BIT0, VP: RUER_V2
  353. VX_CSUER, // V2: BIT1, VP: BIT0
  354. VX_RUER, // V2: RUER_V2, VP: BIT1
  355. VX_REG_MAX,
  356. /* aliases for VX board */
  357. VX_RESET_DMA = VX_ISR,
  358. VX_CFG = VX_RFREQ,
  359. VX_STATUS = VX_MEMIRQ,
  360. VX_SELMIC = VX_MIC0,
  361. VX_COMPOT = VX_MIC1,
  362. VX_SCOMPR = VX_MIC2,
  363. VX_GLIMIT = VX_MIC3,
  364. VX_INTCSR = VX_PLX0,
  365. VX_CNTRL = VX_PLX1,
  366. VX_GPIOC = VX_PLX2,
  367. /* aliases for VXPOCKET board */
  368. VX_MICRO = VX_MEMIRQ,
  369. VX_CODEC2 = VX_MEMIRQ,
  370. VX_DIALOG = VX_ACQ,
  371. };
  372. /* RMH status type */
  373. enum {
  374. RMH_SSIZE_FIXED = 0, /* status size given by the driver (in LgStat) */
  375. RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */
  376. RMH_SSIZE_MASK = 2, /* status size given in bitmask */
  377. };
  378. /* bits for ICR register */
  379. #define ICR_HF1 0x10
  380. #define ICR_HF0 0x08
  381. #define ICR_TREQ 0x02 /* Interrupt mode + HREQ set on for transfer (->DSP) request */
  382. #define ICR_RREQ 0x01 /* Interrupt mode + RREQ set on for transfer (->PC) request */
  383. /* bits for CVR register */
  384. #define CVR_HC 0x80
  385. /* bits for ISR register */
  386. #define ISR_HF3 0x10
  387. #define ISR_HF2 0x08
  388. #define ISR_CHK 0x10
  389. #define ISR_ERR 0x08
  390. #define ISR_TX_READY 0x04
  391. #define ISR_TX_EMPTY 0x02
  392. #define ISR_RX_FULL 0x01
  393. /* Constants used to access the DATA register */
  394. #define VX_DATA_CODEC_MASK 0x80
  395. #define VX_DATA_XICOR_MASK 0x80
  396. /* Constants used to access the CSUER register (both for VX2 and VXP) */
  397. #define VX_SUER_FREQ_MASK 0x0c
  398. #define VX_SUER_FREQ_32KHz_MASK 0x0c
  399. #define VX_SUER_FREQ_44KHz_MASK 0x00
  400. #define VX_SUER_FREQ_48KHz_MASK 0x04
  401. #define VX_SUER_DATA_PRESENT_MASK 0x02
  402. #define VX_SUER_CLOCK_PRESENT_MASK 0x01
  403. #define VX_CUER_HH_BITC_SEL_MASK 0x08
  404. #define VX_CUER_MH_BITC_SEL_MASK 0x04
  405. #define VX_CUER_ML_BITC_SEL_MASK 0x02
  406. #define VX_CUER_LL_BITC_SEL_MASK 0x01
  407. #define XX_UER_CBITS_OFFSET_MASK 0x1f
  408. /* bits for audio_info */
  409. #define VX_AUDIO_INFO_REAL_TIME (1<<0) /* real-time processing available */
  410. #define VX_AUDIO_INFO_OFFLINE (1<<1) /* offline processing available */
  411. #define VX_AUDIO_INFO_MPEG1 (1<<5)
  412. #define VX_AUDIO_INFO_MPEG2 (1<<6)
  413. #define VX_AUDIO_INFO_LINEAR_8 (1<<7)
  414. #define VX_AUDIO_INFO_LINEAR_16 (1<<8)
  415. #define VX_AUDIO_INFO_LINEAR_24 (1<<9)
  416. /* DSP Interrupt Request values */
  417. #define VXP_IRQ_OFFSET 0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
  418. /* call with vx_send_irq_dsp() */
  419. #define IRQ_MESS_WRITE_END 0x30
  420. #define IRQ_MESS_WRITE_NEXT 0x32
  421. #define IRQ_MESS_READ_NEXT 0x34
  422. #define IRQ_MESS_READ_END 0x36
  423. #define IRQ_MESSAGE 0x38
  424. #define IRQ_RESET_CHK 0x3A
  425. #define IRQ_CONNECT_STREAM_NEXT 0x26
  426. #define IRQ_CONNECT_STREAM_END 0x28
  427. #define IRQ_PAUSE_START_CONNECT 0x2A
  428. #define IRQ_END_CONNECTION 0x2C
  429. /* Is there async. events pending ( IT Source Test ) */
  430. #define ASYNC_EVENTS_PENDING 0x008000
  431. #define HBUFFER_EVENTS_PENDING 0x004000 // Not always accurate
  432. #define NOTIF_EVENTS_PENDING 0x002000
  433. #define TIME_CODE_EVENT_PENDING 0x001000
  434. #define FREQUENCY_CHANGE_EVENT_PENDING 0x000800
  435. #define END_OF_BUFFER_EVENTS_PENDING 0x000400
  436. #define FATAL_DSP_ERROR 0xff0000
  437. /* Stream Format Header Defines */
  438. #define HEADER_FMT_BASE 0xFED00000
  439. #define HEADER_FMT_MONO 0x000000C0
  440. #define HEADER_FMT_INTEL 0x00008000
  441. #define HEADER_FMT_16BITS 0x00002000
  442. #define HEADER_FMT_24BITS 0x00004000
  443. #define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.*/
  444. #define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less then 32k.*/
  445. /* Constants used to access the Codec */
  446. #define XX_CODEC_SELECTOR 0x20
  447. /* codec commands */
  448. #define XX_CODEC_ADC_CONTROL_REGISTER 0x01
  449. #define XX_CODEC_DAC_CONTROL_REGISTER 0x02
  450. #define XX_CODEC_LEVEL_LEFT_REGISTER 0x03
  451. #define XX_CODEC_LEVEL_RIGHT_REGISTER 0x04
  452. #define XX_CODEC_PORT_MODE_REGISTER 0x05
  453. #define XX_CODEC_STATUS_REPORT_REGISTER 0x06
  454. #define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07
  455. /*
  456. * Audio-level control values
  457. */
  458. #define CVAL_M110DB 0x000 /* -110dB */
  459. #define CVAL_M99DB 0x02C
  460. #define CVAL_M21DB 0x163
  461. #define CVAL_M18DB 0x16F
  462. #define CVAL_M10DB 0x18F
  463. #define CVAL_0DB 0x1B7
  464. #define CVAL_18DB 0x1FF /* +18dB */
  465. #define CVAL_MAX 0x1FF
  466. #define AUDIO_IO_HAS_MUTE_LEVEL 0x400000
  467. #define AUDIO_IO_HAS_MUTE_MONITORING_1 0x200000
  468. #define AUDIO_IO_HAS_MUTE_MONITORING_2 0x100000
  469. #define VALID_AUDIO_IO_DIGITAL_LEVEL 0x01
  470. #define VALID_AUDIO_IO_MONITORING_LEVEL 0x02
  471. #define VALID_AUDIO_IO_MUTE_LEVEL 0x04
  472. #define VALID_AUDIO_IO_MUTE_MONITORING_1 0x08
  473. #define VALID_AUDIO_IO_MUTE_MONITORING_2 0x10
  474. #endif /* __SOUND_VX_COMMON_H */