scc.h 7.1 KB

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  1. /* $Id: scc.h,v 1.1.1.1 2007/06/12 07:27:16 eyryu Exp $ */
  2. #ifndef _SCC_H
  3. #define _SCC_H
  4. /* selection of hardware types */
  5. #define PA0HZP 0x00 /* hardware type for PA0HZP SCC card and compatible */
  6. #define EAGLE 0x01 /* hardware type for EAGLE card */
  7. #define PC100 0x02 /* hardware type for PC100 card */
  8. #define PRIMUS 0x04 /* hardware type for PRIMUS-PC (DG9BL) card */
  9. #define DRSI 0x08 /* hardware type for DRSI PC*Packet card */
  10. #define BAYCOM 0x10 /* hardware type for BayCom (U)SCC */
  11. /* DEV ioctl() commands */
  12. enum SCC_ioctl_cmds {
  13. SIOCSCCRESERVED = SIOCDEVPRIVATE,
  14. SIOCSCCCFG,
  15. SIOCSCCINI,
  16. SIOCSCCCHANINI,
  17. SIOCSCCSMEM,
  18. SIOCSCCGKISS,
  19. SIOCSCCSKISS,
  20. SIOCSCCGSTAT,
  21. SIOCSCCCAL
  22. };
  23. /* Device parameter control (from WAMPES) */
  24. enum L1_params {
  25. PARAM_DATA,
  26. PARAM_TXDELAY,
  27. PARAM_PERSIST,
  28. PARAM_SLOTTIME,
  29. PARAM_TXTAIL,
  30. PARAM_FULLDUP,
  31. PARAM_SOFTDCD, /* was: PARAM_HW */
  32. PARAM_MUTE, /* ??? */
  33. PARAM_DTR,
  34. PARAM_RTS,
  35. PARAM_SPEED,
  36. PARAM_ENDDELAY, /* ??? */
  37. PARAM_GROUP,
  38. PARAM_IDLE,
  39. PARAM_MIN,
  40. PARAM_MAXKEY,
  41. PARAM_WAIT,
  42. PARAM_MAXDEFER,
  43. PARAM_TX,
  44. PARAM_HWEVENT = 31,
  45. PARAM_RETURN = 255 /* reset kiss mode */
  46. };
  47. /* fulldup parameter */
  48. enum FULLDUP_modes {
  49. KISS_DUPLEX_HALF, /* normal CSMA operation */
  50. KISS_DUPLEX_FULL, /* fullduplex, key down trx after transmission */
  51. KISS_DUPLEX_LINK, /* fullduplex, key down trx after 'idletime' sec */
  52. KISS_DUPLEX_OPTIMA /* fullduplex, let the protocol layer control the hw */
  53. };
  54. /* misc. parameters */
  55. #define TIMER_OFF 65535U /* to switch off timers */
  56. #define NO_SUCH_PARAM 65534U /* param not implemented */
  57. /* HWEVENT parameter */
  58. enum HWEVENT_opts {
  59. HWEV_DCD_ON,
  60. HWEV_DCD_OFF,
  61. HWEV_ALL_SENT
  62. };
  63. /* channel grouping */
  64. #define RXGROUP 0100 /* if set, only tx when all channels clear */
  65. #define TXGROUP 0200 /* if set, don't transmit simultaneously */
  66. /* Tx/Rx clock sources */
  67. enum CLOCK_sources {
  68. CLK_DPLL, /* normal halfduplex operation */
  69. CLK_EXTERNAL, /* external clocking (G3RUH/DF9IC modems) */
  70. CLK_DIVIDER, /* Rx = DPLL, Tx = divider (fullduplex with */
  71. /* modems without clock regeneration */
  72. CLK_BRG /* experimental fullduplex mode with DPLL/BRG for */
  73. /* MODEMs without clock recovery */
  74. };
  75. /* Tx state */
  76. enum TX_state {
  77. TXS_IDLE, /* Transmitter off, no data pending */
  78. TXS_BUSY, /* waiting for permission to send / tailtime */
  79. TXS_ACTIVE, /* Transmitter on, sending data */
  80. TXS_NEWFRAME, /* reset CRC and send (next) frame */
  81. TXS_IDLE2, /* Transmitter on, no data pending */
  82. TXS_WAIT, /* Waiting for Mintime to expire */
  83. TXS_TIMEOUT /* We had a transmission timeout */
  84. };
  85. typedef unsigned long io_port; /* type definition for an 'io port address' */
  86. /* SCC statistical information */
  87. struct scc_stat {
  88. long rxints; /* Receiver interrupts */
  89. long txints; /* Transmitter interrupts */
  90. long exints; /* External/status interrupts */
  91. long spints; /* Special receiver interrupts */
  92. long txframes; /* Packets sent */
  93. long rxframes; /* Number of Frames Actually Received */
  94. long rxerrs; /* CRC Errors */
  95. long txerrs; /* KISS errors */
  96. unsigned int nospace; /* "Out of buffers" */
  97. unsigned int rx_over; /* Receiver Overruns */
  98. unsigned int tx_under; /* Transmitter Underruns */
  99. unsigned int tx_state; /* Transmitter state */
  100. int tx_queued; /* tx frames enqueued */
  101. unsigned int maxqueue; /* allocated tx_buffers */
  102. unsigned int bufsize; /* used buffersize */
  103. };
  104. struct scc_modem {
  105. long speed; /* Line speed, bps */
  106. char clocksrc; /* 0 = DPLL, 1 = external, 2 = divider */
  107. char nrz; /* NRZ instead of NRZI */
  108. };
  109. struct scc_kiss_cmd {
  110. int command; /* one of the KISS-Commands defined above */
  111. unsigned param; /* KISS-Param */
  112. };
  113. struct scc_hw_config {
  114. io_port data_a; /* data port channel A */
  115. io_port ctrl_a; /* control port channel A */
  116. io_port data_b; /* data port channel B */
  117. io_port ctrl_b; /* control port channel B */
  118. io_port vector_latch; /* INTACK-Latch (#) */
  119. io_port special; /* special function port */
  120. int irq; /* irq */
  121. long clock; /* clock */
  122. char option; /* command for function port */
  123. char brand; /* hardware type */
  124. char escc; /* use ext. features of a 8580/85180/85280 */
  125. };
  126. /* (#) only one INTACK latch allowed. */
  127. struct scc_mem_config {
  128. unsigned int dummy;
  129. unsigned int bufsize;
  130. };
  131. struct scc_calibrate {
  132. unsigned int time;
  133. unsigned char pattern;
  134. };
  135. #ifdef __KERNEL__
  136. enum {TX_OFF, TX_ON}; /* command for scc_key_trx() */
  137. /* Vector masks in RR2B */
  138. #define VECTOR_MASK 0x06
  139. #define TXINT 0x00
  140. #define EXINT 0x02
  141. #define RXINT 0x04
  142. #define SPINT 0x06
  143. #ifdef CONFIG_SCC_DELAY
  144. #define Inb(port) inb_p(port)
  145. #define Outb(port, val) outb_p(val, port)
  146. #else
  147. #define Inb(port) inb(port)
  148. #define Outb(port, val) outb(val, port)
  149. #endif
  150. /* SCC channel control structure for KISS */
  151. struct scc_kiss {
  152. unsigned char txdelay; /* Transmit Delay 10 ms/cnt */
  153. unsigned char persist; /* Persistence (0-255) as a % */
  154. unsigned char slottime; /* Delay to wait on persistence hit */
  155. unsigned char tailtime; /* Delay after last byte written */
  156. unsigned char fulldup; /* Full Duplex mode 0=CSMA 1=DUP 2=ALWAYS KEYED */
  157. unsigned char waittime; /* Waittime before any transmit attempt */
  158. unsigned int maxkeyup; /* Maximum time to transmit (seconds) */
  159. unsigned int mintime; /* Minimal offtime after MAXKEYUP timeout (seconds) */
  160. unsigned int idletime; /* Maximum idle time in ALWAYS KEYED mode (seconds) */
  161. unsigned int maxdefer; /* Timer for CSMA channel busy limit */
  162. unsigned char tx_inhibit; /* Transmit is not allowed when set */
  163. unsigned char group; /* Group ID for AX.25 TX interlocking */
  164. unsigned char mode; /* 'normal' or 'hwctrl' mode (unused) */
  165. unsigned char softdcd; /* Use DPLL instead of DCD pin for carrier detect */
  166. };
  167. /* SCC channel structure */
  168. struct scc_channel {
  169. int init; /* channel exists? */
  170. struct net_device *dev; /* link to device control structure */
  171. struct net_device_stats dev_stat;/* device statistics */
  172. char brand; /* manufacturer of the board */
  173. long clock; /* used clock */
  174. io_port ctrl; /* I/O address of CONTROL register */
  175. io_port data; /* I/O address of DATA register */
  176. io_port special; /* I/O address of special function port */
  177. int irq; /* Number of Interrupt */
  178. char option;
  179. char enhanced; /* Enhanced SCC support */
  180. unsigned char wreg[16]; /* Copy of last written value in WRx */
  181. unsigned char status; /* Copy of R0 at last external interrupt */
  182. unsigned char dcd; /* DCD status */
  183. struct scc_kiss kiss; /* control structure for KISS params */
  184. struct scc_stat stat; /* statistical information */
  185. struct scc_modem modem; /* modem information */
  186. struct sk_buff_head tx_queue; /* next tx buffer */
  187. struct sk_buff *rx_buff; /* pointer to frame currently received */
  188. struct sk_buff *tx_buff; /* pointer to frame currently transmitted */
  189. /* Timer */
  190. struct timer_list tx_t; /* tx timer for this channel */
  191. struct timer_list tx_wdog; /* tx watchdogs */
  192. /* Channel lock */
  193. spinlock_t lock; /* Channel guard lock */
  194. };
  195. #endif /* defined(__KERNEL__) */
  196. #endif /* defined(_SCC_H) */