io.h 9.4 KB

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  1. /*
  2. * linux/include/asm-arm/io.h
  3. *
  4. * Copyright (C) 1996-2000 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Modifications:
  11. * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
  12. * constant addresses and variable addresses.
  13. * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
  14. * specific IO header files.
  15. * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
  16. * 04-Apr-1999 PJB Added check_signature.
  17. * 12-Dec-1999 RMK More cleanups
  18. * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
  19. * 05-Oct-2004 BJD Moved memory string functions to use void __iomem
  20. */
  21. #ifndef __ASM_ARM_IO_H
  22. #define __ASM_ARM_IO_H
  23. #ifdef __KERNEL__
  24. #include <linux/types.h>
  25. #include <asm/byteorder.h>
  26. #include <asm/memory.h>
  27. /*
  28. * ISA I/O bus memory addresses are 1:1 with the physical address.
  29. */
  30. #define isa_virt_to_bus virt_to_phys
  31. #define isa_page_to_bus page_to_phys
  32. #define isa_bus_to_virt phys_to_virt
  33. /*
  34. * Generic IO read/write. These perform native-endian accesses. Note
  35. * that some architectures will want to re-define __raw_{read,write}w.
  36. */
  37. extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
  38. extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
  39. extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
  40. extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
  41. extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
  42. extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
  43. #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))
  44. #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
  45. #define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v))
  46. #define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a))
  47. #define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
  48. #define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
  49. /*
  50. * Architecture ioremap implementation.
  51. *
  52. * __ioremap takes CPU physical address.
  53. *
  54. * __ioremap_pfn takes a Page Frame Number and an offset into that page
  55. */
  56. extern void __iomem * __ioremap_pfn(unsigned long, unsigned long, size_t, unsigned long);
  57. extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
  58. extern void __iounmap(volatile void __iomem *addr);
  59. /*
  60. * Bad read/write accesses...
  61. */
  62. extern void __readwrite_bug(const char *fn);
  63. /*
  64. * Now, pick up the machine-defined IO definitions
  65. */
  66. #include <asm/arch/io.h>
  67. /*
  68. * IO port access primitives
  69. * -------------------------
  70. *
  71. * The ARM doesn't have special IO access instructions; all IO is memory
  72. * mapped. Note that these are defined to perform little endian accesses
  73. * only. Their primary purpose is to access PCI and ISA peripherals.
  74. *
  75. * Note that for a big endian machine, this implies that the following
  76. * big endian mode connectivity is in place, as described by numerous
  77. * ARM documents:
  78. *
  79. * PCI: D0-D7 D8-D15 D16-D23 D24-D31
  80. * ARM: D24-D31 D16-D23 D8-D15 D0-D7
  81. *
  82. * The machine specific io.h include defines __io to translate an "IO"
  83. * address to a memory address.
  84. *
  85. * Note that we prevent GCC re-ordering or caching values in expressions
  86. * by introducing sequence points into the in*() definitions. Note that
  87. * __raw_* do not guarantee this behaviour.
  88. *
  89. * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
  90. */
  91. #ifdef __io
  92. #define outb(v,p) __raw_writeb(v,__io(p))
  93. #define outw(v,p) __raw_writew((__force __u16) \
  94. cpu_to_le16(v),__io(p))
  95. #define outl(v,p) __raw_writel((__force __u32) \
  96. cpu_to_le32(v),__io(p))
  97. #define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; })
  98. #define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \
  99. __raw_readw(__io(p))); __v; })
  100. #define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \
  101. __raw_readl(__io(p))); __v; })
  102. #define outsb(p,d,l) __raw_writesb(__io(p),d,l)
  103. #define outsw(p,d,l) __raw_writesw(__io(p),d,l)
  104. #define outsl(p,d,l) __raw_writesl(__io(p),d,l)
  105. #define insb(p,d,l) __raw_readsb(__io(p),d,l)
  106. #define insw(p,d,l) __raw_readsw(__io(p),d,l)
  107. #define insl(p,d,l) __raw_readsl(__io(p),d,l)
  108. #endif
  109. #define outb_p(val,port) outb((val),(port))
  110. #define outw_p(val,port) outw((val),(port))
  111. #define outl_p(val,port) outl((val),(port))
  112. #define inb_p(port) inb((port))
  113. #define inw_p(port) inw((port))
  114. #define inl_p(port) inl((port))
  115. #define outsb_p(port,from,len) outsb(port,from,len)
  116. #define outsw_p(port,from,len) outsw(port,from,len)
  117. #define outsl_p(port,from,len) outsl(port,from,len)
  118. #define insb_p(port,to,len) insb(port,to,len)
  119. #define insw_p(port,to,len) insw(port,to,len)
  120. #define insl_p(port,to,len) insl(port,to,len)
  121. /*
  122. * String version of IO memory access ops:
  123. */
  124. extern void _memcpy_fromio(void *, const volatile void __iomem *, size_t);
  125. extern void _memcpy_toio(volatile void __iomem *, const void *, size_t);
  126. extern void _memset_io(volatile void __iomem *, int, size_t);
  127. #define mmiowb()
  128. /*
  129. * Memory access primitives
  130. * ------------------------
  131. *
  132. * These perform PCI memory accesses via an ioremap region. They don't
  133. * take an address as such, but a cookie.
  134. *
  135. * Again, this are defined to perform little endian accesses. See the
  136. * IO port primitives for more information.
  137. */
  138. #ifdef __mem_pci
  139. #define readb(c) ({ __u8 __v = __raw_readb(__mem_pci(c)); __v; })
  140. #define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \
  141. __raw_readw(__mem_pci(c))); __v; })
  142. #define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \
  143. __raw_readl(__mem_pci(c))); __v; })
  144. #define readb_relaxed(addr) readb(addr)
  145. #define readw_relaxed(addr) readw(addr)
  146. #define readl_relaxed(addr) readl(addr)
  147. #define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l)
  148. #define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l)
  149. #define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l)
  150. #define writeb(v,c) __raw_writeb(v,__mem_pci(c))
  151. #define writew(v,c) __raw_writew((__force __u16) \
  152. cpu_to_le16(v),__mem_pci(c))
  153. #define writel(v,c) __raw_writel((__force __u32) \
  154. cpu_to_le32(v),__mem_pci(c))
  155. #define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
  156. #define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
  157. #define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
  158. #define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
  159. #define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
  160. #define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
  161. #elif !defined(readb)
  162. #define readb(c) (__readwrite_bug("readb"),0)
  163. #define readw(c) (__readwrite_bug("readw"),0)
  164. #define readl(c) (__readwrite_bug("readl"),0)
  165. #define writeb(v,c) __readwrite_bug("writeb")
  166. #define writew(v,c) __readwrite_bug("writew")
  167. #define writel(v,c) __readwrite_bug("writel")
  168. #define check_signature(io,sig,len) (0)
  169. #endif /* __mem_pci */
  170. /*
  171. * ioremap and friends.
  172. *
  173. * ioremap takes a PCI memory address, as specified in
  174. * Documentation/IO-mapping.txt.
  175. *
  176. */
  177. #ifndef __arch_ioremap
  178. #define ioremap(cookie,size) __ioremap(cookie,size,0)
  179. #define ioremap_nocache(cookie,size) __ioremap(cookie,size,0)
  180. #define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE)
  181. #define iounmap(cookie) __iounmap(cookie)
  182. #else
  183. #define ioremap(cookie,size) __arch_ioremap((cookie),(size),0)
  184. #define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0)
  185. #define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
  186. #define iounmap(cookie) __arch_iounmap(cookie)
  187. #endif
  188. /*
  189. * io{read,write}{8,16,32} macros
  190. */
  191. #ifndef ioread8
  192. #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
  193. #define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
  194. #define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
  195. #define iowrite8(v,p) __raw_writeb(v, p)
  196. #define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p)
  197. #define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p)
  198. #define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
  199. #define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
  200. #define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
  201. #define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
  202. #define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
  203. #define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
  204. extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
  205. extern void ioport_unmap(void __iomem *addr);
  206. #endif
  207. struct pci_dev;
  208. extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
  209. extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
  210. /*
  211. * can the hardware map this into one segment or not, given no other
  212. * constraints.
  213. */
  214. #define BIOVEC_MERGEABLE(vec1, vec2) \
  215. ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))
  216. #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
  217. extern int valid_phys_addr_range(unsigned long addr, size_t size);
  218. extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
  219. /*
  220. * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  221. * access
  222. */
  223. #define xlate_dev_mem_ptr(p) __va(p)
  224. /*
  225. * Convert a virtual cached pointer to an uncached pointer
  226. */
  227. #define xlate_dev_kmem_ptr(p) p
  228. /*
  229. * Register ISA memory and port locations for glibc iopl/inb/outb
  230. * emulation.
  231. */
  232. extern void register_isa_ports(unsigned int mmio, unsigned int io,
  233. unsigned int io_shift);
  234. #endif /* __KERNEL__ */
  235. #endif /* __ASM_ARM_IO_H */