dma-mapping.h 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456
  1. #ifndef ASMARM_DMA_MAPPING_H
  2. #define ASMARM_DMA_MAPPING_H
  3. #ifdef __KERNEL__
  4. #include <linux/mm.h> /* need struct page */
  5. #include <asm/scatterlist.h>
  6. /*
  7. * DMA-consistent mapping functions. These allocate/free a region of
  8. * uncached, unwrite-buffered mapped memory space for use with DMA
  9. * devices. This is the "generic" version. The PCI specific version
  10. * is in pci.h
  11. *
  12. * Note: Drivers should NOT use this function directly, as it will break
  13. * platforms with CONFIG_DMABOUNCE.
  14. * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  15. */
  16. extern void consistent_sync(const void *kaddr, size_t size, int rw);
  17. /*
  18. * Return whether the given device DMA address mask can be supported
  19. * properly. For example, if your device can only drive the low 24-bits
  20. * during bus mastering, then you would pass 0x00ffffff as the mask
  21. * to this function.
  22. *
  23. * FIXME: This should really be a platform specific issue - we should
  24. * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
  25. */
  26. static inline int dma_supported(struct device *dev, u64 mask)
  27. {
  28. return dev->dma_mask && *dev->dma_mask != 0;
  29. }
  30. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  31. {
  32. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  33. return -EIO;
  34. *dev->dma_mask = dma_mask;
  35. return 0;
  36. }
  37. static inline int dma_get_cache_alignment(void)
  38. {
  39. return 32;
  40. }
  41. static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
  42. {
  43. return !!arch_is_coherent();
  44. }
  45. /*
  46. * DMA errors are defined by all-bits-set in the DMA address.
  47. */
  48. static inline int dma_mapping_error(dma_addr_t dma_addr)
  49. {
  50. return dma_addr == ~0;
  51. }
  52. /*
  53. * Dummy noncoherent implementation. We don't provide a dma_cache_sync
  54. * function so drivers using this API are highlighted with build warnings.
  55. */
  56. static inline void *
  57. dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
  58. {
  59. return NULL;
  60. }
  61. static inline void
  62. dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
  63. dma_addr_t handle)
  64. {
  65. }
  66. /**
  67. * dma_alloc_coherent - allocate consistent memory for DMA
  68. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  69. * @size: required memory size
  70. * @handle: bus-specific DMA address
  71. *
  72. * Allocate some uncached, unbuffered memory for a device for
  73. * performing DMA. This function allocates pages, and will
  74. * return the CPU-viewed address, and sets @handle to be the
  75. * device-viewed address.
  76. */
  77. extern void *
  78. dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
  79. /**
  80. * dma_free_coherent - free memory allocated by dma_alloc_coherent
  81. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  82. * @size: size of memory originally requested in dma_alloc_coherent
  83. * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  84. * @handle: device-view address returned from dma_alloc_coherent
  85. *
  86. * Free (and unmap) a DMA buffer previously allocated by
  87. * dma_alloc_coherent().
  88. *
  89. * References to memory and mappings associated with cpu_addr/handle
  90. * during and after this call executing are illegal.
  91. */
  92. extern void
  93. dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
  94. dma_addr_t handle);
  95. /**
  96. * dma_mmap_coherent - map a coherent DMA allocation into user space
  97. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  98. * @vma: vm_area_struct describing requested user mapping
  99. * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
  100. * @handle: device-view address returned from dma_alloc_coherent
  101. * @size: size of memory originally requested in dma_alloc_coherent
  102. *
  103. * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
  104. * into user space. The coherent DMA buffer must not be freed by the
  105. * driver until the user space mapping has been released.
  106. */
  107. int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
  108. void *cpu_addr, dma_addr_t handle, size_t size);
  109. /**
  110. * dma_alloc_writecombine - allocate writecombining memory for DMA
  111. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  112. * @size: required memory size
  113. * @handle: bus-specific DMA address
  114. *
  115. * Allocate some uncached, buffered memory for a device for
  116. * performing DMA. This function allocates pages, and will
  117. * return the CPU-viewed address, and sets @handle to be the
  118. * device-viewed address.
  119. */
  120. extern void *
  121. dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
  122. #define dma_free_writecombine(dev,size,cpu_addr,handle) \
  123. dma_free_coherent(dev,size,cpu_addr,handle)
  124. int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
  125. void *cpu_addr, dma_addr_t handle, size_t size);
  126. /**
  127. * dma_map_single - map a single buffer for streaming DMA
  128. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  129. * @cpu_addr: CPU direct mapped address of buffer
  130. * @size: size of buffer to map
  131. * @dir: DMA transfer direction
  132. *
  133. * Ensure that any data held in the cache is appropriately discarded
  134. * or written back.
  135. *
  136. * The device owns this memory once this call has completed. The CPU
  137. * can regain ownership by calling dma_unmap_single() or
  138. * dma_sync_single_for_cpu().
  139. */
  140. #ifndef CONFIG_DMABOUNCE
  141. static inline dma_addr_t
  142. dma_map_single(struct device *dev, void *cpu_addr, size_t size,
  143. enum dma_data_direction dir)
  144. {
  145. if (!arch_is_coherent())
  146. consistent_sync(cpu_addr, size, dir);
  147. return virt_to_dma(dev, (unsigned long)cpu_addr);
  148. }
  149. #else
  150. extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
  151. #endif
  152. /**
  153. * dma_map_page - map a portion of a page for streaming DMA
  154. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  155. * @page: page that buffer resides in
  156. * @offset: offset into page for start of buffer
  157. * @size: size of buffer to map
  158. * @dir: DMA transfer direction
  159. *
  160. * Ensure that any data held in the cache is appropriately discarded
  161. * or written back.
  162. *
  163. * The device owns this memory once this call has completed. The CPU
  164. * can regain ownership by calling dma_unmap_page() or
  165. * dma_sync_single_for_cpu().
  166. */
  167. static inline dma_addr_t
  168. dma_map_page(struct device *dev, struct page *page,
  169. unsigned long offset, size_t size,
  170. enum dma_data_direction dir)
  171. {
  172. return dma_map_single(dev, page_address(page) + offset, size, (int)dir);
  173. }
  174. /**
  175. * dma_unmap_single - unmap a single buffer previously mapped
  176. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  177. * @handle: DMA address of buffer
  178. * @size: size of buffer to map
  179. * @dir: DMA transfer direction
  180. *
  181. * Unmap a single streaming mode DMA translation. The handle and size
  182. * must match what was provided in the previous dma_map_single() call.
  183. * All other usages are undefined.
  184. *
  185. * After this call, reads by the CPU to the buffer are guaranteed to see
  186. * whatever the device wrote there.
  187. */
  188. #ifndef CONFIG_DMABOUNCE
  189. static inline void
  190. dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
  191. enum dma_data_direction dir)
  192. {
  193. /* nothing to do */
  194. }
  195. #else
  196. extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
  197. #endif
  198. /**
  199. * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
  200. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  201. * @handle: DMA address of buffer
  202. * @size: size of buffer to map
  203. * @dir: DMA transfer direction
  204. *
  205. * Unmap a single streaming mode DMA translation. The handle and size
  206. * must match what was provided in the previous dma_map_single() call.
  207. * All other usages are undefined.
  208. *
  209. * After this call, reads by the CPU to the buffer are guaranteed to see
  210. * whatever the device wrote there.
  211. */
  212. static inline void
  213. dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
  214. enum dma_data_direction dir)
  215. {
  216. dma_unmap_single(dev, handle, size, (int)dir);
  217. }
  218. /**
  219. * dma_map_sg - map a set of SG buffers for streaming mode DMA
  220. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  221. * @sg: list of buffers
  222. * @nents: number of buffers to map
  223. * @dir: DMA transfer direction
  224. *
  225. * Map a set of buffers described by scatterlist in streaming
  226. * mode for DMA. This is the scatter-gather version of the
  227. * above dma_map_single interface. Here the scatter gather list
  228. * elements are each tagged with the appropriate dma address
  229. * and length. They are obtained via sg_dma_{address,length}(SG).
  230. *
  231. * NOTE: An implementation may be able to use a smaller number of
  232. * DMA address/length pairs than there are SG table elements.
  233. * (for example via virtual mapping capabilities)
  234. * The routine returns the number of addr/length pairs actually
  235. * used, at most nents.
  236. *
  237. * Device ownership issues as mentioned above for dma_map_single are
  238. * the same here.
  239. */
  240. #ifndef CONFIG_DMABOUNCE
  241. static inline int
  242. dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  243. enum dma_data_direction dir)
  244. {
  245. int i;
  246. for (i = 0; i < nents; i++, sg++) {
  247. char *virt;
  248. sg->dma_address = page_to_dma(dev, sg->page) + sg->offset;
  249. virt = page_address(sg->page) + sg->offset;
  250. if (!arch_is_coherent())
  251. consistent_sync(virt, sg->length, dir);
  252. }
  253. return nents;
  254. }
  255. #else
  256. extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
  257. #endif
  258. /**
  259. * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
  260. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  261. * @sg: list of buffers
  262. * @nents: number of buffers to map
  263. * @dir: DMA transfer direction
  264. *
  265. * Unmap a set of streaming mode DMA translations.
  266. * Again, CPU read rules concerning calls here are the same as for
  267. * dma_unmap_single() above.
  268. */
  269. #ifndef CONFIG_DMABOUNCE
  270. static inline void
  271. dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
  272. enum dma_data_direction dir)
  273. {
  274. /* nothing to do */
  275. }
  276. #else
  277. extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
  278. #endif
  279. /**
  280. * dma_sync_single_for_cpu
  281. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  282. * @handle: DMA address of buffer
  283. * @size: size of buffer to map
  284. * @dir: DMA transfer direction
  285. *
  286. * Make physical memory consistent for a single streaming mode DMA
  287. * translation after a transfer.
  288. *
  289. * If you perform a dma_map_single() but wish to interrogate the
  290. * buffer using the cpu, yet do not wish to teardown the PCI dma
  291. * mapping, you must call this function before doing so. At the
  292. * next point you give the PCI dma address back to the card, you
  293. * must first the perform a dma_sync_for_device, and then the
  294. * device again owns the buffer.
  295. */
  296. #ifndef CONFIG_DMABOUNCE
  297. static inline void
  298. dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
  299. enum dma_data_direction dir)
  300. {
  301. if (!arch_is_coherent())
  302. consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
  303. }
  304. static inline void
  305. dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
  306. enum dma_data_direction dir)
  307. {
  308. if (!arch_is_coherent())
  309. consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
  310. }
  311. #else
  312. extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction);
  313. extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction);
  314. #endif
  315. /**
  316. * dma_sync_sg_for_cpu
  317. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  318. * @sg: list of buffers
  319. * @nents: number of buffers to map
  320. * @dir: DMA transfer direction
  321. *
  322. * Make physical memory consistent for a set of streaming
  323. * mode DMA translations after a transfer.
  324. *
  325. * The same as dma_sync_single_for_* but for a scatter-gather list,
  326. * same rules and usage.
  327. */
  328. #ifndef CONFIG_DMABOUNCE
  329. static inline void
  330. dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
  331. enum dma_data_direction dir)
  332. {
  333. int i;
  334. for (i = 0; i < nents; i++, sg++) {
  335. char *virt = page_address(sg->page) + sg->offset;
  336. if (!arch_is_coherent())
  337. consistent_sync(virt, sg->length, dir);
  338. }
  339. }
  340. static inline void
  341. dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
  342. enum dma_data_direction dir)
  343. {
  344. int i;
  345. for (i = 0; i < nents; i++, sg++) {
  346. char *virt = page_address(sg->page) + sg->offset;
  347. if (!arch_is_coherent())
  348. consistent_sync(virt, sg->length, dir);
  349. }
  350. }
  351. #else
  352. extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
  353. extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
  354. #endif
  355. #ifdef CONFIG_DMABOUNCE
  356. /*
  357. * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
  358. * and utilize bounce buffers as needed to work around limited DMA windows.
  359. *
  360. * On the SA-1111, a bug limits DMA to only certain regions of RAM.
  361. * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
  362. * On some ADI engineering sytems, PCI inbound window is 32MB (12MB total RAM)
  363. *
  364. * The following are helper functions used by the dmabounce subystem
  365. *
  366. */
  367. /**
  368. * dmabounce_register_dev
  369. *
  370. * @dev: valid struct device pointer
  371. * @small_buf_size: size of buffers to use with small buffer pool
  372. * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
  373. *
  374. * This function should be called by low-level platform code to register
  375. * a device as requireing DMA buffer bouncing. The function will allocate
  376. * appropriate DMA pools for the device.
  377. *
  378. */
  379. extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
  380. /**
  381. * dmabounce_unregister_dev
  382. *
  383. * @dev: valid struct device pointer
  384. *
  385. * This function should be called by low-level platform code when device
  386. * that was previously registered with dmabounce_register_dev is removed
  387. * from the system.
  388. *
  389. */
  390. extern void dmabounce_unregister_dev(struct device *);
  391. /**
  392. * dma_needs_bounce
  393. *
  394. * @dev: valid struct device pointer
  395. * @dma_handle: dma_handle of unbounced buffer
  396. * @size: size of region being mapped
  397. *
  398. * Platforms that utilize the dmabounce mechanism must implement
  399. * this function.
  400. *
  401. * The dmabounce routines call this function whenever a dma-mapping
  402. * is requested to determine whether a given buffer needs to be bounced
  403. * or not. The function must return 0 if the the buffer is OK for
  404. * DMA access and 1 if the buffer needs to be bounced.
  405. *
  406. */
  407. extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
  408. #endif /* CONFIG_DMABOUNCE */
  409. #endif /* __KERNEL__ */
  410. #endif