bitops.h 9.3 KB

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  1. /*
  2. * Copyright 1995, Russell King.
  3. * Various bits and pieces copyrights include:
  4. * Linus Torvalds (test_bit).
  5. * Big endian support: Copyright 2001, Nicolas Pitre
  6. * reworked by rmk.
  7. *
  8. * bit 0 is the LSB of an "unsigned long" quantity.
  9. *
  10. * Please note that the code in this file should never be included
  11. * from user space. Many of these are not implemented in assembler
  12. * since they would be too costly. Also, they require privileged
  13. * instructions (which are not available from user mode) to ensure
  14. * that they are atomic.
  15. */
  16. #ifndef __ASM_ARM_BITOPS_H
  17. #define __ASM_ARM_BITOPS_H
  18. #ifdef __KERNEL__
  19. #include <linux/compiler.h>
  20. #include <asm/system.h>
  21. #define smp_mb__before_clear_bit() mb()
  22. #define smp_mb__after_clear_bit() mb()
  23. /*
  24. * These functions are the basis of our bit ops.
  25. *
  26. * First, the atomic bitops. These use native endian.
  27. */
  28. static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
  29. {
  30. unsigned long flags;
  31. unsigned long mask = 1UL << (bit & 31);
  32. p += bit >> 5;
  33. raw_local_irq_save(flags);
  34. *p |= mask;
  35. raw_local_irq_restore(flags);
  36. }
  37. static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
  38. {
  39. unsigned long flags;
  40. unsigned long mask = 1UL << (bit & 31);
  41. p += bit >> 5;
  42. raw_local_irq_save(flags);
  43. *p &= ~mask;
  44. raw_local_irq_restore(flags);
  45. }
  46. static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
  47. {
  48. unsigned long flags;
  49. unsigned long mask = 1UL << (bit & 31);
  50. p += bit >> 5;
  51. raw_local_irq_save(flags);
  52. *p ^= mask;
  53. raw_local_irq_restore(flags);
  54. }
  55. static inline int
  56. ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
  57. {
  58. unsigned long flags;
  59. unsigned int res;
  60. unsigned long mask = 1UL << (bit & 31);
  61. p += bit >> 5;
  62. raw_local_irq_save(flags);
  63. res = *p;
  64. *p = res | mask;
  65. raw_local_irq_restore(flags);
  66. return res & mask;
  67. }
  68. static inline int
  69. ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
  70. {
  71. unsigned long flags;
  72. unsigned int res;
  73. unsigned long mask = 1UL << (bit & 31);
  74. p += bit >> 5;
  75. raw_local_irq_save(flags);
  76. res = *p;
  77. *p = res & ~mask;
  78. raw_local_irq_restore(flags);
  79. return res & mask;
  80. }
  81. static inline int
  82. ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
  83. {
  84. unsigned long flags;
  85. unsigned int res;
  86. unsigned long mask = 1UL << (bit & 31);
  87. p += bit >> 5;
  88. raw_local_irq_save(flags);
  89. res = *p;
  90. *p = res ^ mask;
  91. raw_local_irq_restore(flags);
  92. return res & mask;
  93. }
  94. #include <asm-generic/bitops/non-atomic.h>
  95. /*
  96. * A note about Endian-ness.
  97. * -------------------------
  98. *
  99. * When the ARM is put into big endian mode via CR15, the processor
  100. * merely swaps the order of bytes within words, thus:
  101. *
  102. * ------------ physical data bus bits -----------
  103. * D31 ... D24 D23 ... D16 D15 ... D8 D7 ... D0
  104. * little byte 3 byte 2 byte 1 byte 0
  105. * big byte 0 byte 1 byte 2 byte 3
  106. *
  107. * This means that reading a 32-bit word at address 0 returns the same
  108. * value irrespective of the endian mode bit.
  109. *
  110. * Peripheral devices should be connected with the data bus reversed in
  111. * "Big Endian" mode. ARM Application Note 61 is applicable, and is
  112. * available from http://www.arm.com/.
  113. *
  114. * The following assumes that the data bus connectivity for big endian
  115. * mode has been followed.
  116. *
  117. * Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0.
  118. */
  119. /*
  120. * Little endian assembly bitops. nr = 0 -> byte 0 bit 0.
  121. */
  122. extern void _set_bit_le(int nr, volatile unsigned long * p);
  123. extern void _clear_bit_le(int nr, volatile unsigned long * p);
  124. extern void _change_bit_le(int nr, volatile unsigned long * p);
  125. extern int _test_and_set_bit_le(int nr, volatile unsigned long * p);
  126. extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p);
  127. extern int _test_and_change_bit_le(int nr, volatile unsigned long * p);
  128. extern int _find_first_zero_bit_le(const void * p, unsigned size);
  129. extern int _find_next_zero_bit_le(const void * p, int size, int offset);
  130. extern int _find_first_bit_le(const unsigned long *p, unsigned size);
  131. extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
  132. /*
  133. * Big endian assembly bitops. nr = 0 -> byte 3 bit 0.
  134. */
  135. extern void _set_bit_be(int nr, volatile unsigned long * p);
  136. extern void _clear_bit_be(int nr, volatile unsigned long * p);
  137. extern void _change_bit_be(int nr, volatile unsigned long * p);
  138. extern int _test_and_set_bit_be(int nr, volatile unsigned long * p);
  139. extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p);
  140. extern int _test_and_change_bit_be(int nr, volatile unsigned long * p);
  141. extern int _find_first_zero_bit_be(const void * p, unsigned size);
  142. extern int _find_next_zero_bit_be(const void * p, int size, int offset);
  143. extern int _find_first_bit_be(const unsigned long *p, unsigned size);
  144. extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
  145. #ifndef CONFIG_SMP
  146. /*
  147. * The __* form of bitops are non-atomic and may be reordered.
  148. */
  149. #define ATOMIC_BITOP_LE(name,nr,p) \
  150. (__builtin_constant_p(nr) ? \
  151. ____atomic_##name(nr, p) : \
  152. _##name##_le(nr,p))
  153. #define ATOMIC_BITOP_BE(name,nr,p) \
  154. (__builtin_constant_p(nr) ? \
  155. ____atomic_##name(nr, p) : \
  156. _##name##_be(nr,p))
  157. #else
  158. #define ATOMIC_BITOP_LE(name,nr,p) _##name##_le(nr,p)
  159. #define ATOMIC_BITOP_BE(name,nr,p) _##name##_be(nr,p)
  160. #endif
  161. #define NONATOMIC_BITOP(name,nr,p) \
  162. (____nonatomic_##name(nr, p))
  163. #ifndef __ARMEB__
  164. /*
  165. * These are the little endian, atomic definitions.
  166. */
  167. #define set_bit(nr,p) ATOMIC_BITOP_LE(set_bit,nr,p)
  168. #define clear_bit(nr,p) ATOMIC_BITOP_LE(clear_bit,nr,p)
  169. #define change_bit(nr,p) ATOMIC_BITOP_LE(change_bit,nr,p)
  170. #define test_and_set_bit(nr,p) ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
  171. #define test_and_clear_bit(nr,p) ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
  172. #define test_and_change_bit(nr,p) ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
  173. #define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz)
  174. #define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off)
  175. #define find_first_bit(p,sz) _find_first_bit_le(p,sz)
  176. #define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off)
  177. #define WORD_BITOFF_TO_LE(x) ((x))
  178. #else
  179. /*
  180. * These are the big endian, atomic definitions.
  181. */
  182. #define set_bit(nr,p) ATOMIC_BITOP_BE(set_bit,nr,p)
  183. #define clear_bit(nr,p) ATOMIC_BITOP_BE(clear_bit,nr,p)
  184. #define change_bit(nr,p) ATOMIC_BITOP_BE(change_bit,nr,p)
  185. #define test_and_set_bit(nr,p) ATOMIC_BITOP_BE(test_and_set_bit,nr,p)
  186. #define test_and_clear_bit(nr,p) ATOMIC_BITOP_BE(test_and_clear_bit,nr,p)
  187. #define test_and_change_bit(nr,p) ATOMIC_BITOP_BE(test_and_change_bit,nr,p)
  188. #define find_first_zero_bit(p,sz) _find_first_zero_bit_be(p,sz)
  189. #define find_next_zero_bit(p,sz,off) _find_next_zero_bit_be(p,sz,off)
  190. #define find_first_bit(p,sz) _find_first_bit_be(p,sz)
  191. #define find_next_bit(p,sz,off) _find_next_bit_be(p,sz,off)
  192. #define WORD_BITOFF_TO_LE(x) ((x) ^ 0x18)
  193. #endif
  194. #if __LINUX_ARM_ARCH__ < 5
  195. #include <asm-generic/bitops/ffz.h>
  196. #include <asm-generic/bitops/__ffs.h>
  197. #include <asm-generic/bitops/fls.h>
  198. #include <asm-generic/bitops/ffs.h>
  199. #else
  200. static inline int constant_fls(int x)
  201. {
  202. int r = 32;
  203. if (!x)
  204. return 0;
  205. if (!(x & 0xffff0000u)) {
  206. x <<= 16;
  207. r -= 16;
  208. }
  209. if (!(x & 0xff000000u)) {
  210. x <<= 8;
  211. r -= 8;
  212. }
  213. if (!(x & 0xf0000000u)) {
  214. x <<= 4;
  215. r -= 4;
  216. }
  217. if (!(x & 0xc0000000u)) {
  218. x <<= 2;
  219. r -= 2;
  220. }
  221. if (!(x & 0x80000000u)) {
  222. x <<= 1;
  223. r -= 1;
  224. }
  225. return r;
  226. }
  227. /*
  228. * On ARMv5 and above those functions can be implemented around
  229. * the clz instruction for much better code efficiency.
  230. */
  231. #define fls(x) \
  232. ( __builtin_constant_p(x) ? constant_fls(x) : \
  233. ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
  234. #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
  235. #define __ffs(x) (ffs(x) - 1)
  236. #define ffz(x) __ffs( ~(x) )
  237. #endif
  238. #include <asm-generic/bitops/fls64.h>
  239. #include <asm-generic/bitops/sched.h>
  240. #include <asm-generic/bitops/hweight.h>
  241. /*
  242. * Ext2 is defined to use little-endian byte ordering.
  243. * These do not need to be atomic.
  244. */
  245. #define ext2_set_bit(nr,p) \
  246. __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  247. #define ext2_set_bit_atomic(lock,nr,p) \
  248. test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  249. #define ext2_clear_bit(nr,p) \
  250. __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  251. #define ext2_clear_bit_atomic(lock,nr,p) \
  252. test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  253. #define ext2_test_bit(nr,p) \
  254. test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  255. #define ext2_find_first_zero_bit(p,sz) \
  256. _find_first_zero_bit_le(p,sz)
  257. #define ext2_find_next_zero_bit(p,sz,off) \
  258. _find_next_zero_bit_le(p,sz,off)
  259. /*
  260. * Minix is defined to use little-endian byte ordering.
  261. * These do not need to be atomic.
  262. */
  263. #define minix_set_bit(nr,p) \
  264. __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  265. #define minix_test_bit(nr,p) \
  266. test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  267. #define minix_test_and_set_bit(nr,p) \
  268. __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  269. #define minix_test_and_clear_bit(nr,p) \
  270. __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
  271. #define minix_find_first_zero_bit(p,sz) \
  272. _find_first_zero_bit_le(p,sz)
  273. #endif /* __KERNEL__ */
  274. #endif /* _ARM_BITOPS_H */