dma.h 3.5 KB

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  1. /*
  2. * linux/include/asm-arm/arch-sa1100/dma.h
  3. *
  4. * Generic SA1100 DMA support
  5. *
  6. * Copyright (C) 2000 Nicolas Pitre
  7. *
  8. */
  9. #ifndef __ASM_ARCH_DMA_H
  10. #define __ASM_ARCH_DMA_H
  11. #include "hardware.h"
  12. /*
  13. * The SA1100 has six internal DMA channels.
  14. */
  15. #define SA1100_DMA_CHANNELS 6
  16. /*
  17. * Maximum physical DMA buffer size
  18. */
  19. #define MAX_DMA_SIZE 0x1fff
  20. #define CUT_DMA_SIZE 0x1000
  21. /*
  22. * All possible SA1100 devices a DMA channel can be attached to.
  23. */
  24. typedef enum {
  25. DMA_Ser0UDCWr = DDAR_Ser0UDCWr, /* Ser. port 0 UDC Write */
  26. DMA_Ser0UDCRd = DDAR_Ser0UDCRd, /* Ser. port 0 UDC Read */
  27. DMA_Ser1UARTWr = DDAR_Ser1UARTWr, /* Ser. port 1 UART Write */
  28. DMA_Ser1UARTRd = DDAR_Ser1UARTRd, /* Ser. port 1 UART Read */
  29. DMA_Ser1SDLCWr = DDAR_Ser1SDLCWr, /* Ser. port 1 SDLC Write */
  30. DMA_Ser1SDLCRd = DDAR_Ser1SDLCRd, /* Ser. port 1 SDLC Read */
  31. DMA_Ser2UARTWr = DDAR_Ser2UARTWr, /* Ser. port 2 UART Write */
  32. DMA_Ser2UARTRd = DDAR_Ser2UARTRd, /* Ser. port 2 UART Read */
  33. DMA_Ser2HSSPWr = DDAR_Ser2HSSPWr, /* Ser. port 2 HSSP Write */
  34. DMA_Ser2HSSPRd = DDAR_Ser2HSSPRd, /* Ser. port 2 HSSP Read */
  35. DMA_Ser3UARTWr = DDAR_Ser3UARTWr, /* Ser. port 3 UART Write */
  36. DMA_Ser3UARTRd = DDAR_Ser3UARTRd, /* Ser. port 3 UART Read */
  37. DMA_Ser4MCP0Wr = DDAR_Ser4MCP0Wr, /* Ser. port 4 MCP 0 Write (audio) */
  38. DMA_Ser4MCP0Rd = DDAR_Ser4MCP0Rd, /* Ser. port 4 MCP 0 Read (audio) */
  39. DMA_Ser4MCP1Wr = DDAR_Ser4MCP1Wr, /* Ser. port 4 MCP 1 Write */
  40. DMA_Ser4MCP1Rd = DDAR_Ser4MCP1Rd, /* Ser. port 4 MCP 1 Read */
  41. DMA_Ser4SSPWr = DDAR_Ser4SSPWr, /* Ser. port 4 SSP Write (16 bits) */
  42. DMA_Ser4SSPRd = DDAR_Ser4SSPRd /* Ser. port 4 SSP Read (16 bits) */
  43. } dma_device_t;
  44. typedef struct {
  45. volatile u_long DDAR;
  46. volatile u_long SetDCSR;
  47. volatile u_long ClrDCSR;
  48. volatile u_long RdDCSR;
  49. volatile dma_addr_t DBSA;
  50. volatile u_long DBTA;
  51. volatile dma_addr_t DBSB;
  52. volatile u_long DBTB;
  53. } dma_regs_t;
  54. typedef void (*dma_callback_t)(void *data);
  55. /*
  56. * DMA function prototypes
  57. */
  58. extern int sa1100_request_dma( dma_device_t device, const char *device_id,
  59. dma_callback_t callback, void *data,
  60. dma_regs_t **regs );
  61. extern void sa1100_free_dma( dma_regs_t *regs );
  62. extern int sa1100_start_dma( dma_regs_t *regs, dma_addr_t dma_ptr, u_int size );
  63. extern dma_addr_t sa1100_get_dma_pos(dma_regs_t *regs);
  64. extern void sa1100_reset_dma(dma_regs_t *regs);
  65. /**
  66. * sa1100_stop_dma - stop DMA in progress
  67. * @regs: identifier for the channel to use
  68. *
  69. * This stops DMA without clearing buffer pointers. Unlike
  70. * sa1100_clear_dma() this allows subsequent use of sa1100_resume_dma()
  71. * or sa1100_get_dma_pos().
  72. *
  73. * The @regs identifier is provided by a successful call to
  74. * sa1100_request_dma().
  75. **/
  76. #define sa1100_stop_dma(regs) ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN)
  77. /**
  78. * sa1100_resume_dma - resume DMA on a stopped channel
  79. * @regs: identifier for the channel to use
  80. *
  81. * This resumes DMA on a channel previously stopped with
  82. * sa1100_stop_dma().
  83. *
  84. * The @regs identifier is provided by a successful call to
  85. * sa1100_request_dma().
  86. **/
  87. #define sa1100_resume_dma(regs) ((regs)->SetDCSR = DCSR_IE|DCSR_RUN)
  88. /**
  89. * sa1100_clear_dma - clear DMA pointers
  90. * @regs: identifier for the channel to use
  91. *
  92. * This clear any DMA state so the DMA engine is ready to restart
  93. * with new buffers through sa1100_start_dma(). Any buffers in flight
  94. * are discarded.
  95. *
  96. * The @regs identifier is provided by a successful call to
  97. * sa1100_request_dma().
  98. **/
  99. #define sa1100_clear_dma(regs) ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN|DCSR_STRTA|DCSR_STRTB)
  100. #endif /* _ASM_ARCH_DMA_H */