io.h 6.8 KB

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  1. /*
  2. * linux/include/asm-arm/arch-rpc/io.h
  3. *
  4. * Copyright (C) 1997 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Modifications:
  11. * 06-Dec-1997 RMK Created.
  12. */
  13. #ifndef __ASM_ARM_ARCH_IO_H
  14. #define __ASM_ARM_ARCH_IO_H
  15. #include <asm/hardware.h>
  16. #define IO_SPACE_LIMIT 0xffffffff
  17. /*
  18. * GCC is totally crap at loading/storing data. We try to persuade it
  19. * to do the right thing by using these whereever possible instead of
  20. * the above.
  21. */
  22. #define __arch_base_getb(b,o) \
  23. ({ \
  24. unsigned int __v, __r = (b); \
  25. __asm__ __volatile__( \
  26. "ldrb %0, [%1, %2]" \
  27. : "=r" (__v) \
  28. : "r" (__r), "Ir" (o)); \
  29. __v; \
  30. })
  31. #define __arch_base_getl(b,o) \
  32. ({ \
  33. unsigned int __v, __r = (b); \
  34. __asm__ __volatile__( \
  35. "ldr %0, [%1, %2]" \
  36. : "=r" (__v) \
  37. : "r" (__r), "Ir" (o)); \
  38. __v; \
  39. })
  40. #define __arch_base_putb(v,b,o) \
  41. ({ \
  42. unsigned int __r = (b); \
  43. __asm__ __volatile__( \
  44. "strb %0, [%1, %2]" \
  45. : \
  46. : "r" (v), "r" (__r), "Ir" (o));\
  47. })
  48. #define __arch_base_putl(v,b,o) \
  49. ({ \
  50. unsigned int __r = (b); \
  51. __asm__ __volatile__( \
  52. "str %0, [%1, %2]" \
  53. : \
  54. : "r" (v), "r" (__r), "Ir" (o));\
  55. })
  56. /*
  57. * We use two different types of addressing - PC style addresses, and ARM
  58. * addresses. PC style accesses the PC hardware with the normal PC IO
  59. * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
  60. * and are translated to the start of IO. Note that all addresses are
  61. * shifted left!
  62. */
  63. #define __PORT_PCIO(x) (!((x) & 0x80000000))
  64. /*
  65. * Dynamic IO functions.
  66. */
  67. static inline void __outb (unsigned int value, unsigned int port)
  68. {
  69. unsigned long temp;
  70. __asm__ __volatile__(
  71. "tst %2, #0x80000000\n\t"
  72. "mov %0, %4\n\t"
  73. "addeq %0, %0, %3\n\t"
  74. "strb %1, [%0, %2, lsl #2] @ outb"
  75. : "=&r" (temp)
  76. : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
  77. : "cc");
  78. }
  79. static inline void __outw (unsigned int value, unsigned int port)
  80. {
  81. unsigned long temp;
  82. __asm__ __volatile__(
  83. "tst %2, #0x80000000\n\t"
  84. "mov %0, %4\n\t"
  85. "addeq %0, %0, %3\n\t"
  86. "str %1, [%0, %2, lsl #2] @ outw"
  87. : "=&r" (temp)
  88. : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
  89. : "cc");
  90. }
  91. static inline void __outl (unsigned int value, unsigned int port)
  92. {
  93. unsigned long temp;
  94. __asm__ __volatile__(
  95. "tst %2, #0x80000000\n\t"
  96. "mov %0, %4\n\t"
  97. "addeq %0, %0, %3\n\t"
  98. "str %1, [%0, %2, lsl #2] @ outl"
  99. : "=&r" (temp)
  100. : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
  101. : "cc");
  102. }
  103. #define DECLARE_DYN_IN(sz,fnsuffix,instr) \
  104. static inline unsigned sz __in##fnsuffix (unsigned int port) \
  105. { \
  106. unsigned long temp, value; \
  107. __asm__ __volatile__( \
  108. "tst %2, #0x80000000\n\t" \
  109. "mov %0, %4\n\t" \
  110. "addeq %0, %0, %3\n\t" \
  111. "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \
  112. : "=&r" (temp), "=r" (value) \
  113. : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
  114. : "cc"); \
  115. return (unsigned sz)value; \
  116. }
  117. static inline void __iomem *__ioaddr(unsigned int port)
  118. {
  119. void __iomem *ret;
  120. if (__PORT_PCIO(port))
  121. ret = PCIO_BASE;
  122. else
  123. ret = IO_BASE;
  124. return ret + (port << 2);
  125. }
  126. #define DECLARE_IO(sz,fnsuffix,instr) \
  127. DECLARE_DYN_IN(sz,fnsuffix,instr)
  128. DECLARE_IO(char,b,"b")
  129. DECLARE_IO(short,w,"")
  130. DECLARE_IO(int,l,"")
  131. #undef DECLARE_IO
  132. #undef DECLARE_DYN_IN
  133. /*
  134. * Constant address IO functions
  135. *
  136. * These have to be macros for the 'J' constraint to work -
  137. * +/-4096 immediate operand.
  138. */
  139. #define __outbc(value,port) \
  140. ({ \
  141. if (__PORT_PCIO((port))) \
  142. __asm__ __volatile__( \
  143. "strb %0, [%1, %2] @ outbc" \
  144. : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  145. else \
  146. __asm__ __volatile__( \
  147. "strb %0, [%1, %2] @ outbc" \
  148. : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
  149. })
  150. #define __inbc(port) \
  151. ({ \
  152. unsigned char result; \
  153. if (__PORT_PCIO((port))) \
  154. __asm__ __volatile__( \
  155. "ldrb %0, [%1, %2] @ inbc" \
  156. : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  157. else \
  158. __asm__ __volatile__( \
  159. "ldrb %0, [%1, %2] @ inbc" \
  160. : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
  161. result; \
  162. })
  163. #define __outwc(value,port) \
  164. ({ \
  165. unsigned long __v = value; \
  166. if (__PORT_PCIO((port))) \
  167. __asm__ __volatile__( \
  168. "str %0, [%1, %2] @ outwc" \
  169. : : "r" (__v|__v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  170. else \
  171. __asm__ __volatile__( \
  172. "str %0, [%1, %2] @ outwc" \
  173. : : "r" (__v|__v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
  174. })
  175. #define __inwc(port) \
  176. ({ \
  177. unsigned short result; \
  178. if (__PORT_PCIO((port))) \
  179. __asm__ __volatile__( \
  180. "ldr %0, [%1, %2] @ inwc" \
  181. : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  182. else \
  183. __asm__ __volatile__( \
  184. "ldr %0, [%1, %2] @ inwc" \
  185. : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
  186. result & 0xffff; \
  187. })
  188. #define __outlc(value,port) \
  189. ({ \
  190. unsigned long __v = value; \
  191. if (__PORT_PCIO((port))) \
  192. __asm__ __volatile__( \
  193. "str %0, [%1, %2] @ outlc" \
  194. : : "r" (__v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  195. else \
  196. __asm__ __volatile__( \
  197. "str %0, [%1, %2] @ outlc" \
  198. : : "r" (__v), "r" (IO_BASE), "r" ((port) << 2)); \
  199. })
  200. #define __inlc(port) \
  201. ({ \
  202. unsigned long result; \
  203. if (__PORT_PCIO((port))) \
  204. __asm__ __volatile__( \
  205. "ldr %0, [%1, %2] @ inlc" \
  206. : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  207. else \
  208. __asm__ __volatile__( \
  209. "ldr %0, [%1, %2] @ inlc" \
  210. : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
  211. result; \
  212. })
  213. #define __ioaddrc(port) \
  214. ((__PORT_PCIO(port) ? PCIO_BASE : IO_BASE) + ((port) << 2))
  215. #define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
  216. #define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
  217. #define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
  218. #define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
  219. #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
  220. #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
  221. #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
  222. /* the following macro is deprecated */
  223. #define ioaddr(port) ((unsigned long)__ioaddr((port)))
  224. #define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
  225. #define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
  226. #define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
  227. #define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
  228. /*
  229. * 1:1 mapping for ioremapped regions.
  230. */
  231. #define __mem_pci(x) (x)
  232. #endif