irqs.h 6.8 KB

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  1. /* include/asm-arm/arch-lh7a40x/irqs.h
  2. *
  3. * Copyright (C) 2004 Coastal Environmental Systems
  4. * Copyright (C) 2004 Logic Product Development
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. */
  11. /* It is to be seen whether or not we can build a kernel for more than
  12. * one board. For the time being, these macros assume that we cannot.
  13. * Thus, it is OK to ifdef machine/board specific IRQ assignments.
  14. */
  15. #ifndef __ASM_ARCH_IRQS_H
  16. #define __ASM_ARCH_IRQS_H
  17. #define FIQ_START 80
  18. #if defined (CONFIG_ARCH_LH7A400)
  19. /* FIQs */
  20. # define IRQ_GPIO0FIQ 0 /* GPIO External FIQ Interrupt on F0 */
  21. # define IRQ_BLINT 1 /* Battery Low */
  22. # define IRQ_WEINT 2 /* Watchdog Timer, WDT overflow */
  23. # define IRQ_MCINT 3 /* Media Change, MEDCHG pin rising */
  24. /* IRQs */
  25. # define IRQ_CSINT 4 /* Audio Codec (ACI) */
  26. # define IRQ_GPIO1INTR 5 /* GPIO External IRQ Interrupt on F1 */
  27. # define IRQ_GPIO2INTR 6 /* GPIO External IRQ Interrupt on F2 */
  28. # define IRQ_GPIO3INTR 7 /* GPIO External IRQ Interrupt on F3 */
  29. # define IRQ_T1UI 8 /* Timer 1 underflow */
  30. # define IRQ_T2UI 9 /* Timer 2 underflow */
  31. # define IRQ_RTCMI 10
  32. # define IRQ_TINTR 11 /* Clock State Controller 64 Hz tick (CSC) */
  33. # define IRQ_UART1INTR 12
  34. # define IRQ_UART2INTR 13
  35. # define IRQ_LCDINTR 14
  36. # define IRQ_SSIEOT 15 /* Synchronous Serial Interface (SSI) */
  37. # define IRQ_UART3INTR 16
  38. # define IRQ_SCIINTR 17 /* Smart Card Interface (SCI) */
  39. # define IRQ_AACINTR 18 /* Advanced Audio Codec (AAC) */
  40. # define IRQ_MMCINTR 19 /* Multimedia Card (MMC) */
  41. # define IRQ_USBINTR 20
  42. # define IRQ_DMAINTR 21
  43. # define IRQ_T3UI 22 /* Timer 3 underflow */
  44. # define IRQ_GPIO4INTR 23 /* GPIO External IRQ Interrupt on F4 */
  45. # define IRQ_GPIO5INTR 24 /* GPIO External IRQ Interrupt on F5 */
  46. # define IRQ_GPIO6INTR 25 /* GPIO External IRQ Interrupt on F6 */
  47. # define IRQ_GPIO7INTR 26 /* GPIO External IRQ Interrupt on F7 */
  48. # define IRQ_BMIINTR 27 /* Battery Monitor Interface (BMI) */
  49. # define NR_IRQ_CPU 28 /* IRQs directly recognized by CPU */
  50. /* Given IRQ, return GPIO interrupt number 0-7 */
  51. # define IRQ_TO_GPIO(i) ((i) \
  52. - (((i) > IRQ_GPIO3INTR) ? IRQ_GPIO4INTR - IRQ_GPIO3INTR - 1 : 0)\
  53. - (((i) > IRQ_GPIO0INTR) ? IRQ_GPIO1INTR - IRQ_GPIO0INTR - 1 : 0))
  54. #endif
  55. #if defined (CONFIG_ARCH_LH7A404)
  56. # define IRQ_BROWN 0 /* Brownout */
  57. # define IRQ_WDTINTR 1 /* Watchdog Timer */
  58. # define IRQ_COMMRX 2 /* ARM Comm Rx for Debug */
  59. # define IRQ_COMMTX 3 /* ARM Comm Tx for Debug */
  60. # define IRQ_T1UI 4 /* Timer 1 underflow */
  61. # define IRQ_T2UI 5 /* Timer 2 underflow */
  62. # define IRQ_CSINT 6 /* Codec Interrupt (shared by AAC on 404) */
  63. # define IRQ_DMAM2P0 7 /* -- DMA Memory to Peripheral */
  64. # define IRQ_DMAM2P1 8
  65. # define IRQ_DMAM2P2 9
  66. # define IRQ_DMAM2P3 10
  67. # define IRQ_DMAM2P4 11
  68. # define IRQ_DMAM2P5 12
  69. # define IRQ_DMAM2P6 13
  70. # define IRQ_DMAM2P7 14
  71. # define IRQ_DMAM2P8 15
  72. # define IRQ_DMAM2P9 16
  73. # define IRQ_DMAM2M0 17 /* -- DMA Memory to Memory */
  74. # define IRQ_DMAM2M1 18
  75. # define IRQ_GPIO0INTR 19 /* -- GPIOF Interrupt */
  76. # define IRQ_GPIO1INTR 20
  77. # define IRQ_GPIO2INTR 21
  78. # define IRQ_GPIO3INTR 22
  79. # define IRQ_SOFT_V1_23 23 /* -- Unassigned */
  80. # define IRQ_SOFT_V1_24 24
  81. # define IRQ_SOFT_V1_25 25
  82. # define IRQ_SOFT_V1_26 26
  83. # define IRQ_SOFT_V1_27 27
  84. # define IRQ_SOFT_V1_28 28
  85. # define IRQ_SOFT_V1_29 29
  86. # define IRQ_SOFT_V1_30 30
  87. # define IRQ_SOFT_V1_31 31
  88. # define IRQ_BLINT 32 /* Battery Low */
  89. # define IRQ_BMIINTR 33 /* Battery Monitor */
  90. # define IRQ_MCINTR 34 /* Media Change */
  91. # define IRQ_TINTR 35 /* 64Hz Tick */
  92. # define IRQ_WEINT 36 /* Watchdog Expired */
  93. # define IRQ_RTCMI 37 /* Real-time Clock Match */
  94. # define IRQ_UART1INTR 38 /* UART1 Interrupt (including error) */
  95. # define IRQ_UART1ERR 39 /* UART1 Error */
  96. # define IRQ_UART2INTR 40 /* UART2 Interrupt (including error) */
  97. # define IRQ_UART2ERR 41 /* UART2 Error */
  98. # define IRQ_UART3INTR 42 /* UART3 Interrupt (including error) */
  99. # define IRQ_UART3ERR 43 /* UART3 Error */
  100. # define IRQ_SCIINTR 44 /* Smart Card */
  101. # define IRQ_TSCINTR 45 /* Touchscreen */
  102. # define IRQ_KMIINTR 46 /* Keyboard/Mouse (PS/2) */
  103. # define IRQ_GPIO4INTR 47 /* -- GPIOF Interrupt */
  104. # define IRQ_GPIO5INTR 48
  105. # define IRQ_GPIO6INTR 49
  106. # define IRQ_GPIO7INTR 50
  107. # define IRQ_T3UI 51 /* Timer 3 underflow */
  108. # define IRQ_LCDINTR 52 /* LCD Controller */
  109. # define IRQ_SSPINTR 53 /* Synchronous Serial Port */
  110. # define IRQ_SDINTR 54 /* Secure Digital Port (MMC) */
  111. # define IRQ_USBINTR 55 /* USB Device Port */
  112. # define IRQ_USHINTR 56 /* USB Host Port */
  113. # define IRQ_SOFT_V2_25 57 /* -- Unassigned */
  114. # define IRQ_SOFT_V2_26 58
  115. # define IRQ_SOFT_V2_27 59
  116. # define IRQ_SOFT_V2_28 60
  117. # define IRQ_SOFT_V2_29 61
  118. # define IRQ_SOFT_V2_30 62
  119. # define IRQ_SOFT_V2_31 63
  120. # define NR_IRQ_CPU 64 /* IRQs directly recognized by CPU */
  121. /* Given IRQ, return GPIO interrupt number 0-7 */
  122. # define IRQ_TO_GPIO(i) ((i) \
  123. - (((i) > IRQ_GPIO3INTR) ? IRQ_GPIO4INTR - IRQ_GPIO3INTR - 1 : 0)\
  124. - IRQ_GPIO0INTR)
  125. /* Vector Address constants */
  126. # define VA_VECTORED 0x100 /* Set for vectored interrupt */
  127. # define VA_VIC1DEFAULT 0x200 /* Set as default VECTADDR for VIC1 */
  128. # define VA_VIC2DEFAULT 0x400 /* Set as default VECTADDR for VIC2 */
  129. #endif
  130. /* IRQ aliases */
  131. #if !defined (IRQ_GPIO0INTR)
  132. # define IRQ_GPIO0INTR IRQ_GPIO0FIQ
  133. #endif
  134. #define IRQ_TICK IRQ_TINTR
  135. #define IRQ_PCC1_RDY IRQ_GPIO6INTR /* PCCard 1 ready */
  136. #define IRQ_PCC2_RDY IRQ_GPIO7INTR /* PCCard 2 ready */
  137. #define IRQ_USB IRQ_USBINTR /* USB device */
  138. #ifdef CONFIG_MACH_KEV7A400
  139. # define IRQ_TS IRQ_GPIOFIQ /* Touchscreen */
  140. # define IRQ_CPLD IRQ_GPIO1INTR /* CPLD cascade */
  141. # define IRQ_PCC1_CD IRQ_GPIO_F2 /* PCCard 1 card detect */
  142. # define IRQ_PCC2_CD IRQ_GPIO_F3 /* PCCard 2 card detect */
  143. #endif
  144. #if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404)
  145. # define IRQ_CPLD_V28 IRQ_GPIO7INTR /* CPLD cascade through GPIO_PF7 */
  146. # define IRQ_CPLD_V34 IRQ_GPIO3INTR /* CPLD cascade through GPIO_PF3 */
  147. #endif
  148. /* System specific IRQs */
  149. #define IRQ_BOARD_START NR_IRQ_CPU
  150. #ifdef CONFIG_MACH_KEV7A400
  151. # define IRQ_KEV7A400_CPLD IRQ_BOARD_START
  152. # define NR_IRQ_BOARD 5
  153. # define IRQ_KEV7A400_MMC_CD IRQ_KEV7A400_CPLD + 0 /* MMC Card Detect */
  154. # define IRQ_KEV7A400_RI2 IRQ_KEV7A400_CPLD + 1 /* Ring Indicator 2 */
  155. # define IRQ_KEV7A400_IDE_CF IRQ_KEV7A400_CPLD + 2 /* Compact Flash (?) */
  156. # define IRQ_KEV7A400_ETH_INT IRQ_KEV7A400_CPLD + 3 /* Ethernet chip */
  157. # define IRQ_KEV7A400_INT IRQ_KEV7A400_CPLD + 4
  158. #endif
  159. #if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404)
  160. # define IRQ_LPD7A40X_CPLD IRQ_BOARD_START
  161. # define NR_IRQ_BOARD 2
  162. # define IRQ_LPD7A40X_ETH_INT IRQ_LPD7A40X_CPLD + 0 /* Ethernet chip */
  163. # define IRQ_LPD7A400_TS IRQ_LPD7A40X_CPLD + 1 /* Touch screen */
  164. #endif
  165. #if defined (CONFIG_MACH_LPD7A400)
  166. # define IRQ_TOUCH IRQ_LPD7A400_TS
  167. #endif
  168. #define NR_IRQS (NR_IRQ_CPU + NR_IRQ_BOARD)
  169. #endif