dma.h 2.4 KB

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  1. /* include/asm-arm/arch-lh7a40x/dma.h
  2. *
  3. * Copyright (C) 2005 Marc Singer
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * version 2 as published by the Free Software Foundation.
  8. *
  9. */
  10. typedef enum {
  11. DMA_M2M0 = 0,
  12. DMA_M2M1 = 1,
  13. DMA_M2P0 = 2, /* Tx */
  14. DMA_M2P1 = 3, /* Rx */
  15. DMA_M2P2 = 4, /* Tx */
  16. DMA_M2P3 = 5, /* Rx */
  17. DMA_M2P4 = 6, /* Tx - AC97 */
  18. DMA_M2P5 = 7, /* Rx - AC97 */
  19. DMA_M2P6 = 8, /* Tx */
  20. DMA_M2P7 = 9, /* Rx */
  21. } dma_device_t;
  22. #define DMA_LENGTH_MAX ((64*1024) - 4) /* bytes */
  23. #define DMAC_GCA __REG(DMAC_PHYS + 0x2b80)
  24. #define DMAC_GIR __REG(DMAC_PHYS + 0x2bc0)
  25. #define DMAC_GIR_MMI1 (1<<11)
  26. #define DMAC_GIR_MMI0 (1<<10)
  27. #define DMAC_GIR_MPI8 (1<<9)
  28. #define DMAC_GIR_MPI9 (1<<8)
  29. #define DMAC_GIR_MPI6 (1<<7)
  30. #define DMAC_GIR_MPI7 (1<<6)
  31. #define DMAC_GIR_MPI4 (1<<5)
  32. #define DMAC_GIR_MPI5 (1<<4)
  33. #define DMAC_GIR_MPI2 (1<<3)
  34. #define DMAC_GIR_MPI3 (1<<2)
  35. #define DMAC_GIR_MPI0 (1<<1)
  36. #define DMAC_GIR_MPI1 (1<<0)
  37. #define DMAC_M2P0 0x0000
  38. #define DMAC_M2P1 0x0040
  39. #define DMAC_M2P2 0x0080
  40. #define DMAC_M2P3 0x00c0
  41. #define DMAC_M2P4 0x0240
  42. #define DMAC_M2P5 0x0200
  43. #define DMAC_M2P6 0x02c0
  44. #define DMAC_M2P7 0x0280
  45. #define DMAC_M2P8 0x0340
  46. #define DMAC_M2P9 0x0300
  47. #define DMAC_M2M0 0x0100
  48. #define DMAC_M2M1 0x0140
  49. #define DMAC_P_PCONTROL(c) __REG(DMAC_PHYS + (c) + 0x00)
  50. #define DMAC_P_PINTERRUPT(c) __REG(DMAC_PHYS + (c) + 0x04)
  51. #define DMAC_P_PPALLOC(c) __REG(DMAC_PHYS + (c) + 0x08)
  52. #define DMAC_P_PSTATUS(c) __REG(DMAC_PHYS + (c) + 0x0c)
  53. #define DMAC_P_REMAIN(c) __REG(DMAC_PHYS + (c) + 0x14)
  54. #define DMAC_P_MAXCNT0(c) __REG(DMAC_PHYS + (c) + 0x20)
  55. #define DMAC_P_BASE0(c) __REG(DMAC_PHYS + (c) + 0x24)
  56. #define DMAC_P_CURRENT0(c) __REG(DMAC_PHYS + (c) + 0x28)
  57. #define DMAC_P_MAXCNT1(c) __REG(DMAC_PHYS + (c) + 0x30)
  58. #define DMAC_P_BASE1(c) __REG(DMAC_PHYS + (c) + 0x34)
  59. #define DMAC_P_CURRENT1(c) __REG(DMAC_PHYS + (c) + 0x38)
  60. #define DMAC_PCONTROL_ENABLE (1<<4)
  61. #define DMAC_PORT_USB 0
  62. #define DMAC_PORT_SDMMC 1
  63. #define DMAC_PORT_AC97_1 2
  64. #define DMAC_PORT_AC97_2 3
  65. #define DMAC_PORT_AC97_3 4
  66. #define DMAC_PORT_UART1 6
  67. #define DMAC_PORT_UART2 7
  68. #define DMAC_PORT_UART3 8
  69. #define DMAC_PSTATUS_CURRSTATE_SHIFT 4
  70. #define DMAC_PSTATUS_CURRSTATE_MASK 0x3
  71. #define DMAC_PSTATUS_NEXTBUF (1<<6)
  72. #define DMAC_PSTATUS_STALLRINT (1<<0)
  73. #define DMAC_INT_CHE (1<<3)
  74. #define DMAC_INT_NFB (1<<1)
  75. #define DMAC_INT_STALL (1<<0)