irqs.h 3.9 KB

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  1. /*
  2. * linux/include/asm-arm/arch-imxads/irqs.h
  3. *
  4. * Copyright (C) 1999 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #ifndef __ARM_IRQS_H__
  22. #define __ARM_IRQS_H__
  23. /* Use the imx definitions */
  24. #include <asm/hardware.h>
  25. /*
  26. * IMX Interrupt numbers
  27. *
  28. */
  29. #define INT_SOFTINT 0
  30. #define CSI_INT 6
  31. #define DSPA_MAC_INT 7
  32. #define DSPA_INT 8
  33. #define COMP_INT 9
  34. #define MSHC_XINT 10
  35. #define GPIO_INT_PORTA 11
  36. #define GPIO_INT_PORTB 12
  37. #define GPIO_INT_PORTC 13
  38. #define LCDC_INT 14
  39. #define SIM_INT 15
  40. #define SIM_DATA_INT 16
  41. #define RTC_INT 17
  42. #define RTC_SAMINT 18
  43. #define UART2_MINT_PFERR 19
  44. #define UART2_MINT_RTS 20
  45. #define UART2_MINT_DTR 21
  46. #define UART2_MINT_UARTC 22
  47. #define UART2_MINT_TX 23
  48. #define UART2_MINT_RX 24
  49. #define UART1_MINT_PFERR 25
  50. #define UART1_MINT_RTS 26
  51. #define UART1_MINT_DTR 27
  52. #define UART1_MINT_UARTC 28
  53. #define UART1_MINT_TX 29
  54. #define UART1_MINT_RX 30
  55. #define VOICE_DAC_INT 31
  56. #define VOICE_ADC_INT 32
  57. #define PEN_DATA_INT 33
  58. #define PWM_INT 34
  59. #define SDHC_INT 35
  60. #define I2C_INT 39
  61. #define CSPI_INT 41
  62. #define SSI_TX_INT 42
  63. #define SSI_TX_ERR_INT 43
  64. #define SSI_RX_INT 44
  65. #define SSI_RX_ERR_INT 45
  66. #define TOUCH_INT 46
  67. #define USBD_INT0 47
  68. #define USBD_INT1 48
  69. #define USBD_INT2 49
  70. #define USBD_INT3 50
  71. #define USBD_INT4 51
  72. #define USBD_INT5 52
  73. #define USBD_INT6 53
  74. #define BTSYS_INT 55
  75. #define BTTIM_INT 56
  76. #define BTWUI_INT 57
  77. #define TIM2_INT 58
  78. #define TIM1_INT 59
  79. #define DMA_ERR 60
  80. #define DMA_INT 61
  81. #define GPIO_INT_PORTD 62
  82. #define IMX_IRQS (64)
  83. /* note: the IMX has four gpio ports (A-D), but only
  84. * the following pins are connected to the outside
  85. * world:
  86. *
  87. * PORT A: bits 0-31
  88. * PORT B: bits 8-31
  89. * PORT C: bits 3-17
  90. * PORT D: bits 6-31
  91. *
  92. * We map these interrupts straight on. As a result we have
  93. * several holes in the interrupt mapping. We do this for two
  94. * reasons:
  95. * - mapping the interrupts without holes would get
  96. * far more complicated
  97. * - Motorola could well decide to bring some processor
  98. * with more pins connected
  99. */
  100. #define IRQ_GPIOA(x) (IMX_IRQS + x)
  101. #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x)
  102. #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x)
  103. #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x)
  104. /* decode irq number to use with IMR(x), ISR(x) and friends */
  105. #define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5)
  106. #define NR_IRQS (IRQ_GPIOD(32) + 1)
  107. #define IRQ_GPIO(x)
  108. #endif