s3cfb.c 28 KB

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  1. /*
  2. * linux/drivers/video/s3cfb.c
  3. *
  4. * $Id: s3cfb.c,v 1.23 2008/07/08 01:00:44 jsgood Exp $
  5. *
  6. * Revision 1.16 2006/09/14 04:45:15 ihlee215
  7. * OSD support added
  8. *
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file COPYING in the main directory of this archive for
  12. * more details.
  13. *
  14. * S3C LCD Controller Frame Buffer Driver
  15. * based on skeletonfb.c, sa1100fb.c
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/tty.h>
  24. #include <linux/slab.h>
  25. #include <linux/delay.h>
  26. #include <linux/fb.h>
  27. #include <linux/init.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/workqueue.h>
  31. #include <linux/wait.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/clk.h>
  34. #include <asm/io.h>
  35. #include <asm/uaccess.h>
  36. #include <asm/div64.h>
  37. //#include <asm/mach/map.h>
  38. #include <asm/arch/regs-lcd.h>
  39. #include <asm/arch/regs-gpio.h>
  40. #include <asm/arch/idle.h>
  41. #include "s3cfb.h"
  42. #ifdef CONFIG_PM
  43. #include <linux/pm.h>
  44. #include <asm/plat-s3c24xx/pm.h>
  45. #endif
  46. #define DEFAULT_BACKLIGHT_LEVEL 2
  47. struct s3c_fb_info info[CONFIG_FB_NUM];
  48. s3cfb_vSyncInfoType s3cfb_vSyncInfo;
  49. /* backlight and power control functions */
  50. static int backlight_level = DEFAULT_BACKLIGHT_LEVEL;
  51. static int backlight_power = 1;
  52. static int lcd_power = 1;
  53. static void s3c_fb_lcd_power(int to)
  54. {
  55. lcd_power = to;
  56. if (mach_info.lcd_power)
  57. (mach_info.lcd_power)(to);
  58. }
  59. static inline void s3c_fb_backlight_power(int to)
  60. {
  61. backlight_power = to;
  62. if (mach_info.backlight_power)
  63. (mach_info.backlight_power)(to);
  64. }
  65. void s3c_fb_backlight_level(int to)
  66. {
  67. backlight_level = to;
  68. if (mach_info.set_brightness)
  69. (mach_info.set_brightness)(to);
  70. }
  71. /*
  72. * s3c_fb_check_var():
  73. * Get the video params out of 'var'. If a value doesn't fit, round it up,
  74. * if it's too big, return -EINVAL.
  75. *
  76. */
  77. static int s3c_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  78. {
  79. //struct s3c_fb_info *fbi = (struct s3c_fb_info *)info;
  80. dprintk("check_var(var=%p, info=%p)\n", var, info);
  81. switch (var->bits_per_pixel) {
  82. case 8:
  83. var->red = s3c_fb_rgb_8.red;
  84. var->green = s3c_fb_rgb_8.green;
  85. var->blue = s3c_fb_rgb_8.blue;
  86. var->transp = s3c_fb_rgb_8.transp;
  87. break;
  88. case 16:
  89. var->red = s3c_fb_rgb_16.red;
  90. var->green = s3c_fb_rgb_16.green;
  91. var->blue = s3c_fb_rgb_16.blue;
  92. var->transp = s3c_fb_rgb_16.transp;
  93. break;
  94. case 24:
  95. var->red = s3c_fb_rgb_24.red;
  96. var->green = s3c_fb_rgb_24.green;
  97. var->blue = s3c_fb_rgb_24.blue;
  98. var->transp = s3c_fb_rgb_24.transp;
  99. break;
  100. case 32:
  101. var->red = s3c_fb_rgb_32.red;
  102. var->green = s3c_fb_rgb_32.green;
  103. var->blue = s3c_fb_rgb_32.blue;
  104. var->transp = s3c_fb_rgb_32.transp;
  105. break;
  106. }
  107. return 0;
  108. }
  109. static inline void s3c_modify_gpio(void __iomem *reg,
  110. unsigned long set, unsigned long mask)
  111. {
  112. unsigned long tmp;
  113. tmp = __raw_readl(reg) & ~mask;
  114. __raw_writel(tmp | set, reg);
  115. }
  116. /*
  117. * s3c_fb_set_par - Optional function. Alters the hardware state.
  118. * @info: frame buffer structure that represents a single frame buffer
  119. *
  120. */
  121. static int s3c_fb_set_par(struct fb_info *info)
  122. {
  123. struct s3c_fb_info *fbi = (struct s3c_fb_info *)info;
  124. struct fb_var_screeninfo *var = &info->var;
  125. if (var->bits_per_pixel == 16)
  126. fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  127. else if (var->bits_per_pixel == 32)
  128. fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  129. else
  130. fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
  131. fbi->fb.fix.line_length = var->width * mach_info.bytes_per_pixel;
  132. /* activate this new configuration */
  133. s3c_fb_activate_var(fbi, var);
  134. return 0;
  135. }
  136. static int palette_win;
  137. static void schedule_palette_update(struct s3c_fb_info *fbi,
  138. unsigned int regno, unsigned int val)
  139. {
  140. unsigned long flags;
  141. local_irq_save(flags);
  142. fbi->palette_buffer[regno] = val;
  143. if (!fbi->palette_ready) {
  144. fbi->palette_ready = 1;
  145. palette_win=fbi->win_id;
  146. }
  147. local_irq_restore(flags);
  148. }
  149. static inline unsigned int chan_to_field(unsigned int chan, struct fb_bitfield bf)
  150. {
  151. chan &= 0xffff;
  152. chan >>= 16 - bf.length;
  153. return chan << bf.offset;
  154. }
  155. static int s3c_fb_setcolreg(unsigned regno,
  156. unsigned red, unsigned green, unsigned blue,
  157. unsigned transp, struct fb_info *info)
  158. {
  159. struct s3c_fb_info *fbi = (struct s3c_fb_info *)info;
  160. unsigned int val;
  161. switch (fbi->fb.fix.visual) {
  162. case FB_VISUAL_TRUECOLOR:
  163. /* true-colour, use pseuo-palette */
  164. if (regno < 16) {
  165. u32 *pal = fbi->fb.pseudo_palette;
  166. val = chan_to_field(red, fbi->fb.var.red);
  167. val |= chan_to_field(green, fbi->fb.var.green);
  168. val |= chan_to_field(blue, fbi->fb.var.blue);
  169. pal[regno] = val;
  170. }
  171. break;
  172. case FB_VISUAL_PSEUDOCOLOR:
  173. if (regno < 256) {
  174. #if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
  175. /* currently assume RGB 8-8-8 mode -- for SONY */
  176. val = ((red << 8) & 0xff0000);
  177. val |= ((green >> 0) & 0xff00);
  178. val |= ((blue >> 8) & 0xff);
  179. #elif defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  180. /* currently assume RGB 5-6-5 mode */
  181. val = ((red >> 0) & 0xf800);
  182. val |= ((green >> 5) & 0x07e0);
  183. val |= ((blue >> 11) & 0x001f);
  184. #endif
  185. dprintk("index = %d, val = 0x%8X\n", regno, val);
  186. schedule_palette_update(fbi, regno, val);
  187. }
  188. break;
  189. default:
  190. return 1; /* unknown type */
  191. }
  192. return 0;
  193. }
  194. #if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  195. static void s3c_fb_write_palette(struct s3c_fb_info *fbi)
  196. {
  197. unsigned int i;
  198. unsigned long ent;
  199. #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  200. unsigned int win_num=fbi->win_id;
  201. #endif
  202. fbi->palette_ready = 0;
  203. //__raw_writel((mach_info.wincon0 | S3C_WINCONx_ENWIN_F_DISABLE), S3C_WINCON0);
  204. __raw_writel((mach_info.wpalcon | S3C_WPALCON_PALUPDATEEN), S3C_WPALCON);
  205. for (i = 0; i < 256; i++) {
  206. if ((ent = fbi->palette_buffer[i]) == PALETTE_BUFF_CLEAR)
  207. continue;
  208. #if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
  209. __raw_writel(ent, S3C_TFTPAL0(i));
  210. #elif defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  211. __raw_writel(ent, S3C_TFTPAL0(i)+0x400*win_num);
  212. #endif
  213. /* it seems the only way to know exactly
  214. * if the palette wrote ok, is to check
  215. * to see if the value verifies ok
  216. */
  217. #if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
  218. if (__raw_readl(S3C_TFTPAL0(i)) == ent) {
  219. #elif defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  220. if (__raw_readl(S3C_TFTPAL0(i)+0x400*win_num) == ent) {
  221. #endif
  222. fbi->palette_buffer[i] = PALETTE_BUFF_CLEAR;
  223. }
  224. else {
  225. fbi->palette_ready = 1; /* retry */
  226. printk("Retry writing into the palette\n");
  227. }
  228. }
  229. __raw_writel(mach_info.wpalcon, S3C_WPALCON);
  230. //__raw_writel((mach_info.wincon0 | S3C_WINCONx_ENWIN_F_ENABLE), S3C_WINCON0);
  231. }
  232. #endif
  233. /**
  234. * s3c_fb_pan_display
  235. * @var: frame buffer variable screen structure
  236. * @info: frame buffer structure that represents a single frame buffer
  237. *
  238. * Pan (or wrap, depending on the `vmode' field) the display using the
  239. * `xoffset' and `yoffset' fields of the `var' structure.
  240. * If the values don't fit, return -EINVAL.
  241. *
  242. * Returns negative errno on error, or zero on success.
  243. */
  244. static int s3c_fb_pan_display(struct fb_var_screeninfo *var,
  245. struct fb_info *info)
  246. {
  247. struct s3c_fb_info *fbi = (struct s3c_fb_info *)info;
  248. dprintk("s3c_fb_pan_display(var=%p, info=%p)\n", var, info);
  249. if (var->xoffset != 0) /* not yet ... */
  250. return -EINVAL;
  251. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  252. return -EINVAL;
  253. fbi->fb.var.xoffset = var->xoffset;
  254. fbi->fb.var.yoffset = var->yoffset;
  255. s3c_fb_set_lcdaddr(fbi);
  256. return 0;
  257. }
  258. /**
  259. * s3c_fb_blank
  260. * @blank_mode: the blank mode we want.
  261. * @info: frame buffer structure that represents a single frame buffer
  262. *
  263. * Blank the screen if blank_mode != 0, else unblank. Return 0 if
  264. * blanking succeeded, != 0 if un-/blanking failed due to e.g. a
  265. * video mode which doesn't support it. Implements VESA suspend
  266. * and powerdown modes on hardware that supports disabling hsync/vsync:
  267. * blank_mode == 2: suspend vsync
  268. * blank_mode == 3: suspend hsync
  269. * blank_mode == 4: powerdown
  270. *
  271. * Returns negative errno on error, or zero on success.
  272. *
  273. */
  274. static int s3c_fb_blank(int blank_mode, struct fb_info *info)
  275. {
  276. dprintk("blank(mode=%d, info=%p)\n", blank_mode, info);
  277. switch (blank_mode) {
  278. case VESA_NO_BLANKING: /* lcd on, backlight on */
  279. s3c_fb_lcd_power(1);
  280. s3c_fb_backlight_power(1);
  281. break;
  282. case VESA_VSYNC_SUSPEND: /* lcd on, backlight off */
  283. case VESA_HSYNC_SUSPEND:
  284. s3c_fb_lcd_power(1);
  285. s3c_fb_backlight_power(0);
  286. break;
  287. case VESA_POWERDOWN: /* lcd and backlight off */
  288. s3c_fb_lcd_power(0);
  289. s3c_fb_backlight_power(0);
  290. break;
  291. default:
  292. return -EINVAL;
  293. }
  294. return 0;
  295. }
  296. /* sysfs export of baclight control */
  297. static int s3c_fb_lcd_power_show(struct device *dev, struct device_attribute *attr, char *buf)
  298. {
  299. return snprintf(buf, PAGE_SIZE, "%d\n", lcd_power);
  300. }
  301. static int s3c_fb_lcd_power_store(struct device *dev, struct device_attribute *attr,
  302. const char *buf, size_t len)
  303. {
  304. if (len < 1)
  305. return -EINVAL;
  306. if (strnicmp(buf, "on", 2) == 0 ||
  307. strnicmp(buf, "1", 1) == 0) {
  308. s3c_fb_lcd_power(1);
  309. } else if (strnicmp(buf, "off", 3) == 0 ||
  310. strnicmp(buf, "0", 1) == 0) {
  311. s3c_fb_lcd_power(0);
  312. } else {
  313. return -EINVAL;
  314. }
  315. return len;
  316. }
  317. static int s3c_fb_backlight_level_show(struct device *dev, struct device_attribute *attr, char *buf)
  318. {
  319. return snprintf(buf, PAGE_SIZE, "%d\n", backlight_level);
  320. }
  321. static int s3c_fb_backlight_power_show(struct device *dev, struct device_attribute *attr, char *buf)
  322. {
  323. return snprintf(buf, PAGE_SIZE, "%d\n", backlight_power);
  324. }
  325. static int s3c_fb_backlight_level_store(struct device *dev, struct device_attribute *attr,
  326. const char *buf, size_t len)
  327. {
  328. unsigned long value = simple_strtoul(buf, NULL, 10);
  329. if (value < mach_info.backlight_min ||
  330. value > mach_info.backlight_max)
  331. return -ERANGE;
  332. s3c_fb_backlight_level(value);
  333. return len;
  334. }
  335. static int s3c_fb_backlight_power_store(struct device *dev, struct device_attribute *attr,
  336. const char *buf, size_t len)
  337. {
  338. if (len < 1)
  339. return -EINVAL;
  340. if (strnicmp(buf, "on", 2) == 0 ||
  341. strnicmp(buf, "1", 1) == 0) {
  342. s3c_fb_backlight_power(1);
  343. } else if (strnicmp(buf, "off", 3) == 0 ||
  344. strnicmp(buf, "0", 1) == 0) {
  345. s3c_fb_backlight_power(0);
  346. } else {
  347. return -EINVAL;
  348. }
  349. return len;
  350. }
  351. static DEVICE_ATTR(lcd_power, 0644,
  352. s3c_fb_lcd_power_show,
  353. s3c_fb_lcd_power_store);
  354. static DEVICE_ATTR(backlight_level, 0644,
  355. s3c_fb_backlight_level_show,
  356. s3c_fb_backlight_level_store);
  357. static DEVICE_ATTR(backlight_power, 0644,
  358. s3c_fb_backlight_power_show,
  359. s3c_fb_backlight_power_store);
  360. struct fb_ops s3c_fb_ops = {
  361. .owner = THIS_MODULE,
  362. .fb_check_var = s3c_fb_check_var,
  363. .fb_set_par = s3c_fb_set_par,
  364. .fb_blank = s3c_fb_blank,
  365. .fb_pan_display = s3c_fb_pan_display,
  366. .fb_setcolreg = s3c_fb_setcolreg,
  367. .fb_fillrect = cfb_fillrect,
  368. .fb_copyarea = cfb_copyarea,
  369. .fb_imageblit = cfb_imageblit,
  370. .fb_cursor = soft_cursor,
  371. .fb_ioctl = s3c_fb_ioctl,
  372. };
  373. /* Fake monspecs to fill in fbinfo structure */
  374. /* Don't know if the values are important */
  375. struct fb_monspecs monspecs __initdata = {
  376. .hfmin = 30000,
  377. .hfmax = 70000,
  378. .vfmin = 50,
  379. .vfmax = 65,
  380. };
  381. static struct clk *lcd_clock;
  382. void s3c_fb_init_fbinfo(struct s3c_fb_info *finfo, char *drv_name, int index)
  383. {
  384. int i = 0;
  385. if(index==0) Init_LDI();
  386. strcpy(finfo->fb.fix.id, drv_name);
  387. finfo->win_id = index;
  388. finfo->fb.fix.type = FB_TYPE_PACKED_PIXELS;
  389. finfo->fb.fix.type_aux = 0;
  390. finfo->fb.fix.xpanstep = 0;
  391. finfo->fb.fix.ypanstep = 1;
  392. finfo->fb.fix.ywrapstep = 0;
  393. finfo->fb.fix.accel = FB_ACCEL_NONE;
  394. finfo->fb.fbops = &s3c_fb_ops;
  395. finfo->fb.flags = FBINFO_FLAG_DEFAULT;
  396. finfo->fb.monspecs = monspecs;
  397. finfo->fb.pseudo_palette = &finfo->pseudo_pal;
  398. finfo->fb.var.nonstd = 0;
  399. finfo->fb.var.activate = FB_ACTIVATE_NOW;
  400. finfo->fb.var.accel_flags = 0;
  401. finfo->fb.var.vmode = FB_VMODE_NONINTERLACED;
  402. finfo->fb.var.xoffset = mach_info.xoffset;
  403. finfo->fb.var.yoffset = mach_info.yoffset;
  404. if(index==0){
  405. finfo->fb.var.height = mach_info.height;
  406. finfo->fb.var.width = mach_info.width;
  407. finfo->fb.var.xres = mach_info.xres;
  408. finfo->fb.var.xres_virtual = mach_info.xres_virtual;
  409. finfo->fb.var.yres = mach_info.yres;
  410. finfo->fb.var.yres_virtual = mach_info.yres_virtual;
  411. }
  412. else{
  413. finfo->fb.var.height = mach_info.osd_height;
  414. finfo->fb.var.width = mach_info.osd_width;
  415. finfo->fb.var.xres = mach_info.osd_xres;
  416. finfo->fb.var.xres_virtual = mach_info.osd_xres_virtual;
  417. finfo->fb.var.yres = mach_info.osd_yres;
  418. finfo->fb.var.yres_virtual = mach_info.osd_yres_virtual;
  419. }
  420. finfo->fb.var.bits_per_pixel = mach_info.bpp;
  421. finfo->fb.var.pixclock = mach_info.pixclock;
  422. finfo->fb.var.hsync_len = mach_info.hsync_len;
  423. finfo->fb.var.left_margin = mach_info.left_margin;
  424. finfo->fb.var.right_margin = mach_info.right_margin;
  425. finfo->fb.var.vsync_len = mach_info.vsync_len;
  426. finfo->fb.var.upper_margin = mach_info.upper_margin;
  427. finfo->fb.var.lower_margin = mach_info.lower_margin;
  428. finfo->fb.var.sync = mach_info.sync;
  429. finfo->fb.var.grayscale = mach_info.cmap_grayscale;
  430. #if defined(CONFIG_G3D)
  431. finfo->fb.fix.smem_len = finfo->fb.var.xres_virtual * finfo->fb.var.yres_virtual *
  432. mach_info.bytes_per_pixel * 3;
  433. #else
  434. finfo->fb.fix.smem_len = finfo->fb.var.xres_virtual * finfo->fb.var.yres_virtual *
  435. mach_info.bytes_per_pixel;
  436. #endif
  437. finfo->fb.fix.line_length = finfo->fb.var.width * mach_info.bytes_per_pixel;
  438. for (i = 0; i < 256; i++)
  439. finfo->palette_buffer[i] = PALETTE_BUFF_CLEAR;
  440. }
  441. /* =================== Double buffering ====================================== */
  442. static int fbNum = 0;
  443. void s3c_fb_change_req(int req_fbNum) {
  444. fbNum = req_fbNum;
  445. info[fbNum].fb_change_ready = 1;
  446. }
  447. static irqreturn_t s3c_fb_irq(int irqno, void *param)
  448. {
  449. // VSYNC interrupt
  450. // 1. For changing a palette
  451. if (info[palette_win].palette_ready) {
  452. s3c_fb_write_palette(&info[palette_win]);
  453. }
  454. /* Application want to change FB by WaitForVsync.
  455. // 2. For changing the working frame buffer
  456. if (info[fbNum].fb_change_ready) {
  457. s3c_fb_set_fb_change(fbNum);
  458. }
  459. */
  460. #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  461. // For clearing the interrupt source
  462. __raw_writel(__raw_readl(S3C_VIDINTCON1), S3C_VIDINTCON1);
  463. #endif
  464. //(WAITFORVSYNC)
  465. s3cfb_vSyncInfo.count++;
  466. wake_up_interruptible( &s3cfb_vSyncInfo.waitQueue );
  467. //(WAITFORVSYNC)
  468. return IRQ_HANDLED;
  469. }
  470. //(WAITFORVSYNC)
  471. int s3cfb_wait_for_sync(u_int32_t crtc)
  472. {
  473. int cnt;
  474. cnt = s3cfb_vSyncInfo.count;
  475. wait_event_interruptible_timeout(s3cfb_vSyncInfo.waitQueue, cnt != s3cfb_vSyncInfo.count, HZ/10);
  476. return cnt;
  477. }
  478. //(WAITFORVSYNC)
  479. void s3c_fb_change_buff(int req_winNum, int req_fb) {
  480. #if (defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)) && defined(CONFIG_FB_DOUBLE_BUFFERING)
  481. // Software-based trigger
  482. __raw_writel((1<<0), S3C_CPUTRIGCON2);
  483. #elif (defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)) && defined(CONFIG_FB_DOUBLE_BUFFERING)
  484. switch (req_winNum)
  485. {
  486. case 0 : // In case of windows 0
  487. if (0 == req_fb) mach_info.wincon0 &= ~BIT20;
  488. else mach_info.wincon0 |= BIT20;
  489. __raw_writel(mach_info.wincon0 | S3C_WINCONx_ENWIN_F_ENABLE, S3C_WINCON0);
  490. break;
  491. case 1 : // In case of windows 1
  492. if (0 == req_fb) mach_info.wincon1 &= ~BIT20;
  493. else mach_info.wincon1 |= BIT20;
  494. __raw_writel(mach_info.wincon1 | S3C_WINCONx_ENWIN_F_ENABLE, S3C_WINCON1);
  495. break;
  496. default :
  497. break;
  498. }
  499. #endif // #if defined(CONFIG_CPU_S3C2443)
  500. }
  501. int s3c_fb_get_win_buff_status(int winNum)
  502. {
  503. int retVal = 0;
  504. int buffStatus, buffSelect;
  505. switch (winNum)
  506. {
  507. case 0 :
  508. buffStatus = (readl(S3C_WINCON0) & BIT21) >> 21;
  509. buffSelect = (readl(S3C_WINCON0) & BIT20) >> 20;
  510. if (buffStatus == buffSelect)
  511. {
  512. if (0 == buffSelect) retVal = 0;
  513. else retVal = 1;
  514. }
  515. else
  516. {
  517. if (0 == buffSelect) retVal = -1;
  518. else retVal = -2;
  519. }
  520. break;
  521. case 1:
  522. buffStatus = (readl(S3C_WINCON1) & BIT21) >> 21;
  523. buffSelect = (readl(S3C_WINCON1) & BIT20) >> 20;
  524. if (buffStatus == buffSelect)
  525. {
  526. if (0 == buffSelect) retVal = 0;
  527. else retVal = 1;
  528. }
  529. else
  530. {
  531. if (0 == buffSelect) retVal = -1;
  532. else retVal = -2;
  533. }
  534. break;
  535. default :
  536. break;
  537. }
  538. return (retVal);
  539. }
  540. #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  541. void s3c_fb_enable_local_post(int in_yuv)
  542. {
  543. u32 value;
  544. mach_info.wincon0 &= ~(BIT22 | BIT13);
  545. value = S3C_WINCONx_ENLOCAL_POST | S3C_WINCONx_ENWIN_F_ENABLE;
  546. if (in_yuv)
  547. value |= S3C_WINCONx_INRGB_YUV;
  548. __raw_writel(mach_info.wincon0 | value, S3C_WINCON0);
  549. return 0;
  550. }
  551. void s3c_fb_enable_dma(void)
  552. {
  553. u32 value;
  554. mach_info.wincon0 &= ~(BIT22 | BIT13);
  555. value = S3C_WINCONx_ENLOCAL_DMA | S3C_WINCONx_ENWIN_F_ENABLE;
  556. __raw_writel(mach_info.wincon0 | value, S3C_WINCON0);
  557. return 0;
  558. }
  559. EXPORT_SYMBOL(s3c_fb_enable_dma);
  560. EXPORT_SYMBOL(s3c_fb_enable_local_post);
  561. #endif
  562. /* =================== DVS ======================================= */
  563. #if defined (CONFIG_S3C_DVS) && defined (CONFIG_CPU_S3C2412)
  564. static irqreturn_t s3c_dvs_irq(int irqno, void *param)
  565. {
  566. s3c_dvs_action();
  567. return IRQ_HANDLED;
  568. }
  569. #endif
  570. int __init s3c_fb_probe(struct platform_device *pdev)
  571. {
  572. char driver_name[]="s3c_fb";
  573. int ret;
  574. int index=0;
  575. for(index=0; index<S3C_FB_NUM; index++){
  576. s3c_fb_init_fbinfo(&info[index], driver_name, index);
  577. if(index==0){
  578. s3c_fb_backlight_power(1);
  579. s3c_fb_lcd_power(1);
  580. s3c_fb_backlight_level(DEFAULT_BACKLIGHT_LEVEL);
  581. dprintk("dev FB init\n");
  582. if (!request_mem_region((unsigned long)S3C24XX_VA_LCD, SZ_1M, "s3c-lcd")) {
  583. ret = -EBUSY;
  584. goto dealloc_fb;
  585. }
  586. dprintk("got LCD region\n");
  587. lcd_clock = clk_get(NULL, "lcd");
  588. if (!lcd_clock) {
  589. printk(KERN_INFO "failed to get lcd clock source\n");
  590. ret = -ENOENT;
  591. goto release_irq;
  592. }
  593. clk_enable(lcd_clock);
  594. printk("S3C_LCD clock got enabled :: %ld.%03ld Mhz\n", print_mhz(clk_get_rate(lcd_clock)));
  595. msleep(5);
  596. }
  597. /* Initialize video memory */
  598. ret = s3c_fb_map_video_memory(&info[index]);
  599. if (ret) {
  600. printk("Failed to allocate video RAM: %d\n", ret);
  601. ret = -ENOMEM;
  602. goto release_clock;
  603. }
  604. dprintk("got video memory\n");
  605. ret = s3c_fb_init_registers(&info[index]);
  606. ret = s3c_fb_check_var(&info[index].fb.var, &info[index].fb);
  607. if(index<2){
  608. /* 2007-01-09-Tue. for RGB 8-8-8 palette*/
  609. if(fb_alloc_cmap(&info[index].fb.cmap, 256, 0)<0){
  610. goto dealloc_fb;
  611. }
  612. }
  613. else{
  614. /* 2007-01-09-Tue. for RGB 8-8-8 palette*/
  615. if(fb_alloc_cmap(&info[index].fb.cmap, 16, 0)<0){
  616. goto dealloc_fb;
  617. }
  618. }
  619. ret = register_framebuffer(&info[index].fb);
  620. if (ret < 0) {
  621. printk(KERN_ERR "Failed to register framebuffer device: %d\n", ret);
  622. goto free_video_memory;
  623. }
  624. }// for(index=0; index<CONFIG_FB_NUM; index++)
  625. //(WAITFORVSYNC)
  626. // - initialize the struct for Waitforvsync
  627. s3cfb_vSyncInfo.count = 0;
  628. init_waitqueue_head(&s3cfb_vSyncInfo.waitQueue);
  629. //(WAITFORVSYNC)
  630. #if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
  631. ret = request_irq(IRQ_S3C2443_LCD3, s3c_fb_irq, 0, "s3c-lcd", pdev);
  632. #elif defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  633. ret = request_irq(IRQ_LCD_VSYNC, s3c_fb_irq, 0, "s3c-lcd", pdev);
  634. #elif defined (CONFIG_S3C_DVS) && defined (CONFIG_CPU_S3C2412)
  635. ret = request_irq(IRQ_LCD, s3c_dvs_irq, 0, "s3c-lcd", pdev);
  636. #endif
  637. if (ret != 0) {
  638. printk("Failed to install irq (%d)\n", ret);
  639. goto release_irq;
  640. }
  641. #if defined (CONFIG_S3C_DVS) & defined (CONFIG_CPU_S3C2412)
  642. disable_irq(IRQ_LCD);
  643. #endif
  644. /* create device files */
  645. ret = device_create_file(&(pdev->dev), &dev_attr_backlight_power);
  646. if (ret < 0)
  647. printk(KERN_WARNING "s3cfb: failed to add entries\n");
  648. ret = device_create_file(&(pdev->dev), &dev_attr_backlight_level);
  649. if (ret < 0)
  650. printk(KERN_WARNING "s3cfb: failed to add entries\n");
  651. ret = device_create_file(&(pdev->dev), &dev_attr_lcd_power);
  652. if (ret < 0)
  653. printk(KERN_WARNING "s3cfb: failed to add entries\n");
  654. printk(KERN_INFO "fb%d: %s frame buffer device\n",
  655. info[index].fb.node, info[index].fb.fix.id);
  656. return 0;
  657. free_video_memory:
  658. s3c_fb_unmap_video_memory(&info[index]);
  659. release_clock:
  660. clk_disable(lcd_clock);
  661. clk_put(lcd_clock);
  662. release_irq:
  663. #if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
  664. free_irq(IRQ_S3C2443_LCD3, &info);
  665. #elif defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  666. free_irq(IRQ_LCD_VSYNC, &info);
  667. #endif
  668. //release_mem:
  669. release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD);
  670. dealloc_fb:
  671. framebuffer_release(&info[index].fb);
  672. return ret;
  673. }
  674. /* -----------------------------------------
  675. * s3c_fb_stop_lcd & s3c_fb_start_lcd
  676. *
  677. * shutdown/ start the lcd controller
  678. */
  679. static void s3c_fb_stop_lcd(void)
  680. {
  681. unsigned long flags;
  682. unsigned long tmp;
  683. local_irq_save(flags);
  684. #if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  685. tmp = __raw_readl(S3C_VIDCON0);
  686. __raw_writel(tmp & ~(S3C_VIDCON0_ENVID_ENABLE | S3C_VIDCON0_ENVID_F_ENABLE), S3C_VIDCON0);
  687. #else
  688. tmp = __raw_readl(S3C_LCDCON1);
  689. __raw_writel(tmp & ~S3C2410_LCDCON1_ENVID, S3C_LCDCON1);
  690. #endif
  691. local_irq_restore(flags);
  692. }
  693. void s3c_fb_start_lcd(void) {
  694. unsigned long flags;
  695. unsigned long tmp;
  696. local_irq_save(flags);
  697. #if defined(CONFIG_FB_LTV350QV) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  698. tmp = __raw_readl(S3C_VIDCON0);
  699. __raw_writel(tmp | S3C_VIDCON0_ENVID_ENABLE | S3C_VIDCON0_ENVID_F_ENABLE, S3C_VIDCON0);
  700. #else
  701. tmp = __raw_readl(S3C_LCDCON1);
  702. __raw_writel(tmp | S3C_WINCONx_ENWIN_F_ENABLE, S3C_LCDCON1);
  703. #endif
  704. local_irq_restore(flags);
  705. }
  706. /*
  707. * Cleanup
  708. */
  709. static int s3c_fb_remove(struct platform_device *pdev)
  710. {
  711. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  712. struct s3c_fb_info *info = fbinfo->par;
  713. int irq;
  714. int index=0;
  715. s3c_fb_stop_lcd();
  716. msleep(1);
  717. for(index=0; index<S3C_FB_NUM; index++){
  718. s3c_fb_unmap_video_memory((struct s3c_fb_info *)&info[index]);
  719. if (lcd_clock) {
  720. clk_disable(lcd_clock);
  721. clk_put(lcd_clock);
  722. lcd_clock = NULL;
  723. }
  724. irq = platform_get_irq(pdev, 0);
  725. free_irq(irq,&info[index]);
  726. release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD);
  727. unregister_framebuffer(&(info[index].fb));
  728. } // for(index=0; index<CONFIG_FB_NUM; index++)
  729. return 0;
  730. }
  731. #ifdef CONFIG_PM
  732. static struct sleep_save lcd_save[] = {
  733. #if defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
  734. SAVE_ITEM(S3C_VIDCON0),SAVE_ITEM(S3C_VIDCON1),
  735. SAVE_ITEM(S3C_VIDTCON0),SAVE_ITEM(S3C_VIDTCON1),
  736. SAVE_ITEM(S3C_VIDTCON2),SAVE_ITEM(S3C_WINCON0),
  737. SAVE_ITEM(S3C_WINCON1),
  738. SAVE_ITEM(S3C_VIDINTCON),SAVE_ITEM(S3C_SYSIFCON0),
  739. SAVE_ITEM(S3C_SIFCCON0),
  740. SAVE_ITEM(S3C_CPUTRIGCON2),SAVE_ITEM(S3C_VIDOSD0A),
  741. SAVE_ITEM(S3C_VIDOSD0B),SAVE_ITEM(S3C_VIDOSD0C),
  742. SAVE_ITEM(S3C_VIDOSD1A),SAVE_ITEM(S3C_VIDOSD1B),
  743. SAVE_ITEM(S3C_VIDOSD1C),SAVE_ITEM(S3C_VIDW00ADD0B0),
  744. SAVE_ITEM(S3C_VIDW00ADD0B1),SAVE_ITEM(S3C_VIDW01ADD0),
  745. SAVE_ITEM(S3C_VIDW00ADD1B0),SAVE_ITEM(S3C_VIDW00ADD1B1),
  746. SAVE_ITEM(S3C_VIDW01ADD1),SAVE_ITEM(S3C_VIDW00ADD2B0),
  747. SAVE_ITEM(S3C_VIDW00ADD2B1),SAVE_ITEM(S3C_VIDW01ADD2),
  748. #elif defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
  749. SAVE_ITEM(S3C_VIDCON0),
  750. SAVE_ITEM(S3C_VIDCON1),
  751. SAVE_ITEM(S3C_VIDTCON0),
  752. SAVE_ITEM(S3C_VIDTCON1),
  753. SAVE_ITEM(S3C_VIDTCON2),
  754. SAVE_ITEM(S3C_VIDTCON3),
  755. SAVE_ITEM(S3C_WINCON0),
  756. SAVE_ITEM(S3C_WINCON1),
  757. SAVE_ITEM(S3C_WINCON2),
  758. SAVE_ITEM(S3C_WINCON3),
  759. SAVE_ITEM(S3C_WINCON4),
  760. SAVE_ITEM(S3C_VIDOSD0A),
  761. SAVE_ITEM(S3C_VIDOSD0B),
  762. SAVE_ITEM(S3C_VIDOSD0C),
  763. SAVE_ITEM(S3C_VIDOSD1A),
  764. SAVE_ITEM(S3C_VIDOSD1B),
  765. SAVE_ITEM(S3C_VIDOSD1C),
  766. SAVE_ITEM(S3C_VIDOSD1D),
  767. SAVE_ITEM(S3C_VIDOSD2A),
  768. SAVE_ITEM(S3C_VIDOSD2B),
  769. SAVE_ITEM(S3C_VIDOSD2C),
  770. SAVE_ITEM(S3C_VIDOSD2D),
  771. SAVE_ITEM(S3C_VIDOSD3A),
  772. SAVE_ITEM(S3C_VIDOSD3B),
  773. SAVE_ITEM(S3C_VIDOSD3C),
  774. SAVE_ITEM(S3C_VIDOSD4A),
  775. SAVE_ITEM(S3C_VIDOSD4B),
  776. SAVE_ITEM(S3C_VIDOSD4C),
  777. SAVE_ITEM(S3C_VIDW00ADD0B0),
  778. SAVE_ITEM(S3C_VIDW00ADD0B1),
  779. SAVE_ITEM(S3C_VIDW01ADD0B0),
  780. SAVE_ITEM(S3C_VIDW01ADD0B1),
  781. SAVE_ITEM(S3C_VIDW02ADD0),
  782. SAVE_ITEM(S3C_VIDW03ADD0),
  783. SAVE_ITEM(S3C_VIDW04ADD0),
  784. SAVE_ITEM(S3C_VIDW00ADD1B0),
  785. SAVE_ITEM(S3C_VIDW00ADD1B1),
  786. SAVE_ITEM(S3C_VIDW01ADD1B0),
  787. SAVE_ITEM(S3C_VIDW01ADD1B1),
  788. SAVE_ITEM(S3C_VIDW02ADD1),
  789. SAVE_ITEM(S3C_VIDW03ADD1),
  790. SAVE_ITEM(S3C_VIDW04ADD1),
  791. SAVE_ITEM(S3C_VIDW00ADD2),
  792. SAVE_ITEM(S3C_VIDW01ADD2),
  793. SAVE_ITEM(S3C_VIDW02ADD2),
  794. SAVE_ITEM(S3C_VIDW03ADD2),
  795. SAVE_ITEM(S3C_VIDW04ADD2),
  796. SAVE_ITEM(S3C_VIDINTCON0),
  797. SAVE_ITEM(S3C_VIDINTCON1),
  798. SAVE_ITEM(S3C_W1KEYCON0),
  799. SAVE_ITEM(S3C_W1KEYCON1),
  800. SAVE_ITEM(S3C_W2KEYCON0),
  801. SAVE_ITEM(S3C_W2KEYCON1),
  802. SAVE_ITEM(S3C_W3KEYCON0),
  803. SAVE_ITEM(S3C_W3KEYCON1),
  804. SAVE_ITEM(S3C_W4KEYCON0),
  805. SAVE_ITEM(S3C_W4KEYCON1),
  806. SAVE_ITEM(S3C_DITHMODE),
  807. SAVE_ITEM(S3C_WIN0MAP),
  808. SAVE_ITEM(S3C_WIN1MAP),
  809. SAVE_ITEM(S3C_WIN2MAP),
  810. SAVE_ITEM(S3C_WIN3MAP),
  811. SAVE_ITEM(S3C_WIN4MAP),
  812. SAVE_ITEM(S3C_WPALCON),
  813. SAVE_ITEM(S3C_TRIGCON),
  814. SAVE_ITEM(S3C_I80IFCONA0),
  815. SAVE_ITEM(S3C_I80IFCONA1),
  816. SAVE_ITEM(S3C_I80IFCONB0),
  817. SAVE_ITEM(S3C_I80IFCONB1),
  818. SAVE_ITEM(S3C_LDI_CMDCON0),
  819. SAVE_ITEM(S3C_LDI_CMDCON1),
  820. SAVE_ITEM(S3C_SIFCCON0),
  821. SAVE_ITEM(S3C_SIFCCON1),
  822. SAVE_ITEM(S3C_SIFCCON2),
  823. SAVE_ITEM(S3C_LDI_CMD0),
  824. SAVE_ITEM(S3C_LDI_CMD1),
  825. SAVE_ITEM(S3C_LDI_CMD2),
  826. SAVE_ITEM(S3C_LDI_CMD3),
  827. SAVE_ITEM(S3C_LDI_CMD4),
  828. SAVE_ITEM(S3C_LDI_CMD5),
  829. SAVE_ITEM(S3C_LDI_CMD6),
  830. SAVE_ITEM(S3C_LDI_CMD7),
  831. SAVE_ITEM(S3C_LDI_CMD8),
  832. SAVE_ITEM(S3C_LDI_CMD9),
  833. SAVE_ITEM(S3C_LDI_CMD10),
  834. SAVE_ITEM(S3C_LDI_CMD11),
  835. SAVE_ITEM(S3C_W2PDATA01),
  836. SAVE_ITEM(S3C_W2PDATA23),
  837. SAVE_ITEM(S3C_W2PDATA45),
  838. SAVE_ITEM(S3C_W2PDATA67),
  839. SAVE_ITEM(S3C_W2PDATA89),
  840. SAVE_ITEM(S3C_W2PDATAAB),
  841. SAVE_ITEM(S3C_W2PDATACD),
  842. SAVE_ITEM(S3C_W2PDATAEF),
  843. SAVE_ITEM(S3C_W3PDATA01),
  844. SAVE_ITEM(S3C_W3PDATA23),
  845. SAVE_ITEM(S3C_W3PDATA45),
  846. SAVE_ITEM(S3C_W3PDATA67),
  847. SAVE_ITEM(S3C_W3PDATA89),
  848. SAVE_ITEM(S3C_W3PDATAAB),
  849. SAVE_ITEM(S3C_W3PDATACD),
  850. SAVE_ITEM(S3C_W3PDATAEF),
  851. SAVE_ITEM(S3C_W4PDATA01),
  852. SAVE_ITEM(S3C_W4PDATA23),
  853. #endif
  854. };
  855. /* suspend and resume support for the lcd controller */
  856. static int s3c_fb_suspend(struct platform_device *dev, pm_message_t state)
  857. {
  858. s3c_fb_stop_lcd();
  859. s3c2410_pm_do_save(lcd_save, ARRAY_SIZE(lcd_save));
  860. /* sleep before disabling the clock, we need to ensure
  861. * the LCD DMA engine is not going to get back on the bus
  862. * before the clock goes off again (bjd) */
  863. msleep(1);
  864. clk_disable(lcd_clock);
  865. return 0;
  866. }
  867. static int s3c_fb_resume(struct platform_device *dev)
  868. {
  869. clk_enable(lcd_clock);
  870. msleep(1);
  871. s3c2410_pm_do_restore(lcd_save, ARRAY_SIZE(lcd_save));
  872. Init_LDI();
  873. s3c_fb_start_lcd();
  874. return 0;
  875. }
  876. #else
  877. #define s3c_fb_suspend NULL
  878. #define s3c_fb_resume NULL
  879. #endif
  880. static struct platform_driver s3c_fb_driver = {
  881. .probe = s3c_fb_probe,
  882. .remove = s3c_fb_remove,
  883. .suspend = s3c_fb_suspend,
  884. .resume = s3c_fb_resume,
  885. .driver = {
  886. .name = "s3c-lcd",
  887. .owner = THIS_MODULE,
  888. },
  889. };
  890. int __devinit s3c_fb_init(void)
  891. {
  892. return platform_driver_register(&s3c_fb_driver);
  893. }
  894. static void __exit s3c_fb_cleanup(void)
  895. {
  896. platform_driver_unregister(&s3c_fb_driver);
  897. }
  898. EXPORT_SYMBOL(s3c_fb_change_req);
  899. EXPORT_SYMBOL(s3c_fb_stop_lcd);
  900. EXPORT_SYMBOL(s3c_fb_start_lcd);
  901. EXPORT_SYMBOL(s3c_fb_get_win_buff_status);
  902. EXPORT_SYMBOL(s3c_fb_change_buff);
  903. module_init(s3c_fb_init);
  904. module_exit(s3c_fb_cleanup);
  905. MODULE_AUTHOR("");
  906. MODULE_DESCRIPTION("Framebuffer driver for the S3C");
  907. MODULE_LICENSE("GPL");