pm3fb.c 109 KB

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  1. /*
  2. * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
  3. *
  4. * Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
  5. * Based on code written by:
  6. * Sven Luther, <luther@dpt-info.u-strasbg.fr>
  7. * Alan Hourihane, <alanh@fairlite.demon.co.uk>
  8. * Russell King, <rmk@arm.linux.org.uk>
  9. * Based on linux/drivers/video/skeletonfb.c:
  10. * Copyright (C) 1997 Geert Uytterhoeven
  11. * Based on linux/driver/video/pm2fb.c:
  12. * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
  13. * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
  14. *
  15. * This file is subject to the terms and conditions of the GNU General Public
  16. * License. See the file COPYING in the main directory of this archive for
  17. * more details.
  18. *
  19. * $Header: /home/cvs/s3c-linux-2.6.21/drivers/video/pm3fb.c,v 1.1.1.1 2007/06/12 07:27:09 eyryu Exp $
  20. *
  21. * CHANGELOG:
  22. * Mon Feb 11 10:35:48 MET 2002, v 1.4.11B: Cosmetic update.
  23. * Wed Jan 23 14:16:59 MET 2002, v 1.4.11: Preliminary 2.5.x support, patch for 2.5.2.
  24. * Wed Nov 28 11:08:29 MET 2001, v 1.4.10: potential bug fix for SDRAM-based board, patch for 2.4.16.
  25. * Thu Sep 20 10:24:42 MET DST 2001, v 1.4.9: sync bug fix, preliminary flatpanel support, better timings.
  26. * Tue Aug 28 10:13:01 MET DST 2001, v 1.4.8: memory timings check, minor bug fixes.
  27. * Wed Jul 18 19:06:14 CEST 2001, v 1.4.7: Mode fix (800x600-100, 1024x768-100 changed), using HW panning + accel bug fix.
  28. * Mon Jun 25 10:33:56 MET DST 2001, v 1.4.6: Depth 12 fix, chip reset ioctl, moved memory erase ioctl to DEBUG.
  29. * Wed Jun 20 11:13:08 MET DST 2001, v 1.4.5: Fixed missing blinking cursor in 8bpp, code cleaning, memory erase IOCTL.
  30. * Mon Jun 18 16:00:27 CEST 2001, v 1.4.4: Depth 12 (RGBA 4444) support, code cleaning.
  31. * Fri Jun 15 13:53:01 CEST 2001, v 1.4.3: Removed warnings, depth 15 support, add 'depth' option.
  32. * Thu Jun 14 10:13:52 MET DST 2001, v 1.4.2: Fixed depth switching bug, preliminary 15bpp (RGB5551) support.
  33. * Thu Apr 12 11:16:45 MET DST 2001, v 1.4.1B: Doc updates.
  34. * Fri Apr 6 11:12:53 MET DST 2001, v 1.4.1: Configure.help, minor cleanup
  35. * Thu Mar 29 10:56:50 MET DST 2001, v 1.4.0: Module & module options support (note: linux patch changed, 2.2.19 added).
  36. * Thu Mar 15 15:30:31 MET 2001, v 1.3.2: Fixed mirroring bug on little-endian.
  37. * Wed Mar 14 21:25:54 CET 2001, v 1.3.1: Fixed bug in BlockMove (_bmov).
  38. * Tue Mar 13 10:53:19 MET 2001, v 1.3.0: Character drawing hardware support (in all width between 1 and 16), fixes.
  39. * Thu Mar 8 10:20:16 MET 2001, v 1.2.2: Better J2000 support, "font:" option.
  40. * Tue Mar 6 21:25:04 CET 2001, v 1.2.1: Better acceleration support.
  41. * Mon Mar 5 21:54:17 CET 2001, v 1.2.0: Partial acceleration support (clear & bmove)
  42. * Mon Mar 5 12:52:15 CET 2001, v 1.1.3: Big pan_display fix.
  43. * Sun Mar 4 22:21:50 CET 2001, v 1.1.2: (numerous) bug fixes.
  44. * Fri Mar 2 15:54:07 CET 2001, v 1.1.1: Might have Appian J2000 support, resource mangement in 2.4
  45. * Wed Feb 28 18:21:35 CET 2001, v 1.1.0: Might have multiple boards support (added, but not yest tested)
  46. * Tue Feb 27 17:31:12 CET 2001, v 1.0.6: fixes boot-time mode select, add more default mode
  47. * Tue Feb 27 14:01:36 CET 2001, v 1.0.5: fixes (1.0.4 was broken for 2.2), cleaning up
  48. * Mon Feb 26 23:17:36 CET 2001, v 1.0.4: preliminary 2.4.x support, dropped (useless on pm3) partial product, more OF fix
  49. * Mon Feb 26 20:59:05 CET 2001, v 1.0.3: No more shadow register (and wasted memory), endianess fix, use OF-preset resolution by default
  50. * Wed Feb 21 22:09:30 CET 2001, v 1.0.2: Code cleaning for future multiboard support, better OF support, bugs fix
  51. * Wed Feb 21 19:58:56 CET 2001, v 1.0.1: OpenFirmware support, fixed memory detection, better debug support, code cleaning
  52. * Wed Feb 21 14:47:06 CET 2001, v 1.0.0: First working version
  53. */
  54. #include <linux/module.h>
  55. #include <linux/kernel.h>
  56. #include <linux/errno.h>
  57. #include <linux/string.h>
  58. #include <linux/mm.h>
  59. #include <linux/slab.h>
  60. #include <linux/vmalloc.h>
  61. #include <linux/delay.h>
  62. #include <linux/interrupt.h>
  63. #include <linux/fb.h>
  64. #include <linux/init.h>
  65. #include <linux/pci.h>
  66. #include <linux/ioport.h>
  67. #include <linux/ctype.h>
  68. #include <video/fbcon.h>
  69. #include <video/fbcon-mfb.h>
  70. #include <video/fbcon-cfb2.h>
  71. #include <video/fbcon-cfb4.h>
  72. #include <video/fbcon-cfb8.h>
  73. #include <video/fbcon-cfb16.h>
  74. #include <video/fbcon-cfb24.h>
  75. #include <video/fbcon-cfb32.h>
  76. #include <video/pm3fb.h>
  77. #include <asm/io.h>
  78. #include <asm/uaccess.h>
  79. #ifdef CONFIG_FB_OF
  80. #include <asm/prom.h>
  81. #endif
  82. /* ************************************* */
  83. /* ***** The various "global" data ***** */
  84. /* ************************************* */
  85. /* those will need a rework for multiple board support */
  86. /* Driver name */
  87. static const char permedia3_name[16] = "Permedia3";
  88. /* the fb_par struct, mandatory */
  89. struct pm3fb_par {
  90. u32 pixclock; /* pixclock in KHz */
  91. u32 width; /* width of virtual screen */
  92. u32 height; /* height of virtual screen */
  93. u32 hsstart; /* horiz. sync start */
  94. u32 hsend; /* horiz. sync end */
  95. u32 hbend; /* horiz. blank end (also gate end) */
  96. u32 htotal; /* total width (w/ sync & blank) */
  97. u32 vsstart; /* vert. sync start */
  98. u32 vsend; /* vert. sync end */
  99. u32 vbend; /* vert. blank end */
  100. u32 vtotal; /* total height (w/ sync & blank) */
  101. u32 stride; /* screen stride */
  102. u32 base; /* screen base (xoffset+yoffset) in 128 bits unit */
  103. /* NOTE : unlike other pm3 stuff above, stored *after* shiftbpp. don't ask */
  104. u32 depth; /* screen depth (8, 12, 15, 16 or 32) */
  105. u32 video; /* video control (hsync,vsync) */
  106. };
  107. /* memory timings */
  108. struct pm3fb_timings
  109. {
  110. unsigned long caps;
  111. unsigned long timings;
  112. unsigned long control;
  113. unsigned long refresh;
  114. unsigned long powerdown;
  115. };
  116. typedef enum pm3fb_timing_result { pm3fb_timing_ok, pm3fb_timing_problem, pm3fb_timing_retry } pm3fb_timing_result;
  117. #define PM3FB_UNKNOWN_TIMING_VALUE ((unsigned long)-1)
  118. #define PM3FB_UNKNOWN_TIMINGS { PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE }
  119. /* the fb_info struct, mandatory */
  120. struct pm3fb_info {
  121. struct fb_info_gen gen;
  122. unsigned long board_num; /* internal board number */
  123. unsigned long use_current;
  124. struct pm3fb_par *current_par;
  125. struct pci_dev *dev; /* PCI device */
  126. unsigned long board_type; /* index in the cardbase */
  127. unsigned char *fb_base; /* framebuffer memory base */
  128. u32 fb_size; /* framebuffer memory size */
  129. unsigned char *p_fb; /* physical address of frame buffer */
  130. unsigned char *v_fb; /* virtual address of frame buffer */
  131. unsigned char *pIOBase; /* physical address of registers region, must be rg_base or rg_base+PM2_REGS_SIZE depending on the host endianness */
  132. unsigned char *vIOBase; /* address of registers after ioremap() */
  133. struct {
  134. u8 transp;
  135. u8 red;
  136. u8 green;
  137. u8 blue;
  138. } palette[256];
  139. union {
  140. #ifdef FBCON_HAS_CFB16
  141. u16 cmap12[16]; /* RGBA 4444 */
  142. u16 cmap15[16]; /* RGBA 5551 */
  143. u16 cmap16[16]; /* RGBA 5650 */
  144. #endif
  145. #ifdef FBCON_HAS_CFB32
  146. u32 cmap32[16];
  147. #endif
  148. } cmap;
  149. struct pm3fb_timings memt;
  150. };
  151. /* regular resolution database*/
  152. static struct {
  153. char name[16];
  154. struct pm3fb_par user_mode;
  155. } mode_base[] __initdata = {
  156. {
  157. "default-800x600", {
  158. 49500, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
  159. 800, 0, 8,
  160. PM3VideoControl_ENABLE |
  161. PM3VideoControl_HSYNC_ACTIVE_HIGH
  162. |
  163. PM3VideoControl_VSYNC_ACTIVE_HIGH
  164. | PM3VideoControl_PIXELSIZE_8BIT}}, {
  165. "1024x768-74", {
  166. 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
  167. 806, 1024, 0, 8,
  168. PM3VideoControl_ENABLE |
  169. PM3VideoControl_HSYNC_ACTIVE_HIGH
  170. |
  171. PM3VideoControl_VSYNC_ACTIVE_HIGH
  172. | PM3VideoControl_PIXELSIZE_8BIT}}, {
  173. "1024x768-74-32", {
  174. 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
  175. 806, 1024, 0, 32,
  176. PM3VideoControl_ENABLE |
  177. PM3VideoControl_HSYNC_ACTIVE_HIGH
  178. |
  179. PM3VideoControl_VSYNC_ACTIVE_HIGH
  180. | PM3VideoControl_PIXELSIZE_32BIT}},
  181. /* Generated mode : "1600x1024", for the SGI 1600SW flat panel*/
  182. {
  183. "SGI1600SW", {
  184. 108000, 1600, 1024, 16, 56, 104, 1704, 3, 6, 32,
  185. 1056, 1600, 0, 8,
  186. PM3VideoControl_ENABLE|
  187. PM3VideoControl_HSYNC_ACTIVE_LOW|PM3VideoControl_VSYNC_ACTIVE_LOW|
  188. PM3VideoControl_PIXELSIZE_32BIT}},
  189. /* ##### auto-generated mode, by fbtimings2pm3 */
  190. /* Generated mode : "640x480-60" */
  191. {
  192. "640x480-60", {
  193. 25174, 640, 480, 16, 112, 160, 800, 10, 12, 45,
  194. 525, 640, 0, 8,
  195. PM3VideoControl_ENABLE |
  196. PM3VideoControl_HSYNC_ACTIVE_LOW
  197. |
  198. PM3VideoControl_VSYNC_ACTIVE_LOW
  199. | PM3VideoControl_PIXELSIZE_8BIT}},
  200. /* Generated mode : "640x480-72" */
  201. {
  202. "640x480-72", {
  203. 31199, 640, 480, 24, 64, 192, 832, 9, 12, 40, 520,
  204. 640, 0, 8,
  205. PM3VideoControl_ENABLE |
  206. PM3VideoControl_HSYNC_ACTIVE_LOW
  207. |
  208. PM3VideoControl_VSYNC_ACTIVE_LOW
  209. | PM3VideoControl_PIXELSIZE_8BIT}},
  210. /* Generated mode : "640x480-75" */
  211. {
  212. "640x480-75", {
  213. 31499, 640, 480, 16, 80, 200, 840, 1, 4, 20, 500,
  214. 640, 0, 8,
  215. PM3VideoControl_ENABLE |
  216. PM3VideoControl_HSYNC_ACTIVE_LOW
  217. |
  218. PM3VideoControl_VSYNC_ACTIVE_LOW
  219. | PM3VideoControl_PIXELSIZE_8BIT}},
  220. /* Generated mode : "640x480-90" */
  221. {
  222. "640x480-90", {
  223. 39909, 640, 480, 32, 72, 192, 832, 25, 39, 53, 533,
  224. 640, 0, 8,
  225. PM3VideoControl_ENABLE |
  226. PM3VideoControl_HSYNC_ACTIVE_LOW
  227. |
  228. PM3VideoControl_VSYNC_ACTIVE_LOW
  229. | PM3VideoControl_PIXELSIZE_8BIT}},
  230. /* Generated mode : "640x480-100" */
  231. {
  232. "640x480-100", {
  233. 44899, 640, 480, 32, 160, 208, 848, 22, 34, 51,
  234. 531, 640, 0, 8,
  235. PM3VideoControl_ENABLE |
  236. PM3VideoControl_HSYNC_ACTIVE_LOW
  237. |
  238. PM3VideoControl_VSYNC_ACTIVE_LOW
  239. | PM3VideoControl_PIXELSIZE_8BIT}},
  240. /* Generated mode : "800x600-48-lace" */
  241. /* INTERLACED NOT SUPPORTED
  242. {"800x600-48-lace", {35999, 800, 600, 80, 208, 264, 1064, 11, 23, 102, 702, 800, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
  243. INTERLACED NOT SUPPORTED */
  244. /* Generated mode : "800x600-56" */
  245. {
  246. "800x600-56", {
  247. 35999, 800, 600, 24, 96, 224, 1024, 1, 3, 25, 625,
  248. 800, 0, 8,
  249. PM3VideoControl_ENABLE |
  250. PM3VideoControl_HSYNC_ACTIVE_HIGH
  251. |
  252. PM3VideoControl_VSYNC_ACTIVE_HIGH
  253. | PM3VideoControl_PIXELSIZE_8BIT}},
  254. /* Generated mode : "800x600-60" */
  255. {
  256. "800x600-60", {
  257. 40000, 800, 600, 40, 168, 256, 1056, 1, 5, 28, 628,
  258. 800, 0, 8,
  259. PM3VideoControl_ENABLE |
  260. PM3VideoControl_HSYNC_ACTIVE_HIGH
  261. |
  262. PM3VideoControl_VSYNC_ACTIVE_HIGH
  263. | PM3VideoControl_PIXELSIZE_8BIT}},
  264. /* Generated mode : "800x600-70" */
  265. {
  266. "800x600-70", {
  267. 44899, 800, 600, 24, 168, 208, 1008, 9, 21, 36,
  268. 636, 800, 0, 8,
  269. PM3VideoControl_ENABLE |
  270. PM3VideoControl_HSYNC_ACTIVE_HIGH
  271. |
  272. PM3VideoControl_VSYNC_ACTIVE_LOW
  273. | PM3VideoControl_PIXELSIZE_8BIT}},
  274. /* Generated mode : "800x600-72" */
  275. {
  276. "800x600-72", {
  277. 50000, 800, 600, 56, 176, 240, 1040, 37, 43, 66,
  278. 666, 800, 0, 8,
  279. PM3VideoControl_ENABLE |
  280. PM3VideoControl_HSYNC_ACTIVE_HIGH
  281. |
  282. PM3VideoControl_VSYNC_ACTIVE_HIGH
  283. | PM3VideoControl_PIXELSIZE_8BIT}},
  284. /* Generated mode : "800x600-75" */
  285. {
  286. "800x600-75", {
  287. 49497, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
  288. 800, 0, 8,
  289. PM3VideoControl_ENABLE |
  290. PM3VideoControl_HSYNC_ACTIVE_HIGH
  291. |
  292. PM3VideoControl_VSYNC_ACTIVE_HIGH
  293. | PM3VideoControl_PIXELSIZE_8BIT}},
  294. /* Generated mode : "800x600-90" */
  295. {
  296. "800x600-90", {
  297. 56637, 800, 600, 8, 72, 192, 992, 8, 19, 35, 635,
  298. 800, 0, 8,
  299. PM3VideoControl_ENABLE |
  300. PM3VideoControl_HSYNC_ACTIVE_HIGH
  301. |
  302. PM3VideoControl_VSYNC_ACTIVE_HIGH
  303. | PM3VideoControl_PIXELSIZE_8BIT}},
  304. /* Generated mode : "800x600-100", from /etc/fb.modes */
  305. /* DISABLED, hsstart == 0
  306. {
  307. "800x600-100", {
  308. 67499, 800, 600, 0, 64, 280, 1080, 7, 11, 25, 625,
  309. 800, 0, 8,
  310. PM3VideoControl_ENABLE |
  311. PM3VideoControl_HSYNC_ACTIVE_HIGH
  312. |
  313. PM3VideoControl_VSYNC_ACTIVE_HIGH
  314. | PM3VideoControl_PIXELSIZE_8BIT}},
  315. */
  316. /* Generated mode : "800x600-100", from ??? */
  317. {
  318. "800x600-100", {
  319. 69650, 800, 600, 64, 128, 288, 1088, 4, 10, 40, 640, 800, 0, 8,
  320. PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
  321. PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
  322. /* Generated mode : "1024x768-43-lace" */
  323. /* INTERLACED NOT SUPPORTED
  324. {"1024x768-43-lace", {44899, 1024, 768, 8, 184, 240, 1264, 1, 9, 49, 817, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
  325. INTERLACED NOT SUPPORTED */
  326. /* Generated mode : "1024x768-60" */
  327. {
  328. "1024x768-60", {
  329. 64998, 1024, 768, 24, 160, 320, 1344, 3, 9, 38,
  330. 806, 1024, 0, 8,
  331. PM3VideoControl_ENABLE |
  332. PM3VideoControl_HSYNC_ACTIVE_LOW
  333. |
  334. PM3VideoControl_VSYNC_ACTIVE_LOW
  335. | PM3VideoControl_PIXELSIZE_8BIT}},
  336. /* Generated mode : "1024x768-70" */
  337. {
  338. "1024x768-70", {
  339. 74996, 1024, 768, 24, 160, 304, 1328, 3, 9, 38,
  340. 806, 1024, 0, 8,
  341. PM3VideoControl_ENABLE |
  342. PM3VideoControl_HSYNC_ACTIVE_LOW
  343. |
  344. PM3VideoControl_VSYNC_ACTIVE_LOW
  345. | PM3VideoControl_PIXELSIZE_8BIT}},
  346. /* Generated mode : "1024x768-72" */
  347. {
  348. "1024x768-72", {
  349. 74996, 10224, 768, 24, 160, 264, 10488, 3, 9, 38,
  350. 806, 10224, 0, 8,
  351. PM3VideoControl_ENABLE |
  352. PM3VideoControl_HSYNC_ACTIVE_LOW
  353. |
  354. PM3VideoControl_VSYNC_ACTIVE_LOW
  355. | PM3VideoControl_PIXELSIZE_8BIT}},
  356. /* Generated mode : "1024x768-75" */
  357. {
  358. "1024x768-75", {
  359. 78746, 1024, 768, 16, 112, 288, 1312, 1, 4, 32,
  360. 800, 1024, 0, 8,
  361. PM3VideoControl_ENABLE |
  362. PM3VideoControl_HSYNC_ACTIVE_HIGH
  363. |
  364. PM3VideoControl_VSYNC_ACTIVE_HIGH
  365. | PM3VideoControl_PIXELSIZE_8BIT}},
  366. /* Generated mode : "1024x768-90" */
  367. {
  368. "1024x768-90", {
  369. 100000, 1024, 768, 0, 96, 288, 1312, 21, 36, 77,
  370. 845, 1024, 0, 8,
  371. PM3VideoControl_ENABLE |
  372. PM3VideoControl_HSYNC_ACTIVE_LOW
  373. |
  374. PM3VideoControl_VSYNC_ACTIVE_LOW
  375. | PM3VideoControl_PIXELSIZE_8BIT}},
  376. /* Generated mode : "1024x768-100", from /etc/fb.modes */
  377. /* DISABLED, vsstart == 0
  378. {
  379. "1024x768-100", {
  380. 109998, 1024, 768, 0, 88, 368, 1392, 0, 8, 24, 792,
  381. 1024, 0, 8,
  382. PM3VideoControl_ENABLE |
  383. PM3VideoControl_HSYNC_ACTIVE_LOW
  384. |
  385. PM3VideoControl_VSYNC_ACTIVE_LOW
  386. | PM3VideoControl_PIXELSIZE_8BIT}},
  387. */
  388. /* Generated mode : "1024x768-100", from ??? */
  389. {
  390. "1024x768-100", {
  391. 115500, 1024, 768, 32, 224, 416, 1440, 3, 13, 34, 802, 1024, 0, 8,
  392. PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
  393. PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
  394. /* Generated mode : "1152x864-43-lace" */
  395. /* INTERLACED NOT SUPPORTED
  396. {"1152x864-43-lace", {64998, 1152, 864, 72, 200, 264, 1416, 78, 87, 191, 1055, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
  397. INTERLACED NOT SUPPORTED */
  398. /* Generated mode : "1152x864-47-lace" */
  399. /* INTERLACED NOT SUPPORTED
  400. {"1152x864-47-lace", {64998, 1152, 864, 88, 216, 296, 1448, 30, 39, 83, 947, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
  401. INTERLACED NOT SUPPORTED */
  402. /* Generated mode : "1152x864-60" */
  403. {
  404. "1152x864-60", {
  405. 80000, 1152, 864, 64, 176, 304, 1456, 6, 11, 52,
  406. 916, 1152, 0, 8,
  407. PM3VideoControl_ENABLE |
  408. PM3VideoControl_HSYNC_ACTIVE_HIGH
  409. |
  410. PM3VideoControl_VSYNC_ACTIVE_HIGH
  411. | PM3VideoControl_PIXELSIZE_8BIT}},
  412. /* Generated mode : "1152x864-70" */
  413. {
  414. "1152x864-70", {
  415. 100000, 1152, 864, 40, 192, 360, 1512, 13, 24, 81,
  416. 945, 1152, 0, 8,
  417. PM3VideoControl_ENABLE |
  418. PM3VideoControl_HSYNC_ACTIVE_HIGH
  419. |
  420. PM3VideoControl_VSYNC_ACTIVE_HIGH
  421. | PM3VideoControl_PIXELSIZE_8BIT}},
  422. /* Generated mode : "1152x864-75" */
  423. {
  424. "1152x864-75", {
  425. 109998, 1152, 864, 24, 168, 312, 1464, 45, 53, 138,
  426. 1002, 1152, 0, 8,
  427. PM3VideoControl_ENABLE |
  428. PM3VideoControl_HSYNC_ACTIVE_HIGH
  429. |
  430. PM3VideoControl_VSYNC_ACTIVE_HIGH
  431. | PM3VideoControl_PIXELSIZE_8BIT}},
  432. /* Generated mode : "1152x864-80" */
  433. {
  434. "1152x864-80", {
  435. 109998, 1152, 864, 16, 128, 288, 1440, 30, 37, 94,
  436. 958, 1152, 0, 8,
  437. PM3VideoControl_ENABLE |
  438. PM3VideoControl_HSYNC_ACTIVE_HIGH
  439. |
  440. PM3VideoControl_VSYNC_ACTIVE_HIGH
  441. | PM3VideoControl_PIXELSIZE_8BIT}},
  442. /* Generated mode : "1280x1024-43-lace" */
  443. /* INTERLACED NOT SUPPORTED
  444. {"1280x1024-43-lace", {80000, 1024, 1024, 80, 160, 320, 1344, 50, 60, 125, 1149, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
  445. INTERLACED NOT SUPPORTED */
  446. /* Generated mode : "1280x1024-47-lace" */
  447. /* INTERLACED NOT SUPPORTED
  448. {"1280x1024-47-lace", {80000, 1280, 1024, 80, 160, 320, 1600, 1, 11, 29, 1053, 1280, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
  449. INTERLACED NOT SUPPORTED */
  450. /* Generated mode : "1280x1024-60" */
  451. {
  452. "1280x1024-60", {
  453. 107991, 1280, 1024, 48, 160, 408, 1688, 1, 4, 42,
  454. 1066, 1280, 0, 8,
  455. PM3VideoControl_ENABLE |
  456. PM3VideoControl_HSYNC_ACTIVE_HIGH
  457. |
  458. PM3VideoControl_VSYNC_ACTIVE_HIGH
  459. | PM3VideoControl_PIXELSIZE_8BIT}},
  460. /* Generated mode : "1280x1024-70" */
  461. {
  462. "1280x1024-70", {
  463. 125992, 1280, 1024, 80, 192, 408, 1688, 1, 6, 42,
  464. 1066, 1280, 0, 8,
  465. PM3VideoControl_ENABLE |
  466. PM3VideoControl_HSYNC_ACTIVE_HIGH
  467. |
  468. PM3VideoControl_VSYNC_ACTIVE_HIGH
  469. | PM3VideoControl_PIXELSIZE_8BIT}},
  470. /* Generated mode : "1280x1024-74" */
  471. {
  472. "1280x1024-74", {
  473. 134989, 1280, 1024, 32, 176, 432, 1712, 0, 30, 40,
  474. 1064, 1280, 0, 8,
  475. PM3VideoControl_ENABLE |
  476. PM3VideoControl_HSYNC_ACTIVE_HIGH
  477. |
  478. PM3VideoControl_VSYNC_ACTIVE_HIGH
  479. | PM3VideoControl_PIXELSIZE_8BIT}},
  480. /* Generated mode : "1280x1024-75" */
  481. {
  482. "1280x1024-75", {
  483. 134989, 1280, 1024, 16, 160, 408, 1688, 1, 4, 42,
  484. 1066, 1280, 0, 8,
  485. PM3VideoControl_ENABLE |
  486. PM3VideoControl_HSYNC_ACTIVE_HIGH
  487. |
  488. PM3VideoControl_VSYNC_ACTIVE_HIGH
  489. | PM3VideoControl_PIXELSIZE_8BIT}},
  490. /* Generated mode : "1600x1200-60" */
  491. {
  492. "1600x1200-60", {
  493. 155981, 1600, 1200, 32, 192, 448, 2048, 10, 18, 70,
  494. 1270, 1600, 0, 8,
  495. PM3VideoControl_ENABLE |
  496. PM3VideoControl_HSYNC_ACTIVE_LOW
  497. |
  498. PM3VideoControl_VSYNC_ACTIVE_LOW
  499. | PM3VideoControl_PIXELSIZE_8BIT}},
  500. /* Generated mode : "1600x1200-66" */
  501. {
  502. "1600x1200-66", {
  503. 171998, 1600, 1200, 40, 176, 480, 2080, 3, 6, 53,
  504. 1253, 1600, 0, 8,
  505. PM3VideoControl_ENABLE |
  506. PM3VideoControl_HSYNC_ACTIVE_LOW
  507. |
  508. PM3VideoControl_VSYNC_ACTIVE_LOW
  509. | PM3VideoControl_PIXELSIZE_8BIT}},
  510. /* Generated mode : "1600x1200-76" */
  511. {
  512. "1600x1200-76", {
  513. 197980, 1600, 1200, 40, 176, 480, 2080, 3, 8, 50,
  514. 1250, 1600, 0, 8,
  515. PM3VideoControl_ENABLE |
  516. PM3VideoControl_HSYNC_ACTIVE_LOW
  517. |
  518. PM3VideoControl_VSYNC_ACTIVE_LOW
  519. | PM3VideoControl_PIXELSIZE_8BIT}},
  520. /* ##### end of auto-generated mode */
  521. {
  522. "\0",}
  523. };
  524. /* more mandatory stuff (see skeletonfb.c + framebuffer driver HOWTO */
  525. static struct pm3fb_info fb_info[PM3_MAX_BOARD];
  526. static struct pm3fb_par current_par[PM3_MAX_BOARD];
  527. static int current_par_valid[PM3_MAX_BOARD];
  528. /* to allow explicit filtering of board */
  529. short bus[PM3_MAX_BOARD];
  530. short slot[PM3_MAX_BOARD];
  531. short func[PM3_MAX_BOARD];
  532. short disable[PM3_MAX_BOARD];
  533. short noaccel[PM3_MAX_BOARD];
  534. char fontn[PM3_MAX_BOARD][PM3_FONTNAME_SIZE];
  535. short depth[PM3_MAX_BOARD];
  536. short flatpanel[PM3_MAX_BOARD];
  537. static struct display disp[PM3_MAX_BOARD];
  538. static char g_options[PM3_OPTIONS_SIZE] __initdata = "pm3fb,dummy";
  539. short printtimings = 0;
  540. short forcesize[PM3_MAX_BOARD];
  541. /* ********************* */
  542. /* ***** prototype ***** */
  543. /* ********************* */
  544. /* card-specific */
  545. static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info);
  546. /* permedia3-specific */
  547. static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info);
  548. static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info);
  549. static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info);
  550. static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
  551. unsigned long r);
  552. static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
  553. unsigned long refclock, /* In kHz units */
  554. unsigned char *prescale, /* ClkPreScale */
  555. unsigned char *feedback, /* ClkFeedBackScale */
  556. unsigned char *postscale
  557. /* ClkPostScale */ );
  558. static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc);
  559. static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b);
  560. static void pm3fb_common_init(struct pm3fb_info *l_fb_info);
  561. static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
  562. unsigned long depth, int v);
  563. static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
  564. unsigned long depth, int v);
  565. static void pm3fb_mapIO(struct pm3fb_info *l_fb_info);
  566. static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info);
  567. #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
  568. static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info);
  569. #endif
  570. static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info);
  571. static void pm3fb_write_mode(struct pm3fb_info *l_fb_info);
  572. static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
  573. struct pm3fb_par *curpar);
  574. static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info);
  575. /* accelerated permedia3-specific */
  576. #ifdef PM3FB_USE_ACCEL
  577. static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info);
  578. static void pm3fb_init_engine(struct pm3fb_info *l_fb_info);
  579. #ifdef FBCON_HAS_CFB32
  580. static void pm3fb_cfb32_clear(struct vc_data *conp,
  581. struct display *p,
  582. int sy, int sx, int height, int width);
  583. static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
  584. struct display *p, int bottom_only);
  585. #endif /* FBCON_HAS_CFB32 */
  586. #ifdef FBCON_HAS_CFB16
  587. static void pm3fb_cfb16_clear(struct vc_data *conp,
  588. struct display *p,
  589. int sy, int sx, int height, int width);
  590. static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
  591. struct display *p, int bottom_only);
  592. #endif /* FBCON_HAS_CFB16 */
  593. #ifdef FBCON_HAS_CFB8
  594. static void pm3fb_cfb8_clear(struct vc_data *conp,
  595. struct display *p,
  596. int sy, int sx, int height, int width);
  597. static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
  598. struct display *p, int bottom_only);
  599. #endif /* FBCON_HAS_CFB8 */
  600. #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
  601. static void pm3fb_cfbX_bmove(struct display *p,
  602. int sy, int sx,
  603. int dy, int dx, int height, int width);
  604. static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
  605. int c, int yy, int xx);
  606. static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
  607. const unsigned short *s, int count, int yy,
  608. int xx);
  609. static void pm3fb_cfbX_revc(struct display *p, int xx, int yy);
  610. #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
  611. #endif /* PM3FB_USE_ACCEL */
  612. /* pre-init */
  613. static void pm3fb_mode_setup(char *mode, unsigned long board_num);
  614. static void pm3fb_pciid_setup(char *pciid, unsigned long board_num);
  615. static char *pm3fb_boardnum_setup(char *options, unsigned long *bn);
  616. static void pm3fb_real_setup(char *options);
  617. /* fbdev */
  618. static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
  619. const void *par, struct fb_info_gen *info);
  620. static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
  621. void *par, struct fb_info_gen *info);
  622. static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d);
  623. static int pm3fb_encode_var(struct fb_var_screeninfo *var,
  624. const void *par, struct fb_info_gen *info);
  625. static void pm3fb_get_par(void *par, struct fb_info_gen *info);
  626. static void pm3fb_set_par(const void *par, struct fb_info_gen *info);
  627. static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
  628. unsigned char regno, unsigned char r,
  629. unsigned char g, unsigned char b);
  630. static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
  631. unsigned *blue, unsigned *transp,
  632. struct fb_info *info);
  633. static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
  634. unsigned blue, unsigned transp,
  635. struct fb_info *info);
  636. static int pm3fb_blank(int blank_mode, struct fb_info_gen *info);
  637. static void pm3fb_set_disp(const void *par, struct display *disp,
  638. struct fb_info_gen *info);
  639. static void pm3fb_detect(void);
  640. static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
  641. struct fb_info_gen *info);
  642. static int pm3fb_ioctl(struct fb_info *info, u_int cmd, u_long arg);
  643. /* the struct that hold them together */
  644. struct fbgen_hwswitch pm3fb_switch = {
  645. pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
  646. pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg,
  647. pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
  648. };
  649. static struct fb_ops pm3fb_ops = {
  650. .owner = THIS_MODULE,
  651. .fb_get_fix = fbgen_get_fix,
  652. .fb_get_var = fbgen_get_var,
  653. .fb_set_var = fbgen_set_var,
  654. .fb_get_cmap = fbgen_get_cmap,
  655. .fb_set_cmap = fbgen_set_cmap,
  656. .fb_setcolreg = pm3fb_setcolreg,
  657. .fb_pan_display =fbgen_pan_display,
  658. .fb_blank = fbgen_blank,
  659. .fb_ioctl = pm3fb_ioctl,
  660. };
  661. #ifdef PM3FB_USE_ACCEL
  662. #ifdef FBCON_HAS_CFB32
  663. static struct display_switch pm3fb_cfb32 = {
  664. fbcon_cfb32_setup, pm3fb_cfbX_bmove, pm3fb_cfb32_clear,
  665. pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
  666. NULL /* cursor() */ , NULL /* set_font() */ ,
  667. pm3fb_cfb32_clear_margins,
  668. FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
  669. };
  670. #endif /* FBCON_HAS_CFB32 */
  671. #ifdef FBCON_HAS_CFB16
  672. static struct display_switch pm3fb_cfb16 = {
  673. fbcon_cfb16_setup, pm3fb_cfbX_bmove, pm3fb_cfb16_clear,
  674. pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
  675. NULL /* cursor() */ , NULL /* set_font() */ ,
  676. pm3fb_cfb16_clear_margins,
  677. FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
  678. };
  679. #endif /* FBCON_HAS_CFB16 */
  680. #ifdef FBCON_HAS_CFB8
  681. static struct display_switch pm3fb_cfb8 = {
  682. fbcon_cfb8_setup, pm3fb_cfbX_bmove, pm3fb_cfb8_clear,
  683. pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
  684. NULL /* cursor() */ , NULL /* set_font() */ ,
  685. pm3fb_cfb8_clear_margins,
  686. FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
  687. };
  688. #endif /* FBCON_HAS_CFB8 */
  689. #endif /* PM3FB_USE_ACCEL */
  690. /* ****************************** */
  691. /* ***** card-specific data ***** */
  692. /* ****************************** */
  693. struct pm3fb_card_timings {
  694. unsigned long memsize; /* 0 for last value (i.e. default) */
  695. struct pm3fb_timings memt;
  696. };
  697. static struct pm3fb_card_timings t_FormacProFormance3[] = {
  698. { 16, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} },
  699. { 0, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} } /* from 16 MB PF3 */
  700. };
  701. static struct pm3fb_card_timings t_AppianJeronimo2000[] = {
  702. { 32, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} },
  703. { 0, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} } /* from 32MB J2000 */
  704. };
  705. static struct pm3fb_card_timings t_3DLabsOxygenVX1[] = {
  706. { 32, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} },
  707. { 0, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} } /* from 32MB VX1 */
  708. };
  709. static struct {
  710. char cardname[32]; /* recognized card name */
  711. u16 subvendor; /* subvendor of the card */
  712. u16 subdevice; /* subdevice of the card */
  713. u8 func; /* function of the card to which the extra init apply */
  714. void (*specific_setup)(struct pm3fb_info *l_fb_info); /* card/func specific setup, done before _any_ FB access */
  715. struct pm3fb_card_timings *c_memt; /* defauls timings for the boards */
  716. } cardbase[] = {
  717. { "Unknown Permedia3 board", 0xFFFF, 0xFFFF, 0xFF, NULL, NULL },
  718. { "Appian Jeronimo 2000 head 1", 0x1097, 0x3d32, 1, NULL,
  719. t_AppianJeronimo2000
  720. },
  721. { "Appian Jeronimo 2000 head 2", 0x1097, 0x3d32, 2, pm3fb_j2000_setup,
  722. t_AppianJeronimo2000
  723. },
  724. { "Formac ProFormance 3", PCI_VENDOR_ID_3DLABS, 0x000a, 0, NULL, /* Formac use 3DLabs ID ?!? */
  725. t_FormacProFormance3
  726. },
  727. { "3DLabs Permedia3 Create!", PCI_VENDOR_ID_3DLABS, 0x0127, 0, NULL, NULL },
  728. { "3DLabs Oxygen VX1 PCI", PCI_VENDOR_ID_3DLABS, 0x0121, 0, NULL,
  729. t_3DLabsOxygenVX1
  730. },
  731. { "3DLabs Oxygen VX1 AGP", PCI_VENDOR_ID_3DLABS, 0x0125, 0, NULL, NULL },
  732. { "3DLabs Oxygen VX1-16 AGP", PCI_VENDOR_ID_3DLABS, 0x0140, 0, NULL, NULL },
  733. { "3DLabs Oxygen VX1-1600SW PCI", PCI_VENDOR_ID_3DLABS, 0x0800, 0, NULL, NULL },
  734. { "\0", 0x0, 0x0, 0, NULL, NULL }
  735. };
  736. /* ********************************** */
  737. /* ***** card-specific function ***** */
  738. /* ********************************** */
  739. static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info)
  740. { /* the appian j2000 require more initialization of the second head */
  741. /* l_fb_info must point to the _second_ head of the J2000 */
  742. DTRACE;
  743. l_fb_info->memt = t_AppianJeronimo2000[0].memt; /* 32 MB, first and only j2000 ? */
  744. pm3fb_write_memory_timings(l_fb_info);
  745. }
  746. /* *************************************** */
  747. /* ***** permedia3-specific function ***** */
  748. /* *************************************** */
  749. static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info)
  750. {
  751. l_fb_info->memt.caps = PM3_READ_REG(PM3LocalMemCaps);
  752. l_fb_info->memt.timings = PM3_READ_REG(PM3LocalMemTimings);
  753. l_fb_info->memt.control = PM3_READ_REG(PM3LocalMemControl);
  754. l_fb_info->memt.refresh = PM3_READ_REG(PM3LocalMemRefresh);
  755. l_fb_info->memt.powerdown = PM3_READ_REG(PM3LocalMemPowerDown);
  756. if ((l_fb_info->memt.caps == PM3FB_UNKNOWN_TIMING_VALUE) ||
  757. (l_fb_info->memt.timings == PM3FB_UNKNOWN_TIMING_VALUE) ||
  758. (l_fb_info->memt.control == PM3FB_UNKNOWN_TIMING_VALUE) ||
  759. (l_fb_info->memt.refresh == PM3FB_UNKNOWN_TIMING_VALUE) ||
  760. (l_fb_info->memt.powerdown == PM3FB_UNKNOWN_TIMING_VALUE))
  761. {
  762. printk(KERN_ERR "pm3fb: invalid memory timings in permedia3 board #%ld\n", l_fb_info->board_num);
  763. return(pm3fb_try_memory_timings(l_fb_info));
  764. }
  765. return(pm3fb_timing_ok);
  766. }
  767. static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info)
  768. {
  769. if (cardbase[l_fb_info->board_type].c_memt)
  770. {
  771. int i = 0, done = 0;
  772. while (!done)
  773. {
  774. if ((cardbase[l_fb_info->board_type].c_memt[i].memsize == l_fb_info->fb_size)
  775. || !(cardbase[l_fb_info->board_type].c_memt[i].memsize))
  776. { /* will use the 0-sized timings by default */
  777. done = 1;
  778. l_fb_info->memt = cardbase[l_fb_info->board_type].c_memt[i].memt;
  779. printk(KERN_WARNING "pm3fb: trying to use predefined memory timings for permedia3 board #%ld (%s, %ld MB)\n",
  780. l_fb_info->board_num,
  781. cardbase[l_fb_info->board_type].cardname,
  782. cardbase[l_fb_info->board_type].c_memt[i].memsize);
  783. pm3fb_write_memory_timings(l_fb_info);
  784. return(pm3fb_timing_retry);
  785. }
  786. i++;
  787. }
  788. } else
  789. return(pm3fb_timing_problem);
  790. return(pm3fb_timing_ok);
  791. }
  792. static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info)
  793. {
  794. unsigned char m, n, p;
  795. unsigned long clockused;
  796. PM3_SLOW_WRITE_REG(PM3LocalMemCaps, l_fb_info->memt.caps);
  797. PM3_SLOW_WRITE_REG(PM3LocalMemTimings, l_fb_info->memt.timings);
  798. PM3_SLOW_WRITE_REG(PM3LocalMemControl, l_fb_info->memt.control);
  799. PM3_SLOW_WRITE_REG(PM3LocalMemRefresh, l_fb_info->memt.refresh);
  800. PM3_SLOW_WRITE_REG(PM3LocalMemPowerDown, l_fb_info->memt.powerdown);
  801. clockused =
  802. pm3fb_CalculateClock(l_fb_info, 2 * 105000, PM3_REF_CLOCK, &m,
  803. &n, &p);
  804. PM3_WRITE_DAC_REG(PM3RD_KClkPreScale, m);
  805. PM3_WRITE_DAC_REG(PM3RD_KClkFeedbackScale, n);
  806. PM3_WRITE_DAC_REG(PM3RD_KClkPostScale, p);
  807. PM3_WRITE_DAC_REG(PM3RD_KClkControl,
  808. PM3RD_KClkControl_STATE_RUN |
  809. PM3RD_KClkControl_SOURCE_PLL |
  810. PM3RD_KClkControl_ENABLE);
  811. PM3_WRITE_DAC_REG(PM3RD_MClkControl,
  812. PM3RD_MClkControl_STATE_RUN |
  813. PM3RD_MClkControl_SOURCE_KCLK |
  814. PM3RD_MClkControl_ENABLE);
  815. PM3_WRITE_DAC_REG(PM3RD_SClkControl,
  816. PM3RD_SClkControl_STATE_RUN |
  817. PM3RD_SClkControl_SOURCE_PCLK |
  818. PM3RD_SClkControl_ENABLE);
  819. }
  820. static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
  821. unsigned long r)
  822. {
  823. DASSERT((l_fb_info->vIOBase != (unsigned char *) (-1)),
  824. "l_fb_info->vIOBase mapped in read dac reg\n");
  825. PM3_SET_INDEX(r);
  826. mb();
  827. return (PM3_READ_REG(PM3RD_IndexedData));
  828. }
  829. /* Calculating various clock parameter */
  830. static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
  831. unsigned long refclock, /* In kHz units */
  832. unsigned char *prescale, /* ClkPreScale */
  833. unsigned char *feedback, /* ClkFeedBackScale */
  834. unsigned char *postscale
  835. /* ClkPostScale */ )
  836. {
  837. int f, pre, post;
  838. unsigned long freq;
  839. long freqerr = 1000;
  840. unsigned long actualclock = 0;
  841. DTRACE;
  842. for (f = 1; f < 256; f++) {
  843. for (pre = 1; pre < 256; pre++) {
  844. for (post = 0; post < 5; post++) {
  845. freq =
  846. ((2 * refclock * f) /
  847. (pre * (1 << post)));
  848. if ((reqclock > freq - freqerr)
  849. && (reqclock < freq + freqerr)) {
  850. freqerr =
  851. (reqclock >
  852. freq) ? reqclock -
  853. freq : freq - reqclock;
  854. *feedback = f;
  855. *prescale = pre;
  856. *postscale = post;
  857. actualclock = freq;
  858. }
  859. }
  860. }
  861. }
  862. return (actualclock);
  863. }
  864. static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
  865. unsigned long depth, int v)
  866. {
  867. DTRACE;
  868. switch (depth) {
  869. case 8:
  870. return (v >> 4);
  871. case 12:
  872. case 15:
  873. case 16:
  874. return (v >> 3);
  875. case 32:
  876. return (v >> 2);
  877. }
  878. DPRINTK(1, "Unsupported depth %ld\n", depth);
  879. return (0);
  880. }
  881. static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
  882. unsigned long depth, int v)
  883. {
  884. DTRACE;
  885. switch (depth) {
  886. case 8:
  887. return (v << 4);
  888. case 12:
  889. case 15:
  890. case 16:
  891. return (v << 3);
  892. case 32:
  893. return (v << 2);
  894. }
  895. DPRINTK(1, "Unsupported depth %ld\n", depth);
  896. return (0);
  897. }
  898. static void pm3fb_mapIO(struct pm3fb_info *l_fb_info)
  899. {
  900. DTRACE;
  901. l_fb_info->vIOBase =
  902. ioremap((unsigned long) l_fb_info->pIOBase, PM3_REGS_SIZE);
  903. l_fb_info->v_fb =
  904. ioremap((unsigned long) l_fb_info->p_fb, l_fb_info->fb_size);
  905. DPRINTK(2, "IO mapping : IOBase %lx / %lx, fb %lx / %lx\n",
  906. (unsigned long) l_fb_info->pIOBase,
  907. (unsigned long) l_fb_info->vIOBase,
  908. (unsigned long) l_fb_info->p_fb,
  909. (unsigned long) l_fb_info->v_fb);
  910. }
  911. static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info)
  912. {
  913. DTRACE;
  914. iounmap(l_fb_info->vIOBase);
  915. iounmap(l_fb_info->v_fb);
  916. l_fb_info->vIOBase = (unsigned char *) -1;
  917. l_fb_info->v_fb = (unsigned char *) -1;
  918. }
  919. #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
  920. static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info)
  921. {
  922. DPRINTK(2, "PM3Aperture0: 0x%08x\n", PM3_READ_REG(PM3Aperture0));
  923. DPRINTK(2, "PM3Aperture1: 0x%08x\n", PM3_READ_REG(PM3Aperture1));
  924. DPRINTK(2, "PM3ByAperture1Mode: 0x%08x\n",
  925. PM3_READ_REG(PM3ByAperture1Mode));
  926. DPRINTK(2, "PM3ByAperture2Mode: 0x%08x\n",
  927. PM3_READ_REG(PM3ByAperture2Mode));
  928. DPRINTK(2, "PM3ChipConfig: 0x%08x\n", PM3_READ_REG(PM3ChipConfig));
  929. DPRINTK(2, "PM3FIFODis: 0x%08x\n", PM3_READ_REG(PM3FIFODis));
  930. DPRINTK(2, "PM3HTotal: 0x%08x\n", PM3_READ_REG(PM3HTotal));
  931. DPRINTK(2, "PM3HbEnd: 0x%08x\n", PM3_READ_REG(PM3HbEnd));
  932. DPRINTK(2, "PM3HgEnd: 0x%08x\n", PM3_READ_REG(PM3HgEnd));
  933. DPRINTK(2, "PM3HsEnd: 0x%08x\n", PM3_READ_REG(PM3HsEnd));
  934. DPRINTK(2, "PM3HsStart: 0x%08x\n", PM3_READ_REG(PM3HsStart));
  935. DPRINTK(2, "PM3MemBypassWriteMask: 0x%08x\n",
  936. PM3_READ_REG(PM3MemBypassWriteMask));
  937. DPRINTK(2, "PM3RD_IndexControl: 0x%08x\n",
  938. PM3_READ_REG(PM3RD_IndexControl));
  939. DPRINTK(2, "PM3ScreenBase: 0x%08x\n", PM3_READ_REG(PM3ScreenBase));
  940. DPRINTK(2, "PM3ScreenStride: 0x%08x\n",
  941. PM3_READ_REG(PM3ScreenStride));
  942. DPRINTK(2, "PM3VClkCtl: 0x%08x\n", PM3_READ_REG(PM3VClkCtl));
  943. DPRINTK(2, "PM3VTotal: 0x%08x\n", PM3_READ_REG(PM3VTotal));
  944. DPRINTK(2, "PM3VbEnd: 0x%08x\n", PM3_READ_REG(PM3VbEnd));
  945. DPRINTK(2, "PM3VideoControl: 0x%08x\n",
  946. PM3_READ_REG(PM3VideoControl));
  947. DPRINTK(2, "PM3VsEnd: 0x%08x\n", PM3_READ_REG(PM3VsEnd));
  948. DPRINTK(2, "PM3VsStart: 0x%08x\n", PM3_READ_REG(PM3VsStart));
  949. DPRINTK(2, "PM3RD_ColorFormat: %ld\n",
  950. PM3_READ_DAC_REG(PM3RD_ColorFormat));
  951. DPRINTK(2, "PM3RD_DACControl: %ld\n",
  952. PM3_READ_DAC_REG(PM3RD_DACControl));
  953. DPRINTK(2, "PM3RD_DClk0FeedbackScale: %ld\n",
  954. PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale));
  955. DPRINTK(2, "PM3RD_DClk0PostScale: %ld\n",
  956. PM3_READ_DAC_REG(PM3RD_DClk0PostScale));
  957. DPRINTK(2, "PM3RD_DClk0PreScale: %ld\n",
  958. PM3_READ_DAC_REG(PM3RD_DClk0PreScale));
  959. DPRINTK(2, "[not set] PM3RD_IndexControl: %ld\n",
  960. PM3_READ_DAC_REG(PM3RD_IndexControl));
  961. DPRINTK(2, "PM3RD_MiscControl: %ld\n",
  962. PM3_READ_DAC_REG(PM3RD_MiscControl));
  963. DPRINTK(2, "PM3RD_PixelSize: %ld\n",
  964. PM3_READ_DAC_REG(PM3RD_PixelSize));
  965. DPRINTK(2, "PM3RD_SyncControl: %ld\n",
  966. PM3_READ_DAC_REG(PM3RD_SyncControl));
  967. }
  968. #endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2) */
  969. static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info)
  970. {
  971. u16 subvendor, subdevice;
  972. if ((!pci_read_config_word
  973. (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
  974. &&
  975. (!pci_read_config_word
  976. (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
  977. /* well, nothing... */
  978. } else {
  979. subvendor = subdevice = (u16)-1;
  980. }
  981. printk(KERN_INFO "pm3fb: memory timings for board #%ld (subvendor: 0x%hx, subdevice: 0x%hx)\n", l_fb_info->board_num, subvendor, subdevice);
  982. printk(KERN_INFO " PM3LocalMemCaps: 0x%08x\n",
  983. PM3_READ_REG(PM3LocalMemCaps));
  984. printk(KERN_INFO " PM3LocalMemTimings: 0x%08x\n",
  985. PM3_READ_REG(PM3LocalMemTimings));
  986. printk(KERN_INFO " PM3LocalMemControl: 0x%08x\n",
  987. PM3_READ_REG(PM3LocalMemControl));
  988. printk(KERN_INFO " PM3LocalMemRefresh: 0x%08x\n",
  989. PM3_READ_REG(PM3LocalMemRefresh));
  990. printk(KERN_INFO " PM3LocalMemPowerDown: 0x%08x\n",
  991. PM3_READ_REG(PM3LocalMemPowerDown));
  992. }
  993. /* write the mode to registers */
  994. static void pm3fb_write_mode(struct pm3fb_info *l_fb_info)
  995. {
  996. char tempsync = 0x00, tempmisc = 0x00;
  997. DTRACE;
  998. PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xffffffff);
  999. PM3_SLOW_WRITE_REG(PM3Aperture0, 0x00000000);
  1000. PM3_SLOW_WRITE_REG(PM3Aperture1, 0x00000000);
  1001. PM3_SLOW_WRITE_REG(PM3FIFODis, 0x00000007);
  1002. PM3_SLOW_WRITE_REG(PM3HTotal,
  1003. pm3fb_Shiftbpp(l_fb_info,
  1004. l_fb_info->current_par->depth,
  1005. l_fb_info->current_par->htotal -
  1006. 1));
  1007. PM3_SLOW_WRITE_REG(PM3HsEnd,
  1008. pm3fb_Shiftbpp(l_fb_info,
  1009. l_fb_info->current_par->depth,
  1010. l_fb_info->current_par->hsend));
  1011. PM3_SLOW_WRITE_REG(PM3HsStart,
  1012. pm3fb_Shiftbpp(l_fb_info,
  1013. l_fb_info->current_par->depth,
  1014. l_fb_info->current_par->
  1015. hsstart));
  1016. PM3_SLOW_WRITE_REG(PM3HbEnd,
  1017. pm3fb_Shiftbpp(l_fb_info,
  1018. l_fb_info->current_par->depth,
  1019. l_fb_info->current_par->hbend));
  1020. PM3_SLOW_WRITE_REG(PM3HgEnd,
  1021. pm3fb_Shiftbpp(l_fb_info,
  1022. l_fb_info->current_par->depth,
  1023. l_fb_info->current_par->hbend));
  1024. PM3_SLOW_WRITE_REG(PM3ScreenStride,
  1025. pm3fb_Shiftbpp(l_fb_info,
  1026. l_fb_info->current_par->depth,
  1027. l_fb_info->current_par->stride));
  1028. PM3_SLOW_WRITE_REG(PM3VTotal, l_fb_info->current_par->vtotal - 1);
  1029. PM3_SLOW_WRITE_REG(PM3VsEnd, l_fb_info->current_par->vsend - 1);
  1030. PM3_SLOW_WRITE_REG(PM3VsStart,
  1031. l_fb_info->current_par->vsstart - 1);
  1032. PM3_SLOW_WRITE_REG(PM3VbEnd, l_fb_info->current_par->vbend);
  1033. switch (l_fb_info->current_par->depth) {
  1034. case 8:
  1035. PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
  1036. PM3ByApertureMode_PIXELSIZE_8BIT);
  1037. PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
  1038. PM3ByApertureMode_PIXELSIZE_8BIT);
  1039. break;
  1040. case 12:
  1041. case 15:
  1042. case 16:
  1043. #ifndef __BIG_ENDIAN
  1044. PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
  1045. PM3ByApertureMode_PIXELSIZE_16BIT);
  1046. PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
  1047. PM3ByApertureMode_PIXELSIZE_16BIT);
  1048. #else
  1049. PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
  1050. PM3ByApertureMode_PIXELSIZE_16BIT |
  1051. PM3ByApertureMode_BYTESWAP_BADC);
  1052. PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
  1053. PM3ByApertureMode_PIXELSIZE_16BIT |
  1054. PM3ByApertureMode_BYTESWAP_BADC);
  1055. #endif /* ! __BIG_ENDIAN */
  1056. break;
  1057. case 32:
  1058. #ifndef __BIG_ENDIAN
  1059. PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
  1060. PM3ByApertureMode_PIXELSIZE_32BIT);
  1061. PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
  1062. PM3ByApertureMode_PIXELSIZE_32BIT);
  1063. #else
  1064. PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
  1065. PM3ByApertureMode_PIXELSIZE_32BIT |
  1066. PM3ByApertureMode_BYTESWAP_DCBA);
  1067. PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
  1068. PM3ByApertureMode_PIXELSIZE_32BIT |
  1069. PM3ByApertureMode_BYTESWAP_DCBA);
  1070. #endif /* ! __BIG_ENDIAN */
  1071. break;
  1072. default:
  1073. DPRINTK(1, "Unsupported depth %d\n",
  1074. l_fb_info->current_par->depth);
  1075. break;
  1076. }
  1077. /*
  1078. * Oxygen VX1 - it appears that setting PM3VideoControl and
  1079. * then PM3RD_SyncControl to the same SYNC settings undoes
  1080. * any net change - they seem to xor together. Only set the
  1081. * sync options in PM3RD_SyncControl. --rmk
  1082. */
  1083. {
  1084. unsigned int video = l_fb_info->current_par->video;
  1085. video &= ~(PM3VideoControl_HSYNC_MASK |
  1086. PM3VideoControl_VSYNC_MASK);
  1087. video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
  1088. PM3VideoControl_VSYNC_ACTIVE_HIGH;
  1089. PM3_SLOW_WRITE_REG(PM3VideoControl, video);
  1090. }
  1091. PM3_SLOW_WRITE_REG(PM3VClkCtl,
  1092. (PM3_READ_REG(PM3VClkCtl) & 0xFFFFFFFC));
  1093. PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
  1094. PM3_SLOW_WRITE_REG(PM3ChipConfig,
  1095. (PM3_READ_REG(PM3ChipConfig) & 0xFFFFFFFD));
  1096. {
  1097. unsigned char m; /* ClkPreScale */
  1098. unsigned char n; /* ClkFeedBackScale */
  1099. unsigned char p; /* ClkPostScale */
  1100. (void)pm3fb_CalculateClock(l_fb_info, l_fb_info->current_par->pixclock, PM3_REF_CLOCK, &m, &n, &p);
  1101. DPRINTK(2,
  1102. "Pixclock: %d, Pre: %d, Feedback: %d, Post: %d\n",
  1103. l_fb_info->current_par->pixclock, (int) m, (int) n,
  1104. (int) p);
  1105. PM3_WRITE_DAC_REG(PM3RD_DClk0PreScale, m);
  1106. PM3_WRITE_DAC_REG(PM3RD_DClk0FeedbackScale, n);
  1107. PM3_WRITE_DAC_REG(PM3RD_DClk0PostScale, p);
  1108. }
  1109. /*
  1110. PM3_WRITE_DAC_REG(PM3RD_IndexControl, 0x00);
  1111. */
  1112. /*
  1113. PM3_SLOW_WRITE_REG(PM3RD_IndexControl, 0x00);
  1114. */
  1115. if ((l_fb_info->current_par->video & PM3VideoControl_HSYNC_MASK) ==
  1116. PM3VideoControl_HSYNC_ACTIVE_HIGH)
  1117. tempsync |= PM3RD_SyncControl_HSYNC_ACTIVE_HIGH;
  1118. if ((l_fb_info->current_par->video & PM3VideoControl_VSYNC_MASK) ==
  1119. PM3VideoControl_VSYNC_ACTIVE_HIGH)
  1120. tempsync |= PM3RD_SyncControl_VSYNC_ACTIVE_HIGH;
  1121. PM3_WRITE_DAC_REG(PM3RD_SyncControl, tempsync);
  1122. DPRINTK(2, "PM3RD_SyncControl: %d\n", tempsync);
  1123. if (flatpanel[l_fb_info->board_num])
  1124. {
  1125. PM3_WRITE_DAC_REG(PM3RD_DACControl, PM3RD_DACControl_BLANK_PEDESTAL_ENABLE);
  1126. PM3_WAIT(2);
  1127. PM3_WRITE_REG(PM3VSConfiguration, 0x06);
  1128. PM3_WRITE_REG(0x5a00, 1 << 14); /* black magic... */
  1129. tempmisc = PM3RD_MiscControl_VSB_OUTPUT_ENABLE;
  1130. }
  1131. else
  1132. PM3_WRITE_DAC_REG(PM3RD_DACControl, 0x00);
  1133. switch (l_fb_info->current_par->depth) {
  1134. case 8:
  1135. PM3_WRITE_DAC_REG(PM3RD_PixelSize,
  1136. PM3RD_PixelSize_8_BIT_PIXELS);
  1137. PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
  1138. PM3RD_ColorFormat_CI8_COLOR |
  1139. PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
  1140. tempmisc |= PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
  1141. break;
  1142. case 12:
  1143. PM3_WRITE_DAC_REG(PM3RD_PixelSize,
  1144. PM3RD_PixelSize_16_BIT_PIXELS);
  1145. PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
  1146. PM3RD_ColorFormat_4444_COLOR |
  1147. PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
  1148. PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
  1149. tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
  1150. PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
  1151. break;
  1152. case 15:
  1153. PM3_WRITE_DAC_REG(PM3RD_PixelSize,
  1154. PM3RD_PixelSize_16_BIT_PIXELS);
  1155. PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
  1156. PM3RD_ColorFormat_5551_FRONT_COLOR |
  1157. PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
  1158. PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
  1159. tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
  1160. PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
  1161. break;
  1162. case 16:
  1163. PM3_WRITE_DAC_REG(PM3RD_PixelSize,
  1164. PM3RD_PixelSize_16_BIT_PIXELS);
  1165. PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
  1166. PM3RD_ColorFormat_565_FRONT_COLOR |
  1167. PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
  1168. PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
  1169. tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
  1170. PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
  1171. break;
  1172. case 32:
  1173. PM3_WRITE_DAC_REG(PM3RD_PixelSize,
  1174. PM3RD_PixelSize_32_BIT_PIXELS);
  1175. PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
  1176. PM3RD_ColorFormat_8888_COLOR |
  1177. PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
  1178. tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
  1179. PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
  1180. break;
  1181. }
  1182. PM3_WRITE_DAC_REG(PM3RD_MiscControl, tempmisc);
  1183. PM3_SHOW_CUR_MODE;
  1184. }
  1185. static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
  1186. struct pm3fb_par *curpar)
  1187. {
  1188. unsigned long pixsize1, pixsize2, clockused;
  1189. unsigned long pre, feedback, post;
  1190. DTRACE;
  1191. clockused = PM3_READ_REG(PM3VClkCtl);
  1192. switch (clockused) {
  1193. case 3:
  1194. pre = PM3_READ_DAC_REG(PM3RD_DClk3PreScale);
  1195. feedback = PM3_READ_DAC_REG(PM3RD_DClk3FeedbackScale);
  1196. post = PM3_READ_DAC_REG(PM3RD_DClk3PostScale);
  1197. DPRINTK(2,
  1198. "DClk3 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
  1199. pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
  1200. feedback,
  1201. post));
  1202. break;
  1203. case 2:
  1204. pre = PM3_READ_DAC_REG(PM3RD_DClk2PreScale);
  1205. feedback = PM3_READ_DAC_REG(PM3RD_DClk2FeedbackScale);
  1206. post = PM3_READ_DAC_REG(PM3RD_DClk2PostScale);
  1207. DPRINTK(2,
  1208. "DClk2 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
  1209. pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
  1210. feedback,
  1211. post));
  1212. break;
  1213. case 1:
  1214. pre = PM3_READ_DAC_REG(PM3RD_DClk1PreScale);
  1215. feedback = PM3_READ_DAC_REG(PM3RD_DClk1FeedbackScale);
  1216. post = PM3_READ_DAC_REG(PM3RD_DClk1PostScale);
  1217. DPRINTK(2,
  1218. "DClk1 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
  1219. pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
  1220. feedback,
  1221. post));
  1222. break;
  1223. case 0:
  1224. pre = PM3_READ_DAC_REG(PM3RD_DClk0PreScale);
  1225. feedback = PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale);
  1226. post = PM3_READ_DAC_REG(PM3RD_DClk0PostScale);
  1227. DPRINTK(2,
  1228. "DClk0 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
  1229. pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
  1230. feedback,
  1231. post));
  1232. break;
  1233. default:
  1234. pre = feedback = post = 0;
  1235. DPRINTK(1, "Unknowk D clock used : %ld\n", clockused);
  1236. break;
  1237. }
  1238. curpar->pixclock = PM3_SCALE_TO_CLOCK(pre, feedback, post);
  1239. pixsize1 =
  1240. PM3ByApertureMode_PIXELSIZE_MASK &
  1241. (PM3_READ_REG(PM3ByAperture1Mode));
  1242. pixsize2 =
  1243. PM3ByApertureMode_PIXELSIZE_MASK &
  1244. (PM3_READ_REG(PM3ByAperture2Mode));
  1245. DASSERT((pixsize1 == pixsize2),
  1246. "pixsize the same in both aperture\n");
  1247. if (pixsize1 & PM3ByApertureMode_PIXELSIZE_32BIT)
  1248. curpar->depth = 32;
  1249. else if (pixsize1 & PM3ByApertureMode_PIXELSIZE_16BIT)
  1250. {
  1251. curpar->depth = 16;
  1252. }
  1253. else
  1254. curpar->depth = 8;
  1255. /* not sure if I need to add one on the next ; it give better result with */
  1256. curpar->htotal =
  1257. pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
  1258. 1 + PM3_READ_REG(PM3HTotal));
  1259. curpar->hsend =
  1260. pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
  1261. PM3_READ_REG(PM3HsEnd));
  1262. curpar->hsstart =
  1263. pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
  1264. PM3_READ_REG(PM3HsStart));
  1265. curpar->hbend =
  1266. pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
  1267. PM3_READ_REG(PM3HbEnd));
  1268. curpar->stride =
  1269. pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
  1270. PM3_READ_REG(PM3ScreenStride));
  1271. curpar->vtotal = 1 + PM3_READ_REG(PM3VTotal);
  1272. curpar->vsend = 1 + PM3_READ_REG(PM3VsEnd);
  1273. curpar->vsstart = 1 + PM3_READ_REG(PM3VsStart);
  1274. curpar->vbend = PM3_READ_REG(PM3VbEnd);
  1275. curpar->video = PM3_READ_REG(PM3VideoControl);
  1276. curpar->base = PM3_READ_REG(PM3ScreenBase);
  1277. curpar->width = curpar->htotal - curpar->hbend; /* make virtual == displayed resolution */
  1278. curpar->height = curpar->vtotal - curpar->vbend;
  1279. DPRINTK(2, "Found : %d * %d, %d Khz, stride is %08x\n",
  1280. curpar->width, curpar->height, curpar->pixclock,
  1281. curpar->stride);
  1282. }
  1283. static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info)
  1284. {
  1285. unsigned long memsize = 0, tempBypass, i, temp1, temp2;
  1286. u16 subvendor, subdevice;
  1287. pm3fb_timing_result ptr;
  1288. DTRACE;
  1289. l_fb_info->fb_size = 64 * 1024 * 1024; /* pm3 aperture always 64 MB */
  1290. pm3fb_mapIO(l_fb_info); /* temporary map IO */
  1291. DASSERT((l_fb_info->vIOBase != NULL),
  1292. "IO successfully mapped before mem detect\n");
  1293. DASSERT((l_fb_info->v_fb != NULL),
  1294. "FB successfully mapped before mem detect\n");
  1295. /* card-specific stuff, *before* accessing *any* FB memory */
  1296. if ((!pci_read_config_word
  1297. (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
  1298. &&
  1299. (!pci_read_config_word
  1300. (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
  1301. i = 0; l_fb_info->board_type = 0;
  1302. while ((cardbase[i].cardname[0]) && !(l_fb_info->board_type)) {
  1303. if ((cardbase[i].subvendor == subvendor) &&
  1304. (cardbase[i].subdevice == subdevice) &&
  1305. (cardbase[i].func == PCI_FUNC(l_fb_info->dev->devfn))) {
  1306. DPRINTK(2, "Card #%ld is an %s\n",
  1307. l_fb_info->board_num,
  1308. cardbase[i].cardname);
  1309. if (cardbase[i].specific_setup)
  1310. cardbase[i].specific_setup(l_fb_info);
  1311. l_fb_info->board_type = i;
  1312. }
  1313. i++;
  1314. }
  1315. if (!l_fb_info->board_type) {
  1316. DPRINTK(1, "Card #%ld is an unknown 0x%04x / 0x%04x\n",
  1317. l_fb_info->board_num, subvendor, subdevice);
  1318. }
  1319. } else {
  1320. printk(KERN_ERR "pm3fb: Error: pci_read_config_word failed, board #%ld\n",
  1321. l_fb_info->board_num);
  1322. }
  1323. if (printtimings)
  1324. pm3fb_show_cur_timing(l_fb_info);
  1325. /* card-specific setup is done, we preserve the final
  1326. memory timing for future reference */
  1327. if ((ptr = pm3fb_preserve_memory_timings(l_fb_info)) == pm3fb_timing_problem) { /* memory timings were wrong ! oops.... */
  1328. return(0);
  1329. }
  1330. tempBypass = PM3_READ_REG(PM3MemBypassWriteMask);
  1331. DPRINTK(2, "PM3MemBypassWriteMask was: 0x%08lx\n", tempBypass);
  1332. PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xFFFFFFFF);
  1333. /* pm3 split up memory, replicates, and do a lot of nasty stuff IMHO ;-) */
  1334. for (i = 0; i < 32; i++) {
  1335. fb_writel(i * 0x00345678,
  1336. (l_fb_info->v_fb + (i * 1048576)));
  1337. mb();
  1338. temp1 = fb_readl((l_fb_info->v_fb + (i * 1048576)));
  1339. /* Let's check for wrapover, write will fail at 16MB boundary */
  1340. if (temp1 == (i * 0x00345678))
  1341. memsize = i;
  1342. else
  1343. break;
  1344. }
  1345. DPRINTK(2, "First detect pass already got %ld MB\n", memsize + 1);
  1346. if (memsize == i) {
  1347. for (i = 0; i < 32; i++) {
  1348. /* Clear first 32MB ; 0 is 0, no need to byteswap */
  1349. writel(0x0000000,
  1350. (l_fb_info->v_fb + (i * 1048576)));
  1351. mb();
  1352. }
  1353. for (i = 32; i < 64; i++) {
  1354. fb_writel(i * 0x00345678,
  1355. (l_fb_info->v_fb + (i * 1048576)));
  1356. mb();
  1357. temp1 =
  1358. fb_readl((l_fb_info->v_fb + (i * 1048576)));
  1359. temp2 =
  1360. fb_readl((l_fb_info->v_fb +
  1361. ((i - 32) * 1048576)));
  1362. if ((temp1 == (i * 0x00345678)) && (temp2 == 0)) /* different value, different RAM... */
  1363. memsize = i;
  1364. else
  1365. break;
  1366. }
  1367. }
  1368. DPRINTK(2, "Second detect pass got %ld MB\n", memsize + 1);
  1369. PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, tempBypass);
  1370. pm3fb_unmapIO(l_fb_info);
  1371. memsize = 1048576 * (memsize + 1);
  1372. DPRINTK(2, "Returning 0x%08lx bytes\n", memsize);
  1373. if (forcesize[l_fb_info->board_num] && ((forcesize[l_fb_info->board_num] * 1048576) != memsize))
  1374. {
  1375. printk(KERN_WARNING "pm3fb: mismatch between probed (%ld MB) and specified (%hd MB) memory size, using SPECIFIED !\n", memsize, forcesize[l_fb_info->board_num]);
  1376. memsize = 1048576 * forcesize[l_fb_info->board_num];
  1377. }
  1378. l_fb_info->fb_size = memsize;
  1379. if (ptr == pm3fb_timing_retry)
  1380. {
  1381. printk(KERN_WARNING "pm3fb: retrying memory timings check");
  1382. if (pm3fb_try_memory_timings(l_fb_info) == pm3fb_timing_problem)
  1383. return(0);
  1384. }
  1385. return (memsize);
  1386. }
  1387. static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc)
  1388. {
  1389. int i;
  1390. DTRACE;
  1391. for (i = 0; i < (l_fb_info->fb_size / sizeof(u32)) ; i++) /* clear entire FB memory to black */
  1392. {
  1393. fb_writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
  1394. }
  1395. }
  1396. static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b)
  1397. {
  1398. int i;
  1399. DTRACE;
  1400. for (i = 0; i < 256 ; i++) /* fill color map with white */
  1401. pm3fb_set_color(l_fb_info, i, r, g, b);
  1402. }
  1403. /* common initialisation */
  1404. static void pm3fb_common_init(struct pm3fb_info *l_fb_info)
  1405. {
  1406. DTRACE;
  1407. DPRINTK(2, "Initializing board #%ld @ %lx\n", l_fb_info->board_num,
  1408. (unsigned long) l_fb_info);
  1409. strcpy(l_fb_info->gen.info.modename, permedia3_name);
  1410. disp[l_fb_info->board_num].scrollmode = 0; /* SCROLL_YNOMOVE; *//* 0 means "let fbcon choose" */
  1411. l_fb_info->gen.parsize = sizeof(struct pm3fb_par);
  1412. l_fb_info->gen.info.changevar = NULL;
  1413. l_fb_info->gen.info.fbops = &pm3fb_ops;
  1414. l_fb_info->gen.info.disp = &(disp[l_fb_info->board_num]);
  1415. if (fontn[l_fb_info->board_num][0])
  1416. strcpy(l_fb_info->gen.info.fontname,
  1417. fontn[l_fb_info->board_num]);
  1418. l_fb_info->gen.info.switch_con = &fbgen_switch;
  1419. l_fb_info->gen.info.updatevar = &fbgen_update_var; /* */
  1420. l_fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
  1421. pm3fb_mapIO(l_fb_info);
  1422. pm3fb_clear_memory(l_fb_info, 0);
  1423. pm3fb_clear_colormap(l_fb_info, 0, 0, 0);
  1424. (void) fbgen_get_var(&(disp[l_fb_info->board_num]).var, -1,
  1425. &l_fb_info->gen.info);
  1426. if (depth[l_fb_info->board_num]) /* override mode-defined depth */
  1427. {
  1428. pm3fb_encode_depth(&(disp[l_fb_info->board_num]).var, depth[l_fb_info->board_num]);
  1429. (disp[l_fb_info->board_num]).var.bits_per_pixel = depth2bpp(depth[l_fb_info->board_num]);
  1430. }
  1431. (void) fbgen_do_set_var(&(disp[l_fb_info->board_num]).var, 1,
  1432. &l_fb_info->gen);
  1433. fbgen_set_disp(-1, &l_fb_info->gen);
  1434. do_install_cmap(0, &l_fb_info->gen.info);
  1435. if (register_framebuffer(&l_fb_info->gen.info) < 0) {
  1436. DPRINTK(1, "Couldn't register framebuffer\n");
  1437. return;
  1438. }
  1439. PM3_WRITE_DAC_REG(PM3RD_CursorMode,
  1440. PM3RD_CursorMode_CURSOR_DISABLE);
  1441. PM3_SHOW_CUR_MODE;
  1442. pm3fb_write_mode(l_fb_info);
  1443. printk("fb%d: %s, using %uK of video memory (%s)\n",
  1444. l_fb_info->gen.info.node,
  1445. permedia3_name, (u32) (l_fb_info->fb_size >> 10),
  1446. cardbase[l_fb_info->board_type].cardname);
  1447. }
  1448. /* **************************************************** */
  1449. /* ***** accelerated permedia3-specific functions ***** */
  1450. /* **************************************************** */
  1451. #ifdef PM3FB_USE_ACCEL
  1452. static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info)
  1453. {
  1454. DTRACE;
  1455. PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
  1456. PM3_SLOW_WRITE_REG(PM3Sync, 0);
  1457. mb();
  1458. do {
  1459. while ((PM3_READ_REG(PM3OutFIFOWords)) == 0);
  1460. rmb();
  1461. } while ((PM3_READ_REG(PM3OutputFifo)) != PM3Sync_Tag);
  1462. }
  1463. static void pm3fb_init_engine(struct pm3fb_info *l_fb_info)
  1464. {
  1465. PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
  1466. PM3_SLOW_WRITE_REG(PM3StatisticMode, 0x0);
  1467. PM3_SLOW_WRITE_REG(PM3DeltaMode, 0x0);
  1468. PM3_SLOW_WRITE_REG(PM3RasterizerMode, 0x0);
  1469. PM3_SLOW_WRITE_REG(PM3ScissorMode, 0x0);
  1470. PM3_SLOW_WRITE_REG(PM3LineStippleMode, 0x0);
  1471. PM3_SLOW_WRITE_REG(PM3AreaStippleMode, 0x0);
  1472. PM3_SLOW_WRITE_REG(PM3GIDMode, 0x0);
  1473. PM3_SLOW_WRITE_REG(PM3DepthMode, 0x0);
  1474. PM3_SLOW_WRITE_REG(PM3StencilMode, 0x0);
  1475. PM3_SLOW_WRITE_REG(PM3StencilData, 0x0);
  1476. PM3_SLOW_WRITE_REG(PM3ColorDDAMode, 0x0);
  1477. PM3_SLOW_WRITE_REG(PM3TextureCoordMode, 0x0);
  1478. PM3_SLOW_WRITE_REG(PM3TextureIndexMode0, 0x0);
  1479. PM3_SLOW_WRITE_REG(PM3TextureIndexMode1, 0x0);
  1480. PM3_SLOW_WRITE_REG(PM3TextureReadMode, 0x0);
  1481. PM3_SLOW_WRITE_REG(PM3LUTMode, 0x0);
  1482. PM3_SLOW_WRITE_REG(PM3TextureFilterMode, 0x0);
  1483. PM3_SLOW_WRITE_REG(PM3TextureCompositeMode, 0x0);
  1484. PM3_SLOW_WRITE_REG(PM3TextureApplicationMode, 0x0);
  1485. PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode1, 0x0);
  1486. PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode1, 0x0);
  1487. PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode0, 0x0);
  1488. PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode0, 0x0);
  1489. PM3_SLOW_WRITE_REG(PM3FogMode, 0x0);
  1490. PM3_SLOW_WRITE_REG(PM3ChromaTestMode, 0x0);
  1491. PM3_SLOW_WRITE_REG(PM3AlphaTestMode, 0x0);
  1492. PM3_SLOW_WRITE_REG(PM3AntialiasMode, 0x0);
  1493. PM3_SLOW_WRITE_REG(PM3YUVMode, 0x0);
  1494. PM3_SLOW_WRITE_REG(PM3AlphaBlendColorMode, 0x0);
  1495. PM3_SLOW_WRITE_REG(PM3AlphaBlendAlphaMode, 0x0);
  1496. PM3_SLOW_WRITE_REG(PM3DitherMode, 0x0);
  1497. PM3_SLOW_WRITE_REG(PM3LogicalOpMode, 0x0);
  1498. PM3_SLOW_WRITE_REG(PM3RouterMode, 0x0);
  1499. PM3_SLOW_WRITE_REG(PM3Window, 0x0);
  1500. PM3_SLOW_WRITE_REG(PM3Config2D, 0x0);
  1501. PM3_SLOW_WRITE_REG(PM3SpanColorMask, 0xffffffff);
  1502. PM3_SLOW_WRITE_REG(PM3XBias, 0x0);
  1503. PM3_SLOW_WRITE_REG(PM3YBias, 0x0);
  1504. PM3_SLOW_WRITE_REG(PM3DeltaControl, 0x0);
  1505. PM3_SLOW_WRITE_REG(PM3BitMaskPattern, 0xffffffff);
  1506. PM3_SLOW_WRITE_REG(PM3FBDestReadEnables,
  1507. PM3FBDestReadEnables_E(0xff) |
  1508. PM3FBDestReadEnables_R(0xff) |
  1509. PM3FBDestReadEnables_ReferenceAlpha(0xff));
  1510. PM3_SLOW_WRITE_REG(PM3FBDestReadBufferAddr0, 0x0);
  1511. PM3_SLOW_WRITE_REG(PM3FBDestReadBufferOffset0, 0x0);
  1512. PM3_SLOW_WRITE_REG(PM3FBDestReadBufferWidth0,
  1513. PM3FBDestReadBufferWidth_Width(l_fb_info->
  1514. current_par->
  1515. width));
  1516. PM3_SLOW_WRITE_REG(PM3FBDestReadMode,
  1517. PM3FBDestReadMode_ReadEnable |
  1518. PM3FBDestReadMode_Enable0);
  1519. PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferAddr, 0x0);
  1520. PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferOffset, 0x0);
  1521. PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferWidth,
  1522. PM3FBSourceReadBufferWidth_Width(l_fb_info->
  1523. current_par->
  1524. width));
  1525. PM3_SLOW_WRITE_REG(PM3FBSourceReadMode,
  1526. PM3FBSourceReadMode_Blocking |
  1527. PM3FBSourceReadMode_ReadEnable);
  1528. {
  1529. unsigned long rm = 1;
  1530. switch (l_fb_info->current_par->depth) {
  1531. case 8:
  1532. PM3_SLOW_WRITE_REG(PM3PixelSize,
  1533. PM3PixelSize_GLOBAL_8BIT);
  1534. break;
  1535. case 12:
  1536. case 15:
  1537. case 16:
  1538. PM3_SLOW_WRITE_REG(PM3PixelSize,
  1539. PM3PixelSize_GLOBAL_16BIT);
  1540. break;
  1541. case 32:
  1542. PM3_SLOW_WRITE_REG(PM3PixelSize,
  1543. PM3PixelSize_GLOBAL_32BIT);
  1544. break;
  1545. default:
  1546. DPRINTK(1, "Unsupported depth %d\n",
  1547. l_fb_info->current_par->depth);
  1548. break;
  1549. }
  1550. PM3_SLOW_WRITE_REG(PM3RasterizerMode, rm);
  1551. }
  1552. PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xffffffff);
  1553. PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xffffffff);
  1554. PM3_SLOW_WRITE_REG(PM3FBWriteMode,
  1555. PM3FBWriteMode_WriteEnable |
  1556. PM3FBWriteMode_OpaqueSpan |
  1557. PM3FBWriteMode_Enable0);
  1558. PM3_SLOW_WRITE_REG(PM3FBWriteBufferAddr0, 0x0);
  1559. PM3_SLOW_WRITE_REG(PM3FBWriteBufferOffset0, 0x0);
  1560. PM3_SLOW_WRITE_REG(PM3FBWriteBufferWidth0,
  1561. PM3FBWriteBufferWidth_Width(l_fb_info->
  1562. current_par->
  1563. width));
  1564. PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 0x0);
  1565. {
  1566. unsigned long sofb = (8UL * l_fb_info->fb_size) /
  1567. ((depth2bpp(l_fb_info->current_par->depth))
  1568. * l_fb_info->current_par->width); /* size in lines of FB */
  1569. if (sofb > 4095)
  1570. PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 4095);
  1571. else
  1572. PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, sofb);
  1573. switch (l_fb_info->current_par->depth) {
  1574. case 8:
  1575. PM3_SLOW_WRITE_REG(PM3DitherMode,
  1576. (1 << 10) | (2 << 3));
  1577. break;
  1578. case 12:
  1579. case 15:
  1580. case 16:
  1581. PM3_SLOW_WRITE_REG(PM3DitherMode,
  1582. (1 << 10) | (1 << 3));
  1583. break;
  1584. case 32:
  1585. PM3_SLOW_WRITE_REG(PM3DitherMode,
  1586. (1 << 10) | (0 << 3));
  1587. break;
  1588. default:
  1589. DPRINTK(1, "Unsupported depth %d\n",
  1590. l_fb_info->current_par->depth);
  1591. break;
  1592. }
  1593. }
  1594. PM3_SLOW_WRITE_REG(PM3dXDom, 0x0);
  1595. PM3_SLOW_WRITE_REG(PM3dXSub, 0x0);
  1596. PM3_SLOW_WRITE_REG(PM3dY, (1 << 16));
  1597. PM3_SLOW_WRITE_REG(PM3StartXDom, 0x0);
  1598. PM3_SLOW_WRITE_REG(PM3StartXSub, 0x0);
  1599. PM3_SLOW_WRITE_REG(PM3StartY, 0x0);
  1600. PM3_SLOW_WRITE_REG(PM3Count, 0x0);
  1601. /* Disable LocalBuffer. better safe than sorry */
  1602. PM3_SLOW_WRITE_REG(PM3LBDestReadMode, 0x0);
  1603. PM3_SLOW_WRITE_REG(PM3LBDestReadEnables, 0x0);
  1604. PM3_SLOW_WRITE_REG(PM3LBSourceReadMode, 0x0);
  1605. PM3_SLOW_WRITE_REG(PM3LBWriteMode, 0x0);
  1606. pm3fb_wait_pm3(l_fb_info);
  1607. }
  1608. #ifdef FBCON_HAS_CFB32
  1609. static void pm3fb_cfb32_clear(struct vc_data *conp,
  1610. struct display *p,
  1611. int sy, int sx, int height, int width)
  1612. {
  1613. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  1614. u32 c;
  1615. DTRACE;
  1616. sx = sx * fontwidth(p);
  1617. width = width * fontwidth(p);
  1618. sy = sy * fontheight(p);
  1619. height = height * fontheight(p);
  1620. c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
  1621. /* block fills in 32bpp are hard, but in low res (width <= 1600 :-)
  1622. we can use 16bpp operations, but not if NoWriteMask is on (SDRAM) */
  1623. if ((l_fb_info->current_par->width > 1600) ||
  1624. (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)) {
  1625. PM3_WAIT(4);
  1626. PM3_WRITE_REG(PM3Config2D,
  1627. PM3Config2D_UseConstantSource |
  1628. PM3Config2D_ForegroundROPEnable |
  1629. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1630. PM3Config2D_FBWriteEnable);
  1631. PM3_WRITE_REG(PM3ForegroundColor, c);
  1632. PM3_WRITE_REG(PM3RectanglePosition,
  1633. (PM3RectanglePosition_XOffset(sx)) |
  1634. (PM3RectanglePosition_YOffset(sy)));
  1635. PM3_WRITE_REG(PM3Render2D,
  1636. PM3Render2D_XPositive |
  1637. PM3Render2D_YPositive |
  1638. PM3Render2D_Operation_Normal |
  1639. PM3Render2D_SpanOperation |
  1640. (PM3Render2D_Width(width)) |
  1641. (PM3Render2D_Height(height)));
  1642. } else {
  1643. PM3_WAIT(8);
  1644. PM3_WRITE_REG(PM3FBBlockColor, c);
  1645. PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_16BIT);
  1646. PM3_WRITE_REG(PM3FBWriteBufferWidth0,
  1647. PM3FBWriteBufferWidth_Width(l_fb_info->
  1648. current_par->
  1649. width << 1));
  1650. PM3_WRITE_REG(PM3Config2D,
  1651. PM3Config2D_UseConstantSource |
  1652. PM3Config2D_ForegroundROPEnable |
  1653. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1654. PM3Config2D_FBWriteEnable);
  1655. PM3_WRITE_REG(PM3RectanglePosition,
  1656. (PM3RectanglePosition_XOffset(sx << 1)) |
  1657. (PM3RectanglePosition_YOffset(sy)));
  1658. PM3_WRITE_REG(PM3Render2D,
  1659. PM3Render2D_XPositive |
  1660. PM3Render2D_YPositive |
  1661. PM3Render2D_Operation_Normal |
  1662. (PM3Render2D_Width(width << 1)) |
  1663. (PM3Render2D_Height(height)));
  1664. PM3_WRITE_REG(PM3FBWriteBufferWidth0,
  1665. PM3FBWriteBufferWidth_Width(l_fb_info->
  1666. current_par->
  1667. width));
  1668. PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_32BIT);
  1669. }
  1670. pm3fb_wait_pm3(l_fb_info);
  1671. }
  1672. static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
  1673. struct display *p, int bottom_only)
  1674. {
  1675. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  1676. int sx, sy;
  1677. u32 c;
  1678. DTRACE;
  1679. sx = conp->vc_cols * fontwidth(p); /* right margin */
  1680. sy = conp->vc_rows * fontheight(p); /* bottom margin */
  1681. c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
  1682. if (!bottom_only) { /* right margin top->bottom */
  1683. PM3_WAIT(4);
  1684. PM3_WRITE_REG(PM3Config2D,
  1685. PM3Config2D_UseConstantSource |
  1686. PM3Config2D_ForegroundROPEnable |
  1687. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1688. PM3Config2D_FBWriteEnable);
  1689. PM3_WRITE_REG(PM3ForegroundColor, c);
  1690. PM3_WRITE_REG(PM3RectanglePosition,
  1691. (PM3RectanglePosition_XOffset
  1692. (p->var.xoffset +
  1693. sx)) | (PM3RectanglePosition_YOffset(p->
  1694. var.
  1695. yoffset)));
  1696. PM3_WRITE_REG(PM3Render2D,
  1697. PM3Render2D_XPositive |
  1698. PM3Render2D_YPositive |
  1699. PM3Render2D_Operation_Normal |
  1700. PM3Render2D_SpanOperation |
  1701. (PM3Render2D_Width(p->var.xres - sx)) |
  1702. (PM3Render2D_Height(p->var.yres)));
  1703. }
  1704. /* bottom margin left -> right */
  1705. PM3_WAIT(4);
  1706. PM3_WRITE_REG(PM3Config2D,
  1707. PM3Config2D_UseConstantSource |
  1708. PM3Config2D_ForegroundROPEnable |
  1709. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1710. PM3Config2D_FBWriteEnable);
  1711. PM3_WRITE_REG(PM3ForegroundColor, c);
  1712. PM3_WRITE_REG(PM3RectanglePosition,
  1713. (PM3RectanglePosition_XOffset(p->var.xoffset)) |
  1714. (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
  1715. PM3_WRITE_REG(PM3Render2D,
  1716. PM3Render2D_XPositive |
  1717. PM3Render2D_YPositive |
  1718. PM3Render2D_Operation_Normal |
  1719. PM3Render2D_SpanOperation |
  1720. (PM3Render2D_Width(p->var.xres)) |
  1721. (PM3Render2D_Height(p->var.yres - sy)));
  1722. pm3fb_wait_pm3(l_fb_info);
  1723. }
  1724. #endif /* FBCON_HAS_CFB32 */
  1725. #ifdef FBCON_HAS_CFB16
  1726. static void pm3fb_cfb16_clear(struct vc_data *conp,
  1727. struct display *p,
  1728. int sy, int sx, int height, int width)
  1729. {
  1730. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  1731. u32 c;
  1732. DTRACE;
  1733. sx = sx * fontwidth(p);
  1734. width = width * fontwidth(p);
  1735. sy = sy * fontheight(p);
  1736. height = height * fontheight(p);
  1737. c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
  1738. c = c | (c << 16);
  1739. PM3_WAIT(4);
  1740. if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
  1741. PM3_WRITE_REG(PM3ForegroundColor, c);
  1742. else
  1743. PM3_WRITE_REG(PM3FBBlockColor, c);
  1744. PM3_WRITE_REG(PM3Config2D,
  1745. PM3Config2D_UseConstantSource |
  1746. PM3Config2D_ForegroundROPEnable |
  1747. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1748. PM3Config2D_FBWriteEnable);
  1749. PM3_WRITE_REG(PM3RectanglePosition,
  1750. (PM3RectanglePosition_XOffset(sx)) |
  1751. (PM3RectanglePosition_YOffset(sy)));
  1752. if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
  1753. PM3_WRITE_REG(PM3Render2D,
  1754. PM3Render2D_XPositive |
  1755. PM3Render2D_YPositive |
  1756. PM3Render2D_Operation_Normal |
  1757. PM3Render2D_SpanOperation |
  1758. (PM3Render2D_Width(width)) |
  1759. (PM3Render2D_Height(height)));
  1760. else
  1761. PM3_WRITE_REG(PM3Render2D,
  1762. PM3Render2D_XPositive |
  1763. PM3Render2D_YPositive |
  1764. PM3Render2D_Operation_Normal |
  1765. (PM3Render2D_Width(width)) |
  1766. (PM3Render2D_Height(height)));
  1767. pm3fb_wait_pm3(l_fb_info);
  1768. }
  1769. static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
  1770. struct display *p, int bottom_only)
  1771. {
  1772. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  1773. int sx, sy;
  1774. u32 c;
  1775. DTRACE;
  1776. sx = conp->vc_cols * fontwidth(p); /* right margin */
  1777. sy = conp->vc_rows * fontheight(p); /* bottom margin */
  1778. c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
  1779. c = c | (c << 16);
  1780. if (!bottom_only) { /* right margin top->bottom */
  1781. PM3_WAIT(4);
  1782. PM3_WRITE_REG(PM3Config2D,
  1783. PM3Config2D_UseConstantSource |
  1784. PM3Config2D_ForegroundROPEnable |
  1785. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1786. PM3Config2D_FBWriteEnable);
  1787. if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
  1788. PM3_WRITE_REG(PM3ForegroundColor, c);
  1789. else
  1790. PM3_WRITE_REG(PM3FBBlockColor, c);
  1791. PM3_WRITE_REG(PM3RectanglePosition,
  1792. (PM3RectanglePosition_XOffset
  1793. (p->var.xoffset +
  1794. sx)) | (PM3RectanglePosition_YOffset(p->
  1795. var.
  1796. yoffset)));
  1797. if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
  1798. PM3_WRITE_REG(PM3Render2D,
  1799. PM3Render2D_XPositive |
  1800. PM3Render2D_YPositive |
  1801. PM3Render2D_Operation_Normal |
  1802. PM3Render2D_SpanOperation |
  1803. (PM3Render2D_Width(p->var.xres - sx)) |
  1804. (PM3Render2D_Height(p->var.yres)));
  1805. else
  1806. PM3_WRITE_REG(PM3Render2D,
  1807. PM3Render2D_XPositive |
  1808. PM3Render2D_YPositive |
  1809. PM3Render2D_Operation_Normal |
  1810. (PM3Render2D_Width(p->var.xres - sx)) |
  1811. (PM3Render2D_Height(p->var.yres)));
  1812. }
  1813. /* bottom margin left -> right */
  1814. PM3_WAIT(4);
  1815. PM3_WRITE_REG(PM3Config2D,
  1816. PM3Config2D_UseConstantSource |
  1817. PM3Config2D_ForegroundROPEnable |
  1818. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1819. PM3Config2D_FBWriteEnable);
  1820. if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
  1821. PM3_WRITE_REG(PM3ForegroundColor, c);
  1822. else
  1823. PM3_WRITE_REG(PM3FBBlockColor, c);
  1824. PM3_WRITE_REG(PM3RectanglePosition,
  1825. (PM3RectanglePosition_XOffset(p->var.xoffset)) |
  1826. (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
  1827. if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
  1828. PM3_WRITE_REG(PM3Render2D,
  1829. PM3Render2D_XPositive |
  1830. PM3Render2D_YPositive |
  1831. PM3Render2D_Operation_Normal |
  1832. PM3Render2D_SpanOperation |
  1833. (PM3Render2D_Width(p->var.xres)) |
  1834. (PM3Render2D_Height(p->var.yres - sy)));
  1835. else
  1836. PM3_WRITE_REG(PM3Render2D,
  1837. PM3Render2D_XPositive |
  1838. PM3Render2D_YPositive |
  1839. PM3Render2D_Operation_Normal |
  1840. (PM3Render2D_Width(p->var.xres)) |
  1841. (PM3Render2D_Height(p->var.yres - sy)));
  1842. pm3fb_wait_pm3(l_fb_info);
  1843. }
  1844. #endif /* FBCON_HAS_CFB16 */
  1845. #ifdef FBCON_HAS_CFB8
  1846. static void pm3fb_cfb8_clear(struct vc_data *conp,
  1847. struct display *p,
  1848. int sy, int sx, int height, int width)
  1849. {
  1850. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  1851. u32 c;
  1852. DTRACE;
  1853. sx = sx * fontwidth(p);
  1854. width = width * fontwidth(p);
  1855. sy = sy * fontheight(p);
  1856. height = height * fontheight(p);
  1857. c = attr_bgcol_ec(p, conp);
  1858. c |= c << 8;
  1859. c |= c << 16;
  1860. PM3_WAIT(4);
  1861. PM3_WRITE_REG(PM3Config2D,
  1862. PM3Config2D_UseConstantSource |
  1863. PM3Config2D_ForegroundROPEnable |
  1864. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1865. PM3Config2D_FBWriteEnable);
  1866. PM3_WRITE_REG(PM3ForegroundColor, c);
  1867. PM3_WRITE_REG(PM3RectanglePosition,
  1868. (PM3RectanglePosition_XOffset(sx)) |
  1869. (PM3RectanglePosition_YOffset(sy)));
  1870. PM3_WRITE_REG(PM3Render2D,
  1871. PM3Render2D_XPositive |
  1872. PM3Render2D_YPositive |
  1873. PM3Render2D_Operation_Normal |
  1874. PM3Render2D_SpanOperation |
  1875. (PM3Render2D_Width(width)) |
  1876. (PM3Render2D_Height(height)));
  1877. pm3fb_wait_pm3(l_fb_info);
  1878. }
  1879. static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
  1880. struct display *p, int bottom_only)
  1881. {
  1882. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  1883. int sx, sy;
  1884. u32 c;
  1885. DTRACE;
  1886. sx = conp->vc_cols * fontwidth(p); /* right margin */
  1887. sy = conp->vc_rows * fontheight(p); /* bottom margin */
  1888. c = attr_bgcol_ec(p, conp);
  1889. c |= c << 8;
  1890. c |= c << 16;
  1891. if (!bottom_only) { /* right margin top->bottom */
  1892. PM3_WAIT(4);
  1893. PM3_WRITE_REG(PM3Config2D,
  1894. PM3Config2D_UseConstantSource |
  1895. PM3Config2D_ForegroundROPEnable |
  1896. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1897. PM3Config2D_FBWriteEnable);
  1898. PM3_WRITE_REG(PM3ForegroundColor, c);
  1899. PM3_WRITE_REG(PM3RectanglePosition,
  1900. (PM3RectanglePosition_XOffset
  1901. (p->var.xoffset +
  1902. sx)) | (PM3RectanglePosition_YOffset(p->
  1903. var.
  1904. yoffset)));
  1905. PM3_WRITE_REG(PM3Render2D,
  1906. PM3Render2D_XPositive |
  1907. PM3Render2D_YPositive |
  1908. PM3Render2D_Operation_Normal |
  1909. PM3Render2D_SpanOperation |
  1910. (PM3Render2D_Width(p->var.xres - sx)) |
  1911. (PM3Render2D_Height(p->var.yres)));
  1912. }
  1913. /* bottom margin left -> right */
  1914. PM3_WAIT(4);
  1915. PM3_WRITE_REG(PM3Config2D,
  1916. PM3Config2D_UseConstantSource |
  1917. PM3Config2D_ForegroundROPEnable |
  1918. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1919. PM3Config2D_FBWriteEnable);
  1920. PM3_WRITE_REG(PM3ForegroundColor, c);
  1921. PM3_WRITE_REG(PM3RectanglePosition,
  1922. (PM3RectanglePosition_XOffset(p->var.xoffset)) |
  1923. (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
  1924. PM3_WRITE_REG(PM3Render2D,
  1925. PM3Render2D_XPositive |
  1926. PM3Render2D_YPositive |
  1927. PM3Render2D_Operation_Normal |
  1928. PM3Render2D_SpanOperation |
  1929. (PM3Render2D_Width(p->var.xres)) |
  1930. (PM3Render2D_Height(p->var.yres - sy)));
  1931. pm3fb_wait_pm3(l_fb_info);
  1932. }
  1933. #endif /* FBCON_HAS_CFB8 */
  1934. #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
  1935. static void pm3fb_cfbX_bmove(struct display *p,
  1936. int sy, int sx,
  1937. int dy, int dx, int height, int width)
  1938. {
  1939. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  1940. int x_align, o_x, o_y;
  1941. DTRACE;
  1942. sx = sx * fontwidth(p);
  1943. dx = dx * fontwidth(p);
  1944. width = width * fontwidth(p);
  1945. sy = sy * fontheight(p);
  1946. dy = dy * fontheight(p);
  1947. height = height * fontheight(p);
  1948. o_x = sx - dx; /*(sx > dx ) ? (sx - dx) : (dx - sx); */
  1949. o_y = sy - dy; /*(sy > dy ) ? (sy - dy) : (dy - sy); */
  1950. x_align = (sx & 0x1f);
  1951. PM3_WAIT(6);
  1952. PM3_WRITE_REG(PM3Config2D,
  1953. PM3Config2D_UserScissorEnable |
  1954. PM3Config2D_ForegroundROPEnable |
  1955. PM3Config2D_Blocking |
  1956. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  1957. PM3Config2D_FBWriteEnable);
  1958. PM3_WRITE_REG(PM3ScissorMinXY,
  1959. ((dy & 0x0fff) << 16) | (dx & 0x0fff));
  1960. PM3_WRITE_REG(PM3ScissorMaxXY,
  1961. (((dy + height) & 0x0fff) << 16) |
  1962. ((dx + width) & 0x0fff));
  1963. PM3_WRITE_REG(PM3FBSourceReadBufferOffset,
  1964. PM3FBSourceReadBufferOffset_XOffset(o_x) |
  1965. PM3FBSourceReadBufferOffset_YOffset(o_y));
  1966. PM3_WRITE_REG(PM3RectanglePosition,
  1967. (PM3RectanglePosition_XOffset(dx - x_align)) |
  1968. (PM3RectanglePosition_YOffset(dy)));
  1969. PM3_WRITE_REG(PM3Render2D,
  1970. ((sx > dx) ? PM3Render2D_XPositive : 0) |
  1971. ((sy > dy) ? PM3Render2D_YPositive : 0) |
  1972. PM3Render2D_Operation_Normal |
  1973. PM3Render2D_SpanOperation |
  1974. PM3Render2D_FBSourceReadEnable |
  1975. (PM3Render2D_Width(width + x_align)) |
  1976. (PM3Render2D_Height(height)));
  1977. pm3fb_wait_pm3(l_fb_info);
  1978. }
  1979. static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
  1980. int c, int yy, int xx)
  1981. {
  1982. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  1983. u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
  1984. u32 fgx, bgx, ldat;
  1985. int sx, sy, i;
  1986. DTRACE;
  1987. if (l_fb_info->current_par->depth == 8)
  1988. fgx = attr_fgcol(p, c);
  1989. else if (depth2bpp(l_fb_info->current_par->depth) == 16)
  1990. fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, c)];
  1991. else
  1992. fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, c)];
  1993. PM3_COLOR(fgx);
  1994. if (l_fb_info->current_par->depth == 8)
  1995. bgx = attr_bgcol(p, c);
  1996. else if (depth2bpp(l_fb_info->current_par->depth) == 16)
  1997. bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, c)];
  1998. else
  1999. bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, c)];
  2000. PM3_COLOR(bgx);
  2001. PM3_WAIT(4);
  2002. PM3_WRITE_REG(PM3Config2D,
  2003. PM3Config2D_UseConstantSource |
  2004. PM3Config2D_ForegroundROPEnable |
  2005. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  2006. PM3Config2D_FBWriteEnable | PM3Config2D_OpaqueSpan);
  2007. PM3_WRITE_REG(PM3ForegroundColor, fgx);
  2008. PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
  2009. /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
  2010. /* and 16 bits for fontwidth <= 16 */
  2011. /* same in _putcs, same for Y and fontheight */
  2012. if (fontwidth(p) <= 8)
  2013. asx = 2;
  2014. else if (fontwidth(p) <= 16)
  2015. asx = 3; /* look OK */
  2016. if (fontheight(p) <= 8)
  2017. asy = 2;
  2018. else if (fontheight(p) <= 16)
  2019. asy = 3; /* look OK */
  2020. else if (fontheight(p) <= 32)
  2021. asy = 4; /* look OK */
  2022. sx = xx * fontwidth(p);
  2023. sy = yy * fontheight(p);
  2024. if (fontwidth(p) <= 8)
  2025. o_x = (8 - (sx & 0x7)) & 0x7;
  2026. else if (fontwidth(p) <= 16)
  2027. o_x = (16 - (sx & 0xF)) & 0xF;
  2028. if (fontheight(p) <= 8)
  2029. o_y = (8 - (sy & 0x7)) & 0x7;
  2030. else if (fontheight(p) <= 16)
  2031. o_y = (16 - (sy & 0xF)) & 0xF;
  2032. else if (fontheight(p) <= 32)
  2033. o_y = (32 - (sy & 0x1F)) & 0x1F;
  2034. PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
  2035. (1 << 18) | /* BE */
  2036. 1 | (asx << 1) | (asy << 4) | /* address select x/y */
  2037. (1 << 20)); /* OpaqueSpan */
  2038. if (fontwidth(p) <= 8) {
  2039. cdat = p->fontdata + (c & p->charmask) * fontheight(p);
  2040. } else {
  2041. cdat =
  2042. p->fontdata +
  2043. ((c & p->charmask) * (fontheight(p) << 1));
  2044. }
  2045. PM3_WAIT(2 + fontheight(p));
  2046. for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
  2047. if (fontwidth(p) <= 8) {
  2048. ldat = *cdat++;
  2049. } else { /* assume fontwidth <= 16 ATM */
  2050. ldat = ((*cdat++) << 8);
  2051. ldat |= *cdat++;
  2052. }
  2053. PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
  2054. }
  2055. PM3_WRITE_REG(PM3RectanglePosition,
  2056. (PM3RectanglePosition_XOffset(sx)) |
  2057. (PM3RectanglePosition_YOffset(sy)));
  2058. PM3_WRITE_REG(PM3Render2D,
  2059. PM3Render2D_AreaStippleEnable |
  2060. PM3Render2D_XPositive |
  2061. PM3Render2D_YPositive |
  2062. PM3Render2D_Operation_Normal |
  2063. PM3Render2D_SpanOperation |
  2064. (PM3Render2D_Width(fontwidth(p))) |
  2065. (PM3Render2D_Height(fontheight(p))));
  2066. pm3fb_wait_pm3(l_fb_info);
  2067. }
  2068. static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
  2069. const unsigned short *s, int count, int yy,
  2070. int xx)
  2071. {
  2072. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  2073. u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
  2074. u32 fgx, bgx, ldat;
  2075. int sx, sy, i, j;
  2076. u16 sc;
  2077. DTRACE;
  2078. sc = scr_readw(s);
  2079. if (l_fb_info->current_par->depth == 8)
  2080. fgx = attr_fgcol(p, sc);
  2081. else if (depth2bpp(l_fb_info->current_par->depth) == 16)
  2082. fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, sc)];
  2083. else
  2084. fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, sc)];
  2085. PM3_COLOR(fgx);
  2086. if (l_fb_info->current_par->depth == 8)
  2087. bgx = attr_bgcol(p, sc);
  2088. else if (depth2bpp(l_fb_info->current_par->depth) == 16)
  2089. bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, sc)];
  2090. else
  2091. bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, sc)];
  2092. PM3_COLOR(bgx);
  2093. PM3_WAIT(4);
  2094. PM3_WRITE_REG(PM3Config2D,
  2095. PM3Config2D_UseConstantSource |
  2096. PM3Config2D_ForegroundROPEnable |
  2097. (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
  2098. PM3Config2D_FBWriteEnable |
  2099. PM3Config2D_OpaqueSpan);
  2100. PM3_WRITE_REG(PM3ForegroundColor, fgx);
  2101. PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
  2102. /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
  2103. /* and 16 bits for fontwidth <= 16 */
  2104. /* same in _putc, same for Y and fontheight */
  2105. if (fontwidth(p) <= 8)
  2106. asx = 2;
  2107. else if (fontwidth(p) <= 16)
  2108. asx = 3; /* look OK */
  2109. if (fontheight(p) <= 8)
  2110. asy = 2;
  2111. else if (fontheight(p) <= 16)
  2112. asy = 3; /* look OK */
  2113. else if (fontheight(p) <= 32)
  2114. asy = 4; /* look OK */
  2115. sy = yy * fontheight(p);
  2116. if (fontheight(p) <= 8)
  2117. o_y = (8 - (sy & 0x7)) & 0x7;
  2118. else if (fontheight(p) <= 16)
  2119. o_y = (16 - (sy & 0xF)) & 0xF;
  2120. else if (fontheight(p) <= 32)
  2121. o_y = (32 - (sy & 0x1F)) & 0x1F;
  2122. for (j = 0; j < count; j++) {
  2123. sc = scr_readw(s + j);
  2124. if (fontwidth(p) <= 8)
  2125. cdat = p->fontdata +
  2126. (sc & p->charmask) * fontheight(p);
  2127. else
  2128. cdat = p->fontdata +
  2129. ((sc & p->charmask) * fontheight(p) << 1);
  2130. sx = (xx + j) * fontwidth(p);
  2131. if (fontwidth(p) <= 8)
  2132. o_x = (8 - (sx & 0x7)) & 0x7;
  2133. else if (fontwidth(p) <= 16)
  2134. o_x = (16 - (sx & 0xF)) & 0xF;
  2135. PM3_WAIT(3 + fontheight(p));
  2136. PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
  2137. (1 << 18) | /* BE */
  2138. 1 | (asx << 1) | (asy << 4) | /* address select x/y */
  2139. (1 << 20)); /* OpaqueSpan */
  2140. for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
  2141. if (fontwidth(p) <= 8) {
  2142. ldat = *cdat++;
  2143. } else { /* assume fontwidth <= 16 ATM */
  2144. ldat = ((*cdat++) << 8);
  2145. ldat |= *cdat++;
  2146. }
  2147. PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
  2148. }
  2149. PM3_WRITE_REG(PM3RectanglePosition,
  2150. (PM3RectanglePosition_XOffset(sx)) |
  2151. (PM3RectanglePosition_YOffset(sy)));
  2152. PM3_WRITE_REG(PM3Render2D,
  2153. PM3Render2D_AreaStippleEnable |
  2154. PM3Render2D_XPositive |
  2155. PM3Render2D_YPositive |
  2156. PM3Render2D_Operation_Normal |
  2157. PM3Render2D_SpanOperation |
  2158. (PM3Render2D_Width(fontwidth(p))) |
  2159. (PM3Render2D_Height(fontheight(p))));
  2160. }
  2161. pm3fb_wait_pm3(l_fb_info);
  2162. }
  2163. static void pm3fb_cfbX_revc(struct display *p, int xx, int yy)
  2164. {
  2165. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
  2166. xx = xx * fontwidth(p);
  2167. yy = yy * fontheight(p);
  2168. if (l_fb_info->current_par->depth == 8)
  2169. {
  2170. if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
  2171. PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0x0F0F0F0F);
  2172. else
  2173. PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0x0F0F0F0F);
  2174. }
  2175. PM3_WAIT(3);
  2176. PM3_WRITE_REG(PM3Config2D,
  2177. PM3Config2D_UseConstantSource |
  2178. PM3Config2D_ForegroundROPEnable |
  2179. (PM3Config2D_ForegroundROP(0xa)) | /* Oxa is GXinvert */
  2180. PM3Config2D_FBDestReadEnable |
  2181. PM3Config2D_FBWriteEnable);
  2182. PM3_WRITE_REG(PM3RectanglePosition,
  2183. (PM3RectanglePosition_XOffset(xx)) |
  2184. (PM3RectanglePosition_YOffset(yy)));
  2185. PM3_WRITE_REG(PM3Render2D,
  2186. PM3Render2D_XPositive |
  2187. PM3Render2D_YPositive |
  2188. PM3Render2D_Operation_Normal |
  2189. PM3Render2D_SpanOperation |
  2190. (PM3Render2D_Width(fontwidth(p))) |
  2191. (PM3Render2D_Height(fontheight(p))));
  2192. pm3fb_wait_pm3(l_fb_info);
  2193. if (l_fb_info->current_par->depth == 8)
  2194. {
  2195. if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
  2196. PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xFFFFFFFF);
  2197. else
  2198. PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xFFFFFFFF);
  2199. }
  2200. }
  2201. #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
  2202. #endif /* PM3FB_USE_ACCEL */
  2203. /* *********************************** */
  2204. /* ***** pre-init board(s) setup ***** */
  2205. /* *********************************** */
  2206. static void pm3fb_mode_setup(char *mode, unsigned long board_num)
  2207. {
  2208. struct pm3fb_info *l_fb_info = &(fb_info[board_num]);
  2209. struct pm3fb_par *l_fb_par = &(current_par[board_num]);
  2210. unsigned long i = 0;
  2211. current_par_valid[board_num] = 0;
  2212. if (!strncmp(mode, "current", 7)) {
  2213. l_fb_info->use_current = 1; /* default w/ OpenFirmware */
  2214. } else {
  2215. while ((mode_base[i].name[0])
  2216. && (!current_par_valid[board_num])) {
  2217. if (!
  2218. (strncmp
  2219. (mode, mode_base[i].name,
  2220. strlen(mode_base[i].name)))) {
  2221. memcpy(l_fb_par, &(mode_base[i].user_mode),
  2222. sizeof(struct pm3fb_par));
  2223. current_par_valid[board_num] = 1;
  2224. DPRINTK(2, "Mode set to %s\n",
  2225. mode_base[i].name);
  2226. }
  2227. i++;
  2228. }
  2229. DASSERT(current_par_valid[board_num],
  2230. "Valid mode on command line\n");
  2231. }
  2232. }
  2233. static void pm3fb_pciid_setup(char *pciid, unsigned long board_num)
  2234. {
  2235. short l_bus = -1, l_slot = -1, l_func = -1;
  2236. char *next;
  2237. if (pciid) {
  2238. l_bus = simple_strtoul(pciid, &next, 10);
  2239. if (next && (next[0] == ':')) {
  2240. pciid = next + 1;
  2241. l_slot = simple_strtoul(pciid, &next, 10);
  2242. if (next && (next[0] == ':')) {
  2243. pciid = next + 1;
  2244. l_func =
  2245. simple_strtoul(pciid, (char **) NULL,
  2246. 10);
  2247. }
  2248. }
  2249. } else
  2250. return;
  2251. if ((l_bus >= 0) && (l_slot >= 0) && (l_func >= 0)) {
  2252. bus[board_num] = l_bus;
  2253. slot[board_num] = l_slot;
  2254. func[board_num] = l_func;
  2255. DPRINTK(2, "Board #%ld will be PciId: %hd:%hd:%hd\n",
  2256. board_num, l_bus, l_slot, l_func);
  2257. } else {
  2258. DPRINTK(1, "Invalid PciId: %hd:%hd:%hd for board #%ld\n",
  2259. l_bus, l_slot, l_func, board_num);
  2260. }
  2261. }
  2262. static void pm3fb_font_setup(char *lf, unsigned long board_num)
  2263. {
  2264. unsigned long lfs = strlen(lf);
  2265. if (lfs > (PM3_FONTNAME_SIZE - 1)) {
  2266. DPRINTK(1, "Fontname %s too long\n", lf);
  2267. return;
  2268. }
  2269. strlcpy(fontn[board_num], lf, lfs + 1);
  2270. }
  2271. static void pm3fb_bootdepth_setup(char *bds, unsigned long board_num)
  2272. {
  2273. unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
  2274. if (!(depth_supported(bd))) {
  2275. printk(KERN_WARNING "pm3fb: ignoring invalid depth %s for board #%ld\n",
  2276. bds, board_num);
  2277. return;
  2278. }
  2279. depth[board_num] = bd;
  2280. }
  2281. static void pm3fb_forcesize_setup(char *bds, unsigned long board_num)
  2282. {
  2283. unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
  2284. if (bd > 64) {
  2285. printk(KERN_WARNING "pm3fb: ignoring invalid memory size %s for board #%ld\n",
  2286. bds, board_num);
  2287. return;
  2288. }
  2289. forcesize[board_num] = bd;
  2290. }
  2291. static char *pm3fb_boardnum_setup(char *options, unsigned long *bn)
  2292. {
  2293. char *next;
  2294. if (!(isdigit(options[0]))) {
  2295. (*bn) = 0;
  2296. return (options);
  2297. }
  2298. (*bn) = simple_strtoul(options, &next, 10);
  2299. if (next && (next[0] == ':') && ((*bn) >= 0)
  2300. && ((*bn) <= PM3_MAX_BOARD)) {
  2301. DPRINTK(2, "Board_num seen as %ld\n", (*bn));
  2302. return (next + 1);
  2303. } else {
  2304. (*bn) = 0;
  2305. DPRINTK(2, "Board_num default to %ld\n", (*bn));
  2306. return (options);
  2307. }
  2308. }
  2309. static void pm3fb_real_setup(char *options)
  2310. {
  2311. char *next;
  2312. unsigned long i, bn;
  2313. struct pm3fb_info *l_fb_info;
  2314. DTRACE;
  2315. DPRINTK(2, "Options : %s\n", options);
  2316. for (i = 0; i < PM3_MAX_BOARD; i++) {
  2317. l_fb_info = &(fb_info[i]);
  2318. memset(l_fb_info, 0, sizeof(struct pm3fb_info));
  2319. l_fb_info->gen.fbhw = &pm3fb_switch;
  2320. l_fb_info->board_num = i;
  2321. current_par_valid[i] = 0;
  2322. slot[i] = -1;
  2323. func[i] = -1;
  2324. bus[i] = -1;
  2325. disable[i] = 0;
  2326. noaccel[i] = 0;
  2327. fontn[i][0] = '\0';
  2328. depth[i] = 0;
  2329. l_fb_info->current_par = &(current_par[i]);
  2330. }
  2331. /* eat up prefix pm3fb and whatever is used as separator i.e. :,= */
  2332. if (!strncmp(options, "pm3fb", 5)) {
  2333. options += 5;
  2334. while (((*options) == ',') || ((*options) == ':')
  2335. || ((*options) == '='))
  2336. options++;
  2337. }
  2338. while (options) {
  2339. bn = 0;
  2340. if ((next = strchr(options, ','))) {
  2341. (*next) = '\0';
  2342. next++;
  2343. }
  2344. if (!strncmp(options, "mode:", 5)) {
  2345. options = pm3fb_boardnum_setup(options + 5, &bn);
  2346. DPRINTK(2, "Setting mode for board #%ld\n", bn);
  2347. pm3fb_mode_setup(options, bn);
  2348. } else if (!strncmp(options, "off:", 4)) {
  2349. options = pm3fb_boardnum_setup(options + 4, &bn);
  2350. DPRINTK(2, "Disabling board #%ld\n", bn);
  2351. disable[bn] = 1;
  2352. } else if (!strncmp(options, "off", 3)) { /* disable everything */
  2353. for (i = 0; i < PM3_MAX_BOARD; i++)
  2354. disable[i] = 1;
  2355. } else if (!strncmp(options, "disable:", 8)) {
  2356. options = pm3fb_boardnum_setup(options + 8, &bn);
  2357. DPRINTK(2, "Disabling board #%ld\n", bn);
  2358. disable[bn] = 1;
  2359. } else if (!strncmp(options, "pciid:", 6)) {
  2360. options = pm3fb_boardnum_setup(options + 6, &bn);
  2361. DPRINTK(2, "Setting PciID for board #%ld\n", bn);
  2362. pm3fb_pciid_setup(options, bn);
  2363. } else if (!strncmp(options, "noaccel:", 8)) {
  2364. options = pm3fb_boardnum_setup(options + 8, &bn);
  2365. noaccel[bn] = 1;
  2366. } else if (!strncmp(options, "font:", 5)) {
  2367. options = pm3fb_boardnum_setup(options + 5, &bn);
  2368. pm3fb_font_setup(options, bn);
  2369. } else if (!strncmp(options, "depth:", 6)) {
  2370. options = pm3fb_boardnum_setup(options + 6, &bn);
  2371. pm3fb_bootdepth_setup(options, bn);
  2372. } else if (!strncmp(options, "printtimings", 12)) {
  2373. printtimings = 1;
  2374. } else if (!strncmp(options, "flatpanel:", 10)) {
  2375. options = pm3fb_boardnum_setup(options + 10, &bn);
  2376. flatpanel[bn] = 1;
  2377. } else if (!strncmp(options, "forcesize:", 10)) {
  2378. options = pm3fb_boardnum_setup(options + 10, &bn);
  2379. pm3fb_forcesize_setup(options, bn);
  2380. }
  2381. options = next;
  2382. }
  2383. }
  2384. /* ********************************************** */
  2385. /* ***** framebuffer API standard functions ***** */
  2386. /* ********************************************** */
  2387. static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
  2388. const void *par, struct fb_info_gen *info)
  2389. {
  2390. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2391. struct pm3fb_par *p = (struct pm3fb_par *) par;
  2392. DTRACE;
  2393. strcpy(fix->id, permedia3_name);
  2394. fix->smem_start = (unsigned long)l_fb_info->p_fb;
  2395. fix->smem_len = l_fb_info->fb_size;
  2396. fix->mmio_start = (unsigned long)l_fb_info->pIOBase;
  2397. fix->mmio_len = PM3_REGS_SIZE;
  2398. #ifdef PM3FB_USE_ACCEL
  2399. if (!(noaccel[l_fb_info->board_num]))
  2400. fix->accel = FB_ACCEL_3DLABS_PERMEDIA3;
  2401. else
  2402. #endif /* PM3FB_USE_ACCEL */
  2403. fix->accel = FB_ACCEL_NONE;
  2404. fix->type = FB_TYPE_PACKED_PIXELS;
  2405. fix->visual =
  2406. (p->depth == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
  2407. if (current_par_valid[l_fb_info->board_num])
  2408. fix->line_length =
  2409. l_fb_info->current_par->width *
  2410. depth2ByPP(l_fb_info->current_par->depth);
  2411. else
  2412. fix->line_length = 0;
  2413. fix->xpanstep = 64 / depth2bpp(p->depth);
  2414. fix->ypanstep = 1;
  2415. fix->ywrapstep = 0;
  2416. return (0);
  2417. }
  2418. static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
  2419. void *par, struct fb_info_gen *info)
  2420. {
  2421. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2422. struct pm3fb_par *p = (struct pm3fb_par *) par;
  2423. struct pm3fb_par temp_p;
  2424. u32 xres;
  2425. DTRACE;
  2426. DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
  2427. DASSERT((p != NULL), "pm3fb_par* not NULL");
  2428. DASSERT((l_fb_info != NULL), "pm3fb_info* not NULL");
  2429. memset(&temp_p, 0, sizeof(struct pm3fb_par));
  2430. temp_p.width = (var->xres_virtual + 7) & ~7;
  2431. temp_p.height = var->yres_virtual;
  2432. if (!(depth_supported(var->bits_per_pixel))) /* round unsupported up to a multiple of 8 */
  2433. temp_p.depth = depth2bpp(var->bits_per_pixel);
  2434. else
  2435. temp_p.depth = var->bits_per_pixel;
  2436. temp_p.depth = (temp_p.depth > 32) ? 32 : temp_p.depth; /* max 32 */
  2437. temp_p.depth = (temp_p.depth == 24) ? 32 : temp_p.depth; /* 24 unsupported, round-up to 32 */
  2438. if ((temp_p.depth == 16) && (var->red.length == 5) && (var->green.length == 5) && (var->blue.length == 5))
  2439. temp_p.depth = 15; /* RGBA 5551 is stored as depth 15 */
  2440. if ((temp_p.depth == 16) && (var->red.length == 4) && (var->green.length == 4) && (var->blue.length == 4))
  2441. temp_p.depth = 12; /* RGBA 4444 is stored as depth 12 */
  2442. DPRINTK(2,
  2443. "xres: %d, yres: %d, vxres: %d, vyres: %d ; xoffset:%d, yoffset: %d\n",
  2444. var->xres, var->yres, var->xres_virtual, var->yres_virtual,
  2445. var->xoffset, var->yoffset);
  2446. xres = (var->xres + 31) & ~31;
  2447. if (temp_p.width < xres + var->xoffset)
  2448. temp_p.width = xres + var->xoffset;
  2449. if (temp_p.height < var->yres + var->yoffset)
  2450. temp_p.height = var->yres + var->yoffset;
  2451. if (temp_p.width > 2048) {
  2452. DPRINTK(1, "virtual width not supported: %u\n",
  2453. temp_p.width);
  2454. return (-EINVAL);
  2455. }
  2456. if (var->yres < 200) {
  2457. DPRINTK(1, "height not supported: %u\n", (u32) var->yres);
  2458. return (-EINVAL);
  2459. }
  2460. if (temp_p.height < 200 || temp_p.height > 4095) {
  2461. DPRINTK(1, "virtual height not supported: %u\n",
  2462. temp_p.height);
  2463. return (-EINVAL);
  2464. }
  2465. if (!(depth_supported(temp_p.depth))) {
  2466. DPRINTK(1, "depth not supported: %u\n", temp_p.depth);
  2467. return (-EINVAL);
  2468. }
  2469. if ((temp_p.width * temp_p.height * depth2ByPP(temp_p.depth)) >
  2470. l_fb_info->fb_size) {
  2471. DPRINTK(1, "no memory for screen (%ux%ux%u)\n",
  2472. temp_p.width, temp_p.height, temp_p.depth);
  2473. return (-EINVAL);
  2474. }
  2475. if ((!var->pixclock) ||
  2476. (!var->right_margin) ||
  2477. (!var->hsync_len) ||
  2478. (!var->left_margin) ||
  2479. (!var->lower_margin) ||
  2480. (!var->vsync_len) || (!var->upper_margin)
  2481. ) {
  2482. unsigned long i = 0, done = 0;
  2483. printk(KERN_WARNING "pm3fb: refusing to use a likely wrong timing\n");
  2484. while ((mode_base[i].user_mode.width) && !done) {
  2485. if ((mode_base[i].user_mode.width == temp_p.width)
  2486. && (mode_base[i].user_mode.height ==
  2487. temp_p.height)) {
  2488. printk(KERN_NOTICE "pm3fb: using close match %s\n",
  2489. mode_base[i].name);
  2490. temp_p = mode_base[i].user_mode;
  2491. done = 1;
  2492. }
  2493. i++;
  2494. }
  2495. if (!done)
  2496. return (-EINVAL);
  2497. } else {
  2498. temp_p.pixclock = PICOS2KHZ(var->pixclock);
  2499. if (temp_p.pixclock > PM3_MAX_PIXCLOCK) {
  2500. DPRINTK(1, "pixclock too high (%uKHz)\n",
  2501. temp_p.pixclock);
  2502. return (-EINVAL);
  2503. }
  2504. temp_p.hsstart = var->right_margin;
  2505. temp_p.hsend = var->right_margin + var->hsync_len;
  2506. temp_p.hbend =
  2507. var->right_margin + var->hsync_len + var->left_margin;
  2508. temp_p.htotal = xres + temp_p.hbend;
  2509. temp_p.vsstart = var->lower_margin;
  2510. temp_p.vsend = var->lower_margin + var->vsync_len;
  2511. temp_p.vbend =
  2512. var->lower_margin + var->vsync_len + var->upper_margin;
  2513. temp_p.vtotal = var->yres + temp_p.vbend;
  2514. temp_p.stride = temp_p.width;
  2515. DPRINTK(2, "Using %d * %d, %d Khz, stride is %08x\n",
  2516. temp_p.width, temp_p.height, temp_p.pixclock,
  2517. temp_p.stride);
  2518. temp_p.base =
  2519. pm3fb_Shiftbpp(l_fb_info, temp_p.depth,
  2520. (var->yoffset * xres) + var->xoffset);
  2521. temp_p.video = 0;
  2522. if (var->sync & FB_SYNC_HOR_HIGH_ACT)
  2523. temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_HIGH;
  2524. else
  2525. temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_LOW;
  2526. if (var->sync & FB_SYNC_VERT_HIGH_ACT)
  2527. temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_HIGH;
  2528. else
  2529. temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_LOW;
  2530. if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
  2531. DPRINTK(1, "Interlaced mode not supported\n\n");
  2532. return (-EINVAL);
  2533. }
  2534. if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
  2535. temp_p.video |= PM3VideoControl_LINE_DOUBLE_ON;
  2536. else
  2537. temp_p.video |= PM3VideoControl_LINE_DOUBLE_OFF;
  2538. if (var->activate == FB_ACTIVATE_NOW)
  2539. temp_p.video |= PM3VideoControl_ENABLE;
  2540. else {
  2541. temp_p.video |= PM3VideoControl_DISABLE;
  2542. DPRINTK(2, "PM3Video disabled\n");
  2543. }
  2544. switch (temp_p.depth) {
  2545. case 8:
  2546. temp_p.video |= PM3VideoControl_PIXELSIZE_8BIT;
  2547. break;
  2548. case 12:
  2549. case 15:
  2550. case 16:
  2551. temp_p.video |= PM3VideoControl_PIXELSIZE_16BIT;
  2552. break;
  2553. case 32:
  2554. temp_p.video |= PM3VideoControl_PIXELSIZE_32BIT;
  2555. break;
  2556. default:
  2557. DPRINTK(1, "Unsupported depth\n");
  2558. break;
  2559. }
  2560. }
  2561. (*p) = temp_p;
  2562. #ifdef PM3FB_USE_ACCEL
  2563. if (var->accel_flags & FB_ACCELF_TEXT)
  2564. noaccel[l_fb_info->board_num] = 0;
  2565. else
  2566. noaccel[l_fb_info->board_num] = 1;
  2567. #endif /* PM3FB_USE_ACCEL */
  2568. return (0);
  2569. }
  2570. static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d)
  2571. {
  2572. switch (d) {
  2573. case 8:
  2574. var->red.length = var->green.length = var->blue.length = 8;
  2575. var->red.offset = var->green.offset = var->blue.offset = 0;
  2576. var->transp.offset = var->transp.length = 0;
  2577. break;
  2578. case 12:
  2579. var->red.offset = 8;
  2580. var->red.length = 4;
  2581. var->green.offset = 4;
  2582. var->green.length = 4;
  2583. var->blue.offset = 0;
  2584. var->blue.length = 4;
  2585. var->transp.offset = 12;
  2586. var->transp.length = 4;
  2587. break;
  2588. case 15:
  2589. var->red.offset = 10;
  2590. var->red.length = 5;
  2591. var->green.offset = 5;
  2592. var->green.length = 5;
  2593. var->blue.offset = 0;
  2594. var->blue.length = 5;
  2595. var->transp.offset = 15;
  2596. var->transp.length = 1;
  2597. break;
  2598. case 16:
  2599. var->red.offset = 11;
  2600. var->red.length = 5;
  2601. var->green.offset = 5;
  2602. var->green.length = 6;
  2603. var->blue.offset = 0;
  2604. var->blue.length = 5;
  2605. var->transp.offset = var->transp.length = 0;
  2606. break;
  2607. case 32:
  2608. var->transp.offset = 24;
  2609. var->red.offset = 16;
  2610. var->green.offset = 8;
  2611. var->blue.offset = 0;
  2612. var->red.length = var->green.length =
  2613. var->blue.length = var->transp.length = 8;
  2614. break;
  2615. default:
  2616. DPRINTK(1, "Unsupported depth %ld\n", d);
  2617. break;
  2618. }
  2619. }
  2620. static int pm3fb_encode_var(struct fb_var_screeninfo *var,
  2621. const void *par, struct fb_info_gen *info)
  2622. {
  2623. struct pm3fb_par *p = (struct pm3fb_par *) par;
  2624. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2625. u32 base;
  2626. DTRACE;
  2627. DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
  2628. DASSERT((p != NULL), "pm3fb_par* not NULL");
  2629. DASSERT((info != NULL), "fb_info_gen* not NULL");
  2630. memset(var, 0, sizeof(struct fb_var_screeninfo));
  2631. #ifdef PM3FB_USE_ACCEL
  2632. if (!(noaccel[l_fb_info->board_num]))
  2633. var->accel_flags |= FB_ACCELF_TEXT;
  2634. #endif /* PM3FB_USE_ACCEL */
  2635. var->xres_virtual = p->width;
  2636. var->yres_virtual = p->height;
  2637. var->xres = p->htotal - p->hbend;
  2638. var->yres = p->vtotal - p->vbend;
  2639. DPRINTK(2, "xres = %d, yres : %d\n", var->xres, var->yres);
  2640. var->right_margin = p->hsstart;
  2641. var->hsync_len = p->hsend - p->hsstart;
  2642. var->left_margin = p->hbend - p->hsend;
  2643. var->lower_margin = p->vsstart;
  2644. var->vsync_len = p->vsend - p->vsstart;
  2645. var->upper_margin = p->vbend - p->vsend;
  2646. var->bits_per_pixel = depth2bpp(p->depth);
  2647. pm3fb_encode_depth(var, p->depth);
  2648. base = pm3fb_Unshiftbpp(l_fb_info, p->depth, p->base);
  2649. var->xoffset = base % var->xres;
  2650. var->yoffset = base / var->xres;
  2651. var->height = var->width = -1;
  2652. var->pixclock = KHZ2PICOS(p->pixclock);
  2653. if ((p->video & PM3VideoControl_HSYNC_MASK) ==
  2654. PM3VideoControl_HSYNC_ACTIVE_HIGH)
  2655. var->sync |= FB_SYNC_HOR_HIGH_ACT;
  2656. if ((p->video & PM3VideoControl_VSYNC_MASK) ==
  2657. PM3VideoControl_VSYNC_ACTIVE_HIGH)
  2658. var->sync |= FB_SYNC_VERT_HIGH_ACT;
  2659. if (p->video & PM3VideoControl_LINE_DOUBLE_ON)
  2660. var->vmode = FB_VMODE_DOUBLE;
  2661. return (0);
  2662. }
  2663. static void pm3fb_get_par(void *par, struct fb_info_gen *info)
  2664. {
  2665. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2666. DTRACE;
  2667. if (!current_par_valid[l_fb_info->board_num]) {
  2668. if (l_fb_info->use_current)
  2669. pm3fb_read_mode(l_fb_info, l_fb_info->current_par);
  2670. else
  2671. memcpy(l_fb_info->current_par,
  2672. &(mode_base[0].user_mode),
  2673. sizeof(struct pm3fb_par));
  2674. current_par_valid[l_fb_info->board_num] = 1;
  2675. }
  2676. *((struct pm3fb_par *) par) = *(l_fb_info->current_par);
  2677. }
  2678. static void pm3fb_set_par(const void *par, struct fb_info_gen *info)
  2679. {
  2680. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2681. DTRACE;
  2682. *(l_fb_info->current_par) = *((struct pm3fb_par *) par);
  2683. current_par_valid[l_fb_info->board_num] = 1;
  2684. pm3fb_write_mode(l_fb_info);
  2685. #ifdef PM3FB_USE_ACCEL
  2686. pm3fb_init_engine(l_fb_info);
  2687. #endif /* PM3FB_USE_ACCEL */
  2688. }
  2689. static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
  2690. unsigned char regno, unsigned char r,
  2691. unsigned char g, unsigned char b)
  2692. {
  2693. DTRACE;
  2694. PM3_SLOW_WRITE_REG(PM3RD_PaletteWriteAddress, regno);
  2695. PM3_SLOW_WRITE_REG(PM3RD_PaletteData, r);
  2696. PM3_SLOW_WRITE_REG(PM3RD_PaletteData, g);
  2697. PM3_SLOW_WRITE_REG(PM3RD_PaletteData, b);
  2698. }
  2699. static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
  2700. unsigned *blue, unsigned *transp,
  2701. struct fb_info *info)
  2702. {
  2703. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2704. DTRACE;
  2705. if (regno < 256) {
  2706. *red =
  2707. l_fb_info->palette[regno].red << 8 | l_fb_info->
  2708. palette[regno].red;
  2709. *green =
  2710. l_fb_info->palette[regno].green << 8 | l_fb_info->
  2711. palette[regno].green;
  2712. *blue =
  2713. l_fb_info->palette[regno].blue << 8 | l_fb_info->
  2714. palette[regno].blue;
  2715. *transp =
  2716. l_fb_info->palette[regno].transp << 8 | l_fb_info->
  2717. palette[regno].transp;
  2718. }
  2719. return (regno > 255);
  2720. }
  2721. static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
  2722. unsigned blue, unsigned transp,
  2723. struct fb_info *info)
  2724. {
  2725. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2726. DTRACE;
  2727. if (regno < 16) {
  2728. switch (l_fb_info->current_par->depth) {
  2729. #ifdef FBCON_HAS_CFB8
  2730. case 8:
  2731. break;
  2732. #endif
  2733. #ifdef FBCON_HAS_CFB16
  2734. case 12:
  2735. l_fb_info->cmap.cmap12[regno] =
  2736. (((u32) red & 0xf000) >> 4) |
  2737. (((u32) green & 0xf000) >> 8) |
  2738. (((u32) blue & 0xf000) >> 12);
  2739. break;
  2740. case 15:
  2741. l_fb_info->cmap.cmap15[regno] =
  2742. (((u32) red & 0xf800) >> 1) |
  2743. (((u32) green & 0xf800) >> 6) |
  2744. (((u32) blue & 0xf800) >> 11);
  2745. break;
  2746. case 16:
  2747. l_fb_info->cmap.cmap16[regno] =
  2748. ((u32) red & 0xf800) |
  2749. (((u32) green & 0xfc00) >> 5) |
  2750. (((u32) blue & 0xf800) >> 11);
  2751. break;
  2752. #endif
  2753. #ifdef FBCON_HAS_CFB32
  2754. case 32:
  2755. l_fb_info->cmap.cmap32[regno] =
  2756. (((u32) transp & 0xff00) << 16) |
  2757. (((u32) red & 0xff00) << 8) |
  2758. (((u32) green & 0xff00)) |
  2759. (((u32) blue & 0xff00) >> 8);
  2760. break;
  2761. #endif
  2762. default:
  2763. DPRINTK(1, "bad depth %u\n",
  2764. l_fb_info->current_par->depth);
  2765. break;
  2766. }
  2767. }
  2768. if (regno < 256) {
  2769. l_fb_info->palette[regno].red = red >> 8;
  2770. l_fb_info->palette[regno].green = green >> 8;
  2771. l_fb_info->palette[regno].blue = blue >> 8;
  2772. l_fb_info->palette[regno].transp = transp >> 8;
  2773. if (l_fb_info->current_par->depth == 8)
  2774. pm3fb_set_color(l_fb_info, regno, red >> 8,
  2775. green >> 8, blue >> 8);
  2776. }
  2777. return (regno > 255);
  2778. }
  2779. static int pm3fb_blank(int blank_mode, struct fb_info_gen *info)
  2780. {
  2781. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2782. u32 video;
  2783. DTRACE;
  2784. if (!current_par_valid[l_fb_info->board_num])
  2785. return (1);
  2786. video = l_fb_info->current_par->video;
  2787. /*
  2788. * Oxygen VX1 - it appears that setting PM3VideoControl and
  2789. * then PM3RD_SyncControl to the same SYNC settings undoes
  2790. * any net change - they seem to xor together. Only set the
  2791. * sync options in PM3RD_SyncControl. --rmk
  2792. */
  2793. video &= ~(PM3VideoControl_HSYNC_MASK |
  2794. PM3VideoControl_VSYNC_MASK);
  2795. video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
  2796. PM3VideoControl_VSYNC_ACTIVE_HIGH;
  2797. if (blank_mode > 0) {
  2798. switch (blank_mode - 1) {
  2799. case VESA_NO_BLANKING: /* FIXME */
  2800. video = video & ~(PM3VideoControl_ENABLE);
  2801. break;
  2802. case VESA_HSYNC_SUSPEND:
  2803. video = video & ~(PM3VideoControl_HSYNC_MASK |
  2804. PM3VideoControl_BLANK_ACTIVE_LOW);
  2805. break;
  2806. case VESA_VSYNC_SUSPEND:
  2807. video = video & ~(PM3VideoControl_VSYNC_MASK |
  2808. PM3VideoControl_BLANK_ACTIVE_LOW);
  2809. break;
  2810. case VESA_POWERDOWN:
  2811. video = video & ~(PM3VideoControl_HSYNC_MASK |
  2812. PM3VideoControl_VSYNC_MASK |
  2813. PM3VideoControl_BLANK_ACTIVE_LOW);
  2814. break;
  2815. default:
  2816. DPRINTK(1, "Unsupported blanking %d\n",
  2817. blank_mode);
  2818. return (1);
  2819. break;
  2820. }
  2821. }
  2822. PM3_SLOW_WRITE_REG(PM3VideoControl, video);
  2823. return (0);
  2824. }
  2825. static void pm3fb_set_disp(const void *par, struct display *disp,
  2826. struct fb_info_gen *info)
  2827. {
  2828. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  2829. struct pm3fb_par *p = (struct pm3fb_par *) par;
  2830. u32 flags;
  2831. DTRACE;
  2832. local_irq_save(flags);
  2833. info->info.screen_base = l_fb_info->v_fb;
  2834. switch (p->depth) {
  2835. #ifdef FBCON_HAS_CFB8
  2836. case 8:
  2837. #ifdef PM3FB_USE_ACCEL
  2838. if (!(noaccel[l_fb_info->board_num]))
  2839. disp->dispsw = &pm3fb_cfb8;
  2840. else
  2841. #endif /* PM3FB_USE_ACCEL */
  2842. disp->dispsw = &fbcon_cfb8;
  2843. break;
  2844. #endif
  2845. #ifdef FBCON_HAS_CFB16
  2846. case 12:
  2847. #ifdef PM3FB_USE_ACCEL
  2848. if (!(noaccel[l_fb_info->board_num]))
  2849. disp->dispsw = &pm3fb_cfb16;
  2850. else
  2851. #endif /* PM3FB_USE_ACCEL */
  2852. disp->dispsw = &fbcon_cfb16;
  2853. disp->dispsw_data = l_fb_info->cmap.cmap12;
  2854. break;
  2855. case 15:
  2856. #ifdef PM3FB_USE_ACCEL
  2857. if (!(noaccel[l_fb_info->board_num]))
  2858. disp->dispsw = &pm3fb_cfb16;
  2859. else
  2860. #endif /* PM3FB_USE_ACCEL */
  2861. disp->dispsw = &fbcon_cfb16;
  2862. disp->dispsw_data = l_fb_info->cmap.cmap15;
  2863. break;
  2864. case 16:
  2865. #ifdef PM3FB_USE_ACCEL
  2866. if (!(noaccel[l_fb_info->board_num]))
  2867. disp->dispsw = &pm3fb_cfb16;
  2868. else
  2869. #endif /* PM3FB_USE_ACCEL */
  2870. disp->dispsw = &fbcon_cfb16;
  2871. disp->dispsw_data = l_fb_info->cmap.cmap16;
  2872. break;
  2873. #endif
  2874. #ifdef FBCON_HAS_CFB32
  2875. case 32:
  2876. #ifdef PM3FB_USE_ACCEL
  2877. if (!(noaccel[l_fb_info->board_num]))
  2878. disp->dispsw = &pm3fb_cfb32;
  2879. else
  2880. #endif /* PM3FB_USE_ACCEL */
  2881. disp->dispsw = &fbcon_cfb32;
  2882. disp->dispsw_data = l_fb_info->cmap.cmap32;
  2883. break;
  2884. #endif /* FBCON_HAS_CFB32 */
  2885. default:
  2886. disp->dispsw = &fbcon_dummy;
  2887. DPRINTK(1, "Invalid depth, using fbcon_dummy\n");
  2888. break;
  2889. }
  2890. local_irq_restore(flags);
  2891. }
  2892. /* */
  2893. static void pm3fb_detect(void)
  2894. {
  2895. struct pci_dev *dev_array[PM3_MAX_BOARD];
  2896. struct pci_dev *dev = NULL;
  2897. struct pm3fb_info *l_fb_info = &(fb_info[0]);
  2898. unsigned long i, j, done;
  2899. DTRACE;
  2900. for (i = 0; i < PM3_MAX_BOARD; i++) {
  2901. dev_array[i] = NULL;
  2902. fb_info[i].dev = NULL;
  2903. }
  2904. dev = pci_get_device(PCI_VENDOR_ID_3DLABS,
  2905. PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
  2906. for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) {
  2907. dev_array[i] = dev;
  2908. dev = pci_get_device(PCI_VENDOR_ID_3DLABS,
  2909. PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
  2910. }
  2911. if (dev) { /* more than PM3_MAX_BOARD */
  2912. printk(KERN_WARNING "pm3fb: Warning: more than %d boards found\n",
  2913. PM3_MAX_BOARD);
  2914. }
  2915. if (!dev_array[0]) { /* not a single board, abort */
  2916. return;
  2917. }
  2918. /* allocate user-defined boards */
  2919. for (i = 0; i < PM3_MAX_BOARD; i++) {
  2920. if ((bus[i] >= 0) && (slot[i] >= 0) && (func[i] >= 0)) {
  2921. for (j = 0; j < PM3_MAX_BOARD; j++) {
  2922. if ((dev_array[j] != NULL) &&
  2923. (dev_array[j]->bus->number == bus[i])
  2924. && (PCI_SLOT(dev_array[j]->devfn) ==
  2925. slot[i])
  2926. && (PCI_FUNC(dev_array[j]->devfn) ==
  2927. func[i])) {
  2928. fb_info[i].dev = dev_array[j];
  2929. dev_array[j] = NULL;
  2930. }
  2931. }
  2932. }
  2933. }
  2934. /* allocate remaining boards */
  2935. for (i = 0; i < PM3_MAX_BOARD; i++) {
  2936. if (fb_info[i].dev == NULL) {
  2937. done = 0;
  2938. for (j = 0; ((j < PM3_MAX_BOARD) && (!done)); j++) {
  2939. if (dev_array[j] != NULL) {
  2940. fb_info[i].dev = dev_array[j];
  2941. dev_array[j] = NULL;
  2942. done = 1;
  2943. }
  2944. }
  2945. }
  2946. }
  2947. /* at that point, all PCI Permedia3 are detected and allocated */
  2948. /* now, initialize... or not */
  2949. for (i = 0; i < PM3_MAX_BOARD; i++) {
  2950. l_fb_info = &(fb_info[i]);
  2951. if (l_fb_info->dev && !disable[i]) { /* PCI device was found and not disabled by user */
  2952. DPRINTK(2,
  2953. "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n",
  2954. (unsigned long) l_fb_info->dev,
  2955. (unsigned long) l_fb_info->dev->vendor,
  2956. (unsigned long) l_fb_info->dev->device,
  2957. (unsigned long)
  2958. pci_resource_start(l_fb_info->dev, 0),
  2959. (unsigned long)
  2960. pci_resource_start(l_fb_info->dev, 1),
  2961. (unsigned long)
  2962. pci_resource_start(l_fb_info->dev, 2),
  2963. (unsigned long)
  2964. pci_resource_start(l_fb_info->dev, 3),
  2965. (unsigned long)
  2966. pci_resource_start(l_fb_info->dev, 4),
  2967. (unsigned long)
  2968. pci_resource_start(l_fb_info->dev, 5),
  2969. (unsigned long) l_fb_info->dev->irq);
  2970. l_fb_info->pIOBase =
  2971. (unsigned char *)
  2972. pci_resource_start(l_fb_info->dev, 0);
  2973. #ifdef __BIG_ENDIAN
  2974. l_fb_info->pIOBase += PM3_REGS_SIZE;
  2975. #endif
  2976. l_fb_info->vIOBase = (unsigned char *) -1;
  2977. l_fb_info->p_fb =
  2978. (unsigned char *)
  2979. pci_resource_start(l_fb_info->dev, 1);
  2980. l_fb_info->v_fb = (unsigned char *) -1;
  2981. if (!request_mem_region
  2982. ((unsigned long)l_fb_info->p_fb, 64 * 1024 * 1024, /* request full aperture size */
  2983. "pm3fb")) {
  2984. printk
  2985. (KERN_ERR "pm3fb: Error: couldn't request framebuffer memory, board #%ld\n",
  2986. l_fb_info->board_num);
  2987. continue;
  2988. }
  2989. if (!request_mem_region
  2990. ((unsigned long)l_fb_info->pIOBase, PM3_REGS_SIZE,
  2991. "pm3fb I/O regs")) {
  2992. printk
  2993. (KERN_ERR "pm3fb: Error: couldn't request IObase memory, board #%ld\n",
  2994. l_fb_info->board_num);
  2995. continue;
  2996. }
  2997. if (forcesize[l_fb_info->board_num])
  2998. l_fb_info->fb_size = forcesize[l_fb_info->board_num];
  2999. l_fb_info->fb_size =
  3000. pm3fb_size_memory(l_fb_info);
  3001. if (l_fb_info->fb_size) {
  3002. (void) pci_enable_device(l_fb_info->dev);
  3003. pm3fb_common_init(l_fb_info);
  3004. } else
  3005. printk(KERN_ERR "pm3fb: memory problem, not enabling board #%ld\n", l_fb_info->board_num);
  3006. }
  3007. }
  3008. }
  3009. static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
  3010. struct fb_info_gen *info)
  3011. {
  3012. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  3013. DTRACE;
  3014. if (!current_par_valid[l_fb_info->board_num])
  3015. return -EINVAL;
  3016. l_fb_info->current_par->base = /* in 128 bits chunk - i.e. AFTER Shiftbpp */
  3017. pm3fb_Shiftbpp(l_fb_info,
  3018. l_fb_info->current_par->depth,
  3019. (var->yoffset * l_fb_info->current_par->width) +
  3020. var->xoffset);
  3021. PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
  3022. return 0;
  3023. }
  3024. static int pm3fb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
  3025. {
  3026. struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
  3027. u32 cm, i;
  3028. #ifdef PM3FB_MASTER_DEBUG
  3029. char cc[3];
  3030. #endif /* PM3FB_MASTER_DEBUG */
  3031. switch(cmd)
  3032. {
  3033. #ifdef PM3FB_MASTER_DEBUG
  3034. case PM3FBIO_CLEARMEMORY:
  3035. if (copy_from_user(&cm, (void *)arg, sizeof(u32)))
  3036. return(-EFAULT);
  3037. pm3fb_clear_memory(l_fb_info, cm);
  3038. return(0);
  3039. break;
  3040. case PM3FBIO_CLEARCMAP:
  3041. if (copy_from_user(cc, (void*)arg, 3 * sizeof(char)))
  3042. return(-EFAULT);
  3043. pm3fb_clear_colormap(l_fb_info, cc[0], cc[1], cc[2]);
  3044. return(0);
  3045. break;
  3046. #endif /* PM3FB_MASTER_DEBUG */
  3047. case PM3FBIO_RESETCHIP:
  3048. cm = 1;
  3049. PM3_SLOW_WRITE_REG(PM3ResetStatus, 1);
  3050. for (i = 0 ; (i < 10000) && cm ; i++)
  3051. {
  3052. PM3_DELAY(10);
  3053. cm = PM3_READ_REG(PM3ResetStatus);
  3054. }
  3055. if (cm)
  3056. {
  3057. printk(KERN_ERR "pm3fb: chip reset failed with status 0x%x\n", cm);
  3058. return(-EIO);
  3059. }
  3060. /* first thing first, reload memory timings */
  3061. pm3fb_write_memory_timings(l_fb_info);
  3062. #ifdef PM3FB_USE_ACCEL
  3063. pm3fb_init_engine(l_fb_info);
  3064. #endif /* PM3FB_USE_ACCEL */
  3065. pm3fb_write_mode(l_fb_info);
  3066. return(0);
  3067. break;
  3068. default:
  3069. DPRINTK(2, "unknown ioctl: %d (%x)\n", cmd, cmd);
  3070. return(-EINVAL);
  3071. }
  3072. }
  3073. /* ****************************************** */
  3074. /* ***** standard FB API init functions ***** */
  3075. /* ****************************************** */
  3076. int __init pm3fb_setup(char *options)
  3077. {
  3078. long opsi = strlen(options);
  3079. DTRACE;
  3080. memcpy(g_options, options,
  3081. ((opsi + 1) >
  3082. PM3_OPTIONS_SIZE) ? PM3_OPTIONS_SIZE : (opsi + 1));
  3083. g_options[PM3_OPTIONS_SIZE - 1] = 0;
  3084. return (0);
  3085. }
  3086. int __init pm3fb_init(void)
  3087. {
  3088. DTRACE;
  3089. DPRINTK(2, "This is pm3fb.c, CVS version: $Header: /home/cvs/s3c-linux-2.6.21/drivers/video/pm3fb.c,v 1.1.1.1 2007/06/12 07:27:09 eyryu Exp $");
  3090. pm3fb_real_setup(g_options);
  3091. pm3fb_detect();
  3092. if (!fb_info[0].dev) { /* not even one board ??? */
  3093. DPRINTK(1, "No PCI Permedia3 board detected\n");
  3094. }
  3095. return (0);
  3096. }
  3097. /* ************************* */
  3098. /* **** Module support ***** */
  3099. /* ************************* */
  3100. #ifdef MODULE
  3101. MODULE_AUTHOR("Romain Dolbeau");
  3102. MODULE_DESCRIPTION("Permedia3 framebuffer device driver");
  3103. static char *mode[PM3_MAX_BOARD];
  3104. module_param_array(mode, charp, NULL, 0);
  3105. MODULE_PARM_DESC(mode,"video mode");
  3106. module_param_array(disable, short, NULL, 0);
  3107. MODULE_PARM_DESC(disable,"disable board");
  3108. static short off[PM3_MAX_BOARD];
  3109. module_param_array(off, short, NULL, 0);
  3110. MODULE_PARM_DESC(off,"disable board");
  3111. static char *pciid[PM3_MAX_BOARD];
  3112. module_param_array(pciid, charp, NULL, 0);
  3113. MODULE_PARM_DESC(pciid,"board PCI Id");
  3114. module_param_array(noaccel, short, NULL, 0);
  3115. MODULE_PARM_DESC(noaccel,"disable accel");
  3116. static char *font[PM3_MAX_BOARD];
  3117. module_param_array(font, charp, NULL, 0);
  3118. MODULE_PARM_DESC(font,"choose font");
  3119. module_param(depth, short, NULL, 0);
  3120. MODULE_PARM_DESC(depth,"boot-time depth");
  3121. module_param(printtimings, short, NULL, 0);
  3122. MODULE_PARM_DESC(printtimings, "print the memory timings of the card(s)");
  3123. module_param(forcesize, short, NULL, 0);
  3124. MODULE_PARM_DESC(forcesize, "force specified memory size");
  3125. /*
  3126. MODULE_SUPPORTED_DEVICE("Permedia3 PCI boards")
  3127. MODULE_GENERIC_TABLE(gtype,name)
  3128. MODULE_DEVICE_TABLE(type,name)
  3129. */
  3130. void pm3fb_build_options(void)
  3131. {
  3132. int i;
  3133. char ts[128];
  3134. strcpy(g_options, "pm3fb");
  3135. for (i = 0; i < PM3_MAX_BOARD ; i++)
  3136. {
  3137. if (mode[i])
  3138. {
  3139. sprintf(ts, ",mode:%d:%s", i, mode[i]);
  3140. strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
  3141. }
  3142. if (disable[i] || off[i])
  3143. {
  3144. sprintf(ts, ",disable:%d:", i);
  3145. strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
  3146. }
  3147. if (pciid[i])
  3148. {
  3149. sprintf(ts, ",pciid:%d:%s", i, pciid[i]);
  3150. strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
  3151. }
  3152. if (noaccel[i])
  3153. {
  3154. sprintf(ts, ",noaccel:%d:", i);
  3155. strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
  3156. }
  3157. if (font[i])
  3158. {
  3159. sprintf(ts, ",font:%d:%s", i, font[i]);
  3160. strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
  3161. }
  3162. if (depth[i])
  3163. {
  3164. sprintf(ts, ",depth:%d:%d", i, depth[i]);
  3165. strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
  3166. }
  3167. }
  3168. g_options[PM3_OPTIONS_SIZE - 1] = '\0';
  3169. DPRINTK(1, "pm3fb use options: %s\n", g_options);
  3170. }
  3171. int init_module(void)
  3172. {
  3173. DTRACE;
  3174. pm3fb_build_options();
  3175. pm3fb_init();
  3176. return 0;
  3177. }
  3178. void cleanup_module(void)
  3179. {
  3180. DTRACE;
  3181. {
  3182. unsigned long i;
  3183. struct pm3fb_info *l_fb_info;
  3184. for (i = 0; i < PM3_MAX_BOARD; i++) {
  3185. l_fb_info = &(fb_info[i]);
  3186. pci_dev_put(l_fb_info->dev);
  3187. if (l_fb_info->dev != NULL && !(disable[l_fb_info->board_num])) {
  3188. if (l_fb_info->vIOBase != (unsigned char *) -1) {
  3189. pm3fb_unmapIO(l_fb_info);
  3190. release_mem_region(l_fb_info->p_fb,
  3191. l_fb_info->fb_size);
  3192. release_mem_region(l_fb_info->pIOBase,
  3193. PM3_REGS_SIZE);
  3194. }
  3195. unregister_framebuffer(&l_fb_info->gen.info);
  3196. }
  3197. }
  3198. }
  3199. }
  3200. #endif /* MODULE */