bt431.h 5.7 KB

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  1. /*
  2. * linux/drivers/video/bt431.h
  3. *
  4. * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General
  7. * Public License. See the file COPYING in the main directory of this
  8. * archive for more details.
  9. */
  10. #include <linux/types.h>
  11. #include <asm/system.h>
  12. /*
  13. * Bt431 cursor generator registers, 32-bit aligned.
  14. * Two twin Bt431 are used on the DECstation's PMAG-AA.
  15. */
  16. struct bt431_regs {
  17. volatile u16 addr_lo;
  18. u16 pad0;
  19. volatile u16 addr_hi;
  20. u16 pad1;
  21. volatile u16 addr_cmap;
  22. u16 pad2;
  23. volatile u16 addr_reg;
  24. u16 pad3;
  25. };
  26. static inline u16 bt431_set_value(u8 val)
  27. {
  28. return ((val << 8) | (val & 0xff)) & 0xffff;
  29. }
  30. static inline u8 bt431_get_value(u16 val)
  31. {
  32. return val & 0xff;
  33. }
  34. /*
  35. * Additional registers addressed indirectly.
  36. */
  37. #define BT431_REG_CMD 0x0000
  38. #define BT431_REG_CXLO 0x0001
  39. #define BT431_REG_CXHI 0x0002
  40. #define BT431_REG_CYLO 0x0003
  41. #define BT431_REG_CYHI 0x0004
  42. #define BT431_REG_WXLO 0x0005
  43. #define BT431_REG_WXHI 0x0006
  44. #define BT431_REG_WYLO 0x0007
  45. #define BT431_REG_WYHI 0x0008
  46. #define BT431_REG_WWLO 0x0009
  47. #define BT431_REG_WWHI 0x000a
  48. #define BT431_REG_WHLO 0x000b
  49. #define BT431_REG_WHHI 0x000c
  50. #define BT431_REG_CRAM_BASE 0x0000
  51. #define BT431_REG_CRAM_END 0x01ff
  52. /*
  53. * Command register.
  54. */
  55. #define BT431_CMD_CURS_ENABLE 0x40
  56. #define BT431_CMD_XHAIR_ENABLE 0x20
  57. #define BT431_CMD_OR_CURSORS 0x10
  58. #define BT431_CMD_AND_CURSORS 0x00
  59. #define BT431_CMD_1_1_MUX 0x00
  60. #define BT431_CMD_4_1_MUX 0x04
  61. #define BT431_CMD_5_1_MUX 0x08
  62. #define BT431_CMD_xxx_MUX 0x0c
  63. #define BT431_CMD_THICK_1 0x00
  64. #define BT431_CMD_THICK_3 0x01
  65. #define BT431_CMD_THICK_5 0x02
  66. #define BT431_CMD_THICK_7 0x03
  67. static inline void bt431_select_reg(struct bt431_regs *regs, int ir)
  68. {
  69. /*
  70. * The compiler splits the write in two bytes without these
  71. * helper variables.
  72. */
  73. volatile u16 *lo = &(regs->addr_lo);
  74. volatile u16 *hi = &(regs->addr_hi);
  75. mb();
  76. *lo = bt431_set_value(ir & 0xff);
  77. wmb();
  78. *hi = bt431_set_value((ir >> 8) & 0xff);
  79. }
  80. /* Autoincrement read/write. */
  81. static inline u8 bt431_read_reg_inc(struct bt431_regs *regs)
  82. {
  83. /*
  84. * The compiler splits the write in two bytes without the
  85. * helper variable.
  86. */
  87. volatile u16 *r = &(regs->addr_reg);
  88. mb();
  89. return bt431_get_value(*r);
  90. }
  91. static inline void bt431_write_reg_inc(struct bt431_regs *regs, u8 value)
  92. {
  93. /*
  94. * The compiler splits the write in two bytes without the
  95. * helper variable.
  96. */
  97. volatile u16 *r = &(regs->addr_reg);
  98. mb();
  99. *r = bt431_set_value(value);
  100. }
  101. static inline u8 bt431_read_reg(struct bt431_regs *regs, int ir)
  102. {
  103. bt431_select_reg(regs, ir);
  104. return bt431_read_reg_inc(regs);
  105. }
  106. static inline void bt431_write_reg(struct bt431_regs *regs, int ir, u8 value)
  107. {
  108. bt431_select_reg(regs, ir);
  109. bt431_write_reg_inc(regs, value);
  110. }
  111. /* Autoincremented read/write for the cursor map. */
  112. static inline u16 bt431_read_cmap_inc(struct bt431_regs *regs)
  113. {
  114. /*
  115. * The compiler splits the write in two bytes without the
  116. * helper variable.
  117. */
  118. volatile u16 *r = &(regs->addr_cmap);
  119. mb();
  120. return *r;
  121. }
  122. static inline void bt431_write_cmap_inc(struct bt431_regs *regs, u16 value)
  123. {
  124. /*
  125. * The compiler splits the write in two bytes without the
  126. * helper variable.
  127. */
  128. volatile u16 *r = &(regs->addr_cmap);
  129. mb();
  130. *r = value;
  131. }
  132. static inline u16 bt431_read_cmap(struct bt431_regs *regs, int cr)
  133. {
  134. bt431_select_reg(regs, cr);
  135. return bt431_read_cmap_inc(regs);
  136. }
  137. static inline void bt431_write_cmap(struct bt431_regs *regs, int cr, u16 value)
  138. {
  139. bt431_select_reg(regs, cr);
  140. bt431_write_cmap_inc(regs, value);
  141. }
  142. static inline void bt431_enable_cursor(struct bt431_regs *regs)
  143. {
  144. bt431_write_reg(regs, BT431_REG_CMD,
  145. BT431_CMD_CURS_ENABLE | BT431_CMD_OR_CURSORS
  146. | BT431_CMD_4_1_MUX | BT431_CMD_THICK_1);
  147. }
  148. static inline void bt431_erase_cursor(struct bt431_regs *regs)
  149. {
  150. bt431_write_reg(regs, BT431_REG_CMD, BT431_CMD_4_1_MUX);
  151. }
  152. static inline void bt431_position_cursor(struct bt431_regs *regs, u16 x, u16 y)
  153. {
  154. /*
  155. * Magic from the MACH sources.
  156. *
  157. * Cx = x + D + H - P
  158. * P = 37 if 1:1, 52 if 4:1, 57 if 5:1
  159. * D = pixel skew between outdata and external data
  160. * H = pixels between HSYNCH falling and active video
  161. *
  162. * Cy = y + V - 32
  163. * V = scanlines between HSYNCH falling, two or more
  164. * clocks after VSYNCH falling, and active video
  165. */
  166. x += 412 - 52;
  167. y += 68 - 32;
  168. /* Use autoincrement. */
  169. bt431_select_reg(regs, BT431_REG_CXLO);
  170. bt431_write_reg_inc(regs, x & 0xff); /* BT431_REG_CXLO */
  171. bt431_write_reg_inc(regs, (x >> 8) & 0x0f); /* BT431_REG_CXHI */
  172. bt431_write_reg_inc(regs, y & 0xff); /* BT431_REG_CYLO */
  173. bt431_write_reg_inc(regs, (y >> 8) & 0x0f); /* BT431_REG_CYHI */
  174. }
  175. static inline void bt431_set_font(struct bt431_regs *regs, u8 fgc,
  176. u16 width, u16 height)
  177. {
  178. int i;
  179. u16 fgp = fgc ? 0xffff : 0x0000;
  180. u16 bgp = fgc ? 0x0000 : 0xffff;
  181. bt431_select_reg(regs, BT431_REG_CRAM_BASE);
  182. for (i = BT431_REG_CRAM_BASE; i <= BT431_REG_CRAM_END; i++) {
  183. u16 value;
  184. if (height << 6 <= i << 3)
  185. value = bgp;
  186. else if (width <= i % 8 << 3)
  187. value = bgp;
  188. else if (((width >> 3) & 0xffff) > i % 8)
  189. value = fgp;
  190. else
  191. value = fgp & ~(bgp << (width % 8 << 1));
  192. bt431_write_cmap_inc(regs, value);
  193. }
  194. }
  195. static inline void bt431_init_cursor(struct bt431_regs *regs)
  196. {
  197. /* no crosshair window */
  198. bt431_select_reg(regs, BT431_REG_WXLO);
  199. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXLO */
  200. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXHI */
  201. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYLO */
  202. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYHI */
  203. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWLO */
  204. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWHI */
  205. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHLO */
  206. bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHHI */
  207. }