acornfb.c 37 KB

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  1. /*
  2. * linux/drivers/video/acornfb.c
  3. *
  4. * Copyright (C) 1998-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Frame buffer code for Acorn platforms
  11. *
  12. * NOTE: Most of the modes with X!=640 will disappear shortly.
  13. * NOTE: Startup setting of HS & VS polarity not supported.
  14. * (do we need to support it if we're coming up in 640x480?)
  15. *
  16. * FIXME: (things broken by the "new improved" FBCON API)
  17. * - Blanking 8bpp displays with VIDC
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/ctype.h>
  24. #include <linux/slab.h>
  25. #include <linux/init.h>
  26. #include <linux/fb.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/dma-mapping.h>
  29. #include <asm/hardware.h>
  30. #include <asm/io.h>
  31. #include <asm/irq.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/pgtable.h>
  34. #include "acornfb.h"
  35. /*
  36. * VIDC machines can't do 16 or 32BPP modes.
  37. */
  38. #ifdef HAS_VIDC
  39. #undef FBCON_HAS_CFB16
  40. #undef FBCON_HAS_CFB32
  41. #endif
  42. /*
  43. * Default resolution.
  44. * NOTE that it has to be supported in the table towards
  45. * the end of this file.
  46. */
  47. #define DEFAULT_XRES 640
  48. #define DEFAULT_YRES 480
  49. #define DEFAULT_BPP 4
  50. /*
  51. * define this to debug the video mode selection
  52. */
  53. #undef DEBUG_MODE_SELECTION
  54. /*
  55. * Translation from RISC OS monitor types to actual
  56. * HSYNC and VSYNC frequency ranges. These are
  57. * probably not right, but they're the best info I
  58. * have. Allow 1% either way on the nominal for TVs.
  59. */
  60. #define NR_MONTYPES 6
  61. static struct fb_monspecs monspecs[NR_MONTYPES] __initdata = {
  62. { /* TV */
  63. .hfmin = 15469,
  64. .hfmax = 15781,
  65. .vfmin = 49,
  66. .vfmax = 51,
  67. }, { /* Multi Freq */
  68. .hfmin = 0,
  69. .hfmax = 99999,
  70. .vfmin = 0,
  71. .vfmax = 199,
  72. }, { /* Hi-res mono */
  73. .hfmin = 58608,
  74. .hfmax = 58608,
  75. .vfmin = 64,
  76. .vfmax = 64,
  77. }, { /* VGA */
  78. .hfmin = 30000,
  79. .hfmax = 70000,
  80. .vfmin = 60,
  81. .vfmax = 60,
  82. }, { /* SVGA */
  83. .hfmin = 30000,
  84. .hfmax = 70000,
  85. .vfmin = 56,
  86. .vfmax = 75,
  87. }, {
  88. .hfmin = 30000,
  89. .hfmax = 70000,
  90. .vfmin = 60,
  91. .vfmax = 60,
  92. }
  93. };
  94. static struct fb_info fb_info;
  95. static struct acornfb_par current_par;
  96. static struct vidc_timing current_vidc;
  97. extern unsigned int vram_size; /* set by setup.c */
  98. #ifdef HAS_VIDC
  99. #define MAX_SIZE 480*1024
  100. /* CTL VIDC Actual
  101. * 24.000 0 8.000
  102. * 25.175 0 8.392
  103. * 36.000 0 12.000
  104. * 24.000 1 12.000
  105. * 25.175 1 12.588
  106. * 24.000 2 16.000
  107. * 25.175 2 16.783
  108. * 36.000 1 18.000
  109. * 24.000 3 24.000
  110. * 36.000 2 24.000
  111. * 25.175 3 25.175
  112. * 36.000 3 36.000
  113. */
  114. struct pixclock {
  115. u_long min_clock;
  116. u_long max_clock;
  117. u_int vidc_ctl;
  118. u_int vid_ctl;
  119. };
  120. static struct pixclock arc_clocks[] = {
  121. /* we allow +/-1% on these */
  122. { 123750, 126250, VIDC_CTRL_DIV3, VID_CTL_24MHz }, /* 8.000MHz */
  123. { 82500, 84167, VIDC_CTRL_DIV2, VID_CTL_24MHz }, /* 12.000MHz */
  124. { 61875, 63125, VIDC_CTRL_DIV1_5, VID_CTL_24MHz }, /* 16.000MHz */
  125. { 41250, 42083, VIDC_CTRL_DIV1, VID_CTL_24MHz }, /* 24.000MHz */
  126. };
  127. #ifdef CONFIG_ARCH_A5K
  128. static struct pixclock a5k_clocks[] = {
  129. { 117974, 120357, VIDC_CTRL_DIV3, VID_CTL_25MHz }, /* 8.392MHz */
  130. { 78649, 80238, VIDC_CTRL_DIV2, VID_CTL_25MHz }, /* 12.588MHz */
  131. { 58987, 60178, VIDC_CTRL_DIV1_5, VID_CTL_25MHz }, /* 16.588MHz */
  132. { 55000, 56111, VIDC_CTRL_DIV2, VID_CTL_36MHz }, /* 18.000MHz */
  133. { 39325, 40119, VIDC_CTRL_DIV1, VID_CTL_25MHz }, /* 25.175MHz */
  134. { 27500, 28055, VIDC_CTRL_DIV1, VID_CTL_36MHz }, /* 36.000MHz */
  135. };
  136. #endif
  137. static struct pixclock *
  138. acornfb_valid_pixrate(struct fb_var_screeninfo *var)
  139. {
  140. u_long pixclock = var->pixclock;
  141. u_int i;
  142. if (!var->pixclock)
  143. return NULL;
  144. for (i = 0; i < ARRAY_SIZE(arc_clocks); i++)
  145. if (pixclock > arc_clocks[i].min_clock &&
  146. pixclock < arc_clocks[i].max_clock)
  147. return arc_clocks + i;
  148. #ifdef CONFIG_ARCH_A5K
  149. if (machine_is_a5k()) {
  150. for (i = 0; i < ARRAY_SIZE(a5k_clocks); i++)
  151. if (pixclock > a5k_clocks[i].min_clock &&
  152. pixclock < a5k_clocks[i].max_clock)
  153. return a5k_clocks + i;
  154. }
  155. #endif
  156. return NULL;
  157. }
  158. /* VIDC Rules:
  159. * hcr : must be even (interlace, hcr/2 must be even)
  160. * hswr : must be even
  161. * hdsr : must be odd
  162. * hder : must be odd
  163. *
  164. * vcr : must be odd
  165. * vswr : >= 1
  166. * vdsr : >= 1
  167. * vder : >= vdsr
  168. * if interlaced, then hcr/2 must be even
  169. */
  170. static void
  171. acornfb_set_timing(struct fb_var_screeninfo *var)
  172. {
  173. struct pixclock *pclk;
  174. struct vidc_timing vidc;
  175. u_int horiz_correction;
  176. u_int sync_len, display_start, display_end, cycle;
  177. u_int is_interlaced;
  178. u_int vid_ctl, vidc_ctl;
  179. u_int bandwidth;
  180. memset(&vidc, 0, sizeof(vidc));
  181. pclk = acornfb_valid_pixrate(var);
  182. vidc_ctl = pclk->vidc_ctl;
  183. vid_ctl = pclk->vid_ctl;
  184. bandwidth = var->pixclock * 8 / var->bits_per_pixel;
  185. /* 25.175, 4bpp = 79.444ns per byte, 317.776ns per word: fifo = 2,6 */
  186. if (bandwidth > 143500)
  187. vidc_ctl |= VIDC_CTRL_FIFO_3_7;
  188. else if (bandwidth > 71750)
  189. vidc_ctl |= VIDC_CTRL_FIFO_2_6;
  190. else if (bandwidth > 35875)
  191. vidc_ctl |= VIDC_CTRL_FIFO_1_5;
  192. else
  193. vidc_ctl |= VIDC_CTRL_FIFO_0_4;
  194. switch (var->bits_per_pixel) {
  195. case 1:
  196. horiz_correction = 19;
  197. vidc_ctl |= VIDC_CTRL_1BPP;
  198. break;
  199. case 2:
  200. horiz_correction = 11;
  201. vidc_ctl |= VIDC_CTRL_2BPP;
  202. break;
  203. case 4:
  204. horiz_correction = 7;
  205. vidc_ctl |= VIDC_CTRL_4BPP;
  206. break;
  207. default:
  208. case 8:
  209. horiz_correction = 5;
  210. vidc_ctl |= VIDC_CTRL_8BPP;
  211. break;
  212. }
  213. if (var->sync & FB_SYNC_COMP_HIGH_ACT) /* should be FB_SYNC_COMP */
  214. vidc_ctl |= VIDC_CTRL_CSYNC;
  215. else {
  216. if (!(var->sync & FB_SYNC_HOR_HIGH_ACT))
  217. vid_ctl |= VID_CTL_HS_NHSYNC;
  218. if (!(var->sync & FB_SYNC_VERT_HIGH_ACT))
  219. vid_ctl |= VID_CTL_VS_NVSYNC;
  220. }
  221. sync_len = var->hsync_len;
  222. display_start = sync_len + var->left_margin;
  223. display_end = display_start + var->xres;
  224. cycle = display_end + var->right_margin;
  225. /* if interlaced, then hcr/2 must be even */
  226. is_interlaced = (var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED;
  227. if (is_interlaced) {
  228. vidc_ctl |= VIDC_CTRL_INTERLACE;
  229. if (cycle & 2) {
  230. cycle += 2;
  231. var->right_margin += 2;
  232. }
  233. }
  234. vidc.h_cycle = (cycle - 2) / 2;
  235. vidc.h_sync_width = (sync_len - 2) / 2;
  236. vidc.h_border_start = (display_start - 1) / 2;
  237. vidc.h_display_start = (display_start - horiz_correction) / 2;
  238. vidc.h_display_end = (display_end - horiz_correction) / 2;
  239. vidc.h_border_end = (display_end - 1) / 2;
  240. vidc.h_interlace = (vidc.h_cycle + 1) / 2;
  241. sync_len = var->vsync_len;
  242. display_start = sync_len + var->upper_margin;
  243. display_end = display_start + var->yres;
  244. cycle = display_end + var->lower_margin;
  245. if (is_interlaced)
  246. cycle = (cycle - 3) / 2;
  247. else
  248. cycle = cycle - 1;
  249. vidc.v_cycle = cycle;
  250. vidc.v_sync_width = sync_len - 1;
  251. vidc.v_border_start = display_start - 1;
  252. vidc.v_display_start = vidc.v_border_start;
  253. vidc.v_display_end = display_end - 1;
  254. vidc.v_border_end = vidc.v_display_end;
  255. if (machine_is_a5k())
  256. __raw_writeb(vid_ctl, IOEB_VID_CTL);
  257. if (memcmp(&current_vidc, &vidc, sizeof(vidc))) {
  258. current_vidc = vidc;
  259. vidc_writel(0xe0000000 | vidc_ctl);
  260. vidc_writel(0x80000000 | (vidc.h_cycle << 14));
  261. vidc_writel(0x84000000 | (vidc.h_sync_width << 14));
  262. vidc_writel(0x88000000 | (vidc.h_border_start << 14));
  263. vidc_writel(0x8c000000 | (vidc.h_display_start << 14));
  264. vidc_writel(0x90000000 | (vidc.h_display_end << 14));
  265. vidc_writel(0x94000000 | (vidc.h_border_end << 14));
  266. vidc_writel(0x98000000);
  267. vidc_writel(0x9c000000 | (vidc.h_interlace << 14));
  268. vidc_writel(0xa0000000 | (vidc.v_cycle << 14));
  269. vidc_writel(0xa4000000 | (vidc.v_sync_width << 14));
  270. vidc_writel(0xa8000000 | (vidc.v_border_start << 14));
  271. vidc_writel(0xac000000 | (vidc.v_display_start << 14));
  272. vidc_writel(0xb0000000 | (vidc.v_display_end << 14));
  273. vidc_writel(0xb4000000 | (vidc.v_border_end << 14));
  274. vidc_writel(0xb8000000);
  275. vidc_writel(0xbc000000);
  276. }
  277. #ifdef DEBUG_MODE_SELECTION
  278. printk(KERN_DEBUG "VIDC registers for %dx%dx%d:\n", var->xres,
  279. var->yres, var->bits_per_pixel);
  280. printk(KERN_DEBUG " H-cycle : %d\n", vidc.h_cycle);
  281. printk(KERN_DEBUG " H-sync-width : %d\n", vidc.h_sync_width);
  282. printk(KERN_DEBUG " H-border-start : %d\n", vidc.h_border_start);
  283. printk(KERN_DEBUG " H-display-start : %d\n", vidc.h_display_start);
  284. printk(KERN_DEBUG " H-display-end : %d\n", vidc.h_display_end);
  285. printk(KERN_DEBUG " H-border-end : %d\n", vidc.h_border_end);
  286. printk(KERN_DEBUG " H-interlace : %d\n", vidc.h_interlace);
  287. printk(KERN_DEBUG " V-cycle : %d\n", vidc.v_cycle);
  288. printk(KERN_DEBUG " V-sync-width : %d\n", vidc.v_sync_width);
  289. printk(KERN_DEBUG " V-border-start : %d\n", vidc.v_border_start);
  290. printk(KERN_DEBUG " V-display-start : %d\n", vidc.v_display_start);
  291. printk(KERN_DEBUG " V-display-end : %d\n", vidc.v_display_end);
  292. printk(KERN_DEBUG " V-border-end : %d\n", vidc.v_border_end);
  293. printk(KERN_DEBUG " VIDC Ctrl (E) : 0x%08X\n", vidc_ctl);
  294. printk(KERN_DEBUG " IOEB Ctrl : 0x%08X\n", vid_ctl);
  295. #endif
  296. }
  297. static int
  298. acornfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  299. u_int trans, struct fb_info *info)
  300. {
  301. union palette pal;
  302. if (regno >= current_par.palette_size)
  303. return 1;
  304. pal.p = 0;
  305. pal.vidc.reg = regno;
  306. pal.vidc.red = red >> 12;
  307. pal.vidc.green = green >> 12;
  308. pal.vidc.blue = blue >> 12;
  309. current_par.palette[regno] = pal;
  310. vidc_writel(pal.p);
  311. return 0;
  312. }
  313. #endif
  314. #ifdef HAS_VIDC20
  315. #include <asm/arch/acornfb.h>
  316. #define MAX_SIZE 2*1024*1024
  317. /* VIDC20 has a different set of rules from the VIDC:
  318. * hcr : must be multiple of 4
  319. * hswr : must be even
  320. * hdsr : must be even
  321. * hder : must be even
  322. * vcr : >= 2, (interlace, must be odd)
  323. * vswr : >= 1
  324. * vdsr : >= 1
  325. * vder : >= vdsr
  326. */
  327. static void acornfb_set_timing(struct fb_info *info)
  328. {
  329. struct fb_var_screeninfo *var = &info->var;
  330. struct vidc_timing vidc;
  331. u_int vcr, fsize;
  332. u_int ext_ctl, dat_ctl;
  333. u_int words_per_line;
  334. memset(&vidc, 0, sizeof(vidc));
  335. vidc.h_sync_width = var->hsync_len - 8;
  336. vidc.h_border_start = vidc.h_sync_width + var->left_margin + 8 - 12;
  337. vidc.h_display_start = vidc.h_border_start + 12 - 18;
  338. vidc.h_display_end = vidc.h_display_start + var->xres;
  339. vidc.h_border_end = vidc.h_display_end + 18 - 12;
  340. vidc.h_cycle = vidc.h_border_end + var->right_margin + 12 - 8;
  341. vidc.h_interlace = vidc.h_cycle / 2;
  342. vidc.v_sync_width = var->vsync_len - 1;
  343. vidc.v_border_start = vidc.v_sync_width + var->upper_margin;
  344. vidc.v_display_start = vidc.v_border_start;
  345. vidc.v_display_end = vidc.v_display_start + var->yres;
  346. vidc.v_border_end = vidc.v_display_end;
  347. vidc.control = acornfb_default_control();
  348. vcr = var->vsync_len + var->upper_margin + var->yres +
  349. var->lower_margin;
  350. if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
  351. vidc.v_cycle = (vcr - 3) / 2;
  352. vidc.control |= VIDC20_CTRL_INT;
  353. } else
  354. vidc.v_cycle = vcr - 2;
  355. switch (var->bits_per_pixel) {
  356. case 1: vidc.control |= VIDC20_CTRL_1BPP; break;
  357. case 2: vidc.control |= VIDC20_CTRL_2BPP; break;
  358. case 4: vidc.control |= VIDC20_CTRL_4BPP; break;
  359. default:
  360. case 8: vidc.control |= VIDC20_CTRL_8BPP; break;
  361. case 16: vidc.control |= VIDC20_CTRL_16BPP; break;
  362. case 32: vidc.control |= VIDC20_CTRL_32BPP; break;
  363. }
  364. acornfb_vidc20_find_rates(&vidc, var);
  365. fsize = var->vsync_len + var->upper_margin + var->lower_margin - 1;
  366. if (memcmp(&current_vidc, &vidc, sizeof(vidc))) {
  367. current_vidc = vidc;
  368. vidc_writel(VIDC20_CTRL| vidc.control);
  369. vidc_writel(0xd0000000 | vidc.pll_ctl);
  370. vidc_writel(0x80000000 | vidc.h_cycle);
  371. vidc_writel(0x81000000 | vidc.h_sync_width);
  372. vidc_writel(0x82000000 | vidc.h_border_start);
  373. vidc_writel(0x83000000 | vidc.h_display_start);
  374. vidc_writel(0x84000000 | vidc.h_display_end);
  375. vidc_writel(0x85000000 | vidc.h_border_end);
  376. vidc_writel(0x86000000);
  377. vidc_writel(0x87000000 | vidc.h_interlace);
  378. vidc_writel(0x90000000 | vidc.v_cycle);
  379. vidc_writel(0x91000000 | vidc.v_sync_width);
  380. vidc_writel(0x92000000 | vidc.v_border_start);
  381. vidc_writel(0x93000000 | vidc.v_display_start);
  382. vidc_writel(0x94000000 | vidc.v_display_end);
  383. vidc_writel(0x95000000 | vidc.v_border_end);
  384. vidc_writel(0x96000000);
  385. vidc_writel(0x97000000);
  386. }
  387. iomd_writel(fsize, IOMD_FSIZE);
  388. ext_ctl = acornfb_default_econtrol();
  389. if (var->sync & FB_SYNC_COMP_HIGH_ACT) /* should be FB_SYNC_COMP */
  390. ext_ctl |= VIDC20_ECTL_HS_NCSYNC | VIDC20_ECTL_VS_NCSYNC;
  391. else {
  392. if (var->sync & FB_SYNC_HOR_HIGH_ACT)
  393. ext_ctl |= VIDC20_ECTL_HS_HSYNC;
  394. else
  395. ext_ctl |= VIDC20_ECTL_HS_NHSYNC;
  396. if (var->sync & FB_SYNC_VERT_HIGH_ACT)
  397. ext_ctl |= VIDC20_ECTL_VS_VSYNC;
  398. else
  399. ext_ctl |= VIDC20_ECTL_VS_NVSYNC;
  400. }
  401. vidc_writel(VIDC20_ECTL | ext_ctl);
  402. words_per_line = var->xres * var->bits_per_pixel / 32;
  403. if (current_par.using_vram && info->fix.smem_len == 2048*1024)
  404. words_per_line /= 2;
  405. /* RiscPC doesn't use the VIDC's VRAM control. */
  406. dat_ctl = VIDC20_DCTL_VRAM_DIS | VIDC20_DCTL_SNA | words_per_line;
  407. /* The data bus width is dependent on both the type
  408. * and amount of video memory.
  409. * DRAM 32bit low
  410. * 1MB VRAM 32bit
  411. * 2MB VRAM 64bit
  412. */
  413. if (current_par.using_vram && current_par.vram_half_sam == 2048)
  414. dat_ctl |= VIDC20_DCTL_BUS_D63_0;
  415. else
  416. dat_ctl |= VIDC20_DCTL_BUS_D31_0;
  417. vidc_writel(VIDC20_DCTL | dat_ctl);
  418. #ifdef DEBUG_MODE_SELECTION
  419. printk(KERN_DEBUG "VIDC registers for %dx%dx%d:\n", var->xres,
  420. var->yres, var->bits_per_pixel);
  421. printk(KERN_DEBUG " H-cycle : %d\n", vidc.h_cycle);
  422. printk(KERN_DEBUG " H-sync-width : %d\n", vidc.h_sync_width);
  423. printk(KERN_DEBUG " H-border-start : %d\n", vidc.h_border_start);
  424. printk(KERN_DEBUG " H-display-start : %d\n", vidc.h_display_start);
  425. printk(KERN_DEBUG " H-display-end : %d\n", vidc.h_display_end);
  426. printk(KERN_DEBUG " H-border-end : %d\n", vidc.h_border_end);
  427. printk(KERN_DEBUG " H-interlace : %d\n", vidc.h_interlace);
  428. printk(KERN_DEBUG " V-cycle : %d\n", vidc.v_cycle);
  429. printk(KERN_DEBUG " V-sync-width : %d\n", vidc.v_sync_width);
  430. printk(KERN_DEBUG " V-border-start : %d\n", vidc.v_border_start);
  431. printk(KERN_DEBUG " V-display-start : %d\n", vidc.v_display_start);
  432. printk(KERN_DEBUG " V-display-end : %d\n", vidc.v_display_end);
  433. printk(KERN_DEBUG " V-border-end : %d\n", vidc.v_border_end);
  434. printk(KERN_DEBUG " Ext Ctrl (C) : 0x%08X\n", ext_ctl);
  435. printk(KERN_DEBUG " PLL Ctrl (D) : 0x%08X\n", vidc.pll_ctl);
  436. printk(KERN_DEBUG " Ctrl (E) : 0x%08X\n", vidc.control);
  437. printk(KERN_DEBUG " Data Ctrl (F) : 0x%08X\n", dat_ctl);
  438. printk(KERN_DEBUG " Fsize : 0x%08X\n", fsize);
  439. #endif
  440. }
  441. /*
  442. * We have to take note of the VIDC20's 16-bit palette here.
  443. * The VIDC20 looks up a 16 bit pixel as follows:
  444. *
  445. * bits 111111
  446. * 5432109876543210
  447. * red ++++++++ (8 bits, 7 to 0)
  448. * green ++++++++ (8 bits, 11 to 4)
  449. * blue ++++++++ (8 bits, 15 to 8)
  450. *
  451. * We use a pixel which looks like:
  452. *
  453. * bits 111111
  454. * 5432109876543210
  455. * red +++++ (5 bits, 4 to 0)
  456. * green +++++ (5 bits, 9 to 5)
  457. * blue +++++ (5 bits, 14 to 10)
  458. */
  459. static int
  460. acornfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  461. u_int trans, struct fb_info *info)
  462. {
  463. union palette pal;
  464. if (regno >= current_par.palette_size)
  465. return 1;
  466. if (regno < 16 && info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
  467. u32 pseudo_val;
  468. pseudo_val = regno << info->var.red.offset;
  469. pseudo_val |= regno << info->var.green.offset;
  470. pseudo_val |= regno << info->var.blue.offset;
  471. ((u32 *)info->pseudo_palette)[regno] = pseudo_val;
  472. }
  473. pal.p = 0;
  474. pal.vidc20.red = red >> 8;
  475. pal.vidc20.green = green >> 8;
  476. pal.vidc20.blue = blue >> 8;
  477. current_par.palette[regno] = pal;
  478. if (info->var.bits_per_pixel == 16) {
  479. int i;
  480. pal.p = 0;
  481. vidc_writel(0x10000000);
  482. for (i = 0; i < 256; i += 1) {
  483. pal.vidc20.red = current_par.palette[ i & 31].vidc20.red;
  484. pal.vidc20.green = current_par.palette[(i >> 1) & 31].vidc20.green;
  485. pal.vidc20.blue = current_par.palette[(i >> 2) & 31].vidc20.blue;
  486. vidc_writel(pal.p);
  487. /* Palette register pointer auto-increments */
  488. }
  489. } else {
  490. vidc_writel(0x10000000 | regno);
  491. vidc_writel(pal.p);
  492. }
  493. return 0;
  494. }
  495. #endif
  496. /*
  497. * Before selecting the timing parameters, adjust
  498. * the resolution to fit the rules.
  499. */
  500. static int
  501. acornfb_adjust_timing(struct fb_info *info, struct fb_var_screeninfo *var, u_int fontht)
  502. {
  503. u_int font_line_len, sam_size, min_size, size, nr_y;
  504. /* xres must be even */
  505. var->xres = (var->xres + 1) & ~1;
  506. /*
  507. * We don't allow xres_virtual to differ from xres
  508. */
  509. var->xres_virtual = var->xres;
  510. var->xoffset = 0;
  511. if (current_par.using_vram)
  512. sam_size = current_par.vram_half_sam * 2;
  513. else
  514. sam_size = 16;
  515. /*
  516. * Now, find a value for yres_virtual which allows
  517. * us to do ywrap scrolling. The value of
  518. * yres_virtual must be such that the end of the
  519. * displayable frame buffer must be aligned with
  520. * the start of a font line.
  521. */
  522. font_line_len = var->xres * var->bits_per_pixel * fontht / 8;
  523. min_size = var->xres * var->yres * var->bits_per_pixel / 8;
  524. /*
  525. * If minimum screen size is greater than that we have
  526. * available, reject it.
  527. */
  528. if (min_size > info->fix.smem_len)
  529. return -EINVAL;
  530. /* Find int 'y', such that y * fll == s * sam < maxsize
  531. * y = s * sam / fll; s = maxsize / sam
  532. */
  533. for (size = info->fix.smem_len;
  534. nr_y = size / font_line_len, min_size <= size;
  535. size -= sam_size) {
  536. if (nr_y * font_line_len == size)
  537. break;
  538. }
  539. nr_y *= fontht;
  540. if (var->accel_flags & FB_ACCELF_TEXT) {
  541. if (min_size > size) {
  542. /*
  543. * failed, use ypan
  544. */
  545. size = info->fix.smem_len;
  546. var->yres_virtual = size / (font_line_len / fontht);
  547. } else
  548. var->yres_virtual = nr_y;
  549. } else if (var->yres_virtual > nr_y)
  550. var->yres_virtual = nr_y;
  551. current_par.screen_end = info->fix.smem_start + size;
  552. /*
  553. * Fix yres & yoffset if needed.
  554. */
  555. if (var->yres > var->yres_virtual)
  556. var->yres = var->yres_virtual;
  557. if (var->vmode & FB_VMODE_YWRAP) {
  558. if (var->yoffset > var->yres_virtual)
  559. var->yoffset = var->yres_virtual;
  560. } else {
  561. if (var->yoffset + var->yres > var->yres_virtual)
  562. var->yoffset = var->yres_virtual - var->yres;
  563. }
  564. /* hsync_len must be even */
  565. var->hsync_len = (var->hsync_len + 1) & ~1;
  566. #ifdef HAS_VIDC
  567. /* left_margin must be odd */
  568. if ((var->left_margin & 1) == 0) {
  569. var->left_margin -= 1;
  570. var->right_margin += 1;
  571. }
  572. /* right_margin must be odd */
  573. var->right_margin |= 1;
  574. #elif defined(HAS_VIDC20)
  575. /* left_margin must be even */
  576. if (var->left_margin & 1) {
  577. var->left_margin += 1;
  578. var->right_margin -= 1;
  579. }
  580. /* right_margin must be even */
  581. if (var->right_margin & 1)
  582. var->right_margin += 1;
  583. #endif
  584. if (var->vsync_len < 1)
  585. var->vsync_len = 1;
  586. return 0;
  587. }
  588. static int
  589. acornfb_validate_timing(struct fb_var_screeninfo *var,
  590. struct fb_monspecs *monspecs)
  591. {
  592. unsigned long hs, vs;
  593. /*
  594. * hs(Hz) = 10^12 / (pixclock * xtotal)
  595. * vs(Hz) = hs(Hz) / ytotal
  596. *
  597. * No need to do long long divisions or anything
  598. * like that if you factor it correctly
  599. */
  600. hs = 1953125000 / var->pixclock;
  601. hs = hs * 512 /
  602. (var->xres + var->left_margin + var->right_margin + var->hsync_len);
  603. vs = hs /
  604. (var->yres + var->upper_margin + var->lower_margin + var->vsync_len);
  605. return (vs >= monspecs->vfmin && vs <= monspecs->vfmax &&
  606. hs >= monspecs->hfmin && hs <= monspecs->hfmax) ? 0 : -EINVAL;
  607. }
  608. static inline void
  609. acornfb_update_dma(struct fb_info *info, struct fb_var_screeninfo *var)
  610. {
  611. u_int off = var->yoffset * info->fix.line_length;
  612. #if defined(HAS_MEMC)
  613. memc_write(VDMA_INIT, off >> 2);
  614. #elif defined(HAS_IOMD)
  615. iomd_writel(info->fix.smem_start + off, IOMD_VIDINIT);
  616. #endif
  617. }
  618. static int
  619. acornfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  620. {
  621. u_int fontht;
  622. int err;
  623. /*
  624. * FIXME: Find the font height
  625. */
  626. fontht = 8;
  627. var->red.msb_right = 0;
  628. var->green.msb_right = 0;
  629. var->blue.msb_right = 0;
  630. var->transp.msb_right = 0;
  631. switch (var->bits_per_pixel) {
  632. case 1: case 2: case 4: case 8:
  633. var->red.offset = 0;
  634. var->red.length = var->bits_per_pixel;
  635. var->green = var->red;
  636. var->blue = var->red;
  637. var->transp.offset = 0;
  638. var->transp.length = 0;
  639. break;
  640. #ifdef HAS_VIDC20
  641. case 16:
  642. var->red.offset = 0;
  643. var->red.length = 5;
  644. var->green.offset = 5;
  645. var->green.length = 5;
  646. var->blue.offset = 10;
  647. var->blue.length = 5;
  648. var->transp.offset = 15;
  649. var->transp.length = 1;
  650. break;
  651. case 32:
  652. var->red.offset = 0;
  653. var->red.length = 8;
  654. var->green.offset = 8;
  655. var->green.length = 8;
  656. var->blue.offset = 16;
  657. var->blue.length = 8;
  658. var->transp.offset = 24;
  659. var->transp.length = 4;
  660. break;
  661. #endif
  662. default:
  663. return -EINVAL;
  664. }
  665. /*
  666. * Check to see if the pixel rate is valid.
  667. */
  668. if (!acornfb_valid_pixrate(var))
  669. return -EINVAL;
  670. /*
  671. * Validate and adjust the resolution to
  672. * match the video generator hardware.
  673. */
  674. err = acornfb_adjust_timing(info, var, fontht);
  675. if (err)
  676. return err;
  677. /*
  678. * Validate the timing against the
  679. * monitor hardware.
  680. */
  681. return acornfb_validate_timing(var, &info->monspecs);
  682. }
  683. static int acornfb_set_par(struct fb_info *info)
  684. {
  685. switch (info->var.bits_per_pixel) {
  686. case 1:
  687. current_par.palette_size = 2;
  688. info->fix.visual = FB_VISUAL_MONO10;
  689. break;
  690. case 2:
  691. current_par.palette_size = 4;
  692. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  693. break;
  694. case 4:
  695. current_par.palette_size = 16;
  696. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  697. break;
  698. case 8:
  699. current_par.palette_size = VIDC_PALETTE_SIZE;
  700. #ifdef HAS_VIDC
  701. info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
  702. #else
  703. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  704. #endif
  705. break;
  706. #ifdef HAS_VIDC20
  707. case 16:
  708. current_par.palette_size = 32;
  709. info->fix.visual = FB_VISUAL_DIRECTCOLOR;
  710. break;
  711. case 32:
  712. current_par.palette_size = VIDC_PALETTE_SIZE;
  713. info->fix.visual = FB_VISUAL_DIRECTCOLOR;
  714. break;
  715. #endif
  716. default:
  717. BUG();
  718. }
  719. info->fix.line_length = (info->var.xres * info->var.bits_per_pixel) / 8;
  720. #if defined(HAS_MEMC)
  721. {
  722. unsigned long size = info->fix.smem_len - VDMA_XFERSIZE;
  723. memc_write(VDMA_START, 0);
  724. memc_write(VDMA_END, size >> 2);
  725. }
  726. #elif defined(HAS_IOMD)
  727. {
  728. unsigned long start, size;
  729. u_int control;
  730. start = info->fix.smem_start;
  731. size = current_par.screen_end;
  732. if (current_par.using_vram) {
  733. size -= current_par.vram_half_sam;
  734. control = DMA_CR_E | (current_par.vram_half_sam / 256);
  735. } else {
  736. size -= 16;
  737. control = DMA_CR_E | DMA_CR_D | 16;
  738. }
  739. iomd_writel(start, IOMD_VIDSTART);
  740. iomd_writel(size, IOMD_VIDEND);
  741. iomd_writel(control, IOMD_VIDCR);
  742. }
  743. #endif
  744. acornfb_update_dma(info, &info->var);
  745. acornfb_set_timing(info);
  746. return 0;
  747. }
  748. static int
  749. acornfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
  750. {
  751. u_int y_bottom = var->yoffset;
  752. if (!(var->vmode & FB_VMODE_YWRAP))
  753. y_bottom += var->yres;
  754. BUG_ON(y_bottom > var->yres_virtual);
  755. acornfb_update_dma(info, var);
  756. return 0;
  757. }
  758. /*
  759. * Note that we are entered with the kernel locked.
  760. */
  761. static int
  762. acornfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
  763. {
  764. unsigned long off, start;
  765. u32 len;
  766. off = vma->vm_pgoff << PAGE_SHIFT;
  767. start = info->fix.smem_start;
  768. len = PAGE_ALIGN(start & ~PAGE_MASK) + info->fix.smem_len;
  769. start &= PAGE_MASK;
  770. if ((vma->vm_end - vma->vm_start + off) > len)
  771. return -EINVAL;
  772. off += start;
  773. vma->vm_pgoff = off >> PAGE_SHIFT;
  774. /* This is an IO map - tell maydump to skip this VMA */
  775. vma->vm_flags |= VM_IO;
  776. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  777. /*
  778. * Don't alter the page protection flags; we want to keep the area
  779. * cached for better performance. This does mean that we may miss
  780. * some updates to the screen occasionally, but process switches
  781. * should cause the caches and buffers to be flushed often enough.
  782. */
  783. if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
  784. vma->vm_end - vma->vm_start,
  785. vma->vm_page_prot))
  786. return -EAGAIN;
  787. return 0;
  788. }
  789. static struct fb_ops acornfb_ops = {
  790. .owner = THIS_MODULE,
  791. .fb_check_var = acornfb_check_var,
  792. .fb_set_par = acornfb_set_par,
  793. .fb_setcolreg = acornfb_setcolreg,
  794. .fb_pan_display = acornfb_pan_display,
  795. .fb_fillrect = cfb_fillrect,
  796. .fb_copyarea = cfb_copyarea,
  797. .fb_imageblit = cfb_imageblit,
  798. .fb_mmap = acornfb_mmap,
  799. };
  800. /*
  801. * Everything after here is initialisation!!!
  802. */
  803. static struct fb_videomode modedb[] __initdata = {
  804. { /* 320x256 @ 50Hz */
  805. NULL, 50, 320, 256, 125000, 92, 62, 35, 19, 38, 2,
  806. FB_SYNC_COMP_HIGH_ACT,
  807. FB_VMODE_NONINTERLACED
  808. }, { /* 640x250 @ 50Hz, 15.6 kHz hsync */
  809. NULL, 50, 640, 250, 62500, 185, 123, 38, 21, 76, 3,
  810. 0,
  811. FB_VMODE_NONINTERLACED
  812. }, { /* 640x256 @ 50Hz, 15.6 kHz hsync */
  813. NULL, 50, 640, 256, 62500, 185, 123, 35, 18, 76, 3,
  814. 0,
  815. FB_VMODE_NONINTERLACED
  816. }, { /* 640x512 @ 50Hz, 26.8 kHz hsync */
  817. NULL, 50, 640, 512, 41667, 113, 87, 18, 1, 56, 3,
  818. 0,
  819. FB_VMODE_NONINTERLACED
  820. }, { /* 640x250 @ 70Hz, 31.5 kHz hsync */
  821. NULL, 70, 640, 250, 39722, 48, 16, 109, 88, 96, 2,
  822. 0,
  823. FB_VMODE_NONINTERLACED
  824. }, { /* 640x256 @ 70Hz, 31.5 kHz hsync */
  825. NULL, 70, 640, 256, 39722, 48, 16, 106, 85, 96, 2,
  826. 0,
  827. FB_VMODE_NONINTERLACED
  828. }, { /* 640x352 @ 70Hz, 31.5 kHz hsync */
  829. NULL, 70, 640, 352, 39722, 48, 16, 58, 37, 96, 2,
  830. 0,
  831. FB_VMODE_NONINTERLACED
  832. }, { /* 640x480 @ 60Hz, 31.5 kHz hsync */
  833. NULL, 60, 640, 480, 39722, 48, 16, 32, 11, 96, 2,
  834. 0,
  835. FB_VMODE_NONINTERLACED
  836. }, { /* 800x600 @ 56Hz, 35.2 kHz hsync */
  837. NULL, 56, 800, 600, 27778, 101, 23, 22, 1, 100, 2,
  838. 0,
  839. FB_VMODE_NONINTERLACED
  840. }, { /* 896x352 @ 60Hz, 21.8 kHz hsync */
  841. NULL, 60, 896, 352, 41667, 59, 27, 9, 0, 118, 3,
  842. 0,
  843. FB_VMODE_NONINTERLACED
  844. }, { /* 1024x 768 @ 60Hz, 48.4 kHz hsync */
  845. NULL, 60, 1024, 768, 15385, 160, 24, 29, 3, 136, 6,
  846. 0,
  847. FB_VMODE_NONINTERLACED
  848. }, { /* 1280x1024 @ 60Hz, 63.8 kHz hsync */
  849. NULL, 60, 1280, 1024, 9090, 186, 96, 38, 1, 160, 3,
  850. 0,
  851. FB_VMODE_NONINTERLACED
  852. }
  853. };
  854. static struct fb_videomode __initdata
  855. acornfb_default_mode = {
  856. .name = NULL,
  857. .refresh = 60,
  858. .xres = 640,
  859. .yres = 480,
  860. .pixclock = 39722,
  861. .left_margin = 56,
  862. .right_margin = 16,
  863. .upper_margin = 34,
  864. .lower_margin = 9,
  865. .hsync_len = 88,
  866. .vsync_len = 2,
  867. .sync = 0,
  868. .vmode = FB_VMODE_NONINTERLACED
  869. };
  870. static void __init acornfb_init_fbinfo(void)
  871. {
  872. static int first = 1;
  873. if (!first)
  874. return;
  875. first = 0;
  876. fb_info.fbops = &acornfb_ops;
  877. fb_info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
  878. fb_info.pseudo_palette = current_par.pseudo_palette;
  879. strcpy(fb_info.fix.id, "Acorn");
  880. fb_info.fix.type = FB_TYPE_PACKED_PIXELS;
  881. fb_info.fix.type_aux = 0;
  882. fb_info.fix.xpanstep = 0;
  883. fb_info.fix.ypanstep = 1;
  884. fb_info.fix.ywrapstep = 1;
  885. fb_info.fix.line_length = 0;
  886. fb_info.fix.accel = FB_ACCEL_NONE;
  887. /*
  888. * setup initial parameters
  889. */
  890. memset(&fb_info.var, 0, sizeof(fb_info.var));
  891. #if defined(HAS_VIDC20)
  892. fb_info.var.red.length = 8;
  893. fb_info.var.transp.length = 4;
  894. #elif defined(HAS_VIDC)
  895. fb_info.var.red.length = 4;
  896. fb_info.var.transp.length = 1;
  897. #endif
  898. fb_info.var.green = fb_info.var.red;
  899. fb_info.var.blue = fb_info.var.red;
  900. fb_info.var.nonstd = 0;
  901. fb_info.var.activate = FB_ACTIVATE_NOW;
  902. fb_info.var.height = -1;
  903. fb_info.var.width = -1;
  904. fb_info.var.vmode = FB_VMODE_NONINTERLACED;
  905. fb_info.var.accel_flags = FB_ACCELF_TEXT;
  906. current_par.dram_size = 0;
  907. current_par.montype = -1;
  908. current_par.dpms = 0;
  909. }
  910. /*
  911. * setup acornfb options:
  912. *
  913. * mon:hmin-hmax:vmin-vmax:dpms:width:height
  914. * Set monitor parameters:
  915. * hmin = horizontal minimum frequency (Hz)
  916. * hmax = horizontal maximum frequency (Hz) (optional)
  917. * vmin = vertical minimum frequency (Hz)
  918. * vmax = vertical maximum frequency (Hz) (optional)
  919. * dpms = DPMS supported? (optional)
  920. * width = width of picture in mm. (optional)
  921. * height = height of picture in mm. (optional)
  922. *
  923. * montype:type
  924. * Set RISC-OS style monitor type:
  925. * 0 (or tv) - TV frequency
  926. * 1 (or multi) - Multi frequency
  927. * 2 (or hires) - Hi-res monochrome
  928. * 3 (or vga) - VGA
  929. * 4 (or svga) - SVGA
  930. * auto, or option missing
  931. * - try hardware detect
  932. *
  933. * dram:size
  934. * Set the amount of DRAM to use for the frame buffer
  935. * (even if you have VRAM).
  936. * size can optionally be followed by 'M' or 'K' for
  937. * MB or KB respectively.
  938. */
  939. static void __init
  940. acornfb_parse_mon(char *opt)
  941. {
  942. char *p = opt;
  943. current_par.montype = -2;
  944. fb_info.monspecs.hfmin = simple_strtoul(p, &p, 0);
  945. if (*p == '-')
  946. fb_info.monspecs.hfmax = simple_strtoul(p + 1, &p, 0);
  947. else
  948. fb_info.monspecs.hfmax = fb_info.monspecs.hfmin;
  949. if (*p != ':')
  950. goto bad;
  951. fb_info.monspecs.vfmin = simple_strtoul(p + 1, &p, 0);
  952. if (*p == '-')
  953. fb_info.monspecs.vfmax = simple_strtoul(p + 1, &p, 0);
  954. else
  955. fb_info.monspecs.vfmax = fb_info.monspecs.vfmin;
  956. if (*p != ':')
  957. goto check_values;
  958. fb_info.monspecs.dpms = simple_strtoul(p + 1, &p, 0);
  959. if (*p != ':')
  960. goto check_values;
  961. fb_info.var.width = simple_strtoul(p + 1, &p, 0);
  962. if (*p != ':')
  963. goto check_values;
  964. fb_info.var.height = simple_strtoul(p + 1, NULL, 0);
  965. check_values:
  966. if (fb_info.monspecs.hfmax < fb_info.monspecs.hfmin ||
  967. fb_info.monspecs.vfmax < fb_info.monspecs.vfmin)
  968. goto bad;
  969. return;
  970. bad:
  971. printk(KERN_ERR "Acornfb: bad monitor settings: %s\n", opt);
  972. current_par.montype = -1;
  973. }
  974. static void __init
  975. acornfb_parse_montype(char *opt)
  976. {
  977. current_par.montype = -2;
  978. if (strncmp(opt, "tv", 2) == 0) {
  979. opt += 2;
  980. current_par.montype = 0;
  981. } else if (strncmp(opt, "multi", 5) == 0) {
  982. opt += 5;
  983. current_par.montype = 1;
  984. } else if (strncmp(opt, "hires", 5) == 0) {
  985. opt += 5;
  986. current_par.montype = 2;
  987. } else if (strncmp(opt, "vga", 3) == 0) {
  988. opt += 3;
  989. current_par.montype = 3;
  990. } else if (strncmp(opt, "svga", 4) == 0) {
  991. opt += 4;
  992. current_par.montype = 4;
  993. } else if (strncmp(opt, "auto", 4) == 0) {
  994. opt += 4;
  995. current_par.montype = -1;
  996. } else if (isdigit(*opt))
  997. current_par.montype = simple_strtoul(opt, &opt, 0);
  998. if (current_par.montype == -2 ||
  999. current_par.montype > NR_MONTYPES) {
  1000. printk(KERN_ERR "acornfb: unknown monitor type: %s\n",
  1001. opt);
  1002. current_par.montype = -1;
  1003. } else
  1004. if (opt && *opt) {
  1005. if (strcmp(opt, ",dpms") == 0)
  1006. current_par.dpms = 1;
  1007. else
  1008. printk(KERN_ERR
  1009. "acornfb: unknown monitor option: %s\n",
  1010. opt);
  1011. }
  1012. }
  1013. static void __init
  1014. acornfb_parse_dram(char *opt)
  1015. {
  1016. unsigned int size;
  1017. size = simple_strtoul(opt, &opt, 0);
  1018. if (opt) {
  1019. switch (*opt) {
  1020. case 'M':
  1021. case 'm':
  1022. size *= 1024;
  1023. case 'K':
  1024. case 'k':
  1025. size *= 1024;
  1026. default:
  1027. break;
  1028. }
  1029. }
  1030. current_par.dram_size = size;
  1031. }
  1032. static struct options {
  1033. char *name;
  1034. void (*parse)(char *opt);
  1035. } opt_table[] __initdata = {
  1036. { "mon", acornfb_parse_mon },
  1037. { "montype", acornfb_parse_montype },
  1038. { "dram", acornfb_parse_dram },
  1039. { NULL, NULL }
  1040. };
  1041. int __init
  1042. acornfb_setup(char *options)
  1043. {
  1044. struct options *optp;
  1045. char *opt;
  1046. if (!options || !*options)
  1047. return 0;
  1048. acornfb_init_fbinfo();
  1049. while ((opt = strsep(&options, ",")) != NULL) {
  1050. if (!*opt)
  1051. continue;
  1052. for (optp = opt_table; optp->name; optp++) {
  1053. int optlen;
  1054. optlen = strlen(optp->name);
  1055. if (strncmp(opt, optp->name, optlen) == 0 &&
  1056. opt[optlen] == ':') {
  1057. optp->parse(opt + optlen + 1);
  1058. break;
  1059. }
  1060. }
  1061. if (!optp->name)
  1062. printk(KERN_ERR "acornfb: unknown parameter: %s\n",
  1063. opt);
  1064. }
  1065. return 0;
  1066. }
  1067. /*
  1068. * Detect type of monitor connected
  1069. * For now, we just assume SVGA
  1070. */
  1071. static int __init
  1072. acornfb_detect_monitortype(void)
  1073. {
  1074. return 4;
  1075. }
  1076. /*
  1077. * This enables the unused memory to be freed on older Acorn machines.
  1078. * We are freeing memory on behalf of the architecture initialisation
  1079. * code here.
  1080. */
  1081. static inline void
  1082. free_unused_pages(unsigned int virtual_start, unsigned int virtual_end)
  1083. {
  1084. int mb_freed = 0;
  1085. /*
  1086. * Align addresses
  1087. */
  1088. virtual_start = PAGE_ALIGN(virtual_start);
  1089. virtual_end = PAGE_ALIGN(virtual_end);
  1090. while (virtual_start < virtual_end) {
  1091. struct page *page;
  1092. /*
  1093. * Clear page reserved bit,
  1094. * set count to 1, and free
  1095. * the page.
  1096. */
  1097. page = virt_to_page(virtual_start);
  1098. ClearPageReserved(page);
  1099. init_page_count(page);
  1100. free_page(virtual_start);
  1101. virtual_start += PAGE_SIZE;
  1102. mb_freed += PAGE_SIZE / 1024;
  1103. }
  1104. printk("acornfb: freed %dK memory\n", mb_freed);
  1105. }
  1106. static int __init acornfb_probe(struct platform_device *dev)
  1107. {
  1108. unsigned long size;
  1109. u_int h_sync, v_sync;
  1110. int rc, i;
  1111. char *option = NULL;
  1112. if (fb_get_options("acornfb", &option))
  1113. return -ENODEV;
  1114. acornfb_setup(option);
  1115. acornfb_init_fbinfo();
  1116. current_par.dev = &dev->dev;
  1117. if (current_par.montype == -1)
  1118. current_par.montype = acornfb_detect_monitortype();
  1119. if (current_par.montype == -1 || current_par.montype > NR_MONTYPES)
  1120. current_par.montype = 4;
  1121. if (current_par.montype >= 0) {
  1122. fb_info.monspecs = monspecs[current_par.montype];
  1123. fb_info.monspecs.dpms = current_par.dpms;
  1124. }
  1125. /*
  1126. * Try to select a suitable default mode
  1127. */
  1128. for (i = 0; i < ARRAY_SIZE(modedb); i++) {
  1129. unsigned long hs;
  1130. hs = modedb[i].refresh *
  1131. (modedb[i].yres + modedb[i].upper_margin +
  1132. modedb[i].lower_margin + modedb[i].vsync_len);
  1133. if (modedb[i].xres == DEFAULT_XRES &&
  1134. modedb[i].yres == DEFAULT_YRES &&
  1135. modedb[i].refresh >= fb_info.monspecs.vfmin &&
  1136. modedb[i].refresh <= fb_info.monspecs.vfmax &&
  1137. hs >= fb_info.monspecs.hfmin &&
  1138. hs <= fb_info.monspecs.hfmax) {
  1139. acornfb_default_mode = modedb[i];
  1140. break;
  1141. }
  1142. }
  1143. fb_info.screen_base = (char *)SCREEN_BASE;
  1144. fb_info.fix.smem_start = SCREEN_START;
  1145. current_par.using_vram = 0;
  1146. /*
  1147. * If vram_size is set, we are using VRAM in
  1148. * a Risc PC. However, if the user has specified
  1149. * an amount of DRAM then use that instead.
  1150. */
  1151. if (vram_size && !current_par.dram_size) {
  1152. size = vram_size;
  1153. current_par.vram_half_sam = vram_size / 1024;
  1154. current_par.using_vram = 1;
  1155. } else if (current_par.dram_size)
  1156. size = current_par.dram_size;
  1157. else
  1158. size = MAX_SIZE;
  1159. /*
  1160. * Limit maximum screen size.
  1161. */
  1162. if (size > MAX_SIZE)
  1163. size = MAX_SIZE;
  1164. size = PAGE_ALIGN(size);
  1165. #if defined(HAS_VIDC20)
  1166. if (!current_par.using_vram) {
  1167. dma_addr_t handle;
  1168. void *base;
  1169. /*
  1170. * RiscPC needs to allocate the DRAM memory
  1171. * for the framebuffer if we are not using
  1172. * VRAM.
  1173. */
  1174. base = dma_alloc_writecombine(current_par.dev, size, &handle,
  1175. GFP_KERNEL);
  1176. if (base == NULL) {
  1177. printk(KERN_ERR "acornfb: unable to allocate screen "
  1178. "memory\n");
  1179. return -ENOMEM;
  1180. }
  1181. fb_info.screen_base = base;
  1182. fb_info.fix.smem_start = handle;
  1183. }
  1184. #endif
  1185. #if defined(HAS_VIDC)
  1186. /*
  1187. * Archimedes/A5000 machines use a fixed address for their
  1188. * framebuffers. Free unused pages
  1189. */
  1190. free_unused_pages(PAGE_OFFSET + size, PAGE_OFFSET + MAX_SIZE);
  1191. #endif
  1192. fb_info.fix.smem_len = size;
  1193. current_par.palette_size = VIDC_PALETTE_SIZE;
  1194. /*
  1195. * Lookup the timing for this resolution. If we can't
  1196. * find it, then we can't restore it if we change
  1197. * the resolution, so we disable this feature.
  1198. */
  1199. do {
  1200. rc = fb_find_mode(&fb_info.var, &fb_info, NULL, modedb,
  1201. ARRAY_SIZE(modedb),
  1202. &acornfb_default_mode, DEFAULT_BPP);
  1203. /*
  1204. * If we found an exact match, all ok.
  1205. */
  1206. if (rc == 1)
  1207. break;
  1208. rc = fb_find_mode(&fb_info.var, &fb_info, NULL, NULL, 0,
  1209. &acornfb_default_mode, DEFAULT_BPP);
  1210. /*
  1211. * If we found an exact match, all ok.
  1212. */
  1213. if (rc == 1)
  1214. break;
  1215. rc = fb_find_mode(&fb_info.var, &fb_info, NULL, modedb,
  1216. ARRAY_SIZE(modedb),
  1217. &acornfb_default_mode, DEFAULT_BPP);
  1218. if (rc)
  1219. break;
  1220. rc = fb_find_mode(&fb_info.var, &fb_info, NULL, NULL, 0,
  1221. &acornfb_default_mode, DEFAULT_BPP);
  1222. } while (0);
  1223. /*
  1224. * If we didn't find an exact match, try the
  1225. * generic database.
  1226. */
  1227. if (rc == 0) {
  1228. printk("Acornfb: no valid mode found\n");
  1229. return -EINVAL;
  1230. }
  1231. h_sync = 1953125000 / fb_info.var.pixclock;
  1232. h_sync = h_sync * 512 / (fb_info.var.xres + fb_info.var.left_margin +
  1233. fb_info.var.right_margin + fb_info.var.hsync_len);
  1234. v_sync = h_sync / (fb_info.var.yres + fb_info.var.upper_margin +
  1235. fb_info.var.lower_margin + fb_info.var.vsync_len);
  1236. printk(KERN_INFO "Acornfb: %dkB %cRAM, %s, using %dx%d, "
  1237. "%d.%03dkHz, %dHz\n",
  1238. fb_info.fix.smem_len / 1024,
  1239. current_par.using_vram ? 'V' : 'D',
  1240. VIDC_NAME, fb_info.var.xres, fb_info.var.yres,
  1241. h_sync / 1000, h_sync % 1000, v_sync);
  1242. printk(KERN_INFO "Acornfb: Monitor: %d.%03d-%d.%03dkHz, %d-%dHz%s\n",
  1243. fb_info.monspecs.hfmin / 1000, fb_info.monspecs.hfmin % 1000,
  1244. fb_info.monspecs.hfmax / 1000, fb_info.monspecs.hfmax % 1000,
  1245. fb_info.monspecs.vfmin, fb_info.monspecs.vfmax,
  1246. fb_info.monspecs.dpms ? ", DPMS" : "");
  1247. if (fb_set_var(&fb_info, &fb_info.var))
  1248. printk(KERN_ERR "Acornfb: unable to set display parameters\n");
  1249. if (register_framebuffer(&fb_info) < 0)
  1250. return -EINVAL;
  1251. return 0;
  1252. }
  1253. static struct platform_driver acornfb_driver = {
  1254. .probe = acornfb_probe,
  1255. .driver = {
  1256. .name = "acornfb",
  1257. },
  1258. };
  1259. static int __init acornfb_init(void)
  1260. {
  1261. return platform_driver_register(&acornfb_driver);
  1262. }
  1263. module_init(acornfb_init);
  1264. MODULE_AUTHOR("Russell King");
  1265. MODULE_DESCRIPTION("VIDC 1/1a/20 framebuffer driver");
  1266. MODULE_LICENSE("GPL");