sh-sci.c 34 KB

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  1. /*
  2. * drivers/serial/sh-sci.c
  3. *
  4. * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
  5. *
  6. * Copyright (C) 2002 - 2006 Paul Mundt
  7. *
  8. * based off of the old drivers/char/sh-sci.c by:
  9. *
  10. * Copyright (C) 1999, 2000 Niibe Yutaka
  11. * Copyright (C) 2000 Sugioka Toshinobu
  12. * Modified to support multiple serial ports. Stuart Menefy (May 2000).
  13. * Modified to support SecureEdge. David McCullough (2002)
  14. * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
  15. *
  16. * This file is subject to the terms and conditions of the GNU General Public
  17. * License. See the file "COPYING" in the main directory of this archive
  18. * for more details.
  19. */
  20. #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  21. #define SUPPORT_SYSRQ
  22. #endif
  23. #undef DEBUG
  24. #include <linux/module.h>
  25. #include <linux/errno.h>
  26. #include <linux/timer.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/tty.h>
  29. #include <linux/tty_flip.h>
  30. #include <linux/serial.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/sysrq.h>
  34. #include <linux/ioport.h>
  35. #include <linux/mm.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <linux/console.h>
  39. #include <linux/platform_device.h>
  40. #ifdef CONFIG_CPU_FREQ
  41. #include <linux/notifier.h>
  42. #include <linux/cpufreq.h>
  43. #endif
  44. #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
  45. #include <asm/clock.h>
  46. #include <asm/sh_bios.h>
  47. #include <asm/kgdb.h>
  48. #endif
  49. #include <asm/sci.h>
  50. #include "sh-sci.h"
  51. struct sci_port {
  52. struct uart_port port;
  53. /* Port type */
  54. unsigned int type;
  55. /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
  56. unsigned int irqs[SCIx_NR_IRQS];
  57. /* Port pin configuration */
  58. void (*init_pins)(struct uart_port *port,
  59. unsigned int cflag);
  60. /* Port enable callback */
  61. void (*enable)(struct uart_port *port);
  62. /* Port disable callback */
  63. void (*disable)(struct uart_port *port);
  64. /* Break timer */
  65. struct timer_list break_timer;
  66. int break_flag;
  67. };
  68. #ifdef CONFIG_SH_KGDB
  69. static struct sci_port *kgdb_sci_port;
  70. #endif
  71. #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
  72. static struct sci_port *serial_console_port;
  73. #endif
  74. /* Function prototypes */
  75. static void sci_stop_tx(struct uart_port *port);
  76. #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
  77. static struct sci_port sci_ports[SCI_NPORTS];
  78. static struct uart_driver sci_uart_driver;
  79. #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
  80. defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
  81. static inline void handle_error(struct uart_port *port)
  82. {
  83. /* Clear error flags */
  84. sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
  85. }
  86. static int get_char(struct uart_port *port)
  87. {
  88. unsigned long flags;
  89. unsigned short status;
  90. int c;
  91. spin_lock_irqsave(&port->lock, flags);
  92. do {
  93. status = sci_in(port, SCxSR);
  94. if (status & SCxSR_ERRORS(port)) {
  95. handle_error(port);
  96. continue;
  97. }
  98. } while (!(status & SCxSR_RDxF(port)));
  99. c = sci_in(port, SCxRDR);
  100. sci_in(port, SCxSR); /* Dummy read */
  101. sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
  102. spin_unlock_irqrestore(&port->lock, flags);
  103. return c;
  104. }
  105. #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
  106. #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
  107. static void put_char(struct uart_port *port, char c)
  108. {
  109. unsigned long flags;
  110. unsigned short status;
  111. spin_lock_irqsave(&port->lock, flags);
  112. do {
  113. status = sci_in(port, SCxSR);
  114. } while (!(status & SCxSR_TDxE(port)));
  115. sci_out(port, SCxTDR, c);
  116. sci_in(port, SCxSR); /* Dummy read */
  117. sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
  118. spin_unlock_irqrestore(&port->lock, flags);
  119. }
  120. #endif
  121. #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
  122. static void put_string(struct sci_port *sci_port, const char *buffer, int count)
  123. {
  124. struct uart_port *port = &sci_port->port;
  125. const unsigned char *p = buffer;
  126. int i;
  127. #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
  128. int checksum;
  129. int usegdb=0;
  130. #ifdef CONFIG_SH_STANDARD_BIOS
  131. /* This call only does a trap the first time it is
  132. * called, and so is safe to do here unconditionally
  133. */
  134. usegdb |= sh_bios_in_gdb_mode();
  135. #endif
  136. #ifdef CONFIG_SH_KGDB
  137. usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port));
  138. #endif
  139. if (usegdb) {
  140. /* $<packet info>#<checksum>. */
  141. do {
  142. unsigned char c;
  143. put_char(port, '$');
  144. put_char(port, 'O'); /* 'O'utput to console */
  145. checksum = 'O';
  146. for (i=0; i<count; i++) { /* Don't use run length encoding */
  147. int h, l;
  148. c = *p++;
  149. h = highhex(c);
  150. l = lowhex(c);
  151. put_char(port, h);
  152. put_char(port, l);
  153. checksum += h + l;
  154. }
  155. put_char(port, '#');
  156. put_char(port, highhex(checksum));
  157. put_char(port, lowhex(checksum));
  158. } while (get_char(port) != '+');
  159. } else
  160. #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
  161. for (i=0; i<count; i++) {
  162. if (*p == 10)
  163. put_char(port, '\r');
  164. put_char(port, *p++);
  165. }
  166. }
  167. #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
  168. #ifdef CONFIG_SH_KGDB
  169. static int kgdb_sci_getchar(void)
  170. {
  171. int c;
  172. /* Keep trying to read a character, this could be neater */
  173. while ((c = get_char(kgdb_sci_port)) < 0)
  174. cpu_relax();
  175. return c;
  176. }
  177. static inline void kgdb_sci_putchar(int c)
  178. {
  179. put_char(kgdb_sci_port, c);
  180. }
  181. #endif /* CONFIG_SH_KGDB */
  182. #if defined(__H8300S__)
  183. enum { sci_disable, sci_enable };
  184. static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
  185. {
  186. volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
  187. int ch = (port->mapbase - SMR0) >> 3;
  188. unsigned char mask = 1 << (ch+1);
  189. if (ctrl == sci_disable) {
  190. *mstpcrl |= mask;
  191. } else {
  192. *mstpcrl &= ~mask;
  193. }
  194. }
  195. static inline void h8300_sci_enable(struct uart_port *port)
  196. {
  197. h8300_sci_config(port, sci_enable);
  198. }
  199. static inline void h8300_sci_disable(struct uart_port *port)
  200. {
  201. h8300_sci_config(port, sci_disable);
  202. }
  203. #endif
  204. #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
  205. defined(__H8300H__) || defined(__H8300S__)
  206. static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
  207. {
  208. int ch = (port->mapbase - SMR0) >> 3;
  209. /* set DDR regs */
  210. H8300_GPIO_DDR(h8300_sci_pins[ch].port,
  211. h8300_sci_pins[ch].rx,
  212. H8300_GPIO_INPUT);
  213. H8300_GPIO_DDR(h8300_sci_pins[ch].port,
  214. h8300_sci_pins[ch].tx,
  215. H8300_GPIO_OUTPUT);
  216. /* tx mark output*/
  217. H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
  218. }
  219. #else
  220. #define sci_init_pins_sci NULL
  221. #endif
  222. #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
  223. static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
  224. {
  225. unsigned int fcr_val = 0;
  226. if (cflag & CRTSCTS)
  227. fcr_val |= SCFCR_MCE;
  228. sci_out(port, SCFCR, fcr_val);
  229. }
  230. #else
  231. #define sci_init_pins_irda NULL
  232. #endif
  233. #ifdef SCI_ONLY
  234. #define sci_init_pins_scif NULL
  235. #endif
  236. #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
  237. #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
  238. /* SH7300 doesn't use RTS/CTS */
  239. static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
  240. {
  241. sci_out(port, SCFCR, 0);
  242. }
  243. #elif defined(CONFIG_CPU_SH3)
  244. /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
  245. static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
  246. {
  247. unsigned int fcr_val = 0;
  248. unsigned short data;
  249. /* We need to set SCPCR to enable RTS/CTS */
  250. data = ctrl_inw(SCPCR);
  251. /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
  252. ctrl_outw(data & 0x0fcf, SCPCR);
  253. if (cflag & CRTSCTS)
  254. fcr_val |= SCFCR_MCE;
  255. else {
  256. /* We need to set SCPCR to enable RTS/CTS */
  257. data = ctrl_inw(SCPCR);
  258. /* Clear out SCP7MD1,0, SCP4MD1,0,
  259. Set SCP6MD1,0 = {01} (output) */
  260. ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
  261. data = ctrl_inb(SCPDR);
  262. /* Set /RTS2 (bit6) = 0 */
  263. ctrl_outb(data & 0xbf, SCPDR);
  264. }
  265. sci_out(port, SCFCR, fcr_val);
  266. }
  267. #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
  268. static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
  269. {
  270. unsigned int fcr_val = 0;
  271. if (cflag & CRTSCTS) {
  272. fcr_val |= SCFCR_MCE;
  273. ctrl_outw(0x0000, PORT_PSCR);
  274. } else {
  275. unsigned short data;
  276. data = ctrl_inw(PORT_PSCR);
  277. data &= 0x033f;
  278. data |= 0x0400;
  279. ctrl_outw(data, PORT_PSCR);
  280. ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
  281. }
  282. sci_out(port, SCFCR, fcr_val);
  283. }
  284. #else
  285. /* For SH7750 */
  286. static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
  287. {
  288. unsigned int fcr_val = 0;
  289. if (cflag & CRTSCTS) {
  290. fcr_val |= SCFCR_MCE;
  291. } else {
  292. #ifdef CONFIG_CPU_SUBTYPE_SH7343
  293. /* Nothing */
  294. #elif defined(CONFIG_CPU_SUBTYPE_SH7780)
  295. ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
  296. #else
  297. ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
  298. #endif
  299. }
  300. sci_out(port, SCFCR, fcr_val);
  301. }
  302. #endif
  303. #if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
  304. static inline int scif_txroom(struct uart_port *port)
  305. {
  306. return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
  307. }
  308. static inline int scif_rxroom(struct uart_port *port)
  309. {
  310. return sci_in(port, SCRFDR) & 0x7f;
  311. }
  312. #else
  313. static inline int scif_txroom(struct uart_port *port)
  314. {
  315. return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
  316. }
  317. static inline int scif_rxroom(struct uart_port *port)
  318. {
  319. return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
  320. }
  321. #endif
  322. #endif /* SCIF_ONLY || SCI_AND_SCIF */
  323. static inline int sci_txroom(struct uart_port *port)
  324. {
  325. return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
  326. }
  327. static inline int sci_rxroom(struct uart_port *port)
  328. {
  329. return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
  330. }
  331. /* ********************************************************************** *
  332. * the interrupt related routines *
  333. * ********************************************************************** */
  334. static void sci_transmit_chars(struct uart_port *port)
  335. {
  336. struct circ_buf *xmit = &port->info->xmit;
  337. unsigned int stopped = uart_tx_stopped(port);
  338. unsigned short status;
  339. unsigned short ctrl;
  340. int count;
  341. status = sci_in(port, SCxSR);
  342. if (!(status & SCxSR_TDxE(port))) {
  343. ctrl = sci_in(port, SCSCR);
  344. if (uart_circ_empty(xmit)) {
  345. ctrl &= ~SCI_CTRL_FLAGS_TIE;
  346. } else {
  347. ctrl |= SCI_CTRL_FLAGS_TIE;
  348. }
  349. sci_out(port, SCSCR, ctrl);
  350. return;
  351. }
  352. #ifndef SCI_ONLY
  353. if (port->type == PORT_SCIF)
  354. count = scif_txroom(port);
  355. else
  356. #endif
  357. count = sci_txroom(port);
  358. do {
  359. unsigned char c;
  360. if (port->x_char) {
  361. c = port->x_char;
  362. port->x_char = 0;
  363. } else if (!uart_circ_empty(xmit) && !stopped) {
  364. c = xmit->buf[xmit->tail];
  365. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  366. } else {
  367. break;
  368. }
  369. sci_out(port, SCxTDR, c);
  370. port->icount.tx++;
  371. } while (--count > 0);
  372. sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
  373. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  374. uart_write_wakeup(port);
  375. if (uart_circ_empty(xmit)) {
  376. sci_stop_tx(port);
  377. } else {
  378. ctrl = sci_in(port, SCSCR);
  379. #if !defined(SCI_ONLY)
  380. if (port->type == PORT_SCIF) {
  381. sci_in(port, SCxSR); /* Dummy read */
  382. sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
  383. }
  384. #endif
  385. ctrl |= SCI_CTRL_FLAGS_TIE;
  386. sci_out(port, SCSCR, ctrl);
  387. }
  388. }
  389. /* On SH3, SCIF may read end-of-break as a space->mark char */
  390. #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
  391. static inline void sci_receive_chars(struct uart_port *port)
  392. {
  393. struct sci_port *sci_port = (struct sci_port *)port;
  394. struct tty_struct *tty = port->info->tty;
  395. int i, count, copied = 0;
  396. unsigned short status;
  397. unsigned char flag;
  398. status = sci_in(port, SCxSR);
  399. if (!(status & SCxSR_RDxF(port)))
  400. return;
  401. while (1) {
  402. #if !defined(SCI_ONLY)
  403. if (port->type == PORT_SCIF)
  404. count = scif_rxroom(port);
  405. else
  406. #endif
  407. count = sci_rxroom(port);
  408. /* Don't copy more bytes than there is room for in the buffer */
  409. count = tty_buffer_request_room(tty, count);
  410. /* If for any reason we can't copy more data, we're done! */
  411. if (count == 0)
  412. break;
  413. if (port->type == PORT_SCI) {
  414. char c = sci_in(port, SCxRDR);
  415. if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
  416. count = 0;
  417. else {
  418. tty_insert_flip_char(tty, c, TTY_NORMAL);
  419. }
  420. } else {
  421. for (i=0; i<count; i++) {
  422. char c = sci_in(port, SCxRDR);
  423. status = sci_in(port, SCxSR);
  424. #if defined(CONFIG_CPU_SH3)
  425. /* Skip "chars" during break */
  426. if (sci_port->break_flag) {
  427. if ((c == 0) &&
  428. (status & SCxSR_FER(port))) {
  429. count--; i--;
  430. continue;
  431. }
  432. /* Nonzero => end-of-break */
  433. pr_debug("scif: debounce<%02x>\n", c);
  434. sci_port->break_flag = 0;
  435. if (STEPFN(c)) {
  436. count--; i--;
  437. continue;
  438. }
  439. }
  440. #endif /* CONFIG_CPU_SH3 */
  441. if (uart_handle_sysrq_char(port, c)) {
  442. count--; i--;
  443. continue;
  444. }
  445. /* Store data and status */
  446. if (status&SCxSR_FER(port)) {
  447. flag = TTY_FRAME;
  448. pr_debug("sci: frame error\n");
  449. } else if (status&SCxSR_PER(port)) {
  450. flag = TTY_PARITY;
  451. pr_debug("sci: parity error\n");
  452. } else
  453. flag = TTY_NORMAL;
  454. tty_insert_flip_char(tty, c, flag);
  455. }
  456. }
  457. sci_in(port, SCxSR); /* dummy read */
  458. sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
  459. copied += count;
  460. port->icount.rx += count;
  461. }
  462. if (copied) {
  463. /* Tell the rest of the system the news. New characters! */
  464. tty_flip_buffer_push(tty);
  465. } else {
  466. sci_in(port, SCxSR); /* dummy read */
  467. sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
  468. }
  469. }
  470. #define SCI_BREAK_JIFFIES (HZ/20)
  471. /* The sci generates interrupts during the break,
  472. * 1 per millisecond or so during the break period, for 9600 baud.
  473. * So dont bother disabling interrupts.
  474. * But dont want more than 1 break event.
  475. * Use a kernel timer to periodically poll the rx line until
  476. * the break is finished.
  477. */
  478. static void sci_schedule_break_timer(struct sci_port *port)
  479. {
  480. port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
  481. add_timer(&port->break_timer);
  482. }
  483. /* Ensure that two consecutive samples find the break over. */
  484. static void sci_break_timer(unsigned long data)
  485. {
  486. struct sci_port *port = (struct sci_port *)data;
  487. if (sci_rxd_in(&port->port) == 0) {
  488. port->break_flag = 1;
  489. sci_schedule_break_timer(port);
  490. } else if (port->break_flag == 1) {
  491. /* break is over. */
  492. port->break_flag = 2;
  493. sci_schedule_break_timer(port);
  494. } else
  495. port->break_flag = 0;
  496. }
  497. static inline int sci_handle_errors(struct uart_port *port)
  498. {
  499. int copied = 0;
  500. unsigned short status = sci_in(port, SCxSR);
  501. struct tty_struct *tty = port->info->tty;
  502. if (status & SCxSR_ORER(port)) {
  503. /* overrun error */
  504. if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
  505. copied++;
  506. pr_debug("sci: overrun error\n");
  507. }
  508. if (status & SCxSR_FER(port)) {
  509. if (sci_rxd_in(port) == 0) {
  510. /* Notify of BREAK */
  511. struct sci_port *sci_port = (struct sci_port *)port;
  512. if (!sci_port->break_flag) {
  513. sci_port->break_flag = 1;
  514. sci_schedule_break_timer(sci_port);
  515. /* Do sysrq handling. */
  516. if (uart_handle_break(port))
  517. return 0;
  518. pr_debug("sci: BREAK detected\n");
  519. if (tty_insert_flip_char(tty, 0, TTY_BREAK))
  520. copied++;
  521. }
  522. } else {
  523. /* frame error */
  524. if (tty_insert_flip_char(tty, 0, TTY_FRAME))
  525. copied++;
  526. pr_debug("sci: frame error\n");
  527. }
  528. }
  529. if (status & SCxSR_PER(port)) {
  530. /* parity error */
  531. if (tty_insert_flip_char(tty, 0, TTY_PARITY))
  532. copied++;
  533. pr_debug("sci: parity error\n");
  534. }
  535. if (copied)
  536. tty_flip_buffer_push(tty);
  537. return copied;
  538. }
  539. static inline int sci_handle_breaks(struct uart_port *port)
  540. {
  541. int copied = 0;
  542. unsigned short status = sci_in(port, SCxSR);
  543. struct tty_struct *tty = port->info->tty;
  544. struct sci_port *s = &sci_ports[port->line];
  545. if (uart_handle_break(port))
  546. return 0;
  547. if (!s->break_flag && status & SCxSR_BRK(port)) {
  548. #if defined(CONFIG_CPU_SH3)
  549. /* Debounce break */
  550. s->break_flag = 1;
  551. #endif
  552. /* Notify of BREAK */
  553. if (tty_insert_flip_char(tty, 0, TTY_BREAK))
  554. copied++;
  555. pr_debug("sci: BREAK detected\n");
  556. }
  557. #if defined(SCIF_ORER)
  558. /* XXX: Handle SCIF overrun error */
  559. if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
  560. sci_out(port, SCLSR, 0);
  561. if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
  562. copied++;
  563. pr_debug("sci: overrun error\n");
  564. }
  565. }
  566. #endif
  567. if (copied)
  568. tty_flip_buffer_push(tty);
  569. return copied;
  570. }
  571. static irqreturn_t sci_rx_interrupt(int irq, void *port)
  572. {
  573. /* I think sci_receive_chars has to be called irrespective
  574. * of whether the I_IXOFF is set, otherwise, how is the interrupt
  575. * to be disabled?
  576. */
  577. sci_receive_chars(port);
  578. return IRQ_HANDLED;
  579. }
  580. static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
  581. {
  582. struct uart_port *port = ptr;
  583. spin_lock_irq(&port->lock);
  584. sci_transmit_chars(port);
  585. spin_unlock_irq(&port->lock);
  586. return IRQ_HANDLED;
  587. }
  588. static irqreturn_t sci_er_interrupt(int irq, void *ptr)
  589. {
  590. struct uart_port *port = ptr;
  591. /* Handle errors */
  592. if (port->type == PORT_SCI) {
  593. if (sci_handle_errors(port)) {
  594. /* discard character in rx buffer */
  595. sci_in(port, SCxSR);
  596. sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
  597. }
  598. } else {
  599. #if defined(SCIF_ORER)
  600. if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
  601. struct tty_struct *tty = port->info->tty;
  602. sci_out(port, SCLSR, 0);
  603. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  604. tty_flip_buffer_push(tty);
  605. pr_debug("scif: overrun error\n");
  606. }
  607. #endif
  608. sci_rx_interrupt(irq, ptr);
  609. }
  610. sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
  611. /* Kick the transmission */
  612. sci_tx_interrupt(irq, ptr);
  613. return IRQ_HANDLED;
  614. }
  615. static irqreturn_t sci_br_interrupt(int irq, void *ptr)
  616. {
  617. struct uart_port *port = ptr;
  618. /* Handle BREAKs */
  619. sci_handle_breaks(port);
  620. #ifdef CONFIG_SH_KGDB
  621. /* Break into the debugger if a break is detected */
  622. BREAKPOINT();
  623. #endif
  624. sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
  625. return IRQ_HANDLED;
  626. }
  627. static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
  628. {
  629. unsigned short ssr_status, scr_status;
  630. struct uart_port *port = ptr;
  631. ssr_status = sci_in(port,SCxSR);
  632. scr_status = sci_in(port,SCSCR);
  633. /* Tx Interrupt */
  634. if ((ssr_status & 0x0020) && (scr_status & 0x0080))
  635. sci_tx_interrupt(irq, ptr);
  636. /* Rx Interrupt */
  637. if ((ssr_status & 0x0002) && (scr_status & 0x0040))
  638. sci_rx_interrupt(irq, ptr);
  639. /* Error Interrupt */
  640. if ((ssr_status & 0x0080) && (scr_status & 0x0400))
  641. sci_er_interrupt(irq, ptr);
  642. /* Break Interrupt */
  643. if ((ssr_status & 0x0010) && (scr_status & 0x0200))
  644. sci_br_interrupt(irq, ptr);
  645. return IRQ_HANDLED;
  646. }
  647. #ifdef CONFIG_CPU_FREQ
  648. /*
  649. * Here we define a transistion notifier so that we can update all of our
  650. * ports' baud rate when the peripheral clock changes.
  651. */
  652. static int sci_notifier(struct notifier_block *self,
  653. unsigned long phase, void *p)
  654. {
  655. struct cpufreq_freqs *freqs = p;
  656. int i;
  657. if ((phase == CPUFREQ_POSTCHANGE) ||
  658. (phase == CPUFREQ_RESUMECHANGE)){
  659. for (i = 0; i < SCI_NPORTS; i++) {
  660. struct uart_port *port = &sci_ports[i].port;
  661. struct clk *clk;
  662. /*
  663. * Update the uartclk per-port if frequency has
  664. * changed, since it will no longer necessarily be
  665. * consistent with the old frequency.
  666. *
  667. * Really we want to be able to do something like
  668. * uart_change_speed() or something along those lines
  669. * here to implicitly reset the per-port baud rate..
  670. *
  671. * Clean this up later..
  672. */
  673. clk = clk_get(NULL, "module_clk");
  674. port->uartclk = clk_get_rate(clk) * 16;
  675. clk_put(clk);
  676. }
  677. printk(KERN_INFO "%s: got a postchange notification "
  678. "for cpu %d (old %d, new %d)\n",
  679. __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
  680. }
  681. return NOTIFY_OK;
  682. }
  683. static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
  684. #endif /* CONFIG_CPU_FREQ */
  685. static int sci_request_irq(struct sci_port *port)
  686. {
  687. int i;
  688. irqreturn_t (*handlers[4])(int irq, void *ptr) = {
  689. sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
  690. sci_br_interrupt,
  691. };
  692. const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
  693. "SCI Transmit Data Empty", "SCI Break" };
  694. if (port->irqs[0] == port->irqs[1]) {
  695. if (!port->irqs[0]) {
  696. printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
  697. return -ENODEV;
  698. }
  699. if (request_irq(port->irqs[0], sci_mpxed_interrupt,
  700. IRQF_DISABLED, "sci", port)) {
  701. printk(KERN_ERR "sci: Cannot allocate irq.\n");
  702. return -ENODEV;
  703. }
  704. } else {
  705. for (i = 0; i < ARRAY_SIZE(handlers); i++) {
  706. if (!port->irqs[i])
  707. continue;
  708. if (request_irq(port->irqs[i], handlers[i],
  709. IRQF_DISABLED, desc[i], port)) {
  710. printk(KERN_ERR "sci: Cannot allocate irq.\n");
  711. return -ENODEV;
  712. }
  713. }
  714. }
  715. return 0;
  716. }
  717. static void sci_free_irq(struct sci_port *port)
  718. {
  719. int i;
  720. if (port->irqs[0] == port->irqs[1]) {
  721. if (!port->irqs[0])
  722. printk("sci: sci_free_irq error\n");
  723. else
  724. free_irq(port->irqs[0], port);
  725. } else {
  726. for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
  727. if (!port->irqs[i])
  728. continue;
  729. free_irq(port->irqs[i], port);
  730. }
  731. }
  732. }
  733. static unsigned int sci_tx_empty(struct uart_port *port)
  734. {
  735. /* Can't detect */
  736. return TIOCSER_TEMT;
  737. }
  738. static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
  739. {
  740. /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
  741. /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
  742. /* If you have signals for DTR and DCD, please implement here. */
  743. }
  744. static unsigned int sci_get_mctrl(struct uart_port *port)
  745. {
  746. /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
  747. and CTS/RTS */
  748. return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
  749. }
  750. static void sci_start_tx(struct uart_port *port)
  751. {
  752. unsigned short ctrl;
  753. /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
  754. ctrl = sci_in(port, SCSCR);
  755. ctrl |= SCI_CTRL_FLAGS_TIE;
  756. sci_out(port, SCSCR, ctrl);
  757. }
  758. static void sci_stop_tx(struct uart_port *port)
  759. {
  760. unsigned short ctrl;
  761. /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
  762. ctrl = sci_in(port, SCSCR);
  763. ctrl &= ~SCI_CTRL_FLAGS_TIE;
  764. sci_out(port, SCSCR, ctrl);
  765. }
  766. static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
  767. {
  768. unsigned short ctrl;
  769. /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
  770. ctrl = sci_in(port, SCSCR);
  771. ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
  772. sci_out(port, SCSCR, ctrl);
  773. }
  774. static void sci_stop_rx(struct uart_port *port)
  775. {
  776. unsigned short ctrl;
  777. /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
  778. ctrl = sci_in(port, SCSCR);
  779. ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
  780. sci_out(port, SCSCR, ctrl);
  781. }
  782. static void sci_enable_ms(struct uart_port *port)
  783. {
  784. /* Nothing here yet .. */
  785. }
  786. static void sci_break_ctl(struct uart_port *port, int break_state)
  787. {
  788. /* Nothing here yet .. */
  789. }
  790. static int sci_startup(struct uart_port *port)
  791. {
  792. struct sci_port *s = &sci_ports[port->line];
  793. if (s->enable)
  794. s->enable(port);
  795. sci_request_irq(s);
  796. sci_start_tx(port);
  797. sci_start_rx(port, 1);
  798. return 0;
  799. }
  800. static void sci_shutdown(struct uart_port *port)
  801. {
  802. struct sci_port *s = &sci_ports[port->line];
  803. sci_stop_rx(port);
  804. sci_stop_tx(port);
  805. sci_free_irq(s);
  806. if (s->disable)
  807. s->disable(port);
  808. }
  809. static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
  810. struct ktermios *old)
  811. {
  812. struct sci_port *s = &sci_ports[port->line];
  813. unsigned int status, baud, smr_val;
  814. unsigned long flags;
  815. int t;
  816. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  817. switch (baud) {
  818. case 0:
  819. t = -1;
  820. break;
  821. default:
  822. {
  823. #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
  824. struct clk *clk = clk_get(NULL, "module_clk");
  825. t = SCBRR_VALUE(baud, clk_get_rate(clk));
  826. clk_put(clk);
  827. #else
  828. t = SCBRR_VALUE(baud);
  829. #endif
  830. }
  831. break;
  832. }
  833. spin_lock_irqsave(&port->lock, flags);
  834. do {
  835. status = sci_in(port, SCxSR);
  836. } while (!(status & SCxSR_TEND(port)));
  837. sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
  838. #if !defined(SCI_ONLY)
  839. if (port->type == PORT_SCIF)
  840. sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
  841. #endif
  842. smr_val = sci_in(port, SCSMR) & 3;
  843. if ((termios->c_cflag & CSIZE) == CS7)
  844. smr_val |= 0x40;
  845. if (termios->c_cflag & PARENB)
  846. smr_val |= 0x20;
  847. if (termios->c_cflag & PARODD)
  848. smr_val |= 0x30;
  849. if (termios->c_cflag & CSTOPB)
  850. smr_val |= 0x08;
  851. uart_update_timeout(port, termios->c_cflag, baud);
  852. sci_out(port, SCSMR, smr_val);
  853. if (t > 0) {
  854. if(t >= 256) {
  855. sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
  856. t >>= 2;
  857. } else {
  858. sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
  859. }
  860. sci_out(port, SCBRR, t);
  861. udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
  862. }
  863. if (likely(s->init_pins))
  864. s->init_pins(port, termios->c_cflag);
  865. sci_out(port, SCSCR, SCSCR_INIT(port));
  866. if ((termios->c_cflag & CREAD) != 0)
  867. sci_start_rx(port,0);
  868. spin_unlock_irqrestore(&port->lock, flags);
  869. }
  870. static const char *sci_type(struct uart_port *port)
  871. {
  872. switch (port->type) {
  873. case PORT_SCI: return "sci";
  874. case PORT_SCIF: return "scif";
  875. case PORT_IRDA: return "irda";
  876. }
  877. return 0;
  878. }
  879. static void sci_release_port(struct uart_port *port)
  880. {
  881. /* Nothing here yet .. */
  882. }
  883. static int sci_request_port(struct uart_port *port)
  884. {
  885. /* Nothing here yet .. */
  886. return 0;
  887. }
  888. static void sci_config_port(struct uart_port *port, int flags)
  889. {
  890. struct sci_port *s = &sci_ports[port->line];
  891. port->type = s->type;
  892. switch (port->type) {
  893. case PORT_SCI:
  894. s->init_pins = sci_init_pins_sci;
  895. break;
  896. case PORT_SCIF:
  897. s->init_pins = sci_init_pins_scif;
  898. break;
  899. case PORT_IRDA:
  900. s->init_pins = sci_init_pins_irda;
  901. break;
  902. }
  903. #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
  904. if (port->mapbase == 0)
  905. port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
  906. port->membase = (void __iomem *)port->mapbase;
  907. #endif
  908. }
  909. static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
  910. {
  911. struct sci_port *s = &sci_ports[port->line];
  912. if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
  913. return -EINVAL;
  914. if (ser->baud_base < 2400)
  915. /* No paper tape reader for Mitch.. */
  916. return -EINVAL;
  917. return 0;
  918. }
  919. static struct uart_ops sci_uart_ops = {
  920. .tx_empty = sci_tx_empty,
  921. .set_mctrl = sci_set_mctrl,
  922. .get_mctrl = sci_get_mctrl,
  923. .start_tx = sci_start_tx,
  924. .stop_tx = sci_stop_tx,
  925. .stop_rx = sci_stop_rx,
  926. .enable_ms = sci_enable_ms,
  927. .break_ctl = sci_break_ctl,
  928. .startup = sci_startup,
  929. .shutdown = sci_shutdown,
  930. .set_termios = sci_set_termios,
  931. .type = sci_type,
  932. .release_port = sci_release_port,
  933. .request_port = sci_request_port,
  934. .config_port = sci_config_port,
  935. .verify_port = sci_verify_port,
  936. };
  937. static void __init sci_init_ports(void)
  938. {
  939. static int first = 1;
  940. int i;
  941. if (!first)
  942. return;
  943. first = 0;
  944. for (i = 0; i < SCI_NPORTS; i++) {
  945. sci_ports[i].port.ops = &sci_uart_ops;
  946. sci_ports[i].port.iotype = UPIO_MEM;
  947. sci_ports[i].port.line = i;
  948. sci_ports[i].port.fifosize = 1;
  949. #if defined(__H8300H__) || defined(__H8300S__)
  950. #ifdef __H8300S__
  951. sci_ports[i].enable = h8300_sci_enable;
  952. sci_ports[i].disable = h8300_sci_disable;
  953. #endif
  954. sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
  955. #elif defined(CONFIG_SUPERH64)
  956. sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
  957. #else
  958. /*
  959. * XXX: We should use a proper SCI/SCIF clock
  960. */
  961. {
  962. struct clk *clk = clk_get(NULL, "module_clk");
  963. sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
  964. clk_put(clk);
  965. }
  966. #endif
  967. sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
  968. sci_ports[i].break_timer.function = sci_break_timer;
  969. init_timer(&sci_ports[i].break_timer);
  970. }
  971. }
  972. int __init early_sci_setup(struct uart_port *port)
  973. {
  974. if (unlikely(port->line > SCI_NPORTS))
  975. return -ENODEV;
  976. sci_init_ports();
  977. sci_ports[port->line].port.membase = port->membase;
  978. sci_ports[port->line].port.mapbase = port->mapbase;
  979. sci_ports[port->line].port.type = port->type;
  980. return 0;
  981. }
  982. #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
  983. /*
  984. * Print a string to the serial port trying not to disturb
  985. * any possible real use of the port...
  986. */
  987. static void serial_console_write(struct console *co, const char *s,
  988. unsigned count)
  989. {
  990. put_string(serial_console_port, s, count);
  991. }
  992. static int __init serial_console_setup(struct console *co, char *options)
  993. {
  994. struct uart_port *port;
  995. int baud = 115200;
  996. int bits = 8;
  997. int parity = 'n';
  998. int flow = 'n';
  999. int ret;
  1000. /*
  1001. * Check whether an invalid uart number has been specified, and
  1002. * if so, search for the first available port that does have
  1003. * console support.
  1004. */
  1005. if (co->index >= SCI_NPORTS)
  1006. co->index = 0;
  1007. serial_console_port = &sci_ports[co->index];
  1008. port = &serial_console_port->port;
  1009. /*
  1010. * Also need to check port->type, we don't actually have any
  1011. * UPIO_PORT ports, but uart_report_port() handily misreports
  1012. * it anyways if we don't have a port available by the time this is
  1013. * called.
  1014. */
  1015. if (!port->type)
  1016. return -ENODEV;
  1017. if (!port->membase || !port->mapbase)
  1018. return -ENODEV;
  1019. spin_lock_init(&port->lock);
  1020. port->type = serial_console_port->type;
  1021. if (port->flags & UPF_IOREMAP)
  1022. sci_config_port(port, 0);
  1023. if (serial_console_port->enable)
  1024. serial_console_port->enable(port);
  1025. if (options)
  1026. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1027. ret = uart_set_options(port, co, baud, parity, bits, flow);
  1028. #if defined(__H8300H__) || defined(__H8300S__)
  1029. /* disable rx interrupt */
  1030. if (ret == 0)
  1031. sci_stop_rx(port);
  1032. #endif
  1033. return ret;
  1034. }
  1035. static struct console serial_console = {
  1036. .name = "ttySC",
  1037. .device = uart_console_device,
  1038. .write = serial_console_write,
  1039. .setup = serial_console_setup,
  1040. .flags = CON_PRINTBUFFER,
  1041. .index = -1,
  1042. .data = &sci_uart_driver,
  1043. };
  1044. static int __init sci_console_init(void)
  1045. {
  1046. sci_init_ports();
  1047. register_console(&serial_console);
  1048. return 0;
  1049. }
  1050. console_initcall(sci_console_init);
  1051. #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
  1052. #ifdef CONFIG_SH_KGDB
  1053. /*
  1054. * FIXME: Most of this can go away.. at the moment, we rely on
  1055. * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
  1056. * most of that can easily be done here instead.
  1057. *
  1058. * For the time being, just accept the values that were parsed earlier..
  1059. */
  1060. static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
  1061. int *parity, int *bits)
  1062. {
  1063. *baud = kgdb_baud;
  1064. *parity = tolower(kgdb_parity);
  1065. *bits = kgdb_bits - '0';
  1066. }
  1067. /*
  1068. * The naming here is somewhat misleading, since kgdb_console_setup() takes
  1069. * care of the early-on initialization for kgdb, regardless of whether we
  1070. * actually use kgdb as a console or not.
  1071. *
  1072. * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
  1073. */
  1074. int __init kgdb_console_setup(struct console *co, char *options)
  1075. {
  1076. struct uart_port *port = &sci_ports[kgdb_portnum].port;
  1077. int baud = 38400;
  1078. int bits = 8;
  1079. int parity = 'n';
  1080. int flow = 'n';
  1081. spin_lock_init(&port->lock);
  1082. if (co->index != kgdb_portnum)
  1083. co->index = kgdb_portnum;
  1084. if (options)
  1085. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1086. else
  1087. kgdb_console_get_options(port, &baud, &parity, &bits);
  1088. kgdb_getchar = kgdb_sci_getchar;
  1089. kgdb_putchar = kgdb_sci_putchar;
  1090. return uart_set_options(port, co, baud, parity, bits, flow);
  1091. }
  1092. #endif /* CONFIG_SH_KGDB */
  1093. #ifdef CONFIG_SH_KGDB_CONSOLE
  1094. static struct console kgdb_console = {
  1095. .name = "ttySC",
  1096. .write = kgdb_console_write,
  1097. .setup = kgdb_console_setup,
  1098. .flags = CON_PRINTBUFFER | CON_ENABLED,
  1099. .index = -1,
  1100. .data = &sci_uart_driver,
  1101. };
  1102. /* Register the KGDB console so we get messages (d'oh!) */
  1103. static int __init kgdb_console_init(void)
  1104. {
  1105. sci_init_ports();
  1106. register_console(&kgdb_console);
  1107. return 0;
  1108. }
  1109. console_initcall(kgdb_console_init);
  1110. #endif /* CONFIG_SH_KGDB_CONSOLE */
  1111. #if defined(CONFIG_SH_KGDB_CONSOLE)
  1112. #define SCI_CONSOLE &kgdb_console
  1113. #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
  1114. #define SCI_CONSOLE &serial_console
  1115. #else
  1116. #define SCI_CONSOLE 0
  1117. #endif
  1118. static char banner[] __initdata =
  1119. KERN_INFO "SuperH SCI(F) driver initialized\n";
  1120. static struct uart_driver sci_uart_driver = {
  1121. .owner = THIS_MODULE,
  1122. .driver_name = "sci",
  1123. .dev_name = "ttySC",
  1124. .major = SCI_MAJOR,
  1125. .minor = SCI_MINOR_START,
  1126. .nr = SCI_NPORTS,
  1127. .cons = SCI_CONSOLE,
  1128. };
  1129. /*
  1130. * Register a set of serial devices attached to a platform device. The
  1131. * list is terminated with a zero flags entry, which means we expect
  1132. * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
  1133. * remapping (such as sh64) should also set UPF_IOREMAP.
  1134. */
  1135. static int __devinit sci_probe(struct platform_device *dev)
  1136. {
  1137. struct plat_sci_port *p = dev->dev.platform_data;
  1138. int i;
  1139. for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
  1140. struct sci_port *sciport = &sci_ports[i];
  1141. sciport->port.mapbase = p->mapbase;
  1142. /*
  1143. * For the simple (and majority of) cases where we don't need
  1144. * to do any remapping, just cast the cookie directly.
  1145. */
  1146. if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
  1147. p->membase = (void __iomem *)p->mapbase;
  1148. sciport->port.membase = p->membase;
  1149. sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
  1150. sciport->port.flags = p->flags;
  1151. sciport->port.dev = &dev->dev;
  1152. sciport->type = sciport->port.type = p->type;
  1153. memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
  1154. uart_add_one_port(&sci_uart_driver, &sciport->port);
  1155. }
  1156. #ifdef CONFIG_CPU_FREQ
  1157. cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
  1158. dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
  1159. #endif
  1160. #ifdef CONFIG_SH_STANDARD_BIOS
  1161. sh_bios_gdb_detach();
  1162. #endif
  1163. return 0;
  1164. }
  1165. static int __devexit sci_remove(struct platform_device *dev)
  1166. {
  1167. int i;
  1168. for (i = 0; i < SCI_NPORTS; i++)
  1169. uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
  1170. return 0;
  1171. }
  1172. static int sci_suspend(struct platform_device *dev, pm_message_t state)
  1173. {
  1174. int i;
  1175. for (i = 0; i < SCI_NPORTS; i++) {
  1176. struct sci_port *p = &sci_ports[i];
  1177. if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
  1178. uart_suspend_port(&sci_uart_driver, &p->port);
  1179. }
  1180. return 0;
  1181. }
  1182. static int sci_resume(struct platform_device *dev)
  1183. {
  1184. int i;
  1185. for (i = 0; i < SCI_NPORTS; i++) {
  1186. struct sci_port *p = &sci_ports[i];
  1187. if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
  1188. uart_resume_port(&sci_uart_driver, &p->port);
  1189. }
  1190. return 0;
  1191. }
  1192. static struct platform_driver sci_driver = {
  1193. .probe = sci_probe,
  1194. .remove = __devexit_p(sci_remove),
  1195. .suspend = sci_suspend,
  1196. .resume = sci_resume,
  1197. .driver = {
  1198. .name = "sh-sci",
  1199. .owner = THIS_MODULE,
  1200. },
  1201. };
  1202. static int __init sci_init(void)
  1203. {
  1204. int ret;
  1205. printk(banner);
  1206. sci_init_ports();
  1207. ret = uart_register_driver(&sci_uart_driver);
  1208. if (likely(ret == 0)) {
  1209. ret = platform_driver_register(&sci_driver);
  1210. if (unlikely(ret))
  1211. uart_unregister_driver(&sci_uart_driver);
  1212. }
  1213. return ret;
  1214. }
  1215. static void __exit sci_exit(void)
  1216. {
  1217. platform_driver_unregister(&sci_driver);
  1218. uart_unregister_driver(&sci_uart_driver);
  1219. }
  1220. module_init(sci_init);
  1221. module_exit(sci_exit);
  1222. MODULE_LICENSE("GPL");