serial_txx9.c 33 KB

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  1. /*
  2. * drivers/serial/serial_txx9.c
  3. *
  4. * Derived from many drivers using generic_serial interface,
  5. * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
  6. * (was in Linux/VR tree) by Jim Pick.
  7. *
  8. * Copyright (C) 1999 Harald Koerfgen
  9. * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
  10. * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
  11. * Copyright (C) 2000-2002 Toshiba Corporation
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
  18. *
  19. * Revision History:
  20. * 0.30 Initial revision. (Renamed from serial_txx927.c)
  21. * 0.31 Use save_flags instead of local_irq_save.
  22. * 0.32 Support SCLK.
  23. * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL.
  24. * Support TIOCSERGETLSR.
  25. * 0.34 Support slow baudrate.
  26. * 0.40 Merge codes from mainstream kernel (2.4.22).
  27. * 0.41 Fix console checking in rs_shutdown_port().
  28. * Disable flow-control in serial_console_write().
  29. * 0.42 Fix minor compiler warning.
  30. * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c).
  31. * 1.01 Set fifosize to make tx_empry called properly.
  32. * Use standard uart_get_divisor.
  33. * 1.02 Cleanup. (import 8250.c changes)
  34. * 1.03 Fix low-latency mode. (import 8250.c changes)
  35. * 1.04 Remove usage of deprecated functions, cleanup.
  36. * 1.05 More strict check in verify_port. Cleanup.
  37. * 1.06 Do not insert a char caused previous overrun.
  38. * Fix some spin_locks.
  39. * Do not call uart_add_one_port for absent ports.
  40. * 1.07 Use CONFIG_SERIAL_TXX9_NR_UARTS. Cleanup.
  41. * 1.08 Use platform_device.
  42. * Fix and cleanup suspend/resume/initialization codes.
  43. */
  44. #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  45. #define SUPPORT_SYSRQ
  46. #endif
  47. #include <linux/module.h>
  48. #include <linux/ioport.h>
  49. #include <linux/init.h>
  50. #include <linux/console.h>
  51. #include <linux/sysrq.h>
  52. #include <linux/delay.h>
  53. #include <linux/platform_device.h>
  54. #include <linux/pci.h>
  55. #include <linux/tty.h>
  56. #include <linux/tty_flip.h>
  57. #include <linux/serial_core.h>
  58. #include <linux/serial.h>
  59. #include <linux/mutex.h>
  60. #include <asm/io.h>
  61. static char *serial_version = "1.08";
  62. static char *serial_name = "TX39/49 Serial driver";
  63. #define PASS_LIMIT 256
  64. #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
  65. /* "ttyS" is used for standard serial driver */
  66. #define TXX9_TTY_NAME "ttyTX"
  67. #define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */
  68. #else
  69. /* acts like standard serial driver */
  70. #define TXX9_TTY_NAME "ttyS"
  71. #define TXX9_TTY_MINOR_START 64
  72. #endif
  73. #define TXX9_TTY_MAJOR TTY_MAJOR
  74. /* flag aliases */
  75. #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
  76. #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
  77. #ifdef CONFIG_PCI
  78. /* support for Toshiba TC86C001 SIO */
  79. #define ENABLE_SERIAL_TXX9_PCI
  80. #endif
  81. /*
  82. * Number of serial ports
  83. */
  84. #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
  85. #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
  86. struct uart_txx9_port {
  87. struct uart_port port;
  88. /* No additional info for now */
  89. };
  90. #define TXX9_REGION_SIZE 0x24
  91. /* TXX9 Serial Registers */
  92. #define TXX9_SILCR 0x00
  93. #define TXX9_SIDICR 0x04
  94. #define TXX9_SIDISR 0x08
  95. #define TXX9_SICISR 0x0c
  96. #define TXX9_SIFCR 0x10
  97. #define TXX9_SIFLCR 0x14
  98. #define TXX9_SIBGR 0x18
  99. #define TXX9_SITFIFO 0x1c
  100. #define TXX9_SIRFIFO 0x20
  101. /* SILCR : Line Control */
  102. #define TXX9_SILCR_SCS_MASK 0x00000060
  103. #define TXX9_SILCR_SCS_IMCLK 0x00000000
  104. #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
  105. #define TXX9_SILCR_SCS_SCLK 0x00000040
  106. #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
  107. #define TXX9_SILCR_UEPS 0x00000010
  108. #define TXX9_SILCR_UPEN 0x00000008
  109. #define TXX9_SILCR_USBL_MASK 0x00000004
  110. #define TXX9_SILCR_USBL_1BIT 0x00000000
  111. #define TXX9_SILCR_USBL_2BIT 0x00000004
  112. #define TXX9_SILCR_UMODE_MASK 0x00000003
  113. #define TXX9_SILCR_UMODE_8BIT 0x00000000
  114. #define TXX9_SILCR_UMODE_7BIT 0x00000001
  115. /* SIDICR : DMA/Int. Control */
  116. #define TXX9_SIDICR_TDE 0x00008000
  117. #define TXX9_SIDICR_RDE 0x00004000
  118. #define TXX9_SIDICR_TIE 0x00002000
  119. #define TXX9_SIDICR_RIE 0x00001000
  120. #define TXX9_SIDICR_SPIE 0x00000800
  121. #define TXX9_SIDICR_CTSAC 0x00000600
  122. #define TXX9_SIDICR_STIE_MASK 0x0000003f
  123. #define TXX9_SIDICR_STIE_OERS 0x00000020
  124. #define TXX9_SIDICR_STIE_CTSS 0x00000010
  125. #define TXX9_SIDICR_STIE_RBRKD 0x00000008
  126. #define TXX9_SIDICR_STIE_TRDY 0x00000004
  127. #define TXX9_SIDICR_STIE_TXALS 0x00000002
  128. #define TXX9_SIDICR_STIE_UBRKD 0x00000001
  129. /* SIDISR : DMA/Int. Status */
  130. #define TXX9_SIDISR_UBRK 0x00008000
  131. #define TXX9_SIDISR_UVALID 0x00004000
  132. #define TXX9_SIDISR_UFER 0x00002000
  133. #define TXX9_SIDISR_UPER 0x00001000
  134. #define TXX9_SIDISR_UOER 0x00000800
  135. #define TXX9_SIDISR_ERI 0x00000400
  136. #define TXX9_SIDISR_TOUT 0x00000200
  137. #define TXX9_SIDISR_TDIS 0x00000100
  138. #define TXX9_SIDISR_RDIS 0x00000080
  139. #define TXX9_SIDISR_STIS 0x00000040
  140. #define TXX9_SIDISR_RFDN_MASK 0x0000001f
  141. /* SICISR : Change Int. Status */
  142. #define TXX9_SICISR_OERS 0x00000020
  143. #define TXX9_SICISR_CTSS 0x00000010
  144. #define TXX9_SICISR_RBRKD 0x00000008
  145. #define TXX9_SICISR_TRDY 0x00000004
  146. #define TXX9_SICISR_TXALS 0x00000002
  147. #define TXX9_SICISR_UBRKD 0x00000001
  148. /* SIFCR : FIFO Control */
  149. #define TXX9_SIFCR_SWRST 0x00008000
  150. #define TXX9_SIFCR_RDIL_MASK 0x00000180
  151. #define TXX9_SIFCR_RDIL_1 0x00000000
  152. #define TXX9_SIFCR_RDIL_4 0x00000080
  153. #define TXX9_SIFCR_RDIL_8 0x00000100
  154. #define TXX9_SIFCR_RDIL_12 0x00000180
  155. #define TXX9_SIFCR_RDIL_MAX 0x00000180
  156. #define TXX9_SIFCR_TDIL_MASK 0x00000018
  157. #define TXX9_SIFCR_TDIL_MASK 0x00000018
  158. #define TXX9_SIFCR_TDIL_1 0x00000000
  159. #define TXX9_SIFCR_TDIL_4 0x00000001
  160. #define TXX9_SIFCR_TDIL_8 0x00000010
  161. #define TXX9_SIFCR_TDIL_MAX 0x00000010
  162. #define TXX9_SIFCR_TFRST 0x00000004
  163. #define TXX9_SIFCR_RFRST 0x00000002
  164. #define TXX9_SIFCR_FRSTE 0x00000001
  165. #define TXX9_SIO_TX_FIFO 8
  166. #define TXX9_SIO_RX_FIFO 16
  167. /* SIFLCR : Flow Control */
  168. #define TXX9_SIFLCR_RCS 0x00001000
  169. #define TXX9_SIFLCR_TES 0x00000800
  170. #define TXX9_SIFLCR_RTSSC 0x00000200
  171. #define TXX9_SIFLCR_RSDE 0x00000100
  172. #define TXX9_SIFLCR_TSDE 0x00000080
  173. #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
  174. #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
  175. #define TXX9_SIFLCR_TBRK 0x00000001
  176. /* SIBGR : Baudrate Control */
  177. #define TXX9_SIBGR_BCLK_MASK 0x00000300
  178. #define TXX9_SIBGR_BCLK_T0 0x00000000
  179. #define TXX9_SIBGR_BCLK_T2 0x00000100
  180. #define TXX9_SIBGR_BCLK_T4 0x00000200
  181. #define TXX9_SIBGR_BCLK_T6 0x00000300
  182. #define TXX9_SIBGR_BRD_MASK 0x000000ff
  183. static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
  184. {
  185. switch (up->port.iotype) {
  186. default:
  187. return __raw_readl(up->port.membase + offset);
  188. case UPIO_PORT:
  189. return inl(up->port.iobase + offset);
  190. }
  191. }
  192. static inline void
  193. sio_out(struct uart_txx9_port *up, int offset, int value)
  194. {
  195. switch (up->port.iotype) {
  196. default:
  197. __raw_writel(value, up->port.membase + offset);
  198. break;
  199. case UPIO_PORT:
  200. outl(value, up->port.iobase + offset);
  201. break;
  202. }
  203. }
  204. static inline void
  205. sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
  206. {
  207. sio_out(up, offset, sio_in(up, offset) & ~value);
  208. }
  209. static inline void
  210. sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
  211. {
  212. sio_out(up, offset, sio_in(up, offset) | value);
  213. }
  214. static inline void
  215. sio_quot_set(struct uart_txx9_port *up, int quot)
  216. {
  217. quot >>= 1;
  218. if (quot < 256)
  219. sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
  220. else if (quot < (256 << 2))
  221. sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
  222. else if (quot < (256 << 4))
  223. sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
  224. else if (quot < (256 << 6))
  225. sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
  226. else
  227. sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
  228. }
  229. static void serial_txx9_stop_tx(struct uart_port *port)
  230. {
  231. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  232. sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
  233. }
  234. static void serial_txx9_start_tx(struct uart_port *port)
  235. {
  236. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  237. sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
  238. }
  239. static void serial_txx9_stop_rx(struct uart_port *port)
  240. {
  241. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  242. up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
  243. }
  244. static void serial_txx9_enable_ms(struct uart_port *port)
  245. {
  246. /* TXX9-SIO can not control DTR... */
  247. }
  248. static void serial_txx9_initialize(struct uart_port *port)
  249. {
  250. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  251. unsigned int tmout = 10000;
  252. sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
  253. /* TX4925 BUG WORKAROUND. Accessing SIOC register
  254. * immediately after soft reset causes bus error. */
  255. mmiowb();
  256. udelay(1);
  257. while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
  258. udelay(1);
  259. /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
  260. sio_set(up, TXX9_SIFCR,
  261. TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
  262. /* initial settings */
  263. sio_out(up, TXX9_SILCR,
  264. TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
  265. ((up->port.flags & UPF_TXX9_USE_SCLK) ?
  266. TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
  267. sio_quot_set(up, uart_get_divisor(port, 9600));
  268. sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
  269. sio_out(up, TXX9_SIDICR, 0);
  270. }
  271. static inline void
  272. receive_chars(struct uart_txx9_port *up, unsigned int *status)
  273. {
  274. struct tty_struct *tty = up->port.info->tty;
  275. unsigned char ch;
  276. unsigned int disr = *status;
  277. int max_count = 256;
  278. char flag;
  279. unsigned int next_ignore_status_mask;
  280. do {
  281. ch = sio_in(up, TXX9_SIRFIFO);
  282. flag = TTY_NORMAL;
  283. up->port.icount.rx++;
  284. /* mask out RFDN_MASK bit added by previous overrun */
  285. next_ignore_status_mask =
  286. up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
  287. if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
  288. TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
  289. /*
  290. * For statistics only
  291. */
  292. if (disr & TXX9_SIDISR_UBRK) {
  293. disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
  294. up->port.icount.brk++;
  295. /*
  296. * We do the SysRQ and SAK checking
  297. * here because otherwise the break
  298. * may get masked by ignore_status_mask
  299. * or read_status_mask.
  300. */
  301. if (uart_handle_break(&up->port))
  302. goto ignore_char;
  303. } else if (disr & TXX9_SIDISR_UPER)
  304. up->port.icount.parity++;
  305. else if (disr & TXX9_SIDISR_UFER)
  306. up->port.icount.frame++;
  307. if (disr & TXX9_SIDISR_UOER) {
  308. up->port.icount.overrun++;
  309. /*
  310. * The receiver read buffer still hold
  311. * a char which caused overrun.
  312. * Ignore next char by adding RFDN_MASK
  313. * to ignore_status_mask temporarily.
  314. */
  315. next_ignore_status_mask |=
  316. TXX9_SIDISR_RFDN_MASK;
  317. }
  318. /*
  319. * Mask off conditions which should be ingored.
  320. */
  321. disr &= up->port.read_status_mask;
  322. if (disr & TXX9_SIDISR_UBRK) {
  323. flag = TTY_BREAK;
  324. } else if (disr & TXX9_SIDISR_UPER)
  325. flag = TTY_PARITY;
  326. else if (disr & TXX9_SIDISR_UFER)
  327. flag = TTY_FRAME;
  328. }
  329. if (uart_handle_sysrq_char(&up->port, ch))
  330. goto ignore_char;
  331. uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
  332. ignore_char:
  333. up->port.ignore_status_mask = next_ignore_status_mask;
  334. disr = sio_in(up, TXX9_SIDISR);
  335. } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
  336. spin_unlock(&up->port.lock);
  337. tty_flip_buffer_push(tty);
  338. spin_lock(&up->port.lock);
  339. *status = disr;
  340. }
  341. static inline void transmit_chars(struct uart_txx9_port *up)
  342. {
  343. struct circ_buf *xmit = &up->port.info->xmit;
  344. int count;
  345. if (up->port.x_char) {
  346. sio_out(up, TXX9_SITFIFO, up->port.x_char);
  347. up->port.icount.tx++;
  348. up->port.x_char = 0;
  349. return;
  350. }
  351. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  352. serial_txx9_stop_tx(&up->port);
  353. return;
  354. }
  355. count = TXX9_SIO_TX_FIFO;
  356. do {
  357. sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
  358. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  359. up->port.icount.tx++;
  360. if (uart_circ_empty(xmit))
  361. break;
  362. } while (--count > 0);
  363. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  364. uart_write_wakeup(&up->port);
  365. if (uart_circ_empty(xmit))
  366. serial_txx9_stop_tx(&up->port);
  367. }
  368. static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
  369. {
  370. int pass_counter = 0;
  371. struct uart_txx9_port *up = dev_id;
  372. unsigned int status;
  373. while (1) {
  374. spin_lock(&up->port.lock);
  375. status = sio_in(up, TXX9_SIDISR);
  376. if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
  377. status &= ~TXX9_SIDISR_TDIS;
  378. if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
  379. TXX9_SIDISR_TOUT))) {
  380. spin_unlock(&up->port.lock);
  381. break;
  382. }
  383. if (status & TXX9_SIDISR_RDIS)
  384. receive_chars(up, &status);
  385. if (status & TXX9_SIDISR_TDIS)
  386. transmit_chars(up);
  387. /* Clear TX/RX Int. Status */
  388. sio_mask(up, TXX9_SIDISR,
  389. TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
  390. TXX9_SIDISR_TOUT);
  391. spin_unlock(&up->port.lock);
  392. if (pass_counter++ > PASS_LIMIT)
  393. break;
  394. }
  395. return pass_counter ? IRQ_HANDLED : IRQ_NONE;
  396. }
  397. static unsigned int serial_txx9_tx_empty(struct uart_port *port)
  398. {
  399. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  400. unsigned long flags;
  401. unsigned int ret;
  402. spin_lock_irqsave(&up->port.lock, flags);
  403. ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
  404. spin_unlock_irqrestore(&up->port.lock, flags);
  405. return ret;
  406. }
  407. static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
  408. {
  409. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  410. unsigned int ret;
  411. ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS)
  412. | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS);
  413. return ret;
  414. }
  415. static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
  416. {
  417. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  418. if (mctrl & TIOCM_RTS)
  419. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
  420. else
  421. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
  422. }
  423. static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
  424. {
  425. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  426. unsigned long flags;
  427. spin_lock_irqsave(&up->port.lock, flags);
  428. if (break_state == -1)
  429. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  430. else
  431. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  432. spin_unlock_irqrestore(&up->port.lock, flags);
  433. }
  434. static int serial_txx9_startup(struct uart_port *port)
  435. {
  436. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  437. unsigned long flags;
  438. int retval;
  439. /*
  440. * Clear the FIFO buffers and disable them.
  441. * (they will be reenabled in set_termios())
  442. */
  443. sio_set(up, TXX9_SIFCR,
  444. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  445. /* clear reset */
  446. sio_mask(up, TXX9_SIFCR,
  447. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  448. sio_out(up, TXX9_SIDICR, 0);
  449. /*
  450. * Clear the interrupt registers.
  451. */
  452. sio_out(up, TXX9_SIDISR, 0);
  453. retval = request_irq(up->port.irq, serial_txx9_interrupt,
  454. IRQF_SHARED, "serial_txx9", up);
  455. if (retval)
  456. return retval;
  457. /*
  458. * Now, initialize the UART
  459. */
  460. spin_lock_irqsave(&up->port.lock, flags);
  461. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  462. spin_unlock_irqrestore(&up->port.lock, flags);
  463. /* Enable RX/TX */
  464. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
  465. /*
  466. * Finally, enable interrupts.
  467. */
  468. sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
  469. return 0;
  470. }
  471. static void serial_txx9_shutdown(struct uart_port *port)
  472. {
  473. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  474. unsigned long flags;
  475. /*
  476. * Disable interrupts from this port
  477. */
  478. sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
  479. spin_lock_irqsave(&up->port.lock, flags);
  480. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  481. spin_unlock_irqrestore(&up->port.lock, flags);
  482. /*
  483. * Disable break condition
  484. */
  485. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  486. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  487. if (up->port.cons && up->port.line == up->port.cons->index) {
  488. free_irq(up->port.irq, up);
  489. return;
  490. }
  491. #endif
  492. /* reset FIFOs */
  493. sio_set(up, TXX9_SIFCR,
  494. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  495. /* clear reset */
  496. sio_mask(up, TXX9_SIFCR,
  497. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  498. /* Disable RX/TX */
  499. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
  500. free_irq(up->port.irq, up);
  501. }
  502. static void
  503. serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
  504. struct ktermios *old)
  505. {
  506. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  507. unsigned int cval, fcr = 0;
  508. unsigned long flags;
  509. unsigned int baud, quot;
  510. cval = sio_in(up, TXX9_SILCR);
  511. /* byte size and parity */
  512. cval &= ~TXX9_SILCR_UMODE_MASK;
  513. switch (termios->c_cflag & CSIZE) {
  514. case CS7:
  515. cval |= TXX9_SILCR_UMODE_7BIT;
  516. break;
  517. default:
  518. case CS5: /* not supported */
  519. case CS6: /* not supported */
  520. case CS8:
  521. cval |= TXX9_SILCR_UMODE_8BIT;
  522. break;
  523. }
  524. cval &= ~TXX9_SILCR_USBL_MASK;
  525. if (termios->c_cflag & CSTOPB)
  526. cval |= TXX9_SILCR_USBL_2BIT;
  527. else
  528. cval |= TXX9_SILCR_USBL_1BIT;
  529. cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
  530. if (termios->c_cflag & PARENB)
  531. cval |= TXX9_SILCR_UPEN;
  532. if (!(termios->c_cflag & PARODD))
  533. cval |= TXX9_SILCR_UEPS;
  534. /*
  535. * Ask the core to calculate the divisor for us.
  536. */
  537. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
  538. quot = uart_get_divisor(port, baud);
  539. /* Set up FIFOs */
  540. /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
  541. fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
  542. /*
  543. * Ok, we're now changing the port state. Do it with
  544. * interrupts disabled.
  545. */
  546. spin_lock_irqsave(&up->port.lock, flags);
  547. /*
  548. * Update the per-port timeout.
  549. */
  550. uart_update_timeout(port, termios->c_cflag, baud);
  551. up->port.read_status_mask = TXX9_SIDISR_UOER |
  552. TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
  553. if (termios->c_iflag & INPCK)
  554. up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
  555. if (termios->c_iflag & (BRKINT | PARMRK))
  556. up->port.read_status_mask |= TXX9_SIDISR_UBRK;
  557. /*
  558. * Characteres to ignore
  559. */
  560. up->port.ignore_status_mask = 0;
  561. if (termios->c_iflag & IGNPAR)
  562. up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
  563. if (termios->c_iflag & IGNBRK) {
  564. up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
  565. /*
  566. * If we're ignoring parity and break indicators,
  567. * ignore overruns too (for real raw support).
  568. */
  569. if (termios->c_iflag & IGNPAR)
  570. up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
  571. }
  572. /*
  573. * ignore all characters if CREAD is not set
  574. */
  575. if ((termios->c_cflag & CREAD) == 0)
  576. up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
  577. /* CTS flow control flag */
  578. if ((termios->c_cflag & CRTSCTS) &&
  579. (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
  580. sio_set(up, TXX9_SIFLCR,
  581. TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
  582. } else {
  583. sio_mask(up, TXX9_SIFLCR,
  584. TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
  585. }
  586. sio_out(up, TXX9_SILCR, cval);
  587. sio_quot_set(up, quot);
  588. sio_out(up, TXX9_SIFCR, fcr);
  589. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  590. spin_unlock_irqrestore(&up->port.lock, flags);
  591. }
  592. static void
  593. serial_txx9_pm(struct uart_port *port, unsigned int state,
  594. unsigned int oldstate)
  595. {
  596. if (state == 0)
  597. serial_txx9_initialize(port);
  598. }
  599. static int serial_txx9_request_resource(struct uart_txx9_port *up)
  600. {
  601. unsigned int size = TXX9_REGION_SIZE;
  602. int ret = 0;
  603. switch (up->port.iotype) {
  604. default:
  605. if (!up->port.mapbase)
  606. break;
  607. if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
  608. ret = -EBUSY;
  609. break;
  610. }
  611. if (up->port.flags & UPF_IOREMAP) {
  612. up->port.membase = ioremap(up->port.mapbase, size);
  613. if (!up->port.membase) {
  614. release_mem_region(up->port.mapbase, size);
  615. ret = -ENOMEM;
  616. }
  617. }
  618. break;
  619. case UPIO_PORT:
  620. if (!request_region(up->port.iobase, size, "serial_txx9"))
  621. ret = -EBUSY;
  622. break;
  623. }
  624. return ret;
  625. }
  626. static void serial_txx9_release_resource(struct uart_txx9_port *up)
  627. {
  628. unsigned int size = TXX9_REGION_SIZE;
  629. switch (up->port.iotype) {
  630. default:
  631. if (!up->port.mapbase)
  632. break;
  633. if (up->port.flags & UPF_IOREMAP) {
  634. iounmap(up->port.membase);
  635. up->port.membase = NULL;
  636. }
  637. release_mem_region(up->port.mapbase, size);
  638. break;
  639. case UPIO_PORT:
  640. release_region(up->port.iobase, size);
  641. break;
  642. }
  643. }
  644. static void serial_txx9_release_port(struct uart_port *port)
  645. {
  646. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  647. serial_txx9_release_resource(up);
  648. }
  649. static int serial_txx9_request_port(struct uart_port *port)
  650. {
  651. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  652. return serial_txx9_request_resource(up);
  653. }
  654. static void serial_txx9_config_port(struct uart_port *port, int uflags)
  655. {
  656. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  657. int ret;
  658. /*
  659. * Find the region that we can probe for. This in turn
  660. * tells us whether we can probe for the type of port.
  661. */
  662. ret = serial_txx9_request_resource(up);
  663. if (ret < 0)
  664. return;
  665. port->type = PORT_TXX9;
  666. up->port.fifosize = TXX9_SIO_TX_FIFO;
  667. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  668. if (up->port.line == up->port.cons->index)
  669. return;
  670. #endif
  671. serial_txx9_initialize(port);
  672. }
  673. static int
  674. serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
  675. {
  676. unsigned long new_port = ser->port;
  677. if (HIGH_BITS_OFFSET)
  678. new_port += (unsigned long)ser->port_high << HIGH_BITS_OFFSET;
  679. if (ser->type != port->type ||
  680. ser->irq != port->irq ||
  681. ser->io_type != port->iotype ||
  682. new_port != port->iobase ||
  683. (unsigned long)ser->iomem_base != port->mapbase)
  684. return -EINVAL;
  685. return 0;
  686. }
  687. static const char *
  688. serial_txx9_type(struct uart_port *port)
  689. {
  690. return "txx9";
  691. }
  692. static struct uart_ops serial_txx9_pops = {
  693. .tx_empty = serial_txx9_tx_empty,
  694. .set_mctrl = serial_txx9_set_mctrl,
  695. .get_mctrl = serial_txx9_get_mctrl,
  696. .stop_tx = serial_txx9_stop_tx,
  697. .start_tx = serial_txx9_start_tx,
  698. .stop_rx = serial_txx9_stop_rx,
  699. .enable_ms = serial_txx9_enable_ms,
  700. .break_ctl = serial_txx9_break_ctl,
  701. .startup = serial_txx9_startup,
  702. .shutdown = serial_txx9_shutdown,
  703. .set_termios = serial_txx9_set_termios,
  704. .pm = serial_txx9_pm,
  705. .type = serial_txx9_type,
  706. .release_port = serial_txx9_release_port,
  707. .request_port = serial_txx9_request_port,
  708. .config_port = serial_txx9_config_port,
  709. .verify_port = serial_txx9_verify_port,
  710. };
  711. static struct uart_txx9_port serial_txx9_ports[UART_NR];
  712. static void __init serial_txx9_register_ports(struct uart_driver *drv,
  713. struct device *dev)
  714. {
  715. int i;
  716. for (i = 0; i < UART_NR; i++) {
  717. struct uart_txx9_port *up = &serial_txx9_ports[i];
  718. up->port.line = i;
  719. up->port.ops = &serial_txx9_pops;
  720. up->port.dev = dev;
  721. if (up->port.iobase || up->port.mapbase)
  722. uart_add_one_port(drv, &up->port);
  723. }
  724. }
  725. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  726. /*
  727. * Wait for transmitter & holding register to empty
  728. */
  729. static inline void wait_for_xmitr(struct uart_txx9_port *up)
  730. {
  731. unsigned int tmout = 10000;
  732. /* Wait up to 10ms for the character(s) to be sent. */
  733. while (--tmout &&
  734. !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
  735. udelay(1);
  736. /* Wait up to 1s for flow control if necessary */
  737. if (up->port.flags & UPF_CONS_FLOW) {
  738. tmout = 1000000;
  739. while (--tmout &&
  740. (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
  741. udelay(1);
  742. }
  743. }
  744. static void serial_txx9_console_putchar(struct uart_port *port, int ch)
  745. {
  746. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  747. wait_for_xmitr(up);
  748. sio_out(up, TXX9_SITFIFO, ch);
  749. }
  750. /*
  751. * Print a string to the serial port trying not to disturb
  752. * any possible real use of the port...
  753. *
  754. * The console_lock must be held when we get here.
  755. */
  756. static void
  757. serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
  758. {
  759. struct uart_txx9_port *up = &serial_txx9_ports[co->index];
  760. unsigned int ier, flcr;
  761. /*
  762. * First save the UER then disable the interrupts
  763. */
  764. ier = sio_in(up, TXX9_SIDICR);
  765. sio_out(up, TXX9_SIDICR, 0);
  766. /*
  767. * Disable flow-control if enabled (and unnecessary)
  768. */
  769. flcr = sio_in(up, TXX9_SIFLCR);
  770. if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
  771. sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
  772. uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
  773. /*
  774. * Finally, wait for transmitter to become empty
  775. * and restore the IER
  776. */
  777. wait_for_xmitr(up);
  778. sio_out(up, TXX9_SIFLCR, flcr);
  779. sio_out(up, TXX9_SIDICR, ier);
  780. }
  781. static int __init serial_txx9_console_setup(struct console *co, char *options)
  782. {
  783. struct uart_port *port;
  784. struct uart_txx9_port *up;
  785. int baud = 9600;
  786. int bits = 8;
  787. int parity = 'n';
  788. int flow = 'n';
  789. /*
  790. * Check whether an invalid uart number has been specified, and
  791. * if so, search for the first available port that does have
  792. * console support.
  793. */
  794. if (co->index >= UART_NR)
  795. co->index = 0;
  796. up = &serial_txx9_ports[co->index];
  797. port = &up->port;
  798. if (!port->ops)
  799. return -ENODEV;
  800. serial_txx9_initialize(&up->port);
  801. if (options)
  802. uart_parse_options(options, &baud, &parity, &bits, &flow);
  803. return uart_set_options(port, co, baud, parity, bits, flow);
  804. }
  805. static struct uart_driver serial_txx9_reg;
  806. static struct console serial_txx9_console = {
  807. .name = TXX9_TTY_NAME,
  808. .write = serial_txx9_console_write,
  809. .device = uart_console_device,
  810. .setup = serial_txx9_console_setup,
  811. .flags = CON_PRINTBUFFER,
  812. .index = -1,
  813. .data = &serial_txx9_reg,
  814. };
  815. static int __init serial_txx9_console_init(void)
  816. {
  817. register_console(&serial_txx9_console);
  818. return 0;
  819. }
  820. console_initcall(serial_txx9_console_init);
  821. #define SERIAL_TXX9_CONSOLE &serial_txx9_console
  822. #else
  823. #define SERIAL_TXX9_CONSOLE NULL
  824. #endif
  825. static struct uart_driver serial_txx9_reg = {
  826. .owner = THIS_MODULE,
  827. .driver_name = "serial_txx9",
  828. .dev_name = TXX9_TTY_NAME,
  829. .major = TXX9_TTY_MAJOR,
  830. .minor = TXX9_TTY_MINOR_START,
  831. .nr = UART_NR,
  832. .cons = SERIAL_TXX9_CONSOLE,
  833. };
  834. int __init early_serial_txx9_setup(struct uart_port *port)
  835. {
  836. if (port->line >= ARRAY_SIZE(serial_txx9_ports))
  837. return -ENODEV;
  838. serial_txx9_ports[port->line].port = *port;
  839. serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
  840. serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
  841. return 0;
  842. }
  843. static DEFINE_MUTEX(serial_txx9_mutex);
  844. /**
  845. * serial_txx9_register_port - register a serial port
  846. * @port: serial port template
  847. *
  848. * Configure the serial port specified by the request.
  849. *
  850. * The port is then probed and if necessary the IRQ is autodetected
  851. * If this fails an error is returned.
  852. *
  853. * On success the port is ready to use and the line number is returned.
  854. */
  855. static int __devinit serial_txx9_register_port(struct uart_port *port)
  856. {
  857. int i;
  858. struct uart_txx9_port *uart;
  859. int ret = -ENOSPC;
  860. mutex_lock(&serial_txx9_mutex);
  861. for (i = 0; i < UART_NR; i++) {
  862. uart = &serial_txx9_ports[i];
  863. if (uart_match_port(&uart->port, port)) {
  864. uart_remove_one_port(&serial_txx9_reg, &uart->port);
  865. break;
  866. }
  867. }
  868. if (i == UART_NR) {
  869. /* Find unused port */
  870. for (i = 0; i < UART_NR; i++) {
  871. uart = &serial_txx9_ports[i];
  872. if (!(uart->port.iobase || uart->port.mapbase))
  873. break;
  874. }
  875. }
  876. if (i < UART_NR) {
  877. uart->port.iobase = port->iobase;
  878. uart->port.membase = port->membase;
  879. uart->port.irq = port->irq;
  880. uart->port.uartclk = port->uartclk;
  881. uart->port.iotype = port->iotype;
  882. uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
  883. uart->port.mapbase = port->mapbase;
  884. if (port->dev)
  885. uart->port.dev = port->dev;
  886. ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
  887. if (ret == 0)
  888. ret = uart->port.line;
  889. }
  890. mutex_unlock(&serial_txx9_mutex);
  891. return ret;
  892. }
  893. /**
  894. * serial_txx9_unregister_port - remove a txx9 serial port at runtime
  895. * @line: serial line number
  896. *
  897. * Remove one serial port. This may not be called from interrupt
  898. * context. We hand the port back to the our control.
  899. */
  900. static void __devexit serial_txx9_unregister_port(int line)
  901. {
  902. struct uart_txx9_port *uart = &serial_txx9_ports[line];
  903. mutex_lock(&serial_txx9_mutex);
  904. uart_remove_one_port(&serial_txx9_reg, &uart->port);
  905. uart->port.flags = 0;
  906. uart->port.type = PORT_UNKNOWN;
  907. uart->port.iobase = 0;
  908. uart->port.mapbase = 0;
  909. uart->port.membase = NULL;
  910. uart->port.dev = NULL;
  911. mutex_unlock(&serial_txx9_mutex);
  912. }
  913. /*
  914. * Register a set of serial devices attached to a platform device.
  915. */
  916. static int __devinit serial_txx9_probe(struct platform_device *dev)
  917. {
  918. struct uart_port *p = dev->dev.platform_data;
  919. struct uart_port port;
  920. int ret, i;
  921. memset(&port, 0, sizeof(struct uart_port));
  922. for (i = 0; p && p->uartclk != 0; p++, i++) {
  923. port.iobase = p->iobase;
  924. port.membase = p->membase;
  925. port.irq = p->irq;
  926. port.uartclk = p->uartclk;
  927. port.iotype = p->iotype;
  928. port.flags = p->flags;
  929. port.mapbase = p->mapbase;
  930. port.dev = &dev->dev;
  931. ret = serial_txx9_register_port(&port);
  932. if (ret < 0) {
  933. dev_err(&dev->dev, "unable to register port at index %d "
  934. "(IO%x MEM%lx IRQ%d): %d\n", i,
  935. p->iobase, p->mapbase, p->irq, ret);
  936. }
  937. }
  938. return 0;
  939. }
  940. /*
  941. * Remove serial ports registered against a platform device.
  942. */
  943. static int __devexit serial_txx9_remove(struct platform_device *dev)
  944. {
  945. int i;
  946. for (i = 0; i < UART_NR; i++) {
  947. struct uart_txx9_port *up = &serial_txx9_ports[i];
  948. if (up->port.dev == &dev->dev)
  949. serial_txx9_unregister_port(i);
  950. }
  951. return 0;
  952. }
  953. #ifdef CONFIG_PM
  954. static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
  955. {
  956. int i;
  957. for (i = 0; i < UART_NR; i++) {
  958. struct uart_txx9_port *up = &serial_txx9_ports[i];
  959. if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
  960. uart_suspend_port(&serial_txx9_reg, &up->port);
  961. }
  962. return 0;
  963. }
  964. static int serial_txx9_resume(struct platform_device *dev)
  965. {
  966. int i;
  967. for (i = 0; i < UART_NR; i++) {
  968. struct uart_txx9_port *up = &serial_txx9_ports[i];
  969. if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
  970. uart_resume_port(&serial_txx9_reg, &up->port);
  971. }
  972. return 0;
  973. }
  974. #endif
  975. static struct platform_driver serial_txx9_plat_driver = {
  976. .probe = serial_txx9_probe,
  977. .remove = __devexit_p(serial_txx9_remove),
  978. #ifdef CONFIG_PM
  979. .suspend = serial_txx9_suspend,
  980. .resume = serial_txx9_resume,
  981. #endif
  982. .driver = {
  983. .name = "serial_txx9",
  984. .owner = THIS_MODULE,
  985. },
  986. };
  987. #ifdef ENABLE_SERIAL_TXX9_PCI
  988. /*
  989. * Probe one serial board. Unfortunately, there is no rhyme nor reason
  990. * to the arrangement of serial ports on a PCI card.
  991. */
  992. static int __devinit
  993. pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
  994. {
  995. struct uart_port port;
  996. int line;
  997. int rc;
  998. rc = pci_enable_device(dev);
  999. if (rc)
  1000. return rc;
  1001. memset(&port, 0, sizeof(port));
  1002. port.ops = &serial_txx9_pops;
  1003. port.flags |= UPF_TXX9_HAVE_CTS_LINE;
  1004. port.uartclk = 66670000;
  1005. port.irq = dev->irq;
  1006. port.iotype = UPIO_PORT;
  1007. port.iobase = pci_resource_start(dev, 1);
  1008. port.dev = &dev->dev;
  1009. line = serial_txx9_register_port(&port);
  1010. if (line < 0) {
  1011. printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
  1012. pci_disable_device(dev);
  1013. return line;
  1014. }
  1015. pci_set_drvdata(dev, &serial_txx9_ports[line]);
  1016. return 0;
  1017. }
  1018. static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
  1019. {
  1020. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1021. pci_set_drvdata(dev, NULL);
  1022. if (up) {
  1023. serial_txx9_unregister_port(up->port.line);
  1024. pci_disable_device(dev);
  1025. }
  1026. }
  1027. #ifdef CONFIG_PM
  1028. static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
  1029. {
  1030. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1031. if (up)
  1032. uart_suspend_port(&serial_txx9_reg, &up->port);
  1033. pci_save_state(dev);
  1034. pci_set_power_state(dev, pci_choose_state(dev, state));
  1035. return 0;
  1036. }
  1037. static int pciserial_txx9_resume_one(struct pci_dev *dev)
  1038. {
  1039. struct uart_txx9_port *up = pci_get_drvdata(dev);
  1040. pci_set_power_state(dev, PCI_D0);
  1041. pci_restore_state(dev);
  1042. if (up)
  1043. uart_resume_port(&serial_txx9_reg, &up->port);
  1044. return 0;
  1045. }
  1046. #endif
  1047. static const struct pci_device_id serial_txx9_pci_tbl[] = {
  1048. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
  1049. { 0, }
  1050. };
  1051. static struct pci_driver serial_txx9_pci_driver = {
  1052. .name = "serial_txx9",
  1053. .probe = pciserial_txx9_init_one,
  1054. .remove = __devexit_p(pciserial_txx9_remove_one),
  1055. #ifdef CONFIG_PM
  1056. .suspend = pciserial_txx9_suspend_one,
  1057. .resume = pciserial_txx9_resume_one,
  1058. #endif
  1059. .id_table = serial_txx9_pci_tbl,
  1060. };
  1061. MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
  1062. #endif /* ENABLE_SERIAL_TXX9_PCI */
  1063. static struct platform_device *serial_txx9_plat_devs;
  1064. static int __init serial_txx9_init(void)
  1065. {
  1066. int ret;
  1067. printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
  1068. ret = uart_register_driver(&serial_txx9_reg);
  1069. if (ret)
  1070. goto out;
  1071. serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
  1072. if (!serial_txx9_plat_devs) {
  1073. ret = -ENOMEM;
  1074. goto unreg_uart_drv;
  1075. }
  1076. ret = platform_device_add(serial_txx9_plat_devs);
  1077. if (ret)
  1078. goto put_dev;
  1079. serial_txx9_register_ports(&serial_txx9_reg,
  1080. &serial_txx9_plat_devs->dev);
  1081. ret = platform_driver_register(&serial_txx9_plat_driver);
  1082. if (ret)
  1083. goto del_dev;
  1084. #ifdef ENABLE_SERIAL_TXX9_PCI
  1085. ret = pci_register_driver(&serial_txx9_pci_driver);
  1086. #endif
  1087. if (ret == 0)
  1088. goto out;
  1089. del_dev:
  1090. platform_device_del(serial_txx9_plat_devs);
  1091. put_dev:
  1092. platform_device_put(serial_txx9_plat_devs);
  1093. unreg_uart_drv:
  1094. uart_unregister_driver(&serial_txx9_reg);
  1095. out:
  1096. return ret;
  1097. }
  1098. static void __exit serial_txx9_exit(void)
  1099. {
  1100. int i;
  1101. #ifdef ENABLE_SERIAL_TXX9_PCI
  1102. pci_unregister_driver(&serial_txx9_pci_driver);
  1103. #endif
  1104. platform_driver_unregister(&serial_txx9_plat_driver);
  1105. platform_device_unregister(serial_txx9_plat_devs);
  1106. for (i = 0; i < UART_NR; i++) {
  1107. struct uart_txx9_port *up = &serial_txx9_ports[i];
  1108. if (up->port.iobase || up->port.mapbase)
  1109. uart_remove_one_port(&serial_txx9_reg, &up->port);
  1110. }
  1111. uart_unregister_driver(&serial_txx9_reg);
  1112. }
  1113. module_init(serial_txx9_init);
  1114. module_exit(serial_txx9_exit);
  1115. MODULE_LICENSE("GPL");
  1116. MODULE_DESCRIPTION("TX39/49 serial driver");
  1117. MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);