sa1100.c 23 KB

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  1. /*
  2. * linux/drivers/char/sa1100.c
  3. *
  4. * Driver for SA11x0 serial ports
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. * $Id: sa1100.c,v 1.1.1.1 2007/06/12 07:27:10 eyryu Exp $
  25. *
  26. */
  27. #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  28. #define SUPPORT_SYSRQ
  29. #endif
  30. #include <linux/module.h>
  31. #include <linux/ioport.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/tty.h>
  37. #include <linux/tty_flip.h>
  38. #include <linux/serial_core.h>
  39. #include <linux/serial.h>
  40. #include <asm/io.h>
  41. #include <asm/irq.h>
  42. #include <asm/hardware.h>
  43. #include <asm/mach/serial_sa1100.h>
  44. /* We've been assigned a range on the "Low-density serial ports" major */
  45. #define SERIAL_SA1100_MAJOR 204
  46. #define MINOR_START 5
  47. #define NR_PORTS 3
  48. #define SA1100_ISR_PASS_LIMIT 256
  49. /*
  50. * Convert from ignore_status_mask or read_status_mask to UTSR[01]
  51. */
  52. #define SM_TO_UTSR0(x) ((x) & 0xff)
  53. #define SM_TO_UTSR1(x) ((x) >> 8)
  54. #define UTSR0_TO_SM(x) ((x))
  55. #define UTSR1_TO_SM(x) ((x) << 8)
  56. #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
  57. #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
  58. #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
  59. #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
  60. #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
  61. #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
  62. #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
  63. #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
  64. #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
  65. #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
  66. #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
  67. #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
  68. #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
  69. #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
  70. /*
  71. * This is the size of our serial port register set.
  72. */
  73. #define UART_PORT_SIZE 0x24
  74. /*
  75. * This determines how often we check the modem status signals
  76. * for any change. They generally aren't connected to an IRQ
  77. * so we have to poll them. We also check immediately before
  78. * filling the TX fifo incase CTS has been dropped.
  79. */
  80. #define MCTRL_TIMEOUT (250*HZ/1000)
  81. struct sa1100_port {
  82. struct uart_port port;
  83. struct timer_list timer;
  84. unsigned int old_status;
  85. };
  86. /*
  87. * Handle any change of modem status signal since we were last called.
  88. */
  89. static void sa1100_mctrl_check(struct sa1100_port *sport)
  90. {
  91. unsigned int status, changed;
  92. status = sport->port.ops->get_mctrl(&sport->port);
  93. changed = status ^ sport->old_status;
  94. if (changed == 0)
  95. return;
  96. sport->old_status = status;
  97. if (changed & TIOCM_RI)
  98. sport->port.icount.rng++;
  99. if (changed & TIOCM_DSR)
  100. sport->port.icount.dsr++;
  101. if (changed & TIOCM_CAR)
  102. uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
  103. if (changed & TIOCM_CTS)
  104. uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
  105. wake_up_interruptible(&sport->port.info->delta_msr_wait);
  106. }
  107. /*
  108. * This is our per-port timeout handler, for checking the
  109. * modem status signals.
  110. */
  111. static void sa1100_timeout(unsigned long data)
  112. {
  113. struct sa1100_port *sport = (struct sa1100_port *)data;
  114. unsigned long flags;
  115. if (sport->port.info) {
  116. spin_lock_irqsave(&sport->port.lock, flags);
  117. sa1100_mctrl_check(sport);
  118. spin_unlock_irqrestore(&sport->port.lock, flags);
  119. mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
  120. }
  121. }
  122. /*
  123. * interrupts disabled on entry
  124. */
  125. static void sa1100_stop_tx(struct uart_port *port)
  126. {
  127. struct sa1100_port *sport = (struct sa1100_port *)port;
  128. u32 utcr3;
  129. utcr3 = UART_GET_UTCR3(sport);
  130. UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
  131. sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
  132. }
  133. /*
  134. * port locked and interrupts disabled
  135. */
  136. static void sa1100_start_tx(struct uart_port *port)
  137. {
  138. struct sa1100_port *sport = (struct sa1100_port *)port;
  139. u32 utcr3;
  140. utcr3 = UART_GET_UTCR3(sport);
  141. sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
  142. UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
  143. }
  144. /*
  145. * Interrupts enabled
  146. */
  147. static void sa1100_stop_rx(struct uart_port *port)
  148. {
  149. struct sa1100_port *sport = (struct sa1100_port *)port;
  150. u32 utcr3;
  151. utcr3 = UART_GET_UTCR3(sport);
  152. UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
  153. }
  154. /*
  155. * Set the modem control timer to fire immediately.
  156. */
  157. static void sa1100_enable_ms(struct uart_port *port)
  158. {
  159. struct sa1100_port *sport = (struct sa1100_port *)port;
  160. mod_timer(&sport->timer, jiffies);
  161. }
  162. static void
  163. sa1100_rx_chars(struct sa1100_port *sport)
  164. {
  165. struct tty_struct *tty = sport->port.info->tty;
  166. unsigned int status, ch, flg;
  167. status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
  168. UTSR0_TO_SM(UART_GET_UTSR0(sport));
  169. while (status & UTSR1_TO_SM(UTSR1_RNE)) {
  170. ch = UART_GET_CHAR(sport);
  171. sport->port.icount.rx++;
  172. flg = TTY_NORMAL;
  173. /*
  174. * note that the error handling code is
  175. * out of the main execution path
  176. */
  177. if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
  178. if (status & UTSR1_TO_SM(UTSR1_PRE))
  179. sport->port.icount.parity++;
  180. else if (status & UTSR1_TO_SM(UTSR1_FRE))
  181. sport->port.icount.frame++;
  182. if (status & UTSR1_TO_SM(UTSR1_ROR))
  183. sport->port.icount.overrun++;
  184. status &= sport->port.read_status_mask;
  185. if (status & UTSR1_TO_SM(UTSR1_PRE))
  186. flg = TTY_PARITY;
  187. else if (status & UTSR1_TO_SM(UTSR1_FRE))
  188. flg = TTY_FRAME;
  189. #ifdef SUPPORT_SYSRQ
  190. sport->port.sysrq = 0;
  191. #endif
  192. }
  193. if (uart_handle_sysrq_char(&sport->port, ch))
  194. goto ignore_char;
  195. uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
  196. ignore_char:
  197. status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
  198. UTSR0_TO_SM(UART_GET_UTSR0(sport));
  199. }
  200. tty_flip_buffer_push(tty);
  201. }
  202. static void sa1100_tx_chars(struct sa1100_port *sport)
  203. {
  204. struct circ_buf *xmit = &sport->port.info->xmit;
  205. if (sport->port.x_char) {
  206. UART_PUT_CHAR(sport, sport->port.x_char);
  207. sport->port.icount.tx++;
  208. sport->port.x_char = 0;
  209. return;
  210. }
  211. /*
  212. * Check the modem control lines before
  213. * transmitting anything.
  214. */
  215. sa1100_mctrl_check(sport);
  216. if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
  217. sa1100_stop_tx(&sport->port);
  218. return;
  219. }
  220. /*
  221. * Tried using FIFO (not checking TNF) for fifo fill:
  222. * still had the '4 bytes repeated' problem.
  223. */
  224. while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
  225. UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
  226. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  227. sport->port.icount.tx++;
  228. if (uart_circ_empty(xmit))
  229. break;
  230. }
  231. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  232. uart_write_wakeup(&sport->port);
  233. if (uart_circ_empty(xmit))
  234. sa1100_stop_tx(&sport->port);
  235. }
  236. static irqreturn_t sa1100_int(int irq, void *dev_id)
  237. {
  238. struct sa1100_port *sport = dev_id;
  239. unsigned int status, pass_counter = 0;
  240. spin_lock(&sport->port.lock);
  241. status = UART_GET_UTSR0(sport);
  242. status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
  243. do {
  244. if (status & (UTSR0_RFS | UTSR0_RID)) {
  245. /* Clear the receiver idle bit, if set */
  246. if (status & UTSR0_RID)
  247. UART_PUT_UTSR0(sport, UTSR0_RID);
  248. sa1100_rx_chars(sport);
  249. }
  250. /* Clear the relevant break bits */
  251. if (status & (UTSR0_RBB | UTSR0_REB))
  252. UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
  253. if (status & UTSR0_RBB)
  254. sport->port.icount.brk++;
  255. if (status & UTSR0_REB)
  256. uart_handle_break(&sport->port);
  257. if (status & UTSR0_TFS)
  258. sa1100_tx_chars(sport);
  259. if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
  260. break;
  261. status = UART_GET_UTSR0(sport);
  262. status &= SM_TO_UTSR0(sport->port.read_status_mask) |
  263. ~UTSR0_TFS;
  264. } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
  265. spin_unlock(&sport->port.lock);
  266. return IRQ_HANDLED;
  267. }
  268. /*
  269. * Return TIOCSER_TEMT when transmitter is not busy.
  270. */
  271. static unsigned int sa1100_tx_empty(struct uart_port *port)
  272. {
  273. struct sa1100_port *sport = (struct sa1100_port *)port;
  274. return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
  275. }
  276. static unsigned int sa1100_get_mctrl(struct uart_port *port)
  277. {
  278. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  279. }
  280. static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
  281. {
  282. }
  283. /*
  284. * Interrupts always disabled.
  285. */
  286. static void sa1100_break_ctl(struct uart_port *port, int break_state)
  287. {
  288. struct sa1100_port *sport = (struct sa1100_port *)port;
  289. unsigned long flags;
  290. unsigned int utcr3;
  291. spin_lock_irqsave(&sport->port.lock, flags);
  292. utcr3 = UART_GET_UTCR3(sport);
  293. if (break_state == -1)
  294. utcr3 |= UTCR3_BRK;
  295. else
  296. utcr3 &= ~UTCR3_BRK;
  297. UART_PUT_UTCR3(sport, utcr3);
  298. spin_unlock_irqrestore(&sport->port.lock, flags);
  299. }
  300. static int sa1100_startup(struct uart_port *port)
  301. {
  302. struct sa1100_port *sport = (struct sa1100_port *)port;
  303. int retval;
  304. /*
  305. * Allocate the IRQ
  306. */
  307. retval = request_irq(sport->port.irq, sa1100_int, 0,
  308. "sa11x0-uart", sport);
  309. if (retval)
  310. return retval;
  311. /*
  312. * Finally, clear and enable interrupts
  313. */
  314. UART_PUT_UTSR0(sport, -1);
  315. UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
  316. /*
  317. * Enable modem status interrupts
  318. */
  319. spin_lock_irq(&sport->port.lock);
  320. sa1100_enable_ms(&sport->port);
  321. spin_unlock_irq(&sport->port.lock);
  322. return 0;
  323. }
  324. static void sa1100_shutdown(struct uart_port *port)
  325. {
  326. struct sa1100_port *sport = (struct sa1100_port *)port;
  327. /*
  328. * Stop our timer.
  329. */
  330. del_timer_sync(&sport->timer);
  331. /*
  332. * Free the interrupt
  333. */
  334. free_irq(sport->port.irq, sport);
  335. /*
  336. * Disable all interrupts, port and break condition.
  337. */
  338. UART_PUT_UTCR3(sport, 0);
  339. }
  340. static void
  341. sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
  342. struct ktermios *old)
  343. {
  344. struct sa1100_port *sport = (struct sa1100_port *)port;
  345. unsigned long flags;
  346. unsigned int utcr0, old_utcr3, baud, quot;
  347. unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
  348. /*
  349. * We only support CS7 and CS8.
  350. */
  351. while ((termios->c_cflag & CSIZE) != CS7 &&
  352. (termios->c_cflag & CSIZE) != CS8) {
  353. termios->c_cflag &= ~CSIZE;
  354. termios->c_cflag |= old_csize;
  355. old_csize = CS8;
  356. }
  357. if ((termios->c_cflag & CSIZE) == CS8)
  358. utcr0 = UTCR0_DSS;
  359. else
  360. utcr0 = 0;
  361. if (termios->c_cflag & CSTOPB)
  362. utcr0 |= UTCR0_SBS;
  363. if (termios->c_cflag & PARENB) {
  364. utcr0 |= UTCR0_PE;
  365. if (!(termios->c_cflag & PARODD))
  366. utcr0 |= UTCR0_OES;
  367. }
  368. /*
  369. * Ask the core to calculate the divisor for us.
  370. */
  371. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  372. quot = uart_get_divisor(port, baud);
  373. spin_lock_irqsave(&sport->port.lock, flags);
  374. sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
  375. sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
  376. if (termios->c_iflag & INPCK)
  377. sport->port.read_status_mask |=
  378. UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
  379. if (termios->c_iflag & (BRKINT | PARMRK))
  380. sport->port.read_status_mask |=
  381. UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
  382. /*
  383. * Characters to ignore
  384. */
  385. sport->port.ignore_status_mask = 0;
  386. if (termios->c_iflag & IGNPAR)
  387. sport->port.ignore_status_mask |=
  388. UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
  389. if (termios->c_iflag & IGNBRK) {
  390. sport->port.ignore_status_mask |=
  391. UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
  392. /*
  393. * If we're ignoring parity and break indicators,
  394. * ignore overruns too (for real raw support).
  395. */
  396. if (termios->c_iflag & IGNPAR)
  397. sport->port.ignore_status_mask |=
  398. UTSR1_TO_SM(UTSR1_ROR);
  399. }
  400. del_timer_sync(&sport->timer);
  401. /*
  402. * Update the per-port timeout.
  403. */
  404. uart_update_timeout(port, termios->c_cflag, baud);
  405. /*
  406. * disable interrupts and drain transmitter
  407. */
  408. old_utcr3 = UART_GET_UTCR3(sport);
  409. UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
  410. while (UART_GET_UTSR1(sport) & UTSR1_TBY)
  411. barrier();
  412. /* then, disable everything */
  413. UART_PUT_UTCR3(sport, 0);
  414. /* set the parity, stop bits and data size */
  415. UART_PUT_UTCR0(sport, utcr0);
  416. /* set the baud rate */
  417. quot -= 1;
  418. UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
  419. UART_PUT_UTCR2(sport, (quot & 0xff));
  420. UART_PUT_UTSR0(sport, -1);
  421. UART_PUT_UTCR3(sport, old_utcr3);
  422. if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
  423. sa1100_enable_ms(&sport->port);
  424. spin_unlock_irqrestore(&sport->port.lock, flags);
  425. }
  426. static const char *sa1100_type(struct uart_port *port)
  427. {
  428. struct sa1100_port *sport = (struct sa1100_port *)port;
  429. return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
  430. }
  431. /*
  432. * Release the memory region(s) being used by 'port'.
  433. */
  434. static void sa1100_release_port(struct uart_port *port)
  435. {
  436. struct sa1100_port *sport = (struct sa1100_port *)port;
  437. release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
  438. }
  439. /*
  440. * Request the memory region(s) being used by 'port'.
  441. */
  442. static int sa1100_request_port(struct uart_port *port)
  443. {
  444. struct sa1100_port *sport = (struct sa1100_port *)port;
  445. return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
  446. "sa11x0-uart") != NULL ? 0 : -EBUSY;
  447. }
  448. /*
  449. * Configure/autoconfigure the port.
  450. */
  451. static void sa1100_config_port(struct uart_port *port, int flags)
  452. {
  453. struct sa1100_port *sport = (struct sa1100_port *)port;
  454. if (flags & UART_CONFIG_TYPE &&
  455. sa1100_request_port(&sport->port) == 0)
  456. sport->port.type = PORT_SA1100;
  457. }
  458. /*
  459. * Verify the new serial_struct (for TIOCSSERIAL).
  460. * The only change we allow are to the flags and type, and
  461. * even then only between PORT_SA1100 and PORT_UNKNOWN
  462. */
  463. static int
  464. sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
  465. {
  466. struct sa1100_port *sport = (struct sa1100_port *)port;
  467. int ret = 0;
  468. if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
  469. ret = -EINVAL;
  470. if (sport->port.irq != ser->irq)
  471. ret = -EINVAL;
  472. if (ser->io_type != SERIAL_IO_MEM)
  473. ret = -EINVAL;
  474. if (sport->port.uartclk / 16 != ser->baud_base)
  475. ret = -EINVAL;
  476. if ((void *)sport->port.mapbase != ser->iomem_base)
  477. ret = -EINVAL;
  478. if (sport->port.iobase != ser->port)
  479. ret = -EINVAL;
  480. if (ser->hub6 != 0)
  481. ret = -EINVAL;
  482. return ret;
  483. }
  484. static struct uart_ops sa1100_pops = {
  485. .tx_empty = sa1100_tx_empty,
  486. .set_mctrl = sa1100_set_mctrl,
  487. .get_mctrl = sa1100_get_mctrl,
  488. .stop_tx = sa1100_stop_tx,
  489. .start_tx = sa1100_start_tx,
  490. .stop_rx = sa1100_stop_rx,
  491. .enable_ms = sa1100_enable_ms,
  492. .break_ctl = sa1100_break_ctl,
  493. .startup = sa1100_startup,
  494. .shutdown = sa1100_shutdown,
  495. .set_termios = sa1100_set_termios,
  496. .type = sa1100_type,
  497. .release_port = sa1100_release_port,
  498. .request_port = sa1100_request_port,
  499. .config_port = sa1100_config_port,
  500. .verify_port = sa1100_verify_port,
  501. };
  502. static struct sa1100_port sa1100_ports[NR_PORTS];
  503. /*
  504. * Setup the SA1100 serial ports. Note that we don't include the IrDA
  505. * port here since we have our own SIR/FIR driver (see drivers/net/irda)
  506. *
  507. * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
  508. * Which serial port this ends up being depends on the machine you're
  509. * running this kernel on. I'm not convinced that this is a good idea,
  510. * but that's the way it traditionally works.
  511. *
  512. * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
  513. * used here.
  514. */
  515. static void __init sa1100_init_ports(void)
  516. {
  517. static int first = 1;
  518. int i;
  519. if (!first)
  520. return;
  521. first = 0;
  522. for (i = 0; i < NR_PORTS; i++) {
  523. sa1100_ports[i].port.uartclk = 3686400;
  524. sa1100_ports[i].port.ops = &sa1100_pops;
  525. sa1100_ports[i].port.fifosize = 8;
  526. sa1100_ports[i].port.line = i;
  527. sa1100_ports[i].port.iotype = UPIO_MEM;
  528. init_timer(&sa1100_ports[i].timer);
  529. sa1100_ports[i].timer.function = sa1100_timeout;
  530. sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
  531. }
  532. /*
  533. * make transmit lines outputs, so that when the port
  534. * is closed, the output is in the MARK state.
  535. */
  536. PPDR |= PPC_TXD1 | PPC_TXD3;
  537. PPSR |= PPC_TXD1 | PPC_TXD3;
  538. }
  539. void __init sa1100_register_uart_fns(struct sa1100_port_fns *fns)
  540. {
  541. if (fns->get_mctrl)
  542. sa1100_pops.get_mctrl = fns->get_mctrl;
  543. if (fns->set_mctrl)
  544. sa1100_pops.set_mctrl = fns->set_mctrl;
  545. sa1100_pops.pm = fns->pm;
  546. sa1100_pops.set_wake = fns->set_wake;
  547. }
  548. void __init sa1100_register_uart(int idx, int port)
  549. {
  550. if (idx >= NR_PORTS) {
  551. printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx);
  552. return;
  553. }
  554. switch (port) {
  555. case 1:
  556. sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
  557. sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
  558. sa1100_ports[idx].port.irq = IRQ_Ser1UART;
  559. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  560. break;
  561. case 2:
  562. sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
  563. sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
  564. sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
  565. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  566. break;
  567. case 3:
  568. sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
  569. sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
  570. sa1100_ports[idx].port.irq = IRQ_Ser3UART;
  571. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  572. break;
  573. default:
  574. printk(KERN_ERR "%s: bad port number %d\n", __FUNCTION__, port);
  575. }
  576. }
  577. #ifdef CONFIG_SERIAL_SA1100_CONSOLE
  578. static void sa1100_console_putchar(struct uart_port *port, int ch)
  579. {
  580. struct sa1100_port *sport = (struct sa1100_port *)port;
  581. while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
  582. barrier();
  583. UART_PUT_CHAR(sport, ch);
  584. }
  585. /*
  586. * Interrupts are disabled on entering
  587. */
  588. static void
  589. sa1100_console_write(struct console *co, const char *s, unsigned int count)
  590. {
  591. struct sa1100_port *sport = &sa1100_ports[co->index];
  592. unsigned int old_utcr3, status;
  593. /*
  594. * First, save UTCR3 and then disable interrupts
  595. */
  596. old_utcr3 = UART_GET_UTCR3(sport);
  597. UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
  598. UTCR3_TXE);
  599. uart_console_write(&sport->port, s, count, sa1100_console_putchar);
  600. /*
  601. * Finally, wait for transmitter to become empty
  602. * and restore UTCR3
  603. */
  604. do {
  605. status = UART_GET_UTSR1(sport);
  606. } while (status & UTSR1_TBY);
  607. UART_PUT_UTCR3(sport, old_utcr3);
  608. }
  609. /*
  610. * If the port was already initialised (eg, by a boot loader),
  611. * try to determine the current setup.
  612. */
  613. static void __init
  614. sa1100_console_get_options(struct sa1100_port *sport, int *baud,
  615. int *parity, int *bits)
  616. {
  617. unsigned int utcr3;
  618. utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
  619. if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
  620. /* ok, the port was enabled */
  621. unsigned int utcr0, quot;
  622. utcr0 = UART_GET_UTCR0(sport);
  623. *parity = 'n';
  624. if (utcr0 & UTCR0_PE) {
  625. if (utcr0 & UTCR0_OES)
  626. *parity = 'e';
  627. else
  628. *parity = 'o';
  629. }
  630. if (utcr0 & UTCR0_DSS)
  631. *bits = 8;
  632. else
  633. *bits = 7;
  634. quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
  635. quot &= 0xfff;
  636. *baud = sport->port.uartclk / (16 * (quot + 1));
  637. }
  638. }
  639. static int __init
  640. sa1100_console_setup(struct console *co, char *options)
  641. {
  642. struct sa1100_port *sport;
  643. int baud = 9600;
  644. int bits = 8;
  645. int parity = 'n';
  646. int flow = 'n';
  647. /*
  648. * Check whether an invalid uart number has been specified, and
  649. * if so, search for the first available port that does have
  650. * console support.
  651. */
  652. if (co->index == -1 || co->index >= NR_PORTS)
  653. co->index = 0;
  654. sport = &sa1100_ports[co->index];
  655. if (options)
  656. uart_parse_options(options, &baud, &parity, &bits, &flow);
  657. else
  658. sa1100_console_get_options(sport, &baud, &parity, &bits);
  659. return uart_set_options(&sport->port, co, baud, parity, bits, flow);
  660. }
  661. static struct uart_driver sa1100_reg;
  662. static struct console sa1100_console = {
  663. .name = "ttySA",
  664. .write = sa1100_console_write,
  665. .device = uart_console_device,
  666. .setup = sa1100_console_setup,
  667. .flags = CON_PRINTBUFFER,
  668. .index = -1,
  669. .data = &sa1100_reg,
  670. };
  671. static int __init sa1100_rs_console_init(void)
  672. {
  673. sa1100_init_ports();
  674. register_console(&sa1100_console);
  675. return 0;
  676. }
  677. console_initcall(sa1100_rs_console_init);
  678. #define SA1100_CONSOLE &sa1100_console
  679. #else
  680. #define SA1100_CONSOLE NULL
  681. #endif
  682. static struct uart_driver sa1100_reg = {
  683. .owner = THIS_MODULE,
  684. .driver_name = "ttySA",
  685. .dev_name = "ttySA",
  686. .major = SERIAL_SA1100_MAJOR,
  687. .minor = MINOR_START,
  688. .nr = NR_PORTS,
  689. .cons = SA1100_CONSOLE,
  690. };
  691. static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
  692. {
  693. struct sa1100_port *sport = platform_get_drvdata(dev);
  694. if (sport)
  695. uart_suspend_port(&sa1100_reg, &sport->port);
  696. return 0;
  697. }
  698. static int sa1100_serial_resume(struct platform_device *dev)
  699. {
  700. struct sa1100_port *sport = platform_get_drvdata(dev);
  701. if (sport)
  702. uart_resume_port(&sa1100_reg, &sport->port);
  703. return 0;
  704. }
  705. static int sa1100_serial_probe(struct platform_device *dev)
  706. {
  707. struct resource *res = dev->resource;
  708. int i;
  709. for (i = 0; i < dev->num_resources; i++, res++)
  710. if (res->flags & IORESOURCE_MEM)
  711. break;
  712. if (i < dev->num_resources) {
  713. for (i = 0; i < NR_PORTS; i++) {
  714. if (sa1100_ports[i].port.mapbase != res->start)
  715. continue;
  716. sa1100_ports[i].port.dev = &dev->dev;
  717. uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
  718. platform_set_drvdata(dev, &sa1100_ports[i]);
  719. break;
  720. }
  721. }
  722. return 0;
  723. }
  724. static int sa1100_serial_remove(struct platform_device *pdev)
  725. {
  726. struct sa1100_port *sport = platform_get_drvdata(pdev);
  727. platform_set_drvdata(pdev, NULL);
  728. if (sport)
  729. uart_remove_one_port(&sa1100_reg, &sport->port);
  730. return 0;
  731. }
  732. static struct platform_driver sa11x0_serial_driver = {
  733. .probe = sa1100_serial_probe,
  734. .remove = sa1100_serial_remove,
  735. .suspend = sa1100_serial_suspend,
  736. .resume = sa1100_serial_resume,
  737. .driver = {
  738. .name = "sa11x0-uart",
  739. },
  740. };
  741. static int __init sa1100_serial_init(void)
  742. {
  743. int ret;
  744. printk(KERN_INFO "Serial: SA11x0 driver $Revision: 1.1.1.1 $\n");
  745. sa1100_init_ports();
  746. ret = uart_register_driver(&sa1100_reg);
  747. if (ret == 0) {
  748. ret = platform_driver_register(&sa11x0_serial_driver);
  749. if (ret)
  750. uart_unregister_driver(&sa1100_reg);
  751. }
  752. return ret;
  753. }
  754. static void __exit sa1100_serial_exit(void)
  755. {
  756. platform_driver_unregister(&sa11x0_serial_driver);
  757. uart_unregister_driver(&sa1100_reg);
  758. }
  759. module_init(sa1100_serial_init);
  760. module_exit(sa1100_serial_exit);
  761. MODULE_AUTHOR("Deep Blue Solutions Ltd");
  762. MODULE_DESCRIPTION("SA1100 generic serial port driver $Revision: 1.1.1.1 $");
  763. MODULE_LICENSE("GPL");
  764. MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);