ioc3_serial.c 57 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved.
  7. */
  8. /*
  9. * This file contains a module version of the ioc3 serial driver. This
  10. * includes all the support functions needed (support functions, etc.)
  11. * and the serial driver itself.
  12. */
  13. #include <linux/errno.h>
  14. #include <linux/tty.h>
  15. #include <linux/serial.h>
  16. #include <linux/circ_buf.h>
  17. #include <linux/serial_reg.h>
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/ioc3.h>
  22. /*
  23. * Interesting things about the ioc3
  24. */
  25. #define LOGICAL_PORTS 2 /* rs232(0) and rs422(1) */
  26. #define PORTS_PER_CARD 2
  27. #define LOGICAL_PORTS_PER_CARD (PORTS_PER_CARD * LOGICAL_PORTS)
  28. #define MAX_CARDS 8
  29. #define MAX_LOGICAL_PORTS (LOGICAL_PORTS_PER_CARD * MAX_CARDS)
  30. /* determine given the sio_ir what port it applies to */
  31. #define GET_PORT_FROM_SIO_IR(_x) (_x & SIO_IR_SA) ? 0 : 1
  32. /*
  33. * we have 2 logical ports (rs232, rs422) for each physical port
  34. * evens are rs232, odds are rs422
  35. */
  36. #define GET_PHYSICAL_PORT(_x) ((_x) >> 1)
  37. #define GET_LOGICAL_PORT(_x) ((_x) & 1)
  38. #define IS_PHYSICAL_PORT(_x) !((_x) & 1)
  39. #define IS_RS232(_x) !((_x) & 1)
  40. static unsigned int Num_of_ioc3_cards;
  41. static unsigned int Submodule_slot;
  42. /* defining this will get you LOTS of great debug info */
  43. //#define DEBUG_INTERRUPTS
  44. #define DPRINT_CONFIG(_x...) ;
  45. //#define DPRINT_CONFIG(_x...) printk _x
  46. #define NOT_PROGRESS() ;
  47. //#define NOT_PROGRESS() printk("%s : fails %d\n", __FUNCTION__, __LINE__)
  48. /* number of characters we want to transmit to the lower level at a time */
  49. #define MAX_CHARS 256
  50. #define FIFO_SIZE (MAX_CHARS-1) /* it's a uchar */
  51. /* Device name we're using */
  52. #define DEVICE_NAME "ttySIOC"
  53. #define DEVICE_MAJOR 204
  54. #define DEVICE_MINOR 116
  55. /* flags for next_char_state */
  56. #define NCS_BREAK 0x1
  57. #define NCS_PARITY 0x2
  58. #define NCS_FRAMING 0x4
  59. #define NCS_OVERRUN 0x8
  60. /* cause we need SOME parameters ... */
  61. #define MIN_BAUD_SUPPORTED 1200
  62. #define MAX_BAUD_SUPPORTED 115200
  63. /* protocol types supported */
  64. #define PROTO_RS232 0
  65. #define PROTO_RS422 1
  66. /* Notification types */
  67. #define N_DATA_READY 0x01
  68. #define N_OUTPUT_LOWAT 0x02
  69. #define N_BREAK 0x04
  70. #define N_PARITY_ERROR 0x08
  71. #define N_FRAMING_ERROR 0x10
  72. #define N_OVERRUN_ERROR 0x20
  73. #define N_DDCD 0x40
  74. #define N_DCTS 0x80
  75. #define N_ALL_INPUT (N_DATA_READY | N_BREAK \
  76. | N_PARITY_ERROR | N_FRAMING_ERROR \
  77. | N_OVERRUN_ERROR | N_DDCD | N_DCTS)
  78. #define N_ALL_OUTPUT N_OUTPUT_LOWAT
  79. #define N_ALL_ERRORS (N_PARITY_ERROR | N_FRAMING_ERROR \
  80. | N_OVERRUN_ERROR)
  81. #define N_ALL (N_DATA_READY | N_OUTPUT_LOWAT | N_BREAK \
  82. | N_PARITY_ERROR | N_FRAMING_ERROR \
  83. | N_OVERRUN_ERROR | N_DDCD | N_DCTS)
  84. #define SER_CLK_SPEED(prediv) ((22000000 << 1) / prediv)
  85. #define SER_DIVISOR(x, clk) (((clk) + (x) * 8) / ((x) * 16))
  86. #define DIVISOR_TO_BAUD(div, clk) ((clk) / 16 / (div))
  87. /* Some masks */
  88. #define LCR_MASK_BITS_CHAR (UART_LCR_WLEN5 | UART_LCR_WLEN6 \
  89. | UART_LCR_WLEN7 | UART_LCR_WLEN8)
  90. #define LCR_MASK_STOP_BITS (UART_LCR_STOP)
  91. #define PENDING(_a, _p) (readl(&(_p)->vma->sio_ir) & (_a)->ic_enable)
  92. #define RING_BUF_SIZE 4096
  93. #define BUF_SIZE_BIT SBBR_L_SIZE
  94. #define PROD_CONS_MASK PROD_CONS_PTR_4K
  95. #define TOTAL_RING_BUF_SIZE (RING_BUF_SIZE * 4)
  96. /* driver specific - one per card */
  97. struct ioc3_card {
  98. struct {
  99. /* uart ports are allocated here */
  100. struct uart_port icp_uart_port[LOGICAL_PORTS];
  101. /* the ioc3_port used for this port */
  102. struct ioc3_port *icp_port;
  103. } ic_port[PORTS_PER_CARD];
  104. /* currently enabled interrupts */
  105. uint32_t ic_enable;
  106. };
  107. /* Local port info for each IOC3 serial port */
  108. struct ioc3_port {
  109. /* handy reference material */
  110. struct uart_port *ip_port;
  111. struct ioc3_card *ip_card;
  112. struct ioc3_driver_data *ip_idd;
  113. struct ioc3_submodule *ip_is;
  114. /* pci mem addresses for this port */
  115. struct ioc3_serialregs __iomem *ip_serial_regs;
  116. struct ioc3_uartregs __iomem *ip_uart_regs;
  117. /* Ring buffer page for this port */
  118. dma_addr_t ip_dma_ringbuf;
  119. /* vaddr of ring buffer */
  120. struct ring_buffer *ip_cpu_ringbuf;
  121. /* Rings for this port */
  122. struct ring *ip_inring;
  123. struct ring *ip_outring;
  124. /* Hook to port specific values */
  125. struct port_hooks *ip_hooks;
  126. spinlock_t ip_lock;
  127. /* Various rx/tx parameters */
  128. int ip_baud;
  129. int ip_tx_lowat;
  130. int ip_rx_timeout;
  131. /* Copy of notification bits */
  132. int ip_notify;
  133. /* Shadow copies of various registers so we don't need to PIO
  134. * read them constantly
  135. */
  136. uint32_t ip_sscr;
  137. uint32_t ip_tx_prod;
  138. uint32_t ip_rx_cons;
  139. unsigned char ip_flags;
  140. };
  141. /* tx low water mark. We need to notify the driver whenever tx is getting
  142. * close to empty so it can refill the tx buffer and keep things going.
  143. * Let's assume that if we interrupt 1 ms before the tx goes idle, we'll
  144. * have no trouble getting in more chars in time (I certainly hope so).
  145. */
  146. #define TX_LOWAT_LATENCY 1000
  147. #define TX_LOWAT_HZ (1000000 / TX_LOWAT_LATENCY)
  148. #define TX_LOWAT_CHARS(baud) (baud / 10 / TX_LOWAT_HZ)
  149. /* Flags per port */
  150. #define INPUT_HIGH 0x01
  151. /* used to signify that we have turned off the rx_high
  152. * temporarily - we need to drain the fifo and don't
  153. * want to get blasted with interrupts.
  154. */
  155. #define DCD_ON 0x02
  156. /* DCD state is on */
  157. #define LOWAT_WRITTEN 0x04
  158. #define READ_ABORTED 0x08
  159. /* the read was aborted - used to avaoid infinate looping
  160. * in the interrupt handler
  161. */
  162. #define INPUT_ENABLE 0x10
  163. /* Since each port has different register offsets and bitmasks
  164. * for everything, we'll store those that we need in tables so we
  165. * don't have to be constantly checking the port we are dealing with.
  166. */
  167. struct port_hooks {
  168. uint32_t intr_delta_dcd;
  169. uint32_t intr_delta_cts;
  170. uint32_t intr_tx_mt;
  171. uint32_t intr_rx_timer;
  172. uint32_t intr_rx_high;
  173. uint32_t intr_tx_explicit;
  174. uint32_t intr_clear;
  175. uint32_t intr_all;
  176. char rs422_select_pin;
  177. };
  178. static struct port_hooks hooks_array[PORTS_PER_CARD] = {
  179. /* values for port A */
  180. {
  181. .intr_delta_dcd = SIO_IR_SA_DELTA_DCD,
  182. .intr_delta_cts = SIO_IR_SA_DELTA_CTS,
  183. .intr_tx_mt = SIO_IR_SA_TX_MT,
  184. .intr_rx_timer = SIO_IR_SA_RX_TIMER,
  185. .intr_rx_high = SIO_IR_SA_RX_HIGH,
  186. .intr_tx_explicit = SIO_IR_SA_TX_EXPLICIT,
  187. .intr_clear = (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL
  188. | SIO_IR_SA_RX_HIGH
  189. | SIO_IR_SA_RX_TIMER
  190. | SIO_IR_SA_DELTA_DCD
  191. | SIO_IR_SA_DELTA_CTS
  192. | SIO_IR_SA_INT
  193. | SIO_IR_SA_TX_EXPLICIT
  194. | SIO_IR_SA_MEMERR),
  195. .intr_all = SIO_IR_SA,
  196. .rs422_select_pin = GPPR_UARTA_MODESEL_PIN,
  197. },
  198. /* values for port B */
  199. {
  200. .intr_delta_dcd = SIO_IR_SB_DELTA_DCD,
  201. .intr_delta_cts = SIO_IR_SB_DELTA_CTS,
  202. .intr_tx_mt = SIO_IR_SB_TX_MT,
  203. .intr_rx_timer = SIO_IR_SB_RX_TIMER,
  204. .intr_rx_high = SIO_IR_SB_RX_HIGH,
  205. .intr_tx_explicit = SIO_IR_SB_TX_EXPLICIT,
  206. .intr_clear = (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL
  207. | SIO_IR_SB_RX_HIGH
  208. | SIO_IR_SB_RX_TIMER
  209. | SIO_IR_SB_DELTA_DCD
  210. | SIO_IR_SB_DELTA_CTS
  211. | SIO_IR_SB_INT
  212. | SIO_IR_SB_TX_EXPLICIT
  213. | SIO_IR_SB_MEMERR),
  214. .intr_all = SIO_IR_SB,
  215. .rs422_select_pin = GPPR_UARTB_MODESEL_PIN,
  216. }
  217. };
  218. struct ring_entry {
  219. union {
  220. struct {
  221. uint32_t alldata;
  222. uint32_t allsc;
  223. } all;
  224. struct {
  225. char data[4]; /* data bytes */
  226. char sc[4]; /* status/control */
  227. } s;
  228. } u;
  229. };
  230. /* Test the valid bits in any of the 4 sc chars using "allsc" member */
  231. #define RING_ANY_VALID \
  232. ((uint32_t)(RXSB_MODEM_VALID | RXSB_DATA_VALID) * 0x01010101)
  233. #define ring_sc u.s.sc
  234. #define ring_data u.s.data
  235. #define ring_allsc u.all.allsc
  236. /* Number of entries per ring buffer. */
  237. #define ENTRIES_PER_RING (RING_BUF_SIZE / (int) sizeof(struct ring_entry))
  238. /* An individual ring */
  239. struct ring {
  240. struct ring_entry entries[ENTRIES_PER_RING];
  241. };
  242. /* The whole enchilada */
  243. struct ring_buffer {
  244. struct ring TX_A;
  245. struct ring RX_A;
  246. struct ring TX_B;
  247. struct ring RX_B;
  248. };
  249. /* Get a ring from a port struct */
  250. #define RING(_p, _wh) &(((struct ring_buffer *)((_p)->ip_cpu_ringbuf))->_wh)
  251. /* for Infinite loop detection */
  252. #define MAXITER 10000000
  253. /**
  254. * set_baud - Baud rate setting code
  255. * @port: port to set
  256. * @baud: baud rate to use
  257. */
  258. static int set_baud(struct ioc3_port *port, int baud)
  259. {
  260. int divisor;
  261. int actual_baud;
  262. int diff;
  263. int lcr, prediv;
  264. struct ioc3_uartregs __iomem *uart;
  265. for (prediv = 6; prediv < 64; prediv++) {
  266. divisor = SER_DIVISOR(baud, SER_CLK_SPEED(prediv));
  267. if (!divisor)
  268. continue; /* invalid divisor */
  269. actual_baud = DIVISOR_TO_BAUD(divisor, SER_CLK_SPEED(prediv));
  270. diff = actual_baud - baud;
  271. if (diff < 0)
  272. diff = -diff;
  273. /* if we're within 1% we've found a match */
  274. if (diff * 100 <= actual_baud)
  275. break;
  276. }
  277. /* if the above loop completed, we didn't match
  278. * the baud rate. give up.
  279. */
  280. if (prediv == 64) {
  281. NOT_PROGRESS();
  282. return 1;
  283. }
  284. uart = port->ip_uart_regs;
  285. lcr = readb(&uart->iu_lcr);
  286. writeb(lcr | UART_LCR_DLAB, &uart->iu_lcr);
  287. writeb((unsigned char)divisor, &uart->iu_dll);
  288. writeb((unsigned char)(divisor >> 8), &uart->iu_dlm);
  289. writeb((unsigned char)prediv, &uart->iu_scr);
  290. writeb((unsigned char)lcr, &uart->iu_lcr);
  291. return 0;
  292. }
  293. /**
  294. * get_ioc3_port - given a uart port, return the control structure
  295. * @the_port: uart port to find
  296. */
  297. static struct ioc3_port *get_ioc3_port(struct uart_port *the_port)
  298. {
  299. struct ioc3_driver_data *idd = dev_get_drvdata(the_port->dev);
  300. struct ioc3_card *card_ptr = idd->data[Submodule_slot];
  301. int ii, jj;
  302. if (!card_ptr) {
  303. NOT_PROGRESS();
  304. return NULL;
  305. }
  306. for (ii = 0; ii < PORTS_PER_CARD; ii++) {
  307. for (jj = 0; jj < LOGICAL_PORTS; jj++) {
  308. if (the_port == &card_ptr->ic_port[ii].icp_uart_port[jj])
  309. return card_ptr->ic_port[ii].icp_port;
  310. }
  311. }
  312. NOT_PROGRESS();
  313. return NULL;
  314. }
  315. /**
  316. * port_init - Initialize the sio and ioc3 hardware for a given port
  317. * called per port from attach...
  318. * @port: port to initialize
  319. */
  320. static int inline port_init(struct ioc3_port *port)
  321. {
  322. uint32_t sio_cr;
  323. struct port_hooks *hooks = port->ip_hooks;
  324. struct ioc3_uartregs __iomem *uart;
  325. int reset_loop_counter = 0xfffff;
  326. struct ioc3_driver_data *idd = port->ip_idd;
  327. /* Idle the IOC3 serial interface */
  328. writel(SSCR_RESET, &port->ip_serial_regs->sscr);
  329. /* Wait until any pending bus activity for this port has ceased */
  330. do {
  331. sio_cr = readl(&idd->vma->sio_cr);
  332. if (reset_loop_counter-- <= 0) {
  333. printk(KERN_WARNING
  334. "IOC3 unable to come out of reset"
  335. " scr 0x%x\n", sio_cr);
  336. return -1;
  337. }
  338. } while (!(sio_cr & SIO_CR_ARB_DIAG_IDLE) &&
  339. (((sio_cr &= SIO_CR_ARB_DIAG) == SIO_CR_ARB_DIAG_TXA)
  340. || sio_cr == SIO_CR_ARB_DIAG_TXB
  341. || sio_cr == SIO_CR_ARB_DIAG_RXA
  342. || sio_cr == SIO_CR_ARB_DIAG_RXB));
  343. /* Finish reset sequence */
  344. writel(0, &port->ip_serial_regs->sscr);
  345. /* Once RESET is done, reload cached tx_prod and rx_cons values
  346. * and set rings to empty by making prod == cons
  347. */
  348. port->ip_tx_prod = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK;
  349. writel(port->ip_tx_prod, &port->ip_serial_regs->stpir);
  350. port->ip_rx_cons = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
  351. writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir);
  352. /* Disable interrupts for this 16550 */
  353. uart = port->ip_uart_regs;
  354. writeb(0, &uart->iu_lcr);
  355. writeb(0, &uart->iu_ier);
  356. /* Set the default baud */
  357. set_baud(port, port->ip_baud);
  358. /* Set line control to 8 bits no parity */
  359. writeb(UART_LCR_WLEN8 | 0, &uart->iu_lcr);
  360. /* UART_LCR_STOP == 1 stop */
  361. /* Enable the FIFOs */
  362. writeb(UART_FCR_ENABLE_FIFO, &uart->iu_fcr);
  363. /* then reset 16550 FIFOs */
  364. writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  365. &uart->iu_fcr);
  366. /* Clear modem control register */
  367. writeb(0, &uart->iu_mcr);
  368. /* Clear deltas in modem status register */
  369. writel(0, &port->ip_serial_regs->shadow);
  370. /* Only do this once per port pair */
  371. if (port->ip_hooks == &hooks_array[0]) {
  372. unsigned long ring_pci_addr;
  373. uint32_t __iomem *sbbr_l, *sbbr_h;
  374. sbbr_l = &idd->vma->sbbr_l;
  375. sbbr_h = &idd->vma->sbbr_h;
  376. ring_pci_addr = (unsigned long __iomem)port->ip_dma_ringbuf;
  377. DPRINT_CONFIG(("%s: ring_pci_addr 0x%p\n",
  378. __FUNCTION__, (void *)ring_pci_addr));
  379. writel((unsigned int)((uint64_t) ring_pci_addr >> 32), sbbr_h);
  380. writel((unsigned int)ring_pci_addr | BUF_SIZE_BIT, sbbr_l);
  381. }
  382. /* Set the receive timeout value to 10 msec */
  383. writel(SRTR_HZ / 100, &port->ip_serial_regs->srtr);
  384. /* Set rx threshold, enable DMA */
  385. /* Set high water mark at 3/4 of full ring */
  386. port->ip_sscr = (ENTRIES_PER_RING * 3 / 4);
  387. /* uart experiences pauses at high baud rate reducing actual
  388. * throughput by 10% or so unless we enable high speed polling
  389. * XXX when this hardware bug is resolved we should revert to
  390. * normal polling speed
  391. */
  392. port->ip_sscr |= SSCR_HIGH_SPD;
  393. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  394. /* Disable and clear all serial related interrupt bits */
  395. port->ip_card->ic_enable &= ~hooks->intr_clear;
  396. ioc3_disable(port->ip_is, idd, hooks->intr_clear);
  397. ioc3_ack(port->ip_is, idd, hooks->intr_clear);
  398. return 0;
  399. }
  400. /**
  401. * enable_intrs - enable interrupts
  402. * @port: port to enable
  403. * @mask: mask to use
  404. */
  405. static void enable_intrs(struct ioc3_port *port, uint32_t mask)
  406. {
  407. if ((port->ip_card->ic_enable & mask) != mask) {
  408. port->ip_card->ic_enable |= mask;
  409. ioc3_enable(port->ip_is, port->ip_idd, mask);
  410. }
  411. }
  412. /**
  413. * local_open - local open a port
  414. * @port: port to open
  415. */
  416. static inline int local_open(struct ioc3_port *port)
  417. {
  418. int spiniter = 0;
  419. port->ip_flags = INPUT_ENABLE;
  420. /* Pause the DMA interface if necessary */
  421. if (port->ip_sscr & SSCR_DMA_EN) {
  422. writel(port->ip_sscr | SSCR_DMA_PAUSE,
  423. &port->ip_serial_regs->sscr);
  424. while ((readl(&port->ip_serial_regs->sscr)
  425. & SSCR_PAUSE_STATE) == 0) {
  426. spiniter++;
  427. if (spiniter > MAXITER) {
  428. NOT_PROGRESS();
  429. return -1;
  430. }
  431. }
  432. }
  433. /* Reset the input fifo. If the uart received chars while the port
  434. * was closed and DMA is not enabled, the uart may have a bunch of
  435. * chars hanging around in its rx fifo which will not be discarded
  436. * by rclr in the upper layer. We must get rid of them here.
  437. */
  438. writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR,
  439. &port->ip_uart_regs->iu_fcr);
  440. writeb(UART_LCR_WLEN8, &port->ip_uart_regs->iu_lcr);
  441. /* UART_LCR_STOP == 1 stop */
  442. /* Re-enable DMA, set default threshold to intr whenever there is
  443. * data available.
  444. */
  445. port->ip_sscr &= ~SSCR_RX_THRESHOLD;
  446. port->ip_sscr |= 1; /* default threshold */
  447. /* Plug in the new sscr. This implicitly clears the DMA_PAUSE
  448. * flag if it was set above
  449. */
  450. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  451. port->ip_tx_lowat = 1;
  452. return 0;
  453. }
  454. /**
  455. * set_rx_timeout - Set rx timeout and threshold values.
  456. * @port: port to use
  457. * @timeout: timeout value in ticks
  458. */
  459. static inline int set_rx_timeout(struct ioc3_port *port, int timeout)
  460. {
  461. int threshold;
  462. port->ip_rx_timeout = timeout;
  463. /* Timeout is in ticks. Let's figure out how many chars we
  464. * can receive at the current baud rate in that interval
  465. * and set the rx threshold to that amount. There are 4 chars
  466. * per ring entry, so we'll divide the number of chars that will
  467. * arrive in timeout by 4.
  468. * So .... timeout * baud / 10 / HZ / 4, with HZ = 100.
  469. */
  470. threshold = timeout * port->ip_baud / 4000;
  471. if (threshold == 0)
  472. threshold = 1; /* otherwise we'll intr all the time! */
  473. if ((unsigned)threshold > (unsigned)SSCR_RX_THRESHOLD)
  474. return 1;
  475. port->ip_sscr &= ~SSCR_RX_THRESHOLD;
  476. port->ip_sscr |= threshold;
  477. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  478. /* Now set the rx timeout to the given value
  479. * again timeout * SRTR_HZ / HZ
  480. */
  481. timeout = timeout * SRTR_HZ / 100;
  482. if (timeout > SRTR_CNT)
  483. timeout = SRTR_CNT;
  484. writel(timeout, &port->ip_serial_regs->srtr);
  485. return 0;
  486. }
  487. /**
  488. * config_port - config the hardware
  489. * @port: port to config
  490. * @baud: baud rate for the port
  491. * @byte_size: data size
  492. * @stop_bits: number of stop bits
  493. * @parenb: parity enable ?
  494. * @parodd: odd parity ?
  495. */
  496. static inline int
  497. config_port(struct ioc3_port *port,
  498. int baud, int byte_size, int stop_bits, int parenb, int parodd)
  499. {
  500. char lcr, sizebits;
  501. int spiniter = 0;
  502. DPRINT_CONFIG(("%s: line %d baud %d byte_size %d stop %d parenb %d "
  503. "parodd %d\n",
  504. __FUNCTION__, ((struct uart_port *)port->ip_port)->line,
  505. baud, byte_size, stop_bits, parenb, parodd));
  506. if (set_baud(port, baud))
  507. return 1;
  508. switch (byte_size) {
  509. case 5:
  510. sizebits = UART_LCR_WLEN5;
  511. break;
  512. case 6:
  513. sizebits = UART_LCR_WLEN6;
  514. break;
  515. case 7:
  516. sizebits = UART_LCR_WLEN7;
  517. break;
  518. case 8:
  519. sizebits = UART_LCR_WLEN8;
  520. break;
  521. default:
  522. return 1;
  523. }
  524. /* Pause the DMA interface if necessary */
  525. if (port->ip_sscr & SSCR_DMA_EN) {
  526. writel(port->ip_sscr | SSCR_DMA_PAUSE,
  527. &port->ip_serial_regs->sscr);
  528. while ((readl(&port->ip_serial_regs->sscr)
  529. & SSCR_PAUSE_STATE) == 0) {
  530. spiniter++;
  531. if (spiniter > MAXITER)
  532. return -1;
  533. }
  534. }
  535. /* Clear relevant fields in lcr */
  536. lcr = readb(&port->ip_uart_regs->iu_lcr);
  537. lcr &= ~(LCR_MASK_BITS_CHAR | UART_LCR_EPAR |
  538. UART_LCR_PARITY | LCR_MASK_STOP_BITS);
  539. /* Set byte size in lcr */
  540. lcr |= sizebits;
  541. /* Set parity */
  542. if (parenb) {
  543. lcr |= UART_LCR_PARITY;
  544. if (!parodd)
  545. lcr |= UART_LCR_EPAR;
  546. }
  547. /* Set stop bits */
  548. if (stop_bits)
  549. lcr |= UART_LCR_STOP /* 2 stop bits */ ;
  550. writeb(lcr, &port->ip_uart_regs->iu_lcr);
  551. /* Re-enable the DMA interface if necessary */
  552. if (port->ip_sscr & SSCR_DMA_EN) {
  553. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  554. }
  555. port->ip_baud = baud;
  556. /* When we get within this number of ring entries of filling the
  557. * entire ring on tx, place an EXPLICIT intr to generate a lowat
  558. * notification when output has drained.
  559. */
  560. port->ip_tx_lowat = (TX_LOWAT_CHARS(baud) + 3) / 4;
  561. if (port->ip_tx_lowat == 0)
  562. port->ip_tx_lowat = 1;
  563. set_rx_timeout(port, 2);
  564. return 0;
  565. }
  566. /**
  567. * do_write - Write bytes to the port. Returns the number of bytes
  568. * actually written. Called from transmit_chars
  569. * @port: port to use
  570. * @buf: the stuff to write
  571. * @len: how many bytes in 'buf'
  572. */
  573. static inline int do_write(struct ioc3_port *port, char *buf, int len)
  574. {
  575. int prod_ptr, cons_ptr, total = 0;
  576. struct ring *outring;
  577. struct ring_entry *entry;
  578. struct port_hooks *hooks = port->ip_hooks;
  579. BUG_ON(!(len >= 0));
  580. prod_ptr = port->ip_tx_prod;
  581. cons_ptr = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK;
  582. outring = port->ip_outring;
  583. /* Maintain a 1-entry red-zone. The ring buffer is full when
  584. * (cons - prod) % ring_size is 1. Rather than do this subtraction
  585. * in the body of the loop, I'll do it now.
  586. */
  587. cons_ptr = (cons_ptr - (int)sizeof(struct ring_entry)) & PROD_CONS_MASK;
  588. /* Stuff the bytes into the output */
  589. while ((prod_ptr != cons_ptr) && (len > 0)) {
  590. int xx;
  591. /* Get 4 bytes (one ring entry) at a time */
  592. entry = (struct ring_entry *)((caddr_t) outring + prod_ptr);
  593. /* Invalidate all entries */
  594. entry->ring_allsc = 0;
  595. /* Copy in some bytes */
  596. for (xx = 0; (xx < 4) && (len > 0); xx++) {
  597. entry->ring_data[xx] = *buf++;
  598. entry->ring_sc[xx] = TXCB_VALID;
  599. len--;
  600. total++;
  601. }
  602. /* If we are within some small threshold of filling up the
  603. * entire ring buffer, we must place an EXPLICIT intr here
  604. * to generate a lowat interrupt in case we subsequently
  605. * really do fill up the ring and the caller goes to sleep.
  606. * No need to place more than one though.
  607. */
  608. if (!(port->ip_flags & LOWAT_WRITTEN) &&
  609. ((cons_ptr - prod_ptr) & PROD_CONS_MASK)
  610. <= port->ip_tx_lowat * (int)sizeof(struct ring_entry)) {
  611. port->ip_flags |= LOWAT_WRITTEN;
  612. entry->ring_sc[0] |= TXCB_INT_WHEN_DONE;
  613. }
  614. /* Go on to next entry */
  615. prod_ptr += sizeof(struct ring_entry);
  616. prod_ptr &= PROD_CONS_MASK;
  617. }
  618. /* If we sent something, start DMA if necessary */
  619. if (total > 0 && !(port->ip_sscr & SSCR_DMA_EN)) {
  620. port->ip_sscr |= SSCR_DMA_EN;
  621. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  622. }
  623. /* Store the new producer pointer. If tx is disabled, we stuff the
  624. * data into the ring buffer, but we don't actually start tx.
  625. */
  626. if (!uart_tx_stopped(port->ip_port)) {
  627. writel(prod_ptr, &port->ip_serial_regs->stpir);
  628. /* If we are now transmitting, enable tx_mt interrupt so we
  629. * can disable DMA if necessary when the tx finishes.
  630. */
  631. if (total > 0)
  632. enable_intrs(port, hooks->intr_tx_mt);
  633. }
  634. port->ip_tx_prod = prod_ptr;
  635. return total;
  636. }
  637. /**
  638. * disable_intrs - disable interrupts
  639. * @port: port to enable
  640. * @mask: mask to use
  641. */
  642. static inline void disable_intrs(struct ioc3_port *port, uint32_t mask)
  643. {
  644. if (port->ip_card->ic_enable & mask) {
  645. ioc3_disable(port->ip_is, port->ip_idd, mask);
  646. port->ip_card->ic_enable &= ~mask;
  647. }
  648. }
  649. /**
  650. * set_notification - Modify event notification
  651. * @port: port to use
  652. * @mask: events mask
  653. * @set_on: set ?
  654. */
  655. static int set_notification(struct ioc3_port *port, int mask, int set_on)
  656. {
  657. struct port_hooks *hooks = port->ip_hooks;
  658. uint32_t intrbits, sscrbits;
  659. BUG_ON(!mask);
  660. intrbits = sscrbits = 0;
  661. if (mask & N_DATA_READY)
  662. intrbits |= (hooks->intr_rx_timer | hooks->intr_rx_high);
  663. if (mask & N_OUTPUT_LOWAT)
  664. intrbits |= hooks->intr_tx_explicit;
  665. if (mask & N_DDCD) {
  666. intrbits |= hooks->intr_delta_dcd;
  667. sscrbits |= SSCR_RX_RING_DCD;
  668. }
  669. if (mask & N_DCTS)
  670. intrbits |= hooks->intr_delta_cts;
  671. if (set_on) {
  672. enable_intrs(port, intrbits);
  673. port->ip_notify |= mask;
  674. port->ip_sscr |= sscrbits;
  675. } else {
  676. disable_intrs(port, intrbits);
  677. port->ip_notify &= ~mask;
  678. port->ip_sscr &= ~sscrbits;
  679. }
  680. /* We require DMA if either DATA_READY or DDCD notification is
  681. * currently requested. If neither of these is requested and
  682. * there is currently no tx in progress, DMA may be disabled.
  683. */
  684. if (port->ip_notify & (N_DATA_READY | N_DDCD))
  685. port->ip_sscr |= SSCR_DMA_EN;
  686. else if (!(port->ip_card->ic_enable & hooks->intr_tx_mt))
  687. port->ip_sscr &= ~SSCR_DMA_EN;
  688. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  689. return 0;
  690. }
  691. /**
  692. * set_mcr - set the master control reg
  693. * @the_port: port to use
  694. * @mask1: mcr mask
  695. * @mask2: shadow mask
  696. */
  697. static inline int set_mcr(struct uart_port *the_port,
  698. int mask1, int mask2)
  699. {
  700. struct ioc3_port *port = get_ioc3_port(the_port);
  701. uint32_t shadow;
  702. int spiniter = 0;
  703. char mcr;
  704. if (!port)
  705. return -1;
  706. /* Pause the DMA interface if necessary */
  707. if (port->ip_sscr & SSCR_DMA_EN) {
  708. writel(port->ip_sscr | SSCR_DMA_PAUSE,
  709. &port->ip_serial_regs->sscr);
  710. while ((readl(&port->ip_serial_regs->sscr)
  711. & SSCR_PAUSE_STATE) == 0) {
  712. spiniter++;
  713. if (spiniter > MAXITER)
  714. return -1;
  715. }
  716. }
  717. shadow = readl(&port->ip_serial_regs->shadow);
  718. mcr = (shadow & 0xff000000) >> 24;
  719. /* Set new value */
  720. mcr |= mask1;
  721. shadow |= mask2;
  722. writeb(mcr, &port->ip_uart_regs->iu_mcr);
  723. writel(shadow, &port->ip_serial_regs->shadow);
  724. /* Re-enable the DMA interface if necessary */
  725. if (port->ip_sscr & SSCR_DMA_EN) {
  726. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  727. }
  728. return 0;
  729. }
  730. /**
  731. * ioc3_set_proto - set the protocol for the port
  732. * @port: port to use
  733. * @proto: protocol to use
  734. */
  735. static int ioc3_set_proto(struct ioc3_port *port, int proto)
  736. {
  737. struct port_hooks *hooks = port->ip_hooks;
  738. switch (proto) {
  739. default:
  740. case PROTO_RS232:
  741. /* Clear the appropriate GIO pin */
  742. DPRINT_CONFIG(("%s: rs232\n", __FUNCTION__));
  743. writel(0, (&port->ip_idd->vma->gppr[0]
  744. + hooks->rs422_select_pin));
  745. break;
  746. case PROTO_RS422:
  747. /* Set the appropriate GIO pin */
  748. DPRINT_CONFIG(("%s: rs422\n", __FUNCTION__));
  749. writel(1, (&port->ip_idd->vma->gppr[0]
  750. + hooks->rs422_select_pin));
  751. break;
  752. }
  753. return 0;
  754. }
  755. /**
  756. * transmit_chars - upper level write, called with the_port->lock
  757. * @the_port: port to write
  758. */
  759. static void transmit_chars(struct uart_port *the_port)
  760. {
  761. int xmit_count, tail, head;
  762. int result;
  763. char *start;
  764. struct tty_struct *tty;
  765. struct ioc3_port *port = get_ioc3_port(the_port);
  766. struct uart_info *info;
  767. if (!the_port)
  768. return;
  769. if (!port)
  770. return;
  771. info = the_port->info;
  772. tty = info->tty;
  773. if (uart_circ_empty(&info->xmit) || uart_tx_stopped(the_port)) {
  774. /* Nothing to do or hw stopped */
  775. set_notification(port, N_ALL_OUTPUT, 0);
  776. return;
  777. }
  778. head = info->xmit.head;
  779. tail = info->xmit.tail;
  780. start = (char *)&info->xmit.buf[tail];
  781. /* write out all the data or until the end of the buffer */
  782. xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail);
  783. if (xmit_count > 0) {
  784. result = do_write(port, start, xmit_count);
  785. if (result > 0) {
  786. /* booking */
  787. xmit_count -= result;
  788. the_port->icount.tx += result;
  789. /* advance the pointers */
  790. tail += result;
  791. tail &= UART_XMIT_SIZE - 1;
  792. info->xmit.tail = tail;
  793. start = (char *)&info->xmit.buf[tail];
  794. }
  795. }
  796. if (uart_circ_chars_pending(&info->xmit) < WAKEUP_CHARS)
  797. uart_write_wakeup(the_port);
  798. if (uart_circ_empty(&info->xmit)) {
  799. set_notification(port, N_OUTPUT_LOWAT, 0);
  800. } else {
  801. set_notification(port, N_OUTPUT_LOWAT, 1);
  802. }
  803. }
  804. /**
  805. * ioc3_change_speed - change the speed of the port
  806. * @the_port: port to change
  807. * @new_termios: new termios settings
  808. * @old_termios: old termios settings
  809. */
  810. static void
  811. ioc3_change_speed(struct uart_port *the_port,
  812. struct ktermios *new_termios, struct ktermios *old_termios)
  813. {
  814. struct ioc3_port *port = get_ioc3_port(the_port);
  815. unsigned int cflag;
  816. int baud;
  817. int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8;
  818. struct uart_info *info = the_port->info;
  819. cflag = new_termios->c_cflag;
  820. switch (cflag & CSIZE) {
  821. case CS5:
  822. new_data = 5;
  823. break;
  824. case CS6:
  825. new_data = 6;
  826. break;
  827. case CS7:
  828. new_data = 7;
  829. break;
  830. case CS8:
  831. new_data = 8;
  832. break;
  833. default:
  834. /* cuz we always need a default ... */
  835. new_data = 5;
  836. break;
  837. }
  838. if (cflag & CSTOPB) {
  839. new_stop = 1;
  840. }
  841. if (cflag & PARENB) {
  842. new_parity_enable = 1;
  843. if (cflag & PARODD)
  844. new_parity = 1;
  845. }
  846. baud = uart_get_baud_rate(the_port, new_termios, old_termios,
  847. MIN_BAUD_SUPPORTED, MAX_BAUD_SUPPORTED);
  848. DPRINT_CONFIG(("%s: returned baud %d for line %d\n", __FUNCTION__, baud,
  849. the_port->line));
  850. if (!the_port->fifosize)
  851. the_port->fifosize = FIFO_SIZE;
  852. uart_update_timeout(the_port, cflag, baud);
  853. the_port->ignore_status_mask = N_ALL_INPUT;
  854. info->tty->low_latency = 1;
  855. if (I_IGNPAR(info->tty))
  856. the_port->ignore_status_mask &= ~(N_PARITY_ERROR
  857. | N_FRAMING_ERROR);
  858. if (I_IGNBRK(info->tty)) {
  859. the_port->ignore_status_mask &= ~N_BREAK;
  860. if (I_IGNPAR(info->tty))
  861. the_port->ignore_status_mask &= ~N_OVERRUN_ERROR;
  862. }
  863. if (!(cflag & CREAD)) {
  864. /* ignore everything */
  865. the_port->ignore_status_mask &= ~N_DATA_READY;
  866. }
  867. if (cflag & CRTSCTS) {
  868. /* enable hardware flow control */
  869. port->ip_sscr |= SSCR_HFC_EN;
  870. }
  871. else {
  872. /* disable hardware flow control */
  873. port->ip_sscr &= ~SSCR_HFC_EN;
  874. }
  875. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  876. /* Set the configuration and proper notification call */
  877. DPRINT_CONFIG(("%s : port 0x%p line %d cflag 0%o "
  878. "config_port(baud %d data %d stop %d penable %d "
  879. " parity %d), notification 0x%x\n",
  880. __FUNCTION__, (void *)port, the_port->line, cflag, baud,
  881. new_data, new_stop, new_parity_enable, new_parity,
  882. the_port->ignore_status_mask));
  883. if ((config_port(port, baud, /* baud */
  884. new_data, /* byte size */
  885. new_stop, /* stop bits */
  886. new_parity_enable, /* set parity */
  887. new_parity)) >= 0) { /* parity 1==odd */
  888. set_notification(port, the_port->ignore_status_mask, 1);
  889. }
  890. }
  891. /**
  892. * ic3_startup_local - Start up the serial port - returns >= 0 if no errors
  893. * @the_port: Port to operate on
  894. */
  895. static inline int ic3_startup_local(struct uart_port *the_port)
  896. {
  897. struct ioc3_port *port;
  898. if (!the_port) {
  899. NOT_PROGRESS();
  900. return -1;
  901. }
  902. port = get_ioc3_port(the_port);
  903. if (!port) {
  904. NOT_PROGRESS();
  905. return -1;
  906. }
  907. local_open(port);
  908. /* set the protocol */
  909. ioc3_set_proto(port, IS_RS232(the_port->line) ? PROTO_RS232 :
  910. PROTO_RS422);
  911. return 0;
  912. }
  913. /*
  914. * ioc3_cb_output_lowat - called when the output low water mark is hit
  915. * @port: port to output
  916. */
  917. static void ioc3_cb_output_lowat(struct ioc3_port *port)
  918. {
  919. unsigned long pflags;
  920. /* the_port->lock is set on the call here */
  921. if (port->ip_port) {
  922. spin_lock_irqsave(&port->ip_port->lock, pflags);
  923. transmit_chars(port->ip_port);
  924. spin_unlock_irqrestore(&port->ip_port->lock, pflags);
  925. }
  926. }
  927. /*
  928. * ioc3_cb_post_ncs - called for some basic errors
  929. * @port: port to use
  930. * @ncs: event
  931. */
  932. static void ioc3_cb_post_ncs(struct uart_port *the_port, int ncs)
  933. {
  934. struct uart_icount *icount;
  935. icount = &the_port->icount;
  936. if (ncs & NCS_BREAK)
  937. icount->brk++;
  938. if (ncs & NCS_FRAMING)
  939. icount->frame++;
  940. if (ncs & NCS_OVERRUN)
  941. icount->overrun++;
  942. if (ncs & NCS_PARITY)
  943. icount->parity++;
  944. }
  945. /**
  946. * do_read - Read in bytes from the port. Return the number of bytes
  947. * actually read.
  948. * @the_port: port to use
  949. * @buf: place to put the stuff we read
  950. * @len: how big 'buf' is
  951. */
  952. static inline int do_read(struct uart_port *the_port, char *buf, int len)
  953. {
  954. int prod_ptr, cons_ptr, total;
  955. struct ioc3_port *port = get_ioc3_port(the_port);
  956. struct ring *inring;
  957. struct ring_entry *entry;
  958. struct port_hooks *hooks = port->ip_hooks;
  959. int byte_num;
  960. char *sc;
  961. int loop_counter;
  962. BUG_ON(!(len >= 0));
  963. BUG_ON(!port);
  964. /* There is a nasty timing issue in the IOC3. When the rx_timer
  965. * expires or the rx_high condition arises, we take an interrupt.
  966. * At some point while servicing the interrupt, we read bytes from
  967. * the ring buffer and re-arm the rx_timer. However the rx_timer is
  968. * not started until the first byte is received *after* it is armed,
  969. * and any bytes pending in the rx construction buffers are not drained
  970. * to memory until either there are 4 bytes available or the rx_timer
  971. * expires. This leads to a potential situation where data is left
  972. * in the construction buffers forever - 1 to 3 bytes were received
  973. * after the interrupt was generated but before the rx_timer was
  974. * re-armed. At that point as long as no subsequent bytes are received
  975. * the timer will never be started and the bytes will remain in the
  976. * construction buffer forever. The solution is to execute a DRAIN
  977. * command after rearming the timer. This way any bytes received before
  978. * the DRAIN will be drained to memory, and any bytes received after
  979. * the DRAIN will start the TIMER and be drained when it expires.
  980. * Luckily, this only needs to be done when the DMA buffer is empty
  981. * since there is no requirement that this function return all
  982. * available data as long as it returns some.
  983. */
  984. /* Re-arm the timer */
  985. writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir);
  986. prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
  987. cons_ptr = port->ip_rx_cons;
  988. if (prod_ptr == cons_ptr) {
  989. int reset_dma = 0;
  990. /* Input buffer appears empty, do a flush. */
  991. /* DMA must be enabled for this to work. */
  992. if (!(port->ip_sscr & SSCR_DMA_EN)) {
  993. port->ip_sscr |= SSCR_DMA_EN;
  994. reset_dma = 1;
  995. }
  996. /* Potential race condition: we must reload the srpir after
  997. * issuing the drain command, otherwise we could think the rx
  998. * buffer is empty, then take a very long interrupt, and when
  999. * we come back it's full and we wait forever for the drain to
  1000. * complete.
  1001. */
  1002. writel(port->ip_sscr | SSCR_RX_DRAIN,
  1003. &port->ip_serial_regs->sscr);
  1004. prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
  1005. /* We must not wait for the DRAIN to complete unless there are
  1006. * at least 8 bytes (2 ring entries) available to receive the
  1007. * data otherwise the DRAIN will never complete and we'll
  1008. * deadlock here.
  1009. * In fact, to make things easier, I'll just ignore the flush if
  1010. * there is any data at all now available.
  1011. */
  1012. if (prod_ptr == cons_ptr) {
  1013. loop_counter = 0;
  1014. while (readl(&port->ip_serial_regs->sscr) &
  1015. SSCR_RX_DRAIN) {
  1016. loop_counter++;
  1017. if (loop_counter > MAXITER)
  1018. return -1;
  1019. }
  1020. /* SIGH. We have to reload the prod_ptr *again* since
  1021. * the drain may have caused it to change
  1022. */
  1023. prod_ptr = readl(&port->ip_serial_regs->srpir)
  1024. & PROD_CONS_MASK;
  1025. }
  1026. if (reset_dma) {
  1027. port->ip_sscr &= ~SSCR_DMA_EN;
  1028. writel(port->ip_sscr, &port->ip_serial_regs->sscr);
  1029. }
  1030. }
  1031. inring = port->ip_inring;
  1032. port->ip_flags &= ~READ_ABORTED;
  1033. total = 0;
  1034. loop_counter = 0xfffff; /* to avoid hangs */
  1035. /* Grab bytes from the hardware */
  1036. while ((prod_ptr != cons_ptr) && (len > 0)) {
  1037. entry = (struct ring_entry *)((caddr_t) inring + cons_ptr);
  1038. if (loop_counter-- <= 0) {
  1039. printk(KERN_WARNING "IOC3 serial: "
  1040. "possible hang condition/"
  1041. "port stuck on read (line %d).\n",
  1042. the_port->line);
  1043. break;
  1044. }
  1045. /* According to the producer pointer, this ring entry
  1046. * must contain some data. But if the PIO happened faster
  1047. * than the DMA, the data may not be available yet, so let's
  1048. * wait until it arrives.
  1049. */
  1050. if ((entry->ring_allsc & RING_ANY_VALID) == 0) {
  1051. /* Indicate the read is aborted so we don't disable
  1052. * the interrupt thinking that the consumer is
  1053. * congested.
  1054. */
  1055. port->ip_flags |= READ_ABORTED;
  1056. len = 0;
  1057. break;
  1058. }
  1059. /* Load the bytes/status out of the ring entry */
  1060. for (byte_num = 0; byte_num < 4 && len > 0; byte_num++) {
  1061. sc = &(entry->ring_sc[byte_num]);
  1062. /* Check for change in modem state or overrun */
  1063. if ((*sc & RXSB_MODEM_VALID)
  1064. && (port->ip_notify & N_DDCD)) {
  1065. /* Notify upper layer if DCD dropped */
  1066. if ((port->ip_flags & DCD_ON)
  1067. && !(*sc & RXSB_DCD)) {
  1068. /* If we have already copied some data,
  1069. * return it. We'll pick up the carrier
  1070. * drop on the next pass. That way we
  1071. * don't throw away the data that has
  1072. * already been copied back to
  1073. * the caller's buffer.
  1074. */
  1075. if (total > 0) {
  1076. len = 0;
  1077. break;
  1078. }
  1079. port->ip_flags &= ~DCD_ON;
  1080. /* Turn off this notification so the
  1081. * carrier drop protocol won't see it
  1082. * again when it does a read.
  1083. */
  1084. *sc &= ~RXSB_MODEM_VALID;
  1085. /* To keep things consistent, we need
  1086. * to update the consumer pointer so
  1087. * the next reader won't come in and
  1088. * try to read the same ring entries
  1089. * again. This must be done here before
  1090. * the dcd change.
  1091. */
  1092. if ((entry->ring_allsc & RING_ANY_VALID)
  1093. == 0) {
  1094. cons_ptr += (int)sizeof
  1095. (struct ring_entry);
  1096. cons_ptr &= PROD_CONS_MASK;
  1097. }
  1098. writel(cons_ptr,
  1099. &port->ip_serial_regs->srcir);
  1100. port->ip_rx_cons = cons_ptr;
  1101. /* Notify upper layer of carrier drop */
  1102. if ((port->ip_notify & N_DDCD)
  1103. && port->ip_port) {
  1104. uart_handle_dcd_change
  1105. (port->ip_port, 0);
  1106. wake_up_interruptible
  1107. (&the_port->info->
  1108. delta_msr_wait);
  1109. }
  1110. /* If we had any data to return, we
  1111. * would have returned it above.
  1112. */
  1113. return 0;
  1114. }
  1115. }
  1116. if (*sc & RXSB_MODEM_VALID) {
  1117. /* Notify that an input overrun occurred */
  1118. if ((*sc & RXSB_OVERRUN)
  1119. && (port->ip_notify & N_OVERRUN_ERROR)) {
  1120. ioc3_cb_post_ncs(the_port, NCS_OVERRUN);
  1121. }
  1122. /* Don't look at this byte again */
  1123. *sc &= ~RXSB_MODEM_VALID;
  1124. }
  1125. /* Check for valid data or RX errors */
  1126. if ((*sc & RXSB_DATA_VALID) &&
  1127. ((*sc & (RXSB_PAR_ERR
  1128. | RXSB_FRAME_ERR | RXSB_BREAK))
  1129. && (port->ip_notify & (N_PARITY_ERROR
  1130. | N_FRAMING_ERROR
  1131. | N_BREAK)))) {
  1132. /* There is an error condition on the next byte.
  1133. * If we have already transferred some bytes,
  1134. * we'll stop here. Otherwise if this is the
  1135. * first byte to be read, we'll just transfer
  1136. * it alone after notifying the
  1137. * upper layer of its status.
  1138. */
  1139. if (total > 0) {
  1140. len = 0;
  1141. break;
  1142. } else {
  1143. if ((*sc & RXSB_PAR_ERR) &&
  1144. (port->
  1145. ip_notify & N_PARITY_ERROR)) {
  1146. ioc3_cb_post_ncs(the_port,
  1147. NCS_PARITY);
  1148. }
  1149. if ((*sc & RXSB_FRAME_ERR) &&
  1150. (port->
  1151. ip_notify & N_FRAMING_ERROR)) {
  1152. ioc3_cb_post_ncs(the_port,
  1153. NCS_FRAMING);
  1154. }
  1155. if ((*sc & RXSB_BREAK)
  1156. && (port->ip_notify & N_BREAK)) {
  1157. ioc3_cb_post_ncs
  1158. (the_port, NCS_BREAK);
  1159. }
  1160. len = 1;
  1161. }
  1162. }
  1163. if (*sc & RXSB_DATA_VALID) {
  1164. *sc &= ~RXSB_DATA_VALID;
  1165. *buf = entry->ring_data[byte_num];
  1166. buf++;
  1167. len--;
  1168. total++;
  1169. }
  1170. }
  1171. /* If we used up this entry entirely, go on to the next one,
  1172. * otherwise we must have run out of buffer space, so
  1173. * leave the consumer pointer here for the next read in case
  1174. * there are still unread bytes in this entry.
  1175. */
  1176. if ((entry->ring_allsc & RING_ANY_VALID) == 0) {
  1177. cons_ptr += (int)sizeof(struct ring_entry);
  1178. cons_ptr &= PROD_CONS_MASK;
  1179. }
  1180. }
  1181. /* Update consumer pointer and re-arm rx timer interrupt */
  1182. writel(cons_ptr, &port->ip_serial_regs->srcir);
  1183. port->ip_rx_cons = cons_ptr;
  1184. /* If we have now dipped below the rx high water mark and we have
  1185. * rx_high interrupt turned off, we can now turn it back on again.
  1186. */
  1187. if ((port->ip_flags & INPUT_HIGH) && (((prod_ptr - cons_ptr)
  1188. & PROD_CONS_MASK) <
  1189. ((port->
  1190. ip_sscr &
  1191. SSCR_RX_THRESHOLD)
  1192. << PROD_CONS_PTR_OFF))) {
  1193. port->ip_flags &= ~INPUT_HIGH;
  1194. enable_intrs(port, hooks->intr_rx_high);
  1195. }
  1196. return total;
  1197. }
  1198. /**
  1199. * receive_chars - upper level read.
  1200. * @the_port: port to read from
  1201. */
  1202. static int receive_chars(struct uart_port *the_port)
  1203. {
  1204. struct tty_struct *tty;
  1205. unsigned char ch[MAX_CHARS];
  1206. int read_count = 0, read_room, flip = 0;
  1207. struct uart_info *info = the_port->info;
  1208. struct ioc3_port *port = get_ioc3_port(the_port);
  1209. unsigned long pflags;
  1210. /* Make sure all the pointers are "good" ones */
  1211. if (!info)
  1212. return 0;
  1213. if (!info->tty)
  1214. return 0;
  1215. if (!(port->ip_flags & INPUT_ENABLE))
  1216. return 0;
  1217. spin_lock_irqsave(&the_port->lock, pflags);
  1218. tty = info->tty;
  1219. read_count = do_read(the_port, ch, MAX_CHARS);
  1220. if (read_count > 0) {
  1221. flip = 1;
  1222. read_room = tty_buffer_request_room(tty, read_count);
  1223. tty_insert_flip_string(tty, ch, read_room);
  1224. the_port->icount.rx += read_count;
  1225. }
  1226. spin_unlock_irqrestore(&the_port->lock, pflags);
  1227. if (flip)
  1228. tty_flip_buffer_push(tty);
  1229. return read_count;
  1230. }
  1231. /**
  1232. * ioc3uart_intr_one - lowest level (per port) interrupt handler.
  1233. * @is : submodule
  1234. * @idd: driver data
  1235. * @pending: interrupts to handle
  1236. */
  1237. static int inline
  1238. ioc3uart_intr_one(struct ioc3_submodule *is,
  1239. struct ioc3_driver_data *idd,
  1240. unsigned int pending)
  1241. {
  1242. int port_num = GET_PORT_FROM_SIO_IR(pending);
  1243. struct port_hooks *hooks;
  1244. unsigned int rx_high_rd_aborted = 0;
  1245. unsigned long flags;
  1246. struct uart_port *the_port;
  1247. struct ioc3_port *port;
  1248. int loop_counter;
  1249. struct ioc3_card *card_ptr;
  1250. unsigned int sio_ir;
  1251. card_ptr = idd->data[is->id];
  1252. port = card_ptr->ic_port[port_num].icp_port;
  1253. hooks = port->ip_hooks;
  1254. /* Possible race condition here: The tx_mt interrupt bit may be
  1255. * cleared without the intervention of the interrupt handler,
  1256. * e.g. by a write. If the top level interrupt handler reads a
  1257. * tx_mt, then some other processor does a write, starting up
  1258. * output, then we come in here, see the tx_mt and stop DMA, the
  1259. * output started by the other processor will hang. Thus we can
  1260. * only rely on tx_mt being legitimate if it is read while the
  1261. * port lock is held. Therefore this bit must be ignored in the
  1262. * passed in interrupt mask which was read by the top level
  1263. * interrupt handler since the port lock was not held at the time
  1264. * it was read. We can only rely on this bit being accurate if it
  1265. * is read while the port lock is held. So we'll clear it for now,
  1266. * and reload it later once we have the port lock.
  1267. */
  1268. sio_ir = pending & ~(hooks->intr_tx_mt);
  1269. spin_lock_irqsave(&port->ip_lock, flags);
  1270. loop_counter = MAXITER; /* to avoid hangs */
  1271. do {
  1272. uint32_t shadow;
  1273. if (loop_counter-- <= 0) {
  1274. printk(KERN_WARNING "IOC3 serial: "
  1275. "possible hang condition/"
  1276. "port stuck on interrupt (line %d).\n",
  1277. ((struct uart_port *)port->ip_port)->line);
  1278. break;
  1279. }
  1280. /* Handle a DCD change */
  1281. if (sio_ir & hooks->intr_delta_dcd) {
  1282. ioc3_ack(is, idd, hooks->intr_delta_dcd);
  1283. shadow = readl(&port->ip_serial_regs->shadow);
  1284. if ((port->ip_notify & N_DDCD)
  1285. && (shadow & SHADOW_DCD)
  1286. && (port->ip_port)) {
  1287. the_port = port->ip_port;
  1288. uart_handle_dcd_change(the_port,
  1289. shadow & SHADOW_DCD);
  1290. wake_up_interruptible
  1291. (&the_port->info->delta_msr_wait);
  1292. } else if ((port->ip_notify & N_DDCD)
  1293. && !(shadow & SHADOW_DCD)) {
  1294. /* Flag delta DCD/no DCD */
  1295. uart_handle_dcd_change(port->ip_port,
  1296. shadow & SHADOW_DCD);
  1297. port->ip_flags |= DCD_ON;
  1298. }
  1299. }
  1300. /* Handle a CTS change */
  1301. if (sio_ir & hooks->intr_delta_cts) {
  1302. ioc3_ack(is, idd, hooks->intr_delta_cts);
  1303. shadow = readl(&port->ip_serial_regs->shadow);
  1304. if ((port->ip_notify & N_DCTS) && (port->ip_port)) {
  1305. the_port = port->ip_port;
  1306. uart_handle_cts_change(the_port, shadow
  1307. & SHADOW_CTS);
  1308. wake_up_interruptible
  1309. (&the_port->info->delta_msr_wait);
  1310. }
  1311. }
  1312. /* rx timeout interrupt. Must be some data available. Put this
  1313. * before the check for rx_high since servicing this condition
  1314. * may cause that condition to clear.
  1315. */
  1316. if (sio_ir & hooks->intr_rx_timer) {
  1317. ioc3_ack(is, idd, hooks->intr_rx_timer);
  1318. if ((port->ip_notify & N_DATA_READY)
  1319. && (port->ip_port)) {
  1320. receive_chars(port->ip_port);
  1321. }
  1322. }
  1323. /* rx high interrupt. Must be after rx_timer. */
  1324. else if (sio_ir & hooks->intr_rx_high) {
  1325. /* Data available, notify upper layer */
  1326. if ((port->ip_notify & N_DATA_READY) && port->ip_port) {
  1327. receive_chars(port->ip_port);
  1328. }
  1329. /* We can't ACK this interrupt. If receive_chars didn't
  1330. * cause the condition to clear, we'll have to disable
  1331. * the interrupt until the data is drained.
  1332. * If the read was aborted, don't disable the interrupt
  1333. * as this may cause us to hang indefinitely. An
  1334. * aborted read generally means that this interrupt
  1335. * hasn't been delivered to the cpu yet anyway, even
  1336. * though we see it as asserted when we read the sio_ir.
  1337. */
  1338. if ((sio_ir = PENDING(card_ptr, idd))
  1339. & hooks->intr_rx_high) {
  1340. if (port->ip_flags & READ_ABORTED) {
  1341. rx_high_rd_aborted++;
  1342. }
  1343. else {
  1344. card_ptr->ic_enable &= ~hooks->intr_rx_high;
  1345. port->ip_flags |= INPUT_HIGH;
  1346. }
  1347. }
  1348. }
  1349. /* We got a low water interrupt: notify upper layer to
  1350. * send more data. Must come before tx_mt since servicing
  1351. * this condition may cause that condition to clear.
  1352. */
  1353. if (sio_ir & hooks->intr_tx_explicit) {
  1354. port->ip_flags &= ~LOWAT_WRITTEN;
  1355. ioc3_ack(is, idd, hooks->intr_tx_explicit);
  1356. if (port->ip_notify & N_OUTPUT_LOWAT)
  1357. ioc3_cb_output_lowat(port);
  1358. }
  1359. /* Handle tx_mt. Must come after tx_explicit. */
  1360. else if (sio_ir & hooks->intr_tx_mt) {
  1361. /* If we are expecting a lowat notification
  1362. * and we get to this point it probably means that for
  1363. * some reason the tx_explicit didn't work as expected
  1364. * (that can legitimately happen if the output buffer is
  1365. * filled up in just the right way).
  1366. * So send the notification now.
  1367. */
  1368. if (port->ip_notify & N_OUTPUT_LOWAT) {
  1369. ioc3_cb_output_lowat(port);
  1370. /* We need to reload the sio_ir since the lowat
  1371. * call may have caused another write to occur,
  1372. * clearing the tx_mt condition.
  1373. */
  1374. sio_ir = PENDING(card_ptr, idd);
  1375. }
  1376. /* If the tx_mt condition still persists even after the
  1377. * lowat call, we've got some work to do.
  1378. */
  1379. if (sio_ir & hooks->intr_tx_mt) {
  1380. /* If we are not currently expecting DMA input,
  1381. * and the transmitter has just gone idle,
  1382. * there is no longer any reason for DMA, so
  1383. * disable it.
  1384. */
  1385. if (!(port->ip_notify
  1386. & (N_DATA_READY | N_DDCD))) {
  1387. BUG_ON(!(port->ip_sscr
  1388. & SSCR_DMA_EN));
  1389. port->ip_sscr &= ~SSCR_DMA_EN;
  1390. writel(port->ip_sscr,
  1391. &port->ip_serial_regs->sscr);
  1392. }
  1393. /* Prevent infinite tx_mt interrupt */
  1394. card_ptr->ic_enable &= ~hooks->intr_tx_mt;
  1395. }
  1396. }
  1397. sio_ir = PENDING(card_ptr, idd);
  1398. /* if the read was aborted and only hooks->intr_rx_high,
  1399. * clear hooks->intr_rx_high, so we do not loop forever.
  1400. */
  1401. if (rx_high_rd_aborted && (sio_ir == hooks->intr_rx_high)) {
  1402. sio_ir &= ~hooks->intr_rx_high;
  1403. }
  1404. } while (sio_ir & hooks->intr_all);
  1405. spin_unlock_irqrestore(&port->ip_lock, flags);
  1406. ioc3_enable(is, idd, card_ptr->ic_enable);
  1407. return 0;
  1408. }
  1409. /**
  1410. * ioc3uart_intr - field all serial interrupts
  1411. * @is : submodule
  1412. * @idd: driver data
  1413. * @pending: interrupts to handle
  1414. *
  1415. */
  1416. static int ioc3uart_intr(struct ioc3_submodule *is,
  1417. struct ioc3_driver_data *idd,
  1418. unsigned int pending)
  1419. {
  1420. int ret = 0;
  1421. /*
  1422. * The upper level interrupt handler sends interrupts for both ports
  1423. * here. So we need to call for each port with its interrupts.
  1424. */
  1425. if (pending & SIO_IR_SA)
  1426. ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SA);
  1427. if (pending & SIO_IR_SB)
  1428. ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SB);
  1429. return ret;
  1430. }
  1431. /**
  1432. * ic3_type
  1433. * @port: Port to operate with (we ignore since we only have one port)
  1434. *
  1435. */
  1436. static const char *ic3_type(struct uart_port *the_port)
  1437. {
  1438. if (IS_RS232(the_port->line))
  1439. return "SGI IOC3 Serial [rs232]";
  1440. else
  1441. return "SGI IOC3 Serial [rs422]";
  1442. }
  1443. /**
  1444. * ic3_tx_empty - Is the transmitter empty?
  1445. * @port: Port to operate on
  1446. *
  1447. */
  1448. static unsigned int ic3_tx_empty(struct uart_port *the_port)
  1449. {
  1450. unsigned int ret = 0;
  1451. struct ioc3_port *port = get_ioc3_port(the_port);
  1452. if (readl(&port->ip_serial_regs->shadow) & SHADOW_TEMT)
  1453. ret = TIOCSER_TEMT;
  1454. return ret;
  1455. }
  1456. /**
  1457. * ic3_stop_tx - stop the transmitter
  1458. * @port: Port to operate on
  1459. *
  1460. */
  1461. static void ic3_stop_tx(struct uart_port *the_port)
  1462. {
  1463. struct ioc3_port *port = get_ioc3_port(the_port);
  1464. if (port)
  1465. set_notification(port, N_OUTPUT_LOWAT, 0);
  1466. }
  1467. /**
  1468. * ic3_stop_rx - stop the receiver
  1469. * @port: Port to operate on
  1470. *
  1471. */
  1472. static void ic3_stop_rx(struct uart_port *the_port)
  1473. {
  1474. struct ioc3_port *port = get_ioc3_port(the_port);
  1475. if (port)
  1476. port->ip_flags &= ~INPUT_ENABLE;
  1477. }
  1478. /**
  1479. * null_void_function
  1480. * @port: Port to operate on
  1481. *
  1482. */
  1483. static void null_void_function(struct uart_port *the_port)
  1484. {
  1485. }
  1486. /**
  1487. * ic3_shutdown - shut down the port - free irq and disable
  1488. * @port: port to shut down
  1489. *
  1490. */
  1491. static void ic3_shutdown(struct uart_port *the_port)
  1492. {
  1493. unsigned long port_flags;
  1494. struct ioc3_port *port;
  1495. struct uart_info *info;
  1496. port = get_ioc3_port(the_port);
  1497. if (!port)
  1498. return;
  1499. info = the_port->info;
  1500. wake_up_interruptible(&info->delta_msr_wait);
  1501. spin_lock_irqsave(&the_port->lock, port_flags);
  1502. set_notification(port, N_ALL, 0);
  1503. spin_unlock_irqrestore(&the_port->lock, port_flags);
  1504. }
  1505. /**
  1506. * ic3_set_mctrl - set control lines (dtr, rts, etc)
  1507. * @port: Port to operate on
  1508. * @mctrl: Lines to set/unset
  1509. *
  1510. */
  1511. static void ic3_set_mctrl(struct uart_port *the_port, unsigned int mctrl)
  1512. {
  1513. unsigned char mcr = 0;
  1514. if (mctrl & TIOCM_RTS)
  1515. mcr |= UART_MCR_RTS;
  1516. if (mctrl & TIOCM_DTR)
  1517. mcr |= UART_MCR_DTR;
  1518. if (mctrl & TIOCM_OUT1)
  1519. mcr |= UART_MCR_OUT1;
  1520. if (mctrl & TIOCM_OUT2)
  1521. mcr |= UART_MCR_OUT2;
  1522. if (mctrl & TIOCM_LOOP)
  1523. mcr |= UART_MCR_LOOP;
  1524. set_mcr(the_port, mcr, SHADOW_DTR);
  1525. }
  1526. /**
  1527. * ic3_get_mctrl - get control line info
  1528. * @port: port to operate on
  1529. *
  1530. */
  1531. static unsigned int ic3_get_mctrl(struct uart_port *the_port)
  1532. {
  1533. struct ioc3_port *port = get_ioc3_port(the_port);
  1534. uint32_t shadow;
  1535. unsigned int ret = 0;
  1536. if (!port)
  1537. return 0;
  1538. shadow = readl(&port->ip_serial_regs->shadow);
  1539. if (shadow & SHADOW_DCD)
  1540. ret |= TIOCM_CD;
  1541. if (shadow & SHADOW_DR)
  1542. ret |= TIOCM_DSR;
  1543. if (shadow & SHADOW_CTS)
  1544. ret |= TIOCM_CTS;
  1545. return ret;
  1546. }
  1547. /**
  1548. * ic3_start_tx - Start transmitter. Called with the_port->lock
  1549. * @port: Port to operate on
  1550. *
  1551. */
  1552. static void ic3_start_tx(struct uart_port *the_port)
  1553. {
  1554. struct ioc3_port *port = get_ioc3_port(the_port);
  1555. if (port) {
  1556. set_notification(port, N_OUTPUT_LOWAT, 1);
  1557. enable_intrs(port, port->ip_hooks->intr_tx_mt);
  1558. }
  1559. }
  1560. /**
  1561. * ic3_break_ctl - handle breaks
  1562. * @port: Port to operate on
  1563. * @break_state: Break state
  1564. *
  1565. */
  1566. static void ic3_break_ctl(struct uart_port *the_port, int break_state)
  1567. {
  1568. }
  1569. /**
  1570. * ic3_startup - Start up the serial port - always return 0 (We're always on)
  1571. * @port: Port to operate on
  1572. *
  1573. */
  1574. static int ic3_startup(struct uart_port *the_port)
  1575. {
  1576. int retval;
  1577. struct ioc3_port *port;
  1578. struct ioc3_card *card_ptr;
  1579. unsigned long port_flags;
  1580. if (!the_port) {
  1581. NOT_PROGRESS();
  1582. return -ENODEV;
  1583. }
  1584. port = get_ioc3_port(the_port);
  1585. if (!port) {
  1586. NOT_PROGRESS();
  1587. return -ENODEV;
  1588. }
  1589. card_ptr = port->ip_card;
  1590. port->ip_port = the_port;
  1591. if (!card_ptr) {
  1592. NOT_PROGRESS();
  1593. return -ENODEV;
  1594. }
  1595. /* Start up the serial port */
  1596. spin_lock_irqsave(&the_port->lock, port_flags);
  1597. retval = ic3_startup_local(the_port);
  1598. spin_unlock_irqrestore(&the_port->lock, port_flags);
  1599. return retval;
  1600. }
  1601. /**
  1602. * ic3_set_termios - set termios stuff
  1603. * @port: port to operate on
  1604. * @termios: New settings
  1605. * @termios: Old
  1606. *
  1607. */
  1608. static void
  1609. ic3_set_termios(struct uart_port *the_port,
  1610. struct ktermios *termios, struct ktermios *old_termios)
  1611. {
  1612. unsigned long port_flags;
  1613. spin_lock_irqsave(&the_port->lock, port_flags);
  1614. ioc3_change_speed(the_port, termios, old_termios);
  1615. spin_unlock_irqrestore(&the_port->lock, port_flags);
  1616. }
  1617. /**
  1618. * ic3_request_port - allocate resources for port - no op....
  1619. * @port: port to operate on
  1620. *
  1621. */
  1622. static int ic3_request_port(struct uart_port *port)
  1623. {
  1624. return 0;
  1625. }
  1626. /* Associate the uart functions above - given to serial core */
  1627. static struct uart_ops ioc3_ops = {
  1628. .tx_empty = ic3_tx_empty,
  1629. .set_mctrl = ic3_set_mctrl,
  1630. .get_mctrl = ic3_get_mctrl,
  1631. .stop_tx = ic3_stop_tx,
  1632. .start_tx = ic3_start_tx,
  1633. .stop_rx = ic3_stop_rx,
  1634. .enable_ms = null_void_function,
  1635. .break_ctl = ic3_break_ctl,
  1636. .startup = ic3_startup,
  1637. .shutdown = ic3_shutdown,
  1638. .set_termios = ic3_set_termios,
  1639. .type = ic3_type,
  1640. .release_port = null_void_function,
  1641. .request_port = ic3_request_port,
  1642. };
  1643. /*
  1644. * Boot-time initialization code
  1645. */
  1646. static struct uart_driver ioc3_uart = {
  1647. .owner = THIS_MODULE,
  1648. .driver_name = "ioc3_serial",
  1649. .dev_name = DEVICE_NAME,
  1650. .major = DEVICE_MAJOR,
  1651. .minor = DEVICE_MINOR,
  1652. .nr = MAX_LOGICAL_PORTS
  1653. };
  1654. /**
  1655. * ioc3_serial_core_attach - register with serial core
  1656. * This is done during pci probing
  1657. * @is: submodule struct for this
  1658. * @idd: handle for this card
  1659. */
  1660. static inline int ioc3_serial_core_attach( struct ioc3_submodule *is,
  1661. struct ioc3_driver_data *idd)
  1662. {
  1663. struct ioc3_port *port;
  1664. struct uart_port *the_port;
  1665. struct ioc3_card *card_ptr = idd->data[is->id];
  1666. int ii, phys_port;
  1667. struct pci_dev *pdev = idd->pdev;
  1668. DPRINT_CONFIG(("%s: attach pdev 0x%p - card_ptr 0x%p\n",
  1669. __FUNCTION__, pdev, (void *)card_ptr));
  1670. if (!card_ptr)
  1671. return -ENODEV;
  1672. /* once around for each logical port on this card */
  1673. for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) {
  1674. phys_port = GET_PHYSICAL_PORT(ii);
  1675. the_port = &card_ptr->ic_port[phys_port].
  1676. icp_uart_port[GET_LOGICAL_PORT(ii)];
  1677. port = card_ptr->ic_port[phys_port].icp_port;
  1678. port->ip_port = the_port;
  1679. DPRINT_CONFIG(("%s: attach the_port 0x%p / port 0x%p [%d/%d]\n",
  1680. __FUNCTION__, (void *)the_port, (void *)port,
  1681. phys_port, ii));
  1682. /* membase, iobase and mapbase just need to be non-0 */
  1683. the_port->membase = (unsigned char __iomem *)1;
  1684. the_port->iobase = (pdev->bus->number << 16) | ii;
  1685. the_port->line = (Num_of_ioc3_cards << 2) | ii;
  1686. the_port->mapbase = 1;
  1687. the_port->type = PORT_16550A;
  1688. the_port->fifosize = FIFO_SIZE;
  1689. the_port->ops = &ioc3_ops;
  1690. the_port->irq = idd->irq_io;
  1691. the_port->dev = &pdev->dev;
  1692. if (uart_add_one_port(&ioc3_uart, the_port) < 0) {
  1693. printk(KERN_WARNING
  1694. "%s: unable to add port %d bus %d\n",
  1695. __FUNCTION__, the_port->line, pdev->bus->number);
  1696. } else {
  1697. DPRINT_CONFIG(("IOC3 serial port %d irq %d bus %d\n",
  1698. the_port->line, the_port->irq, pdev->bus->number));
  1699. }
  1700. /* all ports are rs232 for now */
  1701. if (IS_PHYSICAL_PORT(ii))
  1702. ioc3_set_proto(port, PROTO_RS232);
  1703. }
  1704. return 0;
  1705. }
  1706. /**
  1707. * ioc3uart_remove - register detach function
  1708. * @is: submodule struct for this submodule
  1709. * @idd: ioc3 driver data for this submodule
  1710. */
  1711. static int ioc3uart_remove(struct ioc3_submodule *is,
  1712. struct ioc3_driver_data *idd)
  1713. {
  1714. struct ioc3_card *card_ptr = idd->data[is->id];
  1715. struct uart_port *the_port;
  1716. struct ioc3_port *port;
  1717. int ii;
  1718. if (card_ptr) {
  1719. for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) {
  1720. the_port = &card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].
  1721. icp_uart_port[GET_LOGICAL_PORT(ii)];
  1722. if (the_port)
  1723. uart_remove_one_port(&ioc3_uart, the_port);
  1724. port = card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].icp_port;
  1725. if (port && IS_PHYSICAL_PORT(ii)
  1726. && (GET_PHYSICAL_PORT(ii) == 0)) {
  1727. pci_free_consistent(port->ip_idd->pdev,
  1728. TOTAL_RING_BUF_SIZE,
  1729. (void *)port->ip_cpu_ringbuf,
  1730. port->ip_dma_ringbuf);
  1731. kfree(port);
  1732. card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].
  1733. icp_port = NULL;
  1734. }
  1735. }
  1736. kfree(card_ptr);
  1737. idd->data[is->id] = NULL;
  1738. }
  1739. return 0;
  1740. }
  1741. /**
  1742. * ioc3uart_probe - card probe function called from shim driver
  1743. * @is: submodule struct for this submodule
  1744. * @idd: ioc3 driver data for this card
  1745. */
  1746. static int __devinit
  1747. ioc3uart_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
  1748. {
  1749. struct pci_dev *pdev = idd->pdev;
  1750. struct ioc3_card *card_ptr;
  1751. int ret = 0;
  1752. struct ioc3_port *port;
  1753. struct ioc3_port *ports[PORTS_PER_CARD];
  1754. int phys_port;
  1755. DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __FUNCTION__, is, idd));
  1756. card_ptr = kzalloc(sizeof(struct ioc3_card), GFP_KERNEL);
  1757. if (!card_ptr) {
  1758. printk(KERN_WARNING "ioc3_attach_one"
  1759. ": unable to get memory for the IOC3\n");
  1760. return -ENOMEM;
  1761. }
  1762. idd->data[is->id] = card_ptr;
  1763. Submodule_slot = is->id;
  1764. writel(((UARTA_BASE >> 3) << SIO_CR_SER_A_BASE_SHIFT) |
  1765. ((UARTB_BASE >> 3) << SIO_CR_SER_B_BASE_SHIFT) |
  1766. (0xf << SIO_CR_CMD_PULSE_SHIFT), &idd->vma->sio_cr);
  1767. pci_write_config_dword(pdev, PCI_LAT, 0xff00);
  1768. /* Enable serial port mode select generic PIO pins as outputs */
  1769. ioc3_gpcr_set(idd, GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL);
  1770. /* Create port structures for each port */
  1771. for (phys_port = 0; phys_port < PORTS_PER_CARD; phys_port++) {
  1772. port = kzalloc(sizeof(struct ioc3_port), GFP_KERNEL);
  1773. if (!port) {
  1774. printk(KERN_WARNING
  1775. "IOC3 serial memory not available for port\n");
  1776. goto out4;
  1777. }
  1778. spin_lock_init(&port->ip_lock);
  1779. /* we need to remember the previous ones, to point back to
  1780. * them farther down - setting up the ring buffers.
  1781. */
  1782. ports[phys_port] = port;
  1783. /* init to something useful */
  1784. card_ptr->ic_port[phys_port].icp_port = port;
  1785. port->ip_is = is;
  1786. port->ip_idd = idd;
  1787. port->ip_baud = 9600;
  1788. port->ip_card = card_ptr;
  1789. port->ip_hooks = &hooks_array[phys_port];
  1790. /* Setup each port */
  1791. if (phys_port == 0) {
  1792. port->ip_serial_regs = &idd->vma->port_a;
  1793. port->ip_uart_regs = &idd->vma->sregs.uarta;
  1794. DPRINT_CONFIG(("%s : Port A ip_serial_regs 0x%p "
  1795. "ip_uart_regs 0x%p\n",
  1796. __FUNCTION__,
  1797. (void *)port->ip_serial_regs,
  1798. (void *)port->ip_uart_regs));
  1799. /* setup ring buffers */
  1800. port->ip_cpu_ringbuf = pci_alloc_consistent(pdev,
  1801. TOTAL_RING_BUF_SIZE, &port->ip_dma_ringbuf);
  1802. BUG_ON(!((((int64_t) port->ip_dma_ringbuf) &
  1803. (TOTAL_RING_BUF_SIZE - 1)) == 0));
  1804. port->ip_inring = RING(port, RX_A);
  1805. port->ip_outring = RING(port, TX_A);
  1806. DPRINT_CONFIG(("%s : Port A ip_cpu_ringbuf 0x%p "
  1807. "ip_dma_ringbuf 0x%p, ip_inring 0x%p "
  1808. "ip_outring 0x%p\n",
  1809. __FUNCTION__,
  1810. (void *)port->ip_cpu_ringbuf,
  1811. (void *)port->ip_dma_ringbuf,
  1812. (void *)port->ip_inring,
  1813. (void *)port->ip_outring));
  1814. }
  1815. else {
  1816. port->ip_serial_regs = &idd->vma->port_b;
  1817. port->ip_uart_regs = &idd->vma->sregs.uartb;
  1818. DPRINT_CONFIG(("%s : Port B ip_serial_regs 0x%p "
  1819. "ip_uart_regs 0x%p\n",
  1820. __FUNCTION__,
  1821. (void *)port->ip_serial_regs,
  1822. (void *)port->ip_uart_regs));
  1823. /* share the ring buffers */
  1824. port->ip_dma_ringbuf =
  1825. ports[phys_port - 1]->ip_dma_ringbuf;
  1826. port->ip_cpu_ringbuf =
  1827. ports[phys_port - 1]->ip_cpu_ringbuf;
  1828. port->ip_inring = RING(port, RX_B);
  1829. port->ip_outring = RING(port, TX_B);
  1830. DPRINT_CONFIG(("%s : Port B ip_cpu_ringbuf 0x%p "
  1831. "ip_dma_ringbuf 0x%p, ip_inring 0x%p "
  1832. "ip_outring 0x%p\n",
  1833. __FUNCTION__,
  1834. (void *)port->ip_cpu_ringbuf,
  1835. (void *)port->ip_dma_ringbuf,
  1836. (void *)port->ip_inring,
  1837. (void *)port->ip_outring));
  1838. }
  1839. DPRINT_CONFIG(("%s : port %d [addr 0x%p] card_ptr 0x%p",
  1840. __FUNCTION__,
  1841. phys_port, (void *)port, (void *)card_ptr));
  1842. DPRINT_CONFIG((" ip_serial_regs 0x%p ip_uart_regs 0x%p\n",
  1843. (void *)port->ip_serial_regs,
  1844. (void *)port->ip_uart_regs));
  1845. /* Initialize the hardware for IOC3 */
  1846. port_init(port);
  1847. DPRINT_CONFIG(("%s: phys_port %d port 0x%p inring 0x%p "
  1848. "outring 0x%p\n",
  1849. __FUNCTION__,
  1850. phys_port, (void *)port,
  1851. (void *)port->ip_inring,
  1852. (void *)port->ip_outring));
  1853. }
  1854. /* register port with the serial core */
  1855. if ((ret = ioc3_serial_core_attach(is, idd)))
  1856. goto out4;
  1857. Num_of_ioc3_cards++;
  1858. return ret;
  1859. /* error exits that give back resources */
  1860. out4:
  1861. kfree(card_ptr);
  1862. return ret;
  1863. }
  1864. static struct ioc3_submodule ioc3uart_submodule = {
  1865. .name = "IOC3uart",
  1866. .probe = ioc3uart_probe,
  1867. .remove = ioc3uart_remove,
  1868. /* call .intr for both ports initially */
  1869. .irq_mask = SIO_IR_SA | SIO_IR_SB,
  1870. .intr = ioc3uart_intr,
  1871. .owner = THIS_MODULE,
  1872. };
  1873. /**
  1874. * ioc3_detect - module init called,
  1875. */
  1876. static int __devinit ioc3uart_init(void)
  1877. {
  1878. int ret;
  1879. /* register with serial core */
  1880. if ((ret = uart_register_driver(&ioc3_uart)) < 0) {
  1881. printk(KERN_WARNING
  1882. "%s: Couldn't register IOC3 uart serial driver\n",
  1883. __FUNCTION__);
  1884. return ret;
  1885. }
  1886. ret = ioc3_register_submodule(&ioc3uart_submodule);
  1887. if (ret)
  1888. uart_unregister_driver(&ioc3_uart);
  1889. return ret;
  1890. }
  1891. static void __devexit ioc3uart_exit(void)
  1892. {
  1893. ioc3_unregister_submodule(&ioc3uart_submodule);
  1894. uart_unregister_driver(&ioc3_uart);
  1895. }
  1896. module_init(ioc3uart_init);
  1897. module_exit(ioc3uart_exit);
  1898. MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>");
  1899. MODULE_DESCRIPTION("Serial PCI driver module for SGI IOC3 card");
  1900. MODULE_LICENSE("GPL");