dz.c 20 KB

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  1. /*
  2. * dz.c: Serial port driver for DECstations equipped
  3. * with the DZ chipset.
  4. *
  5. * Copyright (C) 1998 Olivier A. D. Lebaillif
  6. *
  7. * Email: olivier.lebaillif@ifrsys.com
  8. *
  9. * Copyright (C) 2004, 2006 Maciej W. Rozycki
  10. *
  11. * [31-AUG-98] triemer
  12. * Changed IRQ to use Harald's dec internals interrupts.h
  13. * removed base_addr code - moving address assignment to setup.c
  14. * Changed name of dz_init to rs_init to be consistent with tc code
  15. * [13-NOV-98] triemer fixed code to receive characters
  16. * after patches by harald to irq code.
  17. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  18. * field from "current" - somewhere between 2.1.121 and 2.1.131
  19. Qua Jun 27 15:02:26 BRT 2001
  20. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  21. *
  22. * Parts (C) 1999 David Airlie, airlied@linux.ie
  23. * [07-SEP-99] Bugfixes
  24. *
  25. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  26. * Converted to new serial core
  27. */
  28. #undef DEBUG_DZ
  29. #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/delay.h>
  33. #include <linux/module.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/init.h>
  36. #include <linux/console.h>
  37. #include <linux/sysrq.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #include <linux/serial.h>
  42. #include <asm/bootinfo.h>
  43. #include <asm/dec/interrupts.h>
  44. #include <asm/dec/kn01.h>
  45. #include <asm/dec/kn02.h>
  46. #include <asm/dec/machtype.h>
  47. #include <asm/dec/prom.h>
  48. #include <asm/irq.h>
  49. #include <asm/system.h>
  50. #include <asm/uaccess.h>
  51. #include "dz.h"
  52. static char *dz_name = "DECstation DZ serial driver version ";
  53. static char *dz_version = "1.03";
  54. struct dz_port {
  55. struct uart_port port;
  56. unsigned int cflag;
  57. };
  58. static struct dz_port dz_ports[DZ_NB_PORT];
  59. /*
  60. * ------------------------------------------------------------
  61. * dz_in () and dz_out ()
  62. *
  63. * These routines are used to access the registers of the DZ
  64. * chip, hiding relocation differences between implementation.
  65. * ------------------------------------------------------------
  66. */
  67. static inline unsigned short dz_in(struct dz_port *dport, unsigned offset)
  68. {
  69. volatile unsigned short *addr =
  70. (volatile unsigned short *) (dport->port.membase + offset);
  71. return *addr;
  72. }
  73. static inline void dz_out(struct dz_port *dport, unsigned offset,
  74. unsigned short value)
  75. {
  76. volatile unsigned short *addr =
  77. (volatile unsigned short *) (dport->port.membase + offset);
  78. *addr = value;
  79. }
  80. /*
  81. * ------------------------------------------------------------
  82. * rs_stop () and rs_start ()
  83. *
  84. * These routines are called before setting or resetting
  85. * tty->stopped. They enable or disable transmitter interrupts,
  86. * as necessary.
  87. * ------------------------------------------------------------
  88. */
  89. static void dz_stop_tx(struct uart_port *uport)
  90. {
  91. struct dz_port *dport = (struct dz_port *)uport;
  92. unsigned short tmp, mask = 1 << dport->port.line;
  93. unsigned long flags;
  94. spin_lock_irqsave(&dport->port.lock, flags);
  95. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  96. tmp &= ~mask; /* clear the TX flag */
  97. dz_out(dport, DZ_TCR, tmp);
  98. spin_unlock_irqrestore(&dport->port.lock, flags);
  99. }
  100. static void dz_start_tx(struct uart_port *uport)
  101. {
  102. struct dz_port *dport = (struct dz_port *)uport;
  103. unsigned short tmp, mask = 1 << dport->port.line;
  104. unsigned long flags;
  105. spin_lock_irqsave(&dport->port.lock, flags);
  106. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  107. tmp |= mask; /* set the TX flag */
  108. dz_out(dport, DZ_TCR, tmp);
  109. spin_unlock_irqrestore(&dport->port.lock, flags);
  110. }
  111. static void dz_stop_rx(struct uart_port *uport)
  112. {
  113. struct dz_port *dport = (struct dz_port *)uport;
  114. unsigned long flags;
  115. spin_lock_irqsave(&dport->port.lock, flags);
  116. dport->cflag &= ~DZ_CREAD;
  117. dz_out(dport, DZ_LPR, dport->cflag | dport->port.line);
  118. spin_unlock_irqrestore(&dport->port.lock, flags);
  119. }
  120. static void dz_enable_ms(struct uart_port *port)
  121. {
  122. /* nothing to do */
  123. }
  124. /*
  125. * ------------------------------------------------------------
  126. *
  127. * Here start the interrupt handling routines. All of the following
  128. * subroutines are declared as inline and are folded into
  129. * dz_interrupt. They were separated out for readability's sake.
  130. *
  131. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  132. * runs with interrupts turned off. People who may want to modify
  133. * dz_interrupt() should try to keep the interrupt handler as fast as
  134. * possible. After you are done making modifications, it is not a bad
  135. * idea to do:
  136. *
  137. * make drivers/serial/dz.s
  138. *
  139. * and look at the resulting assemble code in dz.s.
  140. *
  141. * ------------------------------------------------------------
  142. */
  143. /*
  144. * ------------------------------------------------------------
  145. * receive_char ()
  146. *
  147. * This routine deals with inputs from any lines.
  148. * ------------------------------------------------------------
  149. */
  150. static inline void dz_receive_chars(struct dz_port *dport_in)
  151. {
  152. struct dz_port *dport;
  153. struct tty_struct *tty = NULL;
  154. struct uart_icount *icount;
  155. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  156. unsigned short status;
  157. unsigned char ch, flag;
  158. int i;
  159. while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) {
  160. dport = &dz_ports[LINE(status)];
  161. tty = dport->port.info->tty; /* point to the proper dev */
  162. ch = UCHAR(status); /* grab the char */
  163. icount = &dport->port.icount;
  164. icount->rx++;
  165. flag = TTY_NORMAL;
  166. if (status & DZ_FERR) { /* frame error */
  167. /*
  168. * There is no separate BREAK status bit, so
  169. * treat framing errors as BREAKs for Magic SysRq
  170. * and SAK; normally, otherwise.
  171. */
  172. if (uart_handle_break(&dport->port))
  173. continue;
  174. if (dport->port.flags & UPF_SAK)
  175. flag = TTY_BREAK;
  176. else
  177. flag = TTY_FRAME;
  178. } else if (status & DZ_OERR) /* overrun error */
  179. flag = TTY_OVERRUN;
  180. else if (status & DZ_PERR) /* parity error */
  181. flag = TTY_PARITY;
  182. /* keep track of the statistics */
  183. switch (flag) {
  184. case TTY_FRAME:
  185. icount->frame++;
  186. break;
  187. case TTY_PARITY:
  188. icount->parity++;
  189. break;
  190. case TTY_OVERRUN:
  191. icount->overrun++;
  192. break;
  193. case TTY_BREAK:
  194. icount->brk++;
  195. break;
  196. default:
  197. break;
  198. }
  199. if (uart_handle_sysrq_char(&dport->port, ch))
  200. continue;
  201. if ((status & dport->port.ignore_status_mask) == 0) {
  202. uart_insert_char(&dport->port,
  203. status, DZ_OERR, ch, flag);
  204. lines_rx[LINE(status)] = 1;
  205. }
  206. }
  207. for (i = 0; i < DZ_NB_PORT; i++)
  208. if (lines_rx[i])
  209. tty_flip_buffer_push(dz_ports[i].port.info->tty);
  210. }
  211. /*
  212. * ------------------------------------------------------------
  213. * transmit_char ()
  214. *
  215. * This routine deals with outputs to any lines.
  216. * ------------------------------------------------------------
  217. */
  218. static inline void dz_transmit_chars(struct dz_port *dport_in)
  219. {
  220. struct dz_port *dport;
  221. struct circ_buf *xmit;
  222. unsigned short status;
  223. unsigned char tmp;
  224. status = dz_in(dport_in, DZ_CSR);
  225. dport = &dz_ports[LINE(status)];
  226. xmit = &dport->port.info->xmit;
  227. if (dport->port.x_char) { /* XON/XOFF chars */
  228. dz_out(dport, DZ_TDR, dport->port.x_char);
  229. dport->port.icount.tx++;
  230. dport->port.x_char = 0;
  231. return;
  232. }
  233. /* If nothing to do or stopped or hardware stopped. */
  234. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  235. dz_stop_tx(&dport->port);
  236. return;
  237. }
  238. /*
  239. * If something to do... (remember the dz has no output fifo,
  240. * so we go one char at a time) :-<
  241. */
  242. tmp = xmit->buf[xmit->tail];
  243. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  244. dz_out(dport, DZ_TDR, tmp);
  245. dport->port.icount.tx++;
  246. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  247. uart_write_wakeup(&dport->port);
  248. /* Are we are done. */
  249. if (uart_circ_empty(xmit))
  250. dz_stop_tx(&dport->port);
  251. }
  252. /*
  253. * ------------------------------------------------------------
  254. * check_modem_status()
  255. *
  256. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  257. * DS 5000/200: Valid for the MODEM and PRINTER line.
  258. * ------------------------------------------------------------
  259. */
  260. static inline void check_modem_status(struct dz_port *dport)
  261. {
  262. /*
  263. * FIXME:
  264. * 1. No status change interrupt; use a timer.
  265. * 2. Handle the 3100/5000 as appropriate. --macro
  266. */
  267. unsigned short status;
  268. /* If not the modem line just return. */
  269. if (dport->port.line != DZ_MODEM)
  270. return;
  271. status = dz_in(dport, DZ_MSR);
  272. /* it's easy, since DSR2 is the only bit in the register */
  273. if (status)
  274. dport->port.icount.dsr++;
  275. }
  276. /*
  277. * ------------------------------------------------------------
  278. * dz_interrupt ()
  279. *
  280. * this is the main interrupt routine for the DZ chip.
  281. * It deals with the multiple ports.
  282. * ------------------------------------------------------------
  283. */
  284. static irqreturn_t dz_interrupt(int irq, void *dev)
  285. {
  286. struct dz_port *dport = (struct dz_port *)dev;
  287. unsigned short status;
  288. /* get the reason why we just got an irq */
  289. status = dz_in(dport, DZ_CSR);
  290. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  291. dz_receive_chars(dport);
  292. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  293. dz_transmit_chars(dport);
  294. return IRQ_HANDLED;
  295. }
  296. /*
  297. * -------------------------------------------------------------------
  298. * Here ends the DZ interrupt routines.
  299. * -------------------------------------------------------------------
  300. */
  301. static unsigned int dz_get_mctrl(struct uart_port *uport)
  302. {
  303. /*
  304. * FIXME: Handle the 3100/5000 as appropriate. --macro
  305. */
  306. struct dz_port *dport = (struct dz_port *)uport;
  307. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  308. if (dport->port.line == DZ_MODEM) {
  309. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  310. mctrl &= ~TIOCM_DSR;
  311. }
  312. return mctrl;
  313. }
  314. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  315. {
  316. /*
  317. * FIXME: Handle the 3100/5000 as appropriate. --macro
  318. */
  319. struct dz_port *dport = (struct dz_port *)uport;
  320. unsigned short tmp;
  321. if (dport->port.line == DZ_MODEM) {
  322. tmp = dz_in(dport, DZ_TCR);
  323. if (mctrl & TIOCM_DTR)
  324. tmp &= ~DZ_MODEM_DTR;
  325. else
  326. tmp |= DZ_MODEM_DTR;
  327. dz_out(dport, DZ_TCR, tmp);
  328. }
  329. }
  330. /*
  331. * -------------------------------------------------------------------
  332. * startup ()
  333. *
  334. * various initialization tasks
  335. * -------------------------------------------------------------------
  336. */
  337. static int dz_startup(struct uart_port *uport)
  338. {
  339. struct dz_port *dport = (struct dz_port *)uport;
  340. unsigned long flags;
  341. unsigned short tmp;
  342. spin_lock_irqsave(&dport->port.lock, flags);
  343. /* enable the interrupt and the scanning */
  344. tmp = dz_in(dport, DZ_CSR);
  345. tmp |= DZ_RIE | DZ_TIE | DZ_MSE;
  346. dz_out(dport, DZ_CSR, tmp);
  347. spin_unlock_irqrestore(&dport->port.lock, flags);
  348. return 0;
  349. }
  350. /*
  351. * -------------------------------------------------------------------
  352. * shutdown ()
  353. *
  354. * This routine will shutdown a serial port; interrupts are disabled, and
  355. * DTR is dropped if the hangup on close termio flag is on.
  356. * -------------------------------------------------------------------
  357. */
  358. static void dz_shutdown(struct uart_port *uport)
  359. {
  360. dz_stop_tx(uport);
  361. }
  362. /*
  363. * -------------------------------------------------------------------
  364. * dz_tx_empty() -- get the transmitter empty status
  365. *
  366. * Purpose: Let user call ioctl() to get info when the UART physically
  367. * is emptied. On bus types like RS485, the transmitter must
  368. * release the bus after transmitting. This must be done when
  369. * the transmit shift register is empty, not be done when the
  370. * transmit holding register is empty. This functionality
  371. * allows an RS485 driver to be written in user space.
  372. * -------------------------------------------------------------------
  373. */
  374. static unsigned int dz_tx_empty(struct uart_port *uport)
  375. {
  376. struct dz_port *dport = (struct dz_port *)uport;
  377. unsigned short tmp, mask = 1 << dport->port.line;
  378. tmp = dz_in(dport, DZ_TCR);
  379. tmp &= mask;
  380. return tmp ? 0 : TIOCSER_TEMT;
  381. }
  382. static void dz_break_ctl(struct uart_port *uport, int break_state)
  383. {
  384. /*
  385. * FIXME: Can't access BREAK bits in TDR easily;
  386. * reuse the code for polled TX. --macro
  387. */
  388. struct dz_port *dport = (struct dz_port *)uport;
  389. unsigned long flags;
  390. unsigned short tmp, mask = 1 << dport->port.line;
  391. spin_lock_irqsave(&uport->lock, flags);
  392. tmp = dz_in(dport, DZ_TCR);
  393. if (break_state)
  394. tmp |= mask;
  395. else
  396. tmp &= ~mask;
  397. dz_out(dport, DZ_TCR, tmp);
  398. spin_unlock_irqrestore(&uport->lock, flags);
  399. }
  400. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  401. struct ktermios *old_termios)
  402. {
  403. struct dz_port *dport = (struct dz_port *)uport;
  404. unsigned long flags;
  405. unsigned int cflag, baud;
  406. cflag = dport->port.line;
  407. switch (termios->c_cflag & CSIZE) {
  408. case CS5:
  409. cflag |= DZ_CS5;
  410. break;
  411. case CS6:
  412. cflag |= DZ_CS6;
  413. break;
  414. case CS7:
  415. cflag |= DZ_CS7;
  416. break;
  417. case CS8:
  418. default:
  419. cflag |= DZ_CS8;
  420. }
  421. if (termios->c_cflag & CSTOPB)
  422. cflag |= DZ_CSTOPB;
  423. if (termios->c_cflag & PARENB)
  424. cflag |= DZ_PARENB;
  425. if (termios->c_cflag & PARODD)
  426. cflag |= DZ_PARODD;
  427. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  428. switch (baud) {
  429. case 50:
  430. cflag |= DZ_B50;
  431. break;
  432. case 75:
  433. cflag |= DZ_B75;
  434. break;
  435. case 110:
  436. cflag |= DZ_B110;
  437. break;
  438. case 134:
  439. cflag |= DZ_B134;
  440. break;
  441. case 150:
  442. cflag |= DZ_B150;
  443. break;
  444. case 300:
  445. cflag |= DZ_B300;
  446. break;
  447. case 600:
  448. cflag |= DZ_B600;
  449. break;
  450. case 1200:
  451. cflag |= DZ_B1200;
  452. break;
  453. case 1800:
  454. cflag |= DZ_B1800;
  455. break;
  456. case 2000:
  457. cflag |= DZ_B2000;
  458. break;
  459. case 2400:
  460. cflag |= DZ_B2400;
  461. break;
  462. case 3600:
  463. cflag |= DZ_B3600;
  464. break;
  465. case 4800:
  466. cflag |= DZ_B4800;
  467. break;
  468. case 7200:
  469. cflag |= DZ_B7200;
  470. break;
  471. case 9600:
  472. default:
  473. cflag |= DZ_B9600;
  474. }
  475. if (termios->c_cflag & CREAD)
  476. cflag |= DZ_RXENAB;
  477. spin_lock_irqsave(&dport->port.lock, flags);
  478. dz_out(dport, DZ_LPR, cflag | dport->port.line);
  479. dport->cflag = cflag;
  480. /* setup accept flag */
  481. dport->port.read_status_mask = DZ_OERR;
  482. if (termios->c_iflag & INPCK)
  483. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  484. /* characters to ignore */
  485. uport->ignore_status_mask = 0;
  486. if (termios->c_iflag & IGNPAR)
  487. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  488. spin_unlock_irqrestore(&dport->port.lock, flags);
  489. }
  490. static const char *dz_type(struct uart_port *port)
  491. {
  492. return "DZ";
  493. }
  494. static void dz_release_port(struct uart_port *port)
  495. {
  496. /* nothing to do */
  497. }
  498. static int dz_request_port(struct uart_port *port)
  499. {
  500. return 0;
  501. }
  502. static void dz_config_port(struct uart_port *port, int flags)
  503. {
  504. if (flags & UART_CONFIG_TYPE)
  505. port->type = PORT_DZ;
  506. }
  507. /*
  508. * verify the new serial_struct (for TIOCSSERIAL).
  509. */
  510. static int dz_verify_port(struct uart_port *port, struct serial_struct *ser)
  511. {
  512. int ret = 0;
  513. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  514. ret = -EINVAL;
  515. if (ser->irq != port->irq)
  516. ret = -EINVAL;
  517. return ret;
  518. }
  519. static struct uart_ops dz_ops = {
  520. .tx_empty = dz_tx_empty,
  521. .get_mctrl = dz_get_mctrl,
  522. .set_mctrl = dz_set_mctrl,
  523. .stop_tx = dz_stop_tx,
  524. .start_tx = dz_start_tx,
  525. .stop_rx = dz_stop_rx,
  526. .enable_ms = dz_enable_ms,
  527. .break_ctl = dz_break_ctl,
  528. .startup = dz_startup,
  529. .shutdown = dz_shutdown,
  530. .set_termios = dz_set_termios,
  531. .type = dz_type,
  532. .release_port = dz_release_port,
  533. .request_port = dz_request_port,
  534. .config_port = dz_config_port,
  535. .verify_port = dz_verify_port,
  536. };
  537. static void __init dz_init_ports(void)
  538. {
  539. static int first = 1;
  540. struct dz_port *dport;
  541. unsigned long base;
  542. int i;
  543. if (!first)
  544. return;
  545. first = 0;
  546. if (mips_machtype == MACH_DS23100 ||
  547. mips_machtype == MACH_DS5100)
  548. base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11);
  549. else
  550. base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11);
  551. for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
  552. spin_lock_init(&dport->port.lock);
  553. dport->port.membase = (char *) base;
  554. dport->port.iotype = UPIO_MEM;
  555. dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
  556. dport->port.line = i;
  557. dport->port.fifosize = 1;
  558. dport->port.ops = &dz_ops;
  559. dport->port.flags = UPF_BOOT_AUTOCONF;
  560. }
  561. }
  562. static void dz_reset(struct dz_port *dport)
  563. {
  564. dz_out(dport, DZ_CSR, DZ_CLR);
  565. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  566. iob();
  567. /* enable scanning */
  568. dz_out(dport, DZ_CSR, DZ_MSE);
  569. }
  570. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  571. /*
  572. * -------------------------------------------------------------------
  573. * dz_console_putchar() -- transmit a character
  574. *
  575. * Polled transmission. This is tricky. We need to mask transmit
  576. * interrupts so that they do not interfere, enable the transmitter
  577. * for the line requested and then wait till the transmit scanner
  578. * requests data for this line. But it may request data for another
  579. * line first, in which case we have to disable its transmitter and
  580. * repeat waiting till our line pops up. Only then the character may
  581. * be transmitted. Finally, the state of the transmitter mask is
  582. * restored. Welcome to the world of PDP-11!
  583. * -------------------------------------------------------------------
  584. */
  585. static void dz_console_putchar(struct uart_port *uport, int ch)
  586. {
  587. struct dz_port *dport = (struct dz_port *)uport;
  588. unsigned long flags;
  589. unsigned short csr, tcr, trdy, mask;
  590. int loops = 10000;
  591. spin_lock_irqsave(&dport->port.lock, flags);
  592. csr = dz_in(dport, DZ_CSR);
  593. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  594. tcr = dz_in(dport, DZ_TCR);
  595. tcr |= 1 << dport->port.line;
  596. mask = tcr;
  597. dz_out(dport, DZ_TCR, mask);
  598. iob();
  599. spin_unlock_irqrestore(&dport->port.lock, flags);
  600. while (loops--) {
  601. trdy = dz_in(dport, DZ_CSR);
  602. if (!(trdy & DZ_TRDY))
  603. continue;
  604. trdy = (trdy & DZ_TLINE) >> 8;
  605. if (trdy == dport->port.line)
  606. break;
  607. mask &= ~(1 << trdy);
  608. dz_out(dport, DZ_TCR, mask);
  609. iob();
  610. udelay(2);
  611. }
  612. if (loops) /* Cannot send otherwise. */
  613. dz_out(dport, DZ_TDR, ch);
  614. dz_out(dport, DZ_TCR, tcr);
  615. dz_out(dport, DZ_CSR, csr);
  616. }
  617. /*
  618. * -------------------------------------------------------------------
  619. * dz_console_print ()
  620. *
  621. * dz_console_print is registered for printk.
  622. * The console must be locked when we get here.
  623. * -------------------------------------------------------------------
  624. */
  625. static void dz_console_print(struct console *co,
  626. const char *str,
  627. unsigned int count)
  628. {
  629. struct dz_port *dport = &dz_ports[co->index];
  630. #ifdef DEBUG_DZ
  631. prom_printf((char *) str);
  632. #endif
  633. uart_console_write(&dport->port, str, count, dz_console_putchar);
  634. }
  635. static int __init dz_console_setup(struct console *co, char *options)
  636. {
  637. struct dz_port *dport = &dz_ports[co->index];
  638. int baud = 9600;
  639. int bits = 8;
  640. int parity = 'n';
  641. int flow = 'n';
  642. if (options)
  643. uart_parse_options(options, &baud, &parity, &bits, &flow);
  644. dz_reset(dport);
  645. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  646. }
  647. static struct uart_driver dz_reg;
  648. static struct console dz_sercons = {
  649. .name = "ttyS",
  650. .write = dz_console_print,
  651. .device = uart_console_device,
  652. .setup = dz_console_setup,
  653. .flags = CON_PRINTBUFFER,
  654. .index = -1,
  655. .data = &dz_reg,
  656. };
  657. static int __init dz_serial_console_init(void)
  658. {
  659. if (!IOASIC) {
  660. dz_init_ports();
  661. register_console(&dz_sercons);
  662. return 0;
  663. } else
  664. return -ENXIO;
  665. }
  666. console_initcall(dz_serial_console_init);
  667. #define SERIAL_DZ_CONSOLE &dz_sercons
  668. #else
  669. #define SERIAL_DZ_CONSOLE NULL
  670. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  671. static struct uart_driver dz_reg = {
  672. .owner = THIS_MODULE,
  673. .driver_name = "serial",
  674. .dev_name = "ttyS",
  675. .major = TTY_MAJOR,
  676. .minor = 64,
  677. .nr = DZ_NB_PORT,
  678. .cons = SERIAL_DZ_CONSOLE,
  679. };
  680. static int __init dz_init(void)
  681. {
  682. int ret, i;
  683. if (IOASIC)
  684. return -ENXIO;
  685. printk("%s%s\n", dz_name, dz_version);
  686. dz_init_ports();
  687. #ifndef CONFIG_SERIAL_DZ_CONSOLE
  688. /* reset the chip */
  689. dz_reset(&dz_ports[0]);
  690. #endif
  691. if (request_irq(dz_ports[0].port.irq, dz_interrupt,
  692. IRQF_DISABLED, "DZ", &dz_ports[0]))
  693. panic("Unable to register DZ interrupt");
  694. ret = uart_register_driver(&dz_reg);
  695. if (ret != 0)
  696. return ret;
  697. for (i = 0; i < DZ_NB_PORT; i++)
  698. uart_add_one_port(&dz_reg, &dz_ports[i].port);
  699. return ret;
  700. }
  701. module_init(dz_init);
  702. MODULE_DESCRIPTION("DECstation DZ serial driver");
  703. MODULE_LICENSE("GPL");