aha1740.h 4.9 KB

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  1. #ifndef _AHA1740_H
  2. /* $Id: aha1740.h,v 1.1.1.1 2007/06/12 07:27:09 eyryu Exp $
  3. *
  4. * Header file for the adaptec 1740 driver for Linux
  5. *
  6. * With minor revisions 3/31/93
  7. * Written and (C) 1992,1993 Brad McLean. See aha1740.c
  8. * for more info
  9. *
  10. */
  11. #include <linux/types.h>
  12. #define SLOTSIZE 0x5c
  13. /* EISA configuration registers & values */
  14. #define HID0(base) (base + 0x0)
  15. #define HID1(base) (base + 0x1)
  16. #define HID2(base) (base + 0x2)
  17. #define HID3(base) (base + 0x3)
  18. #define EBCNTRL(base) (base + 0x4)
  19. #define PORTADR(base) (base + 0x40)
  20. #define BIOSADR(base) (base + 0x41)
  21. #define INTDEF(base) (base + 0x42)
  22. #define SCSIDEF(base) (base + 0x43)
  23. #define BUSDEF(base) (base + 0x44)
  24. #define RESV0(base) (base + 0x45)
  25. #define RESV1(base) (base + 0x46)
  26. #define RESV2(base) (base + 0x47)
  27. #define HID_MFG "ADP"
  28. #define HID_PRD 0
  29. #define HID_REV 2
  30. #define EBCNTRL_VALUE 1
  31. #define PORTADDR_ENH 0x80
  32. /* READ */
  33. #define G2INTST(base) (base + 0x56)
  34. #define G2STAT(base) (base + 0x57)
  35. #define MBOXIN0(base) (base + 0x58)
  36. #define MBOXIN1(base) (base + 0x59)
  37. #define MBOXIN2(base) (base + 0x5a)
  38. #define MBOXIN3(base) (base + 0x5b)
  39. #define G2STAT2(base) (base + 0x5c)
  40. #define G2INTST_MASK 0xf0 /* isolate the status */
  41. #define G2INTST_CCBGOOD 0x10 /* CCB Completed */
  42. #define G2INTST_CCBRETRY 0x50 /* CCB Completed with a retry */
  43. #define G2INTST_HARDFAIL 0x70 /* Adapter Hardware Failure */
  44. #define G2INTST_CMDGOOD 0xa0 /* Immediate command success */
  45. #define G2INTST_CCBERROR 0xc0 /* CCB Completed with error */
  46. #define G2INTST_ASNEVENT 0xd0 /* Asynchronous Event Notification */
  47. #define G2INTST_CMDERROR 0xe0 /* Immediate command error */
  48. #define G2STAT_MBXOUT 4 /* Mailbox Out Empty Bit */
  49. #define G2STAT_INTPEND 2 /* Interrupt Pending Bit */
  50. #define G2STAT_BUSY 1 /* Busy Bit (attention pending) */
  51. #define G2STAT2_READY 0 /* Host Ready Bit */
  52. /* WRITE (and ReadBack) */
  53. #define MBOXOUT0(base) (base + 0x50)
  54. #define MBOXOUT1(base) (base + 0x51)
  55. #define MBOXOUT2(base) (base + 0x52)
  56. #define MBOXOUT3(base) (base + 0x53)
  57. #define ATTN(base) (base + 0x54)
  58. #define G2CNTRL(base) (base + 0x55)
  59. #define ATTN_IMMED 0x10 /* Immediate Command */
  60. #define ATTN_START 0x40 /* Start CCB */
  61. #define ATTN_ABORT 0x50 /* Abort CCB */
  62. #define G2CNTRL_HRST 0x80 /* Hard Reset */
  63. #define G2CNTRL_IRST 0x40 /* Clear EISA Interrupt */
  64. #define G2CNTRL_HRDY 0x20 /* Sets HOST ready */
  65. /* This is used with scatter-gather */
  66. struct aha1740_chain {
  67. u32 dataptr; /* Location of data */
  68. u32 datalen; /* Size of this part of chain */
  69. };
  70. /* These belong in scsi.h */
  71. #define any2scsi(up, p) \
  72. (up)[0] = (((unsigned long)(p)) >> 16) ; \
  73. (up)[1] = (((unsigned long)(p)) >> 8); \
  74. (up)[2] = ((unsigned long)(p));
  75. #define scsi2int(up) ( (((long)*(up)) << 16) + (((long)(up)[1]) << 8) + ((long)(up)[2]) )
  76. #define xany2scsi(up, p) \
  77. (up)[0] = ((long)(p)) >> 24; \
  78. (up)[1] = ((long)(p)) >> 16; \
  79. (up)[2] = ((long)(p)) >> 8; \
  80. (up)[3] = ((long)(p));
  81. #define xscsi2int(up) ( (((long)(up)[0]) << 24) + (((long)(up)[1]) << 16) \
  82. + (((long)(up)[2]) << 8) + ((long)(up)[3]) )
  83. #define MAX_CDB 12
  84. #define MAX_SENSE 14
  85. #define MAX_STATUS 32
  86. struct ecb { /* Enhanced Control Block 6.1 */
  87. u16 cmdw; /* Command Word */
  88. /* Flag Word 1 */
  89. u16 cne:1, /* Control Block Chaining */
  90. :6, di:1, /* Disable Interrupt */
  91. :2, ses:1, /* Suppress Underrun error */
  92. :1, sg:1, /* Scatter/Gather */
  93. :1, dsb:1, /* Disable Status Block */
  94. ars:1; /* Automatic Request Sense */
  95. /* Flag Word 2 */
  96. u16 lun:3, /* Logical Unit */
  97. tag:1, /* Tagged Queuing */
  98. tt:2, /* Tag Type */
  99. nd:1, /* No Disconnect */
  100. :1, dat:1, /* Data transfer - check direction */
  101. dir:1, /* Direction of transfer 1 = datain */
  102. st:1, /* Suppress Transfer */
  103. chk:1, /* Calculate Checksum */
  104. :2, rec:1,:1; /* Error Recovery */
  105. u16 nil0; /* nothing */
  106. u32 dataptr; /* Data or Scatter List ptr */
  107. u32 datalen; /* Data or Scatter List len */
  108. u32 statusptr; /* Status Block ptr */
  109. u32 linkptr; /* Chain Address */
  110. u32 nil1; /* nothing */
  111. u32 senseptr; /* Sense Info Pointer */
  112. u8 senselen; /* Sense Length */
  113. u8 cdblen; /* CDB Length */
  114. u16 datacheck; /* Data checksum */
  115. u8 cdb[MAX_CDB]; /* CDB area */
  116. /* Hardware defined portion ends here, rest is driver defined */
  117. u8 sense[MAX_SENSE]; /* Sense area */
  118. u8 status[MAX_STATUS]; /* Status area */
  119. Scsi_Cmnd *SCpnt; /* Link to the SCSI Command Block */
  120. void (*done) (Scsi_Cmnd *); /* Completion Function */
  121. };
  122. #define AHA1740CMD_NOP 0x00 /* No OP */
  123. #define AHA1740CMD_INIT 0x01 /* Initiator SCSI Command */
  124. #define AHA1740CMD_DIAG 0x05 /* Run Diagnostic Command */
  125. #define AHA1740CMD_SCSI 0x06 /* Initialize SCSI */
  126. #define AHA1740CMD_SENSE 0x08 /* Read Sense Information */
  127. #define AHA1740CMD_DOWN 0x09 /* Download Firmware (yeah, I bet!) */
  128. #define AHA1740CMD_RINQ 0x0a /* Read Host Adapter Inquiry Data */
  129. #define AHA1740CMD_TARG 0x10 /* Target SCSI Command */
  130. #define AHA1740_ECBS 32
  131. #define AHA1740_SCATTER 16
  132. #define AHA1740_CMDLUN 1
  133. #endif