pwm-s3c6400.c 7.8 KB

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  1. /* linux/arch/arm/mach-s3c64xx/pwm.c
  2. *
  3. * (c) 2003-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C64XX PWM core
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Changelog:
  13. * This file is based on the Sangwook Lee/Samsung patches, re-written due
  14. * to various ommisions from the code (such as flexible pwm configuration)
  15. * for use with the BAST system board.
  16. *
  17. *
  18. */
  19. #include <linux/errno.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/slab.h>
  23. #include <linux/input.h>
  24. #include <linux/init.h>
  25. #include <linux/serio.h>
  26. #include <linux/delay.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/miscdevice.h>
  29. #include <linux/clk.h>
  30. #include <linux/mutex.h>
  31. #include <asm/io.h>
  32. #include <asm/irq.h>
  33. #include <asm/hardware.h>
  34. #include <asm/uaccess.h>
  35. #include <asm/arch/regs-timer.h>
  36. #include <asm/arch/regs-gpio.h>
  37. #include <asm/arch/irqs.h>
  38. #include "pwm-s3c6400.h"
  39. s3c6400_pwm_chan_t s3c_chans[S3C_PWM_CHANNELS];
  40. static inline void
  41. s3c6400_pwm_buffdone(s3c6400_pwm_chan_t *chan, void *dev)
  42. {
  43. if (chan->callback_fn != NULL) {
  44. (chan->callback_fn)( dev);
  45. }
  46. }
  47. static int s3c6400_pwm_start (int channel)
  48. {
  49. unsigned long tcon;
  50. tcon = __raw_readl(S3C_TCON);
  51. switch(channel)
  52. {
  53. case 0:
  54. tcon |= S3C_TCON_T0START;
  55. tcon &= ~S3C_TCON_T0MANUALUPD;
  56. break;
  57. case 1:
  58. tcon |= S3C_TCON_T1START;
  59. tcon &= ~S3C_TCON_T1MANUALUPD;
  60. break;
  61. case 2:
  62. tcon |= S3C_TCON_T2START;
  63. tcon &= ~S3C_TCON_T2MANUALUPD;
  64. break;
  65. case 3:
  66. tcon |= S3C_TCON_T3START;
  67. tcon &= ~S3C_TCON_T3MANUALUPD;
  68. break;
  69. }
  70. __raw_writel(tcon, S3C_TCON);
  71. return 0;
  72. }
  73. int s3c6400_timer_setup (int channel, int usec, unsigned long g_tcnt, unsigned long g_tcmp)
  74. {
  75. unsigned long tcon;
  76. unsigned long tcnt;
  77. unsigned long tcmp;
  78. unsigned long tcfg1;
  79. unsigned long tcfg0;
  80. unsigned long pclk;
  81. struct clk *clk;
  82. printk("PWM channel %d set g_tcnt = %ld, g_tcmp = %ld \n", channel, g_tcnt, g_tcmp);
  83. tcnt = 0xffffffff; /* default value for tcnt */
  84. /* read the current timer configuration bits */
  85. tcon = __raw_readl(S3C_TCON);
  86. tcfg1 = __raw_readl(S3C_TCFG1);
  87. tcfg0 = __raw_readl(S3C_TCFG0);
  88. clk = clk_get(NULL, "timers");
  89. if (IS_ERR(clk))
  90. panic("failed to get clock for pwm timer");
  91. clk_enable(clk);
  92. pclk = clk_get_rate(clk);
  93. /* configure clock tick */
  94. switch(channel)
  95. {
  96. case 0:
  97. /* set gpio as PWM TIMER0 to signal output*/
  98. s3c_gpio_cfgpin(S3C_GPF14, S3C_GPF14_PWM_TOUT0);
  99. s3c_gpio_setpin(S3C_GPF14, 0);
  100. tcfg1 &= ~S3C_TCFG1_MUX0_MASK;
  101. tcfg1 |= S3C_TCFG1_MUX0_DIV2;
  102. tcfg0 &= ~S3C_TCFG_PRESCALER0_MASK;
  103. tcfg0 |= (PRESCALER) << S3C_TCFG_PRESCALER0_SHIFT;
  104. tcon &= ~(7<<0);
  105. tcon |= S3C_TCON_T0RELOAD;
  106. break;
  107. case 1:
  108. /* set gpio as PWM TIMER1 to signal output*/
  109. s3c_gpio_cfgpin(S3C_GPF15, S3C_GPF15_PWM_TOUT1);
  110. s3c_gpio_setpin(S3C_GPF15, 0);
  111. tcfg1 &= ~S3C_TCFG1_MUX1_MASK;
  112. tcfg1 |= S3C_TCFG1_MUX1_DIV2;
  113. tcfg0 &= ~S3C_TCFG_PRESCALER0_MASK;
  114. tcfg0 |= (PRESCALER) << S3C_TCFG_PRESCALER0_SHIFT;
  115. tcon &= ~(7<<8);
  116. tcon |= S3C_TCON_T1RELOAD;
  117. break;
  118. case 2:
  119. tcfg1 &= ~S3C_TCFG1_MUX2_MASK;
  120. tcfg1 |= S3C_TCFG1_MUX2_DIV2;
  121. tcfg0 &= ~S3C_TCFG_PRESCALER1_MASK;
  122. tcfg0 |= (PRESCALER) << S3C_TCFG_PRESCALER1_SHIFT;
  123. tcon &= ~(7<<12);
  124. tcon |= S3C_TCON_T2RELOAD;
  125. break;
  126. case 3:
  127. tcfg1 &= ~S3C_TCFG1_MUX3_MASK;
  128. tcfg1 |= S3C_TCFG1_MUX3_DIV2;
  129. tcfg0 &= ~S3C_TCFG_PRESCALER1_MASK;
  130. tcfg0 |= (PRESCALER) << S3C_TCFG_PRESCALER1_SHIFT;
  131. tcon &= ~(7<<16);
  132. tcon |= S3C_TCON_T3RELOAD;
  133. break;
  134. }
  135. #if 0
  136. tcnt = (pclk / ((PRESCALER)*DIVIDER)) / usec;
  137. printk("s3c6400 pwm timer tcnt=0x%08lx, pclk=0x%08lx, PRESCALER=%d, DIVIDER=%d, usec=%d\n",
  138. tcnt, pclk, PRESCALER, DIVIDER, usec);
  139. /* timers reload after counting zero, so reduce the count by 1 */
  140. tcnt--;
  141. #endif
  142. __raw_writel(tcfg1, S3C_TCFG1);
  143. __raw_writel(tcfg0, S3C_TCFG0);
  144. __raw_writel(tcon, S3C_TCON);
  145. tcnt = 160;
  146. #if 0
  147. if (tcnt > 0xffffffff) {
  148. panic("setup_timer: HZ is too small, cannot configure timer!");
  149. return 0;
  150. }
  151. #endif
  152. __raw_writel(tcnt, S3C_TCNTB(channel));
  153. tcmp = 110;
  154. __raw_writel(tcmp, S3C_TCMPB(channel));
  155. switch(channel)
  156. {
  157. case 0:
  158. tcon |= S3C_TCON_T0MANUALUPD;
  159. break;
  160. case 1:
  161. tcon |= S3C_TCON_T1MANUALUPD;
  162. break;
  163. case 2:
  164. tcon |= S3C_TCON_T2MANUALUPD;
  165. break;
  166. case 3:
  167. tcon |= S3C_TCON_T3MANUALUPD;
  168. break;
  169. }
  170. __raw_writel(tcon, S3C_TCON);
  171. tcnt = g_tcnt;
  172. __raw_writel(tcnt, S3C_TCNTB(channel));
  173. tcmp = g_tcmp;
  174. __raw_writel(tcmp, S3C_TCMPB(channel));
  175. /* start the timer running */
  176. s3c6400_pwm_start ( channel);
  177. return 0;
  178. }
  179. static irqreturn_t s3c6400_pwm_irq(int irq, void *devpw)
  180. {
  181. s3c6400_pwm_chan_t *chan = (s3c6400_pwm_chan_t *)devpw;
  182. void *dev=chan->dev;
  183. /* modify the channel state */
  184. s3c6400_pwm_buffdone(chan, dev);
  185. return IRQ_HANDLED;
  186. }
  187. int s3c6400_pwm_request(pwmch_t channel, s3c_pwm_client_t *client, void *dev)
  188. {
  189. s3c6400_pwm_chan_t *chan = &s3c_chans[channel];
  190. unsigned long flags;
  191. int err;
  192. pr_debug("pwm%d: s3c_request_pwm: client=%s, dev=%p\n",
  193. channel, client->name, dev);
  194. local_irq_save(flags);
  195. if (chan->in_use) {
  196. if (client != chan->client) {
  197. printk(KERN_ERR "pwm%d: already in use\n", channel);
  198. local_irq_restore(flags);
  199. return -EBUSY;
  200. } else {
  201. printk(KERN_ERR "pwm%d: client already has channel\n", channel);
  202. }
  203. }
  204. chan->client = client;
  205. chan->in_use = 1;
  206. chan->dev = dev;
  207. if (!chan->irq_claimed) {
  208. pr_debug("pwm%d: %s : requesting irq %d\n",
  209. channel, __FUNCTION__, chan->irq);
  210. err = request_irq(chan->irq, s3c6400_pwm_irq, SA_INTERRUPT,
  211. client->name, (void *)chan);
  212. if (err) {
  213. chan->in_use = 0;
  214. local_irq_restore(flags);
  215. printk(KERN_ERR "%s: cannot get IRQ %d for PWM %d\n",
  216. client->name, chan->irq, chan->number);
  217. return err;
  218. }
  219. chan->irq_claimed = 1;
  220. chan->irq_enabled = 1;
  221. }
  222. local_irq_restore(flags);
  223. /* need to setup */
  224. pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan);
  225. return 0;
  226. }
  227. int s3c6400_pwm_free (pwmch_t channel, s3c_pwm_client_t *client)
  228. {
  229. s3c6400_pwm_chan_t *chan = &s3c_chans[channel];
  230. unsigned long flags;
  231. local_irq_save(flags);
  232. if (chan->client != client) {
  233. printk(KERN_WARNING "pwm%d: possible free from different client (channel %p, passed %p)\n",
  234. channel, chan->client, client);
  235. }
  236. /* sort out stopping and freeing the channel */
  237. chan->client = NULL;
  238. chan->in_use = 0;
  239. if (chan->irq_claimed)
  240. free_irq(chan->irq, (void *)chan);
  241. chan->irq_claimed = 0;
  242. local_irq_restore(flags);
  243. return 0;
  244. }
  245. int s3c6400_pwm_set_buffdone_fn(pwmch_t channel, s3c_pwm_cbfn_t rtn)
  246. {
  247. s3c6400_pwm_chan_t *chan = &s3c_chans[channel];
  248. pr_debug("%s: chan=%d, callback rtn=%p\n", __FUNCTION__, channel, rtn);
  249. chan->callback_fn = rtn;
  250. return 0;
  251. }
  252. #define s3c6400_pwm_suspend NULL
  253. #define s3c6400_pwm_resume NULL
  254. struct sysdev_class pwm_sysclass = {
  255. set_kset_name("s3c-pwm"),
  256. .suspend = s3c6400_pwm_suspend,
  257. .resume = s3c6400_pwm_resume,
  258. };
  259. /* initialisation code */
  260. static int __init s3c6400_init_pwm(void)
  261. {
  262. s3c6400_pwm_chan_t *cp;
  263. int channel;
  264. int ret;
  265. printk("S3C PWM Driver, (c) 2006-2007 Samsung Electronics\n");
  266. ret = sysdev_class_register(&pwm_sysclass);
  267. if (ret != 0) {
  268. printk(KERN_ERR "pwm sysclass registration failed\n");
  269. return -ENODEV;
  270. }
  271. for (channel = 0; channel < S3C_PWM_CHANNELS; channel++) {
  272. cp = &s3c_chans[channel];
  273. memset(cp, 0, sizeof(s3c6400_pwm_chan_t));
  274. cp->number = channel;
  275. /* pwm channel irqs are in order.. */
  276. cp->irq = channel + IRQ_TIMER0;
  277. /* register system device */
  278. ret = sysdev_register(&cp->sysdev);
  279. pr_debug("PWM channel %d , irq %d\n",
  280. cp->number, cp->irq);
  281. }
  282. #ifdef PWM_using_sample
  283. s3c6400_timer_setup(1,10,1000,10);
  284. #endif
  285. return ret;
  286. }
  287. __initcall(s3c6400_init_pwm);