pwm-s3c2450.c 8.0 KB

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  1. /* linux/arch/arm/mach-s3c64xx/pwm.c
  2. *
  3. * (c) 2003-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C64XX PWM core
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Changelog:
  13. * This file is based on the Sangwook Lee/Samsung patches, re-written due
  14. * to various ommisions from the code (such as flexible pwm configuration)
  15. * for use with the BAST system board.
  16. *
  17. *
  18. */
  19. #include <linux/errno.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/slab.h>
  23. #include <linux/input.h>
  24. #include <linux/init.h>
  25. #include <linux/serio.h>
  26. #include <linux/delay.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/miscdevice.h>
  29. #include <linux/clk.h>
  30. #include <linux/mutex.h>
  31. #include <asm/io.h>
  32. #include <asm/irq.h>
  33. #include <asm/hardware.h>
  34. #include <asm/uaccess.h>
  35. #include <asm/arch/regs-timer.h>
  36. #include <asm/arch/regs-gpio.h>
  37. #include <asm/arch/irqs.h>
  38. #include "pwm-s3c2450.h"
  39. s3c2450_pwm_chan_t s3c_chans[S3C_PWM_CHANNELS];
  40. static inline void
  41. s3c2450_pwm_buffdone(s3c2450_pwm_chan_t *chan, void *dev)
  42. {
  43. if (chan->callback_fn != NULL) {
  44. (chan->callback_fn)( dev);
  45. }
  46. }
  47. static int s3c2450_pwm_start (int channel)
  48. {
  49. unsigned long tcon;
  50. tcon = __raw_readl(S3C2410_TCON);
  51. switch(channel)
  52. {
  53. case 0:
  54. tcon |= S3C2410_TCON_T0START;
  55. tcon &= ~S3C2410_TCON_T0MANUALUPD;
  56. break;
  57. case 1:
  58. tcon |= S3C2410_TCON_T1START;
  59. tcon &= ~S3C2410_TCON_T1MANUALUPD;
  60. break;
  61. case 2:
  62. tcon |= S3C2410_TCON_T2START;
  63. tcon &= ~S3C2410_TCON_T2MANUALUPD;
  64. break;
  65. case 3:
  66. tcon |= S3C2410_TCON_T3START;
  67. tcon &= ~S3C2410_TCON_T3MANUALUPD;
  68. break;
  69. }
  70. __raw_writel(tcon, S3C2410_TCON);
  71. return 0;
  72. }
  73. int s3c2450_timer_setup (int channel, int usec, unsigned long g_tcnt, unsigned long g_tcmp)
  74. {
  75. unsigned long tcon;
  76. unsigned long tcnt;
  77. unsigned long tcmp;
  78. unsigned long tcfg1;
  79. unsigned long tcfg0;
  80. unsigned long pclk;
  81. struct clk *clk;
  82. printk("\n\nPWM channel %d set g_tcnt = %ld, g_tcmp = %ld \n\n", channel, g_tcnt, g_tcmp);
  83. tcnt = 0xffffffff; /* default value for tcnt */
  84. tcmp = 0;
  85. /* read the current timer configuration bits */
  86. tcon = __raw_readl(S3C2410_TCON);
  87. tcfg1 = __raw_readl(S3C2410_TCFG1);
  88. tcfg0 = __raw_readl(S3C2410_TCFG0);
  89. clk = clk_get(NULL, "timers");
  90. if (IS_ERR(clk))
  91. panic("failed to get clock for pwm timer");
  92. clk_enable(clk);
  93. pclk = clk_get_rate(clk);
  94. /* configure clock tick */
  95. switch(channel)
  96. {
  97. case 0:
  98. /* set gpio as PWM TIMER0 to signal output*/
  99. s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPB0_TOUT0);
  100. s3c2410_gpio_setpin(S3C2410_GPB0, 0);
  101. tcfg1 &= ~S3C2410_TCFG1_MUX0_MASK;
  102. tcfg1 |= S3C2410_TCFG1_MUX0_DIV2;
  103. tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
  104. tcfg0 |= (4) << 0;
  105. tcon &= ~(7<<0);
  106. tcon |= S3C2410_TCON_T0RELOAD;
  107. break;
  108. case 1:
  109. /* set gpio as PWM TIMER1 to signal output*/
  110. s3c2410_gpio_cfgpin(S3C2410_GPB1, S3C2410_GPB1_TOUT1);
  111. s3c2410_gpio_setpin(S3C2410_GPB1, 0);
  112. tcfg1 &= ~S3C2410_TCFG1_MUX1_MASK;
  113. tcfg1 |= S3C2410_TCFG1_MUX1_DIV2;
  114. tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
  115. tcfg0 |= (4) << 0;
  116. tcon &= ~(7<<8);
  117. tcon |= S3C2410_TCON_T1RELOAD;
  118. break;
  119. case 2:
  120. s3c2410_gpio_cfgpin(S3C2410_GPB2, S3C2410_GPB2_TOUT2);
  121. s3c2410_gpio_setpin(S3C2410_GPB2, 0);
  122. tcfg1 &= ~S3C2410_TCFG1_MUX2_MASK;
  123. tcfg1 |= S3C2410_TCFG1_MUX2_DIV2;
  124. tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
  125. tcfg0 |= (4) << S3C2410_TCFG_PRESCALER1_SHIFT;
  126. tcon &= ~(7<<12);
  127. tcon |= S3C2410_TCON_T2RELOAD;
  128. break;
  129. case 3:
  130. s3c2410_gpio_cfgpin(S3C2410_GPB3, S3C2410_GPB3_TOUT3);
  131. s3c2410_gpio_setpin(S3C2410_GPB3, 0);
  132. tcfg1 &= ~S3C2410_TCFG1_MUX3_MASK;
  133. tcfg1 |= S3C2410_TCFG1_MUX3_DIV2;
  134. tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
  135. tcfg0 |= (4) << S3C2410_TCFG_PRESCALER1_SHIFT;
  136. tcon &= ~(7<<16);
  137. tcon |= S3C2410_TCON_T3RELOAD;
  138. break;
  139. }
  140. #if 0
  141. tcnt = (pclk / ((PRESCALER)*DIVIDER)) / usec;
  142. printk("s3c2450 pwm timer tcnt=0x%08lx, pclk=0x%08lx, PRESCALER=%d, DIVIDER=%d, usec=%d\n",
  143. tcnt, pclk, PRESCALER, DIVIDER, usec);
  144. /* timers reload after counting zero, so reduce the count by 1 */
  145. tcnt--;
  146. #endif
  147. __raw_writel(tcfg1, S3C2410_TCFG1);
  148. __raw_writel(tcfg0, S3C2410_TCFG0);
  149. __raw_writel(tcon, S3C2410_TCON);
  150. #if 0
  151. if (tcnt > 0xffffffff) {
  152. panic("setup_timer: HZ is too small, cannot configure timer!");
  153. return 0;
  154. }
  155. #endif
  156. __raw_writel(tcnt, S3C2410_TCNTB(channel));
  157. __raw_writel(tcmp, S3C2410_TCMPB(channel));
  158. switch(channel)
  159. {
  160. case 0:
  161. tcon |= S3C2410_TCON_T0MANUALUPD;
  162. break;
  163. case 1:
  164. tcon |= S3C2410_TCON_T1MANUALUPD;
  165. break;
  166. case 2:
  167. tcon |= S3C2410_TCON_T2MANUALUPD;
  168. break;
  169. case 3:
  170. tcon |= S3C2410_TCON_T3MANUALUPD;
  171. break;
  172. }
  173. __raw_writel(tcon, S3C2410_TCON);
  174. tcnt = g_tcnt;
  175. __raw_writel(tcnt, S3C2410_TCNTB(channel));
  176. tcmp = g_tcmp;
  177. __raw_writel(tcmp, S3C2410_TCMPB(channel));
  178. /* start the timer running */
  179. s3c2450_pwm_start (channel);
  180. return 0;
  181. }
  182. static irqreturn_t s3c2450_pwm_irq(int irq, void *devpw)
  183. {
  184. s3c2450_pwm_chan_t *chan = (s3c2450_pwm_chan_t *)devpw;
  185. void *dev=chan->dev;
  186. /* modify the channel state */
  187. s3c2450_pwm_buffdone(chan, dev);
  188. return IRQ_HANDLED;
  189. }
  190. int s3c2450_pwm_request(pwmch_t channel, s3c_pwm_client_t *client, void *dev)
  191. {
  192. s3c2450_pwm_chan_t *chan = &s3c_chans[channel];
  193. unsigned long flags;
  194. int err;
  195. pr_debug("pwm%d: s3c_request_pwm: client=%s, dev=%p\n",
  196. channel, client->name, dev);
  197. local_irq_save(flags);
  198. if (chan->in_use) {
  199. if (client != chan->client) {
  200. printk(KERN_ERR "pwm%d: already in use\n", channel);
  201. local_irq_restore(flags);
  202. return -EBUSY;
  203. } else {
  204. printk(KERN_ERR "pwm%d: client already has channel\n", channel);
  205. }
  206. }
  207. chan->client = client;
  208. chan->in_use = 1;
  209. chan->dev = dev;
  210. if (!chan->irq_claimed) {
  211. pr_debug("pwm%d: %s : requesting irq %d\n",
  212. channel, __FUNCTION__, chan->irq);
  213. err = request_irq(chan->irq, s3c2450_pwm_irq, SA_INTERRUPT,
  214. client->name, (void *)chan);
  215. if (err) {
  216. chan->in_use = 0;
  217. local_irq_restore(flags);
  218. printk(KERN_ERR "%s: cannot get IRQ %d for PWM %d\n",
  219. client->name, chan->irq, chan->number);
  220. return err;
  221. }
  222. chan->irq_claimed = 1;
  223. chan->irq_enabled = 1;
  224. }
  225. local_irq_restore(flags);
  226. /* need to setup */
  227. pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan);
  228. return 0;
  229. }
  230. int s3c2450_pwm_free (pwmch_t channel, s3c_pwm_client_t *client)
  231. {
  232. s3c2450_pwm_chan_t *chan = &s3c_chans[channel];
  233. unsigned long flags;
  234. local_irq_save(flags);
  235. if (chan->client != client) {
  236. printk(KERN_WARNING "pwm%d: possible free from different client (channel %p, passed %p)\n",
  237. channel, chan->client, client);
  238. }
  239. /* sort out stopping and freeing the channel */
  240. chan->client = NULL;
  241. chan->in_use = 0;
  242. if (chan->irq_claimed)
  243. free_irq(chan->irq, (void *)chan);
  244. chan->irq_claimed = 0;
  245. local_irq_restore(flags);
  246. return 0;
  247. }
  248. int s3c2450_pwm_set_buffdone_fn(pwmch_t channel, s3c_pwm_cbfn_t rtn)
  249. {
  250. s3c2450_pwm_chan_t *chan = &s3c_chans[channel];
  251. pr_debug("%s: chan=%d, callback rtn=%p\n", __FUNCTION__, channel, rtn);
  252. chan->callback_fn = rtn;
  253. return 0;
  254. }
  255. #define s3c2450_pwm_suspend NULL
  256. #define s3c2450_pwm_resume NULL
  257. struct sysdev_class pwm_sysclass = {
  258. set_kset_name("s3c-pwm"),
  259. .suspend = s3c2450_pwm_suspend,
  260. .resume = s3c2450_pwm_resume,
  261. };
  262. /* initialisation code */
  263. static int __init s3c2450_init_pwm(void)
  264. {
  265. s3c2450_pwm_chan_t *cp;
  266. int channel;
  267. int ret;
  268. printk("S3C PWM Driver, (c) 2006-2007 Samsung Electronics\n");
  269. ret = sysdev_class_register(&pwm_sysclass);
  270. if (ret != 0) {
  271. printk(KERN_ERR "pwm sysclass registration failed\n");
  272. return -ENODEV;
  273. }
  274. for (channel = 0; channel < S3C_PWM_CHANNELS; channel++) {
  275. cp = &s3c_chans[channel];
  276. memset(cp, 0, sizeof(s3c2450_pwm_chan_t));
  277. cp->number = channel;
  278. /* pwm channel irqs are in order.. */
  279. cp->irq = channel + IRQ_TIMER0;
  280. /* register system device */
  281. ret = sysdev_register(&cp->sysdev);
  282. pr_debug("PWM channel %d , irq %d\n",
  283. cp->number, cp->irq);
  284. }
  285. // s3c2450_timer_setup(3,10,1000,200);
  286. return ret;
  287. }
  288. __initcall(s3c2450_init_pwm);