pwm-s3c2443.c 8.1 KB

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  1. /* linux/arch/arm/mach-s3c64xx/pwm.c
  2. *
  3. * (c) 2003-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C64XX PWM core
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Changelog:
  13. * This file is based on the Sangwook Lee/Samsung patches, re-written due
  14. * to various ommisions from the code (such as flexible pwm configuration)
  15. * for use with the BAST system board.
  16. *
  17. *
  18. */
  19. #include <linux/errno.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/slab.h>
  23. #include <linux/input.h>
  24. #include <linux/init.h>
  25. #include <linux/serio.h>
  26. #include <linux/delay.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/miscdevice.h>
  29. #include <linux/clk.h>
  30. #include <linux/mutex.h>
  31. #include <asm/io.h>
  32. #include <asm/irq.h>
  33. #include <asm/hardware.h>
  34. #include <asm/uaccess.h>
  35. #include <asm/arch/regs-timer.h>
  36. #include <asm/arch/regs-gpio.h>
  37. #include <asm/arch/irqs.h>
  38. #include "pwm-s3c2443.h"
  39. s3c2443_pwm_chan_t s3c_chans[S3C_PWM_CHANNELS];
  40. static inline void
  41. s3c2443_pwm_buffdone(s3c2443_pwm_chan_t *chan, void *dev)
  42. {
  43. if (chan->callback_fn != NULL) {
  44. (chan->callback_fn)( dev);
  45. }
  46. }
  47. static int s3c2443_pwm_start (int channel)
  48. {
  49. unsigned long tcon;
  50. tcon = __raw_readl(S3C2410_TCON);
  51. switch(channel)
  52. {
  53. case 0:
  54. tcon |= S3C2410_TCON_T0START;
  55. tcon &= ~S3C2410_TCON_T0MANUALUPD;
  56. break;
  57. case 1:
  58. tcon |= S3C2410_TCON_T1START;
  59. tcon &= ~S3C2410_TCON_T1MANUALUPD;
  60. break;
  61. case 2:
  62. tcon |= S3C2410_TCON_T2START;
  63. tcon &= ~S3C2410_TCON_T2MANUALUPD;
  64. break;
  65. case 3:
  66. tcon |= S3C2410_TCON_T3START;
  67. tcon &= ~S3C2410_TCON_T3MANUALUPD;
  68. break;
  69. }
  70. __raw_writel(tcon, S3C2410_TCON);
  71. return 0;
  72. }
  73. int s3c2443_timer_setup (int channel, int usec, unsigned long g_tcnt, unsigned long g_tcmp)
  74. {
  75. unsigned long tcon;
  76. unsigned long tcnt;
  77. unsigned long tcmp;
  78. unsigned long tcfg1;
  79. unsigned long tcfg0;
  80. unsigned long pclk;
  81. struct clk *clk;
  82. printk("\n\nPWM channel %d set g_tcnt = %ld, g_tcmp = %ld \n\n", channel, g_tcnt, g_tcmp);
  83. tcnt = 0xffffffff; /* default value for tcnt */
  84. /* read the current timer configuration bits */
  85. tcon = __raw_readl(S3C2410_TCON);
  86. tcfg1 = __raw_readl(S3C2410_TCFG1);
  87. tcfg0 = __raw_readl(S3C2410_TCFG0);
  88. clk = clk_get(NULL, "timers");
  89. if (IS_ERR(clk))
  90. panic("failed to get clock for pwm timer");
  91. clk_enable(clk);
  92. pclk = clk_get_rate(clk);
  93. /* configure clock tick */
  94. switch(channel)
  95. {
  96. case 0:
  97. /* set gpio as PWM TIMER0 to signal output*/
  98. s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPB0_TOUT0);
  99. s3c2410_gpio_setpin(S3C2410_GPB0, 0);
  100. tcfg1 &= ~S3C2410_TCFG1_MUX0_MASK;
  101. tcfg1 |= S3C2410_TCFG1_MUX0_DIV2;
  102. tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
  103. tcfg0 |= (4) << 0;
  104. tcon &= ~(7<<0);
  105. tcon |= S3C2410_TCON_T0RELOAD;
  106. break;
  107. case 1:
  108. /* set gpio as PWM TIMER1 to signal output*/
  109. s3c2410_gpio_cfgpin(S3C2410_GPB1, S3C2410_GPB1_TOUT1);
  110. s3c2410_gpio_setpin(S3C2410_GPB1, 0);
  111. tcfg1 &= ~S3C2410_TCFG1_MUX1_MASK;
  112. tcfg1 |= S3C2410_TCFG1_MUX1_DIV2;
  113. tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
  114. tcfg0 |= (4) << 0;
  115. tcon &= ~(7<<8);
  116. tcon |= S3C2410_TCON_T1RELOAD;
  117. break;
  118. case 2:
  119. s3c2410_gpio_cfgpin(S3C2410_GPB2, S3C2410_GPB2_TOUT2);
  120. s3c2410_gpio_setpin(S3C2410_GPB2, 0);
  121. tcfg1 &= ~S3C2410_TCFG1_MUX2_MASK;
  122. tcfg1 |= S3C2410_TCFG1_MUX2_DIV2;
  123. tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
  124. tcfg0 |= (4) << S3C2410_TCFG_PRESCALER1_SHIFT;
  125. tcon &= ~(7<<12);
  126. tcon |= S3C2410_TCON_T2RELOAD;
  127. break;
  128. case 3:
  129. s3c2410_gpio_cfgpin(S3C2410_GPB3, S3C2410_GPB3_TOUT3);
  130. s3c2410_gpio_setpin(S3C2410_GPB3, 0);
  131. tcfg1 &= ~S3C2410_TCFG1_MUX3_MASK;
  132. tcfg1 |= S3C2410_TCFG1_MUX3_DIV2;
  133. tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
  134. tcfg0 |= (4) << S3C2410_TCFG_PRESCALER1_SHIFT;
  135. tcon &= ~(7<<16);
  136. tcon |= S3C2410_TCON_T3RELOAD;
  137. break;
  138. }
  139. #if 0
  140. tcnt = (pclk / ((PRESCALER)*DIVIDER)) / usec;
  141. printk("s3c6400 pwm timer tcnt=0x%08lx, pclk=0x%08lx, PRESCALER=%d, DIVIDER=%d, usec=%d\n",
  142. tcnt, pclk, PRESCALER, DIVIDER, usec);
  143. /* timers reload after counting zero, so reduce the count by 1 */
  144. tcnt--;
  145. #endif
  146. __raw_writel(tcfg1, S3C2410_TCFG1);
  147. __raw_writel(tcfg0, S3C2410_TCFG0);
  148. __raw_writel(tcon, S3C2410_TCON);
  149. tcnt = 160;
  150. if (tcnt > 0xffffffff) {
  151. panic("setup_timer: HZ is too small, cannot configure timer!");
  152. return 0;
  153. }
  154. __raw_writel(tcnt, S3C2410_TCNTB(channel));
  155. tcmp = 110;
  156. __raw_writel(tcmp, S3C2410_TCMPB(channel));
  157. switch(channel)
  158. {
  159. case 0:
  160. tcon |= S3C2410_TCON_T0MANUALUPD;
  161. break;
  162. case 1:
  163. tcon |= S3C2410_TCON_T1MANUALUPD;
  164. break;
  165. case 2:
  166. tcon |= S3C2410_TCON_T2MANUALUPD;
  167. break;
  168. case 3:
  169. tcon |= S3C2410_TCON_T3MANUALUPD;
  170. break;
  171. }
  172. __raw_writel(tcon, S3C2410_TCON);
  173. tcnt = g_tcnt;
  174. __raw_writel(tcnt, S3C2410_TCNTB(channel));
  175. tcmp = g_tcmp;
  176. __raw_writel(tcmp, S3C2410_TCMPB(channel));
  177. /* start the timer running */
  178. s3c2443_pwm_start (channel);
  179. return 0;
  180. }
  181. static irqreturn_t s3c2443_pwm_irq(int irq, void *devpw)
  182. {
  183. s3c2443_pwm_chan_t *chan = (s3c2443_pwm_chan_t *)devpw;
  184. void *dev=chan->dev;
  185. /* modify the channel state */
  186. s3c2443_pwm_buffdone(chan, dev);
  187. return IRQ_HANDLED;
  188. }
  189. int s3c2443_pwm_request(pwmch_t channel, s3c_pwm_client_t *client, void *dev)
  190. {
  191. s3c2443_pwm_chan_t *chan = &s3c_chans[channel];
  192. unsigned long flags;
  193. int err;
  194. pr_debug("pwm%d: s3c_request_pwm: client=%s, dev=%p\n",
  195. channel, client->name, dev);
  196. local_irq_save(flags);
  197. if (chan->in_use) {
  198. if (client != chan->client) {
  199. printk(KERN_ERR "pwm%d: already in use\n", channel);
  200. local_irq_restore(flags);
  201. return -EBUSY;
  202. } else {
  203. printk(KERN_ERR "pwm%d: client already has channel\n", channel);
  204. }
  205. }
  206. chan->client = client;
  207. chan->in_use = 1;
  208. chan->dev = dev;
  209. if (!chan->irq_claimed) {
  210. pr_debug("pwm%d: %s : requesting irq %d\n",
  211. channel, __FUNCTION__, chan->irq);
  212. err = request_irq(chan->irq, s3c2443_pwm_irq, SA_INTERRUPT,
  213. client->name, (void *)chan);
  214. if (err) {
  215. chan->in_use = 0;
  216. local_irq_restore(flags);
  217. printk(KERN_ERR "%s: cannot get IRQ %d for PWM %d\n",
  218. client->name, chan->irq, chan->number);
  219. return err;
  220. }
  221. chan->irq_claimed = 1;
  222. chan->irq_enabled = 1;
  223. }
  224. local_irq_restore(flags);
  225. /* need to setup */
  226. pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan);
  227. return 0;
  228. }
  229. int s3c2443_pwm_free (pwmch_t channel, s3c_pwm_client_t *client)
  230. {
  231. s3c2443_pwm_chan_t *chan = &s3c_chans[channel];
  232. unsigned long flags;
  233. local_irq_save(flags);
  234. if (chan->client != client) {
  235. printk(KERN_WARNING "pwm%d: possible free from different client (channel %p, passed %p)\n",
  236. channel, chan->client, client);
  237. }
  238. /* sort out stopping and freeing the channel */
  239. chan->client = NULL;
  240. chan->in_use = 0;
  241. if (chan->irq_claimed)
  242. free_irq(chan->irq, (void *)chan);
  243. chan->irq_claimed = 0;
  244. local_irq_restore(flags);
  245. return 0;
  246. }
  247. int s3c2443_pwm_set_buffdone_fn(pwmch_t channel, s3c_pwm_cbfn_t rtn)
  248. {
  249. s3c2443_pwm_chan_t *chan = &s3c_chans[channel];
  250. pr_debug("%s: chan=%d, callback rtn=%p\n", __FUNCTION__, channel, rtn);
  251. chan->callback_fn = rtn;
  252. return 0;
  253. }
  254. #define s3c2443_pwm_suspend NULL
  255. #define s3c2443_pwm_resume NULL
  256. struct sysdev_class pwm_sysclass = {
  257. set_kset_name("s3c-pwm"),
  258. .suspend = s3c2443_pwm_suspend,
  259. .resume = s3c2443_pwm_resume,
  260. };
  261. /* initialisation code */
  262. static int __init s3c2443_init_pwm(void)
  263. {
  264. s3c2443_pwm_chan_t *cp;
  265. int channel;
  266. int ret;
  267. printk("S3C PWM Driver, (c) 2006-2007 Samsung Electronics\n");
  268. ret = sysdev_class_register(&pwm_sysclass);
  269. if (ret != 0) {
  270. printk(KERN_ERR "pwm sysclass registration failed\n");
  271. return -ENODEV;
  272. }
  273. for (channel = 0; channel < S3C_PWM_CHANNELS; channel++) {
  274. cp = &s3c_chans[channel];
  275. memset(cp, 0, sizeof(s3c2443_pwm_chan_t));
  276. cp->number = channel;
  277. /* pwm channel irqs are in order.. */
  278. cp->irq = channel + IRQ_TIMER0;
  279. /* register system device */
  280. ret = sysdev_register(&cp->sysdev);
  281. pr_debug("PWM channel %d , irq %d\n",
  282. cp->number, cp->irq);
  283. }
  284. // s3c2443_timer_setup(3,10,1000,200);
  285. return ret;
  286. }
  287. __initcall(s3c2443_init_pwm);