pxa2xx_base.c 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259
  1. /*======================================================================
  2. Device driver for the PCMCIA control functionality of PXA2xx
  3. microprocessors.
  4. The contents of this file may be used under the
  5. terms of the GNU Public License version 2 (the "GPL")
  6. (c) Ian Molton (spyro@f2s.com) 2003
  7. (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
  8. derived from sa11xx_base.c
  9. Portions created by John G. Dorsey are
  10. Copyright (C) 1999 John G. Dorsey.
  11. ======================================================================*/
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/cpufreq.h>
  15. #include <linux/ioport.h>
  16. #include <linux/kernel.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/platform_device.h>
  19. #include <asm/hardware.h>
  20. #include <asm/io.h>
  21. #include <asm/irq.h>
  22. #include <asm/system.h>
  23. #include <asm/arch/pxa-regs.h>
  24. #include <pcmcia/cs_types.h>
  25. #include <pcmcia/ss.h>
  26. #include <pcmcia/bulkmem.h>
  27. #include <pcmcia/cistpl.h>
  28. #include "cs_internal.h"
  29. #include "soc_common.h"
  30. #include "pxa2xx_base.h"
  31. #define MCXX_SETUP_MASK (0x7f)
  32. #define MCXX_ASST_MASK (0x1f)
  33. #define MCXX_HOLD_MASK (0x3f)
  34. #define MCXX_SETUP_SHIFT (0)
  35. #define MCXX_ASST_SHIFT (7)
  36. #define MCXX_HOLD_SHIFT (14)
  37. static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
  38. u_int mem_clk_10khz)
  39. {
  40. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  41. return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
  42. }
  43. static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
  44. u_int mem_clk_10khz)
  45. {
  46. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  47. return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
  48. }
  49. static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
  50. u_int mem_clk_10khz)
  51. {
  52. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  53. return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
  54. }
  55. /* This function returns the (approximate) command assertion period, in
  56. * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
  57. */
  58. static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
  59. u_int pcmcia_mcxx_asst)
  60. {
  61. return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
  62. }
  63. static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
  64. {
  65. MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  66. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  67. | ((pxa2xx_mcxx_asst(speed, clock)
  68. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  69. | ((pxa2xx_mcxx_hold(speed, clock)
  70. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  71. return 0;
  72. }
  73. static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
  74. {
  75. MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  76. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  77. | ((pxa2xx_mcxx_asst(speed, clock)
  78. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  79. | ((pxa2xx_mcxx_hold(speed, clock)
  80. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  81. return 0;
  82. }
  83. static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
  84. {
  85. MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  86. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  87. | ((pxa2xx_mcxx_asst(speed, clock)
  88. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  89. | ((pxa2xx_mcxx_hold(speed, clock)
  90. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  91. return 0;
  92. }
  93. static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
  94. {
  95. struct soc_pcmcia_timing timing;
  96. int sock = skt->nr;
  97. soc_common_pcmcia_get_timing(skt, &timing);
  98. pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
  99. pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
  100. pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
  101. return 0;
  102. }
  103. static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
  104. {
  105. unsigned int clk = get_memclk_frequency_10khz();
  106. return pxa2xx_pcmcia_set_mcxx(skt, clk);
  107. }
  108. #ifdef CONFIG_CPU_FREQ
  109. static int
  110. pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
  111. unsigned long val,
  112. struct cpufreq_freqs *freqs)
  113. {
  114. #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
  115. switch (val) {
  116. case CPUFREQ_PRECHANGE:
  117. if (freqs->new > freqs->old) {
  118. debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
  119. "pre-updating\n",
  120. freqs->new / 1000, (freqs->new / 100) % 10,
  121. freqs->old / 1000, (freqs->old / 100) % 10);
  122. pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
  123. }
  124. break;
  125. case CPUFREQ_POSTCHANGE:
  126. if (freqs->new < freqs->old) {
  127. debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
  128. "post-updating\n",
  129. freqs->new / 1000, (freqs->new / 100) % 10,
  130. freqs->old / 1000, (freqs->old / 100) % 10);
  131. pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
  132. }
  133. break;
  134. }
  135. return 0;
  136. }
  137. #endif
  138. int __pxa2xx_drv_pcmcia_probe(struct device *dev)
  139. {
  140. int ret;
  141. struct pcmcia_low_level *ops;
  142. int first, nr;
  143. if (!dev || !dev->platform_data)
  144. return -ENODEV;
  145. ops = (struct pcmcia_low_level *)dev->platform_data;
  146. first = ops->first;
  147. nr = ops->nr;
  148. /* Provide our PXA2xx specific timing routines. */
  149. ops->set_timing = pxa2xx_pcmcia_set_timing;
  150. #ifdef CONFIG_CPU_FREQ
  151. ops->frequency_change = pxa2xx_pcmcia_frequency_change;
  152. #endif
  153. ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr);
  154. if (ret == 0) {
  155. /*
  156. * We have at least one socket, so set MECR:CIT
  157. * (Card Is There)
  158. */
  159. MECR |= MECR_CIT;
  160. /* Set MECR:NOS (Number Of Sockets) */
  161. if (nr > 1)
  162. MECR |= MECR_NOS;
  163. else
  164. MECR &= ~MECR_NOS;
  165. }
  166. return ret;
  167. }
  168. EXPORT_SYMBOL(__pxa2xx_drv_pcmcia_probe);
  169. static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
  170. {
  171. return __pxa2xx_drv_pcmcia_probe(&dev->dev);
  172. }
  173. static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
  174. {
  175. return soc_common_drv_pcmcia_remove(&dev->dev);
  176. }
  177. static int pxa2xx_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state)
  178. {
  179. return pcmcia_socket_dev_suspend(&dev->dev, state);
  180. }
  181. static int pxa2xx_drv_pcmcia_resume(struct platform_device *dev)
  182. {
  183. struct pcmcia_low_level *ops = dev->dev.platform_data;
  184. int nr = ops ? ops->nr : 0;
  185. MECR = nr > 1 ? MECR_CIT | MECR_NOS : (nr > 0 ? MECR_CIT : 0);
  186. return pcmcia_socket_dev_resume(&dev->dev);
  187. }
  188. static struct platform_driver pxa2xx_pcmcia_driver = {
  189. .probe = pxa2xx_drv_pcmcia_probe,
  190. .remove = pxa2xx_drv_pcmcia_remove,
  191. .suspend = pxa2xx_drv_pcmcia_suspend,
  192. .resume = pxa2xx_drv_pcmcia_resume,
  193. .driver = {
  194. .name = "pxa2xx-pcmcia",
  195. },
  196. };
  197. static int __init pxa2xx_pcmcia_init(void)
  198. {
  199. return platform_driver_register(&pxa2xx_pcmcia_driver);
  200. }
  201. static void __exit pxa2xx_pcmcia_exit(void)
  202. {
  203. platform_driver_unregister(&pxa2xx_pcmcia_driver);
  204. }
  205. fs_initcall(pxa2xx_pcmcia_init);
  206. module_exit(pxa2xx_pcmcia_exit);
  207. MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
  208. MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
  209. MODULE_LICENSE("GPL");