hd64465_ss.c 24 KB

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  1. /*
  2. * $Id: hd64465_ss.c,v 1.1.1.1 2007/06/12 07:27:09 eyryu Exp $
  3. *
  4. * Device driver for the PCMCIA controller module of the
  5. * Hitachi HD64465 handheld companion chip.
  6. *
  7. * Note that the HD64465 provides a very thin PCMCIA host bridge
  8. * layer, requiring a lot of the work of supporting cards to be
  9. * performed by the processor. For example: mapping of card
  10. * interrupts to processor IRQs is done by IRQ demuxing software;
  11. * IO and memory mappings are fixed; setting voltages according
  12. * to card Voltage Select pins etc is done in software.
  13. *
  14. * Note also that this driver uses only the simple, fixed,
  15. * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
  16. * HD64465. Larger mappings, smaller mappings, or mappings of
  17. * different width to the same socket, are all possible only by
  18. * involving the SH7750's MMU, which is considered unnecessary here.
  19. * The downside is that it may be possible for some drivers to
  20. * break because they need or expect 8-bit mappings.
  21. *
  22. * This driver currently supports only the following configuration:
  23. * SH7750 CPU, HD64465, TPS2206 voltage control chip.
  24. *
  25. * by Greg Banks <gbanks@pocketpenguins.com>
  26. * (c) 2000 PocketPenguins Inc
  27. */
  28. #include <linux/types.h>
  29. #include <linux/module.h>
  30. #include <linux/init.h>
  31. #include <linux/string.h>
  32. #include <linux/kernel.h>
  33. #include <linux/ioport.h>
  34. #include <linux/mm.h>
  35. #include <linux/vmalloc.h>
  36. #include <asm/errno.h>
  37. #include <linux/irq.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/platform_device.h>
  40. #include <asm/io.h>
  41. #include <asm/hd64465/hd64465.h>
  42. #include <asm/hd64465/io.h>
  43. #include <pcmcia/cs_types.h>
  44. #include <pcmcia/cs.h>
  45. #include <pcmcia/cistpl.h>
  46. #include <pcmcia/ds.h>
  47. #include <pcmcia/ss.h>
  48. #include <pcmcia/bulkmem.h>
  49. #include "cs_internal.h"
  50. #define MODNAME "hd64465_ss"
  51. /* #define HD64465_DEBUG 1 */
  52. #if HD64465_DEBUG
  53. #define DPRINTK(args...) printk(MODNAME ": " args)
  54. #else
  55. #define DPRINTK(args...)
  56. #endif
  57. extern int hd64465_io_debug;
  58. extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
  59. extern void p3_iounmap(void *addr);
  60. /*============================================================*/
  61. #define HS_IO_MAP_SIZE (64*1024)
  62. typedef struct hs_socket_t
  63. {
  64. unsigned int number;
  65. u_int irq;
  66. u_long mem_base;
  67. void *io_base;
  68. u_long mem_length;
  69. u_int ctrl_base;
  70. socket_state_t state;
  71. pccard_io_map io_maps[MAX_IO_WIN];
  72. pccard_mem_map mem_maps[MAX_WIN];
  73. struct pcmcia_socket socket;
  74. } hs_socket_t;
  75. #define HS_MAX_SOCKETS 2
  76. static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
  77. #define hs_in(sp, r) inb((sp)->ctrl_base + (r))
  78. #define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
  79. /* translate a boolean value to a bit in a register */
  80. #define bool_to_regbit(sp, r, bi, bo) \
  81. do { \
  82. unsigned short v = hs_in(sp, r); \
  83. if (bo) \
  84. v |= (bi); \
  85. else \
  86. v &= ~(bi); \
  87. hs_out(sp, v, r); \
  88. } while(0)
  89. /* register offsets from HD64465_REG_PCC[01]ISR */
  90. #define ISR 0x0
  91. #define GCR 0x2
  92. #define CSCR 0x4
  93. #define CSCIER 0x6
  94. #define SCR 0x8
  95. /* Mask and values for CSCIER register */
  96. #define IER_MASK 0x80
  97. #define IER_ON 0x3f /* interrupts on */
  98. #define IER_OFF 0x00 /* interrupts off */
  99. /*============================================================*/
  100. #if HD64465_DEBUG > 10
  101. static void cis_hex_dump(const unsigned char *x, int len)
  102. {
  103. int i;
  104. for (i=0 ; i<len ; i++)
  105. {
  106. if (!(i & 0xf))
  107. printk("\n%08x", (unsigned)(x + i));
  108. printk(" %02x", *(volatile unsigned short*)x);
  109. x += 2;
  110. }
  111. printk("\n");
  112. }
  113. #endif
  114. /*============================================================*/
  115. /*
  116. * This code helps create the illusion that the IREQ line from
  117. * the PC card is mapped to one of the CPU's IRQ lines by the
  118. * host bridge hardware (which is how every host bridge *except*
  119. * the HD64465 works). In particular, it supports enabling
  120. * and disabling the IREQ line by code which knows nothing
  121. * about the host bridge (e.g. device drivers, IDE code) using
  122. * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
  123. * functions. Also, it supports sharing the mapped IRQ with
  124. * real hardware IRQs from the -IRL0-3 lines.
  125. */
  126. #define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
  127. static struct
  128. {
  129. /* index is mapped irq number */
  130. hs_socket_t *sock;
  131. hw_irq_controller *old_handler;
  132. } hs_mapped_irq[HS_NUM_MAPPED_IRQS];
  133. static void hs_socket_enable_ireq(hs_socket_t *sp)
  134. {
  135. unsigned short cscier;
  136. DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
  137. cscier = hs_in(sp, CSCIER);
  138. cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
  139. cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
  140. hs_out(sp, cscier, CSCIER);
  141. }
  142. static void hs_socket_disable_ireq(hs_socket_t *sp)
  143. {
  144. unsigned short cscier;
  145. DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
  146. cscier = hs_in(sp, CSCIER);
  147. cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
  148. hs_out(sp, cscier, CSCIER);
  149. }
  150. static unsigned int hs_startup_irq(unsigned int irq)
  151. {
  152. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  153. hs_mapped_irq[irq].old_handler->startup(irq);
  154. return 0;
  155. }
  156. static void hs_shutdown_irq(unsigned int irq)
  157. {
  158. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  159. hs_mapped_irq[irq].old_handler->shutdown(irq);
  160. }
  161. static void hs_enable_irq(unsigned int irq)
  162. {
  163. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  164. hs_mapped_irq[irq].old_handler->enable(irq);
  165. }
  166. static void hs_disable_irq(unsigned int irq)
  167. {
  168. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  169. hs_mapped_irq[irq].old_handler->disable(irq);
  170. }
  171. extern struct hw_interrupt_type no_irq_type;
  172. static void hs_mask_and_ack_irq(unsigned int irq)
  173. {
  174. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  175. /* ack_none() spuriously complains about an unexpected IRQ */
  176. if (hs_mapped_irq[irq].old_handler != &no_irq_type)
  177. hs_mapped_irq[irq].old_handler->ack(irq);
  178. }
  179. static void hs_end_irq(unsigned int irq)
  180. {
  181. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  182. hs_mapped_irq[irq].old_handler->end(irq);
  183. }
  184. static struct hw_interrupt_type hd64465_ss_irq_type = {
  185. .typename = "PCMCIA-IRQ",
  186. .startup = hs_startup_irq,
  187. .shutdown = hs_shutdown_irq,
  188. .enable = hs_enable_irq,
  189. .disable = hs_disable_irq,
  190. .ack = hs_mask_and_ack_irq,
  191. .end = hs_end_irq
  192. };
  193. /*
  194. * This function should only ever be called with interrupts disabled.
  195. */
  196. static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
  197. {
  198. DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
  199. if (irq >= HS_NUM_MAPPED_IRQS)
  200. return;
  201. hs_mapped_irq[irq].sock = sp;
  202. /* insert ourselves as the irq controller */
  203. hs_mapped_irq[irq].old_handler = irq_desc[irq].chip;
  204. irq_desc[irq].chip = &hd64465_ss_irq_type;
  205. }
  206. /*
  207. * This function should only ever be called with interrupts disabled.
  208. */
  209. static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
  210. {
  211. DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
  212. if (irq >= HS_NUM_MAPPED_IRQS)
  213. return;
  214. /* restore the original irq controller */
  215. irq_desc[irq].chip = hs_mapped_irq[irq].old_handler;
  216. }
  217. /*============================================================*/
  218. /*
  219. * Set Vpp and Vcc (in tenths of a Volt). Does not
  220. * support the hi-Z state.
  221. *
  222. * Note, this assumes the board uses a TPS2206 chip to control
  223. * the Vcc and Vpp voltages to the hs_sockets. If your board
  224. * uses the MIC2563 (also supported by the HD64465) then you
  225. * will have to modify this function.
  226. */
  227. /* 0V 3.3V 5.5V */
  228. static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
  229. static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
  230. static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
  231. {
  232. u_int psr;
  233. u_int vcci = 0;
  234. u_int sock = sp->number;
  235. DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
  236. switch (Vcc)
  237. {
  238. case 0: vcci = 0; break;
  239. case 33: vcci = 1; break;
  240. case 50: vcci = 2; break;
  241. default: return 0;
  242. }
  243. /* Note: Vpp = 120 not supported -- Greg Banks */
  244. if (Vpp != 0 && Vpp != Vcc)
  245. return 0;
  246. /* The PSR register holds 8 of the 9 bits which control
  247. * the TPS2206 via its serial interface.
  248. */
  249. psr = inw(HD64465_REG_PCCPSR);
  250. switch (sock)
  251. {
  252. case 0:
  253. psr &= 0x0f;
  254. psr |= hs_tps2206_avcc[vcci];
  255. psr |= (Vpp == 0 ? 0x00 : 0x02);
  256. break;
  257. case 1:
  258. psr &= 0xf0;
  259. psr |= hs_tps2206_bvcc[vcci];
  260. psr |= (Vpp == 0 ? 0x00 : 0x20);
  261. break;
  262. };
  263. outw(psr, HD64465_REG_PCCPSR);
  264. return 1;
  265. }
  266. /*============================================================*/
  267. /*
  268. * Drive the RESET line to the card.
  269. */
  270. static void hs_reset_socket(hs_socket_t *sp, int on)
  271. {
  272. unsigned short v;
  273. v = hs_in(sp, GCR);
  274. if (on)
  275. v |= HD64465_PCCGCR_PCCR;
  276. else
  277. v &= ~HD64465_PCCGCR_PCCR;
  278. hs_out(sp, v, GCR);
  279. }
  280. /*============================================================*/
  281. static int hs_init(struct pcmcia_socket *s)
  282. {
  283. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  284. DPRINTK("hs_init(%d)\n", sp->number);
  285. return 0;
  286. }
  287. /*============================================================*/
  288. static int hs_get_status(struct pcmcia_socket *s, u_int *value)
  289. {
  290. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  291. unsigned int isr;
  292. u_int status = 0;
  293. isr = hs_in(sp, ISR);
  294. /* Card is seated and powered when *both* CD pins are low */
  295. if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
  296. {
  297. status |= SS_DETECT; /* card present */
  298. switch (isr & HD64465_PCCISR_PBVD_MASK)
  299. {
  300. case HD64465_PCCISR_PBVD_BATGOOD:
  301. break;
  302. case HD64465_PCCISR_PBVD_BATWARN:
  303. status |= SS_BATWARN;
  304. break;
  305. default:
  306. status |= SS_BATDEAD;
  307. break;
  308. }
  309. if (isr & HD64465_PCCISR_PREADY)
  310. status |= SS_READY;
  311. if (isr & HD64465_PCCISR_PMWP)
  312. status |= SS_WRPROT;
  313. /* Voltage Select pins interpreted as per Table 4-5 of the std.
  314. * Assuming we have the TPS2206, the socket is a "Low Voltage
  315. * key, 3.3V and 5V available, no X.XV available".
  316. */
  317. switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
  318. {
  319. case HD64465_PCCISR_PVS1:
  320. printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
  321. status = 0;
  322. break;
  323. case 0:
  324. case HD64465_PCCISR_PVS2:
  325. /* 3.3V */
  326. status |= SS_3VCARD;
  327. break;
  328. case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
  329. /* 5V */
  330. break;
  331. }
  332. /* TODO: SS_POWERON */
  333. /* TODO: SS_STSCHG */
  334. }
  335. DPRINTK("hs_get_status(%d) = %x\n", sock, status);
  336. *value = status;
  337. return 0;
  338. }
  339. /*============================================================*/
  340. static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
  341. {
  342. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  343. u_long flags;
  344. u_int changed;
  345. unsigned short cscier;
  346. DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
  347. sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
  348. local_irq_save(flags); /* Don't want interrupts happening here */
  349. if (state->Vpp != sp->state.Vpp ||
  350. state->Vcc != sp->state.Vcc) {
  351. if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
  352. local_irq_restore(flags);
  353. return -EINVAL;
  354. }
  355. }
  356. /* hd64465_io_debug = 1; */
  357. /*
  358. * Handle changes in the Card Status Change mask,
  359. * by propagating to the CSCR register
  360. */
  361. changed = sp->state.csc_mask ^ state->csc_mask;
  362. cscier = hs_in(sp, CSCIER);
  363. if (changed & SS_DETECT) {
  364. if (state->csc_mask & SS_DETECT)
  365. cscier |= HD64465_PCCCSCIER_PCDE;
  366. else
  367. cscier &= ~HD64465_PCCCSCIER_PCDE;
  368. }
  369. if (changed & SS_READY) {
  370. if (state->csc_mask & SS_READY)
  371. cscier |= HD64465_PCCCSCIER_PRE;
  372. else
  373. cscier &= ~HD64465_PCCCSCIER_PRE;
  374. }
  375. if (changed & SS_BATDEAD) {
  376. if (state->csc_mask & SS_BATDEAD)
  377. cscier |= HD64465_PCCCSCIER_PBDE;
  378. else
  379. cscier &= ~HD64465_PCCCSCIER_PBDE;
  380. }
  381. if (changed & SS_BATWARN) {
  382. if (state->csc_mask & SS_BATWARN)
  383. cscier |= HD64465_PCCCSCIER_PBWE;
  384. else
  385. cscier &= ~HD64465_PCCCSCIER_PBWE;
  386. }
  387. if (changed & SS_STSCHG) {
  388. if (state->csc_mask & SS_STSCHG)
  389. cscier |= HD64465_PCCCSCIER_PSCE;
  390. else
  391. cscier &= ~HD64465_PCCCSCIER_PSCE;
  392. }
  393. hs_out(sp, cscier, CSCIER);
  394. if (sp->state.io_irq && !state->io_irq)
  395. hs_unmap_irq(sp, sp->state.io_irq);
  396. else if (!sp->state.io_irq && state->io_irq)
  397. hs_map_irq(sp, state->io_irq);
  398. /*
  399. * Handle changes in the flags field,
  400. * by propagating to config registers.
  401. */
  402. changed = sp->state.flags ^ state->flags;
  403. if (changed & SS_IOCARD) {
  404. DPRINTK("card type: %s\n",
  405. (state->flags & SS_IOCARD ? "i/o" : "memory" ));
  406. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
  407. state->flags & SS_IOCARD);
  408. }
  409. if (changed & SS_RESET) {
  410. DPRINTK("%s reset card\n",
  411. (state->flags & SS_RESET ? "start" : "stop"));
  412. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
  413. state->flags & SS_RESET);
  414. }
  415. if (changed & SS_OUTPUT_ENA) {
  416. DPRINTK("%sabling card output\n",
  417. (state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
  418. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
  419. state->flags & SS_OUTPUT_ENA);
  420. }
  421. /* TODO: SS_SPKR_ENA */
  422. /* hd64465_io_debug = 0; */
  423. sp->state = *state;
  424. local_irq_restore(flags);
  425. #if HD64465_DEBUG > 10
  426. if (state->flags & SS_OUTPUT_ENA)
  427. cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
  428. #endif
  429. return 0;
  430. }
  431. /*============================================================*/
  432. static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
  433. {
  434. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  435. int map = io->map;
  436. int sock = sp->number;
  437. struct pccard_io_map *sio;
  438. pgprot_t prot;
  439. DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
  440. sock, map, io->flags, io->speed, io->start, io->stop);
  441. if (map >= MAX_IO_WIN)
  442. return -EINVAL;
  443. sio = &sp->io_maps[map];
  444. /* check for null changes */
  445. if (io->flags == sio->flags &&
  446. io->start == sio->start &&
  447. io->stop == sio->stop)
  448. return 0;
  449. if (io->flags & MAP_AUTOSZ)
  450. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
  451. else if (io->flags & MAP_16BIT)
  452. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
  453. else
  454. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
  455. /* TODO: handle MAP_USE_WAIT */
  456. if (io->flags & MAP_USE_WAIT)
  457. printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
  458. /* TODO: handle MAP_PREFETCH */
  459. if (io->flags & MAP_PREFETCH)
  460. printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
  461. /* TODO: handle MAP_WRPROT */
  462. if (io->flags & MAP_WRPROT)
  463. printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
  464. /* TODO: handle MAP_0WS */
  465. if (io->flags & MAP_0WS)
  466. printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
  467. if (io->flags & MAP_ACTIVE) {
  468. unsigned long pstart, psize, paddrbase;
  469. paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
  470. pstart = io->start & PAGE_MASK;
  471. psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
  472. /*
  473. * Change PTEs in only that portion of the mapping requested
  474. * by the caller. This means that most of the time, most of
  475. * the PTEs in the io_vma will be unmapped and only the bottom
  476. * page will be mapped. But the code allows for weird cards
  477. * that might want IO ports > 4K.
  478. */
  479. sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
  480. /*
  481. * Change the mapping used by inb() outb() etc
  482. */
  483. hd64465_port_map(io->start,
  484. io->stop - io->start + 1,
  485. (unsigned long)sp->io_base + io->start, 0);
  486. } else {
  487. hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
  488. p3_iounmap(sp->io_base);
  489. }
  490. *sio = *io;
  491. return 0;
  492. }
  493. /*============================================================*/
  494. static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
  495. {
  496. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  497. struct pccard_mem_map *smem;
  498. int map = mem->map;
  499. unsigned long paddr;
  500. #if 0
  501. DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
  502. sock, map, mem->flags, mem->card_start);
  503. #endif
  504. if (map >= MAX_WIN)
  505. return -EINVAL;
  506. smem = &sp->mem_maps[map];
  507. paddr = sp->mem_base; /* base of Attribute mapping */
  508. if (!(mem->flags & MAP_ATTRIB))
  509. paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
  510. paddr += mem->card_start;
  511. /* Because we specified SS_CAP_STATIC_MAP, we are obliged
  512. * at this time to report the system address corresponding
  513. * to the card address requested. This is how Socket Services
  514. * queries our fixed mapping. I wish this fact had been
  515. * documented - Greg Banks.
  516. */
  517. mem->static_start = paddr;
  518. *smem = *mem;
  519. return 0;
  520. }
  521. /* TODO: do we need to use the MMU to access Common memory ??? */
  522. /*============================================================*/
  523. /*
  524. * This function is registered with the HD64465 glue code to do a
  525. * secondary demux step on the PCMCIA interrupts. It handles
  526. * mapping the IREQ request from the card to a standard Linux
  527. * IRQ, as requested by SocketServices.
  528. */
  529. static int hs_irq_demux(int irq, void *dev)
  530. {
  531. hs_socket_t *sp = dev;
  532. u_int cscr;
  533. DPRINTK("hs_irq_demux(irq=%d)\n", irq);
  534. if (sp->state.io_irq &&
  535. (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
  536. cscr &= ~HD64465_PCCCSCR_PIREQ;
  537. hs_out(sp, cscr, CSCR);
  538. return sp->state.io_irq;
  539. }
  540. return irq;
  541. }
  542. /*============================================================*/
  543. /*
  544. * Interrupt handling routine.
  545. */
  546. static irqreturn_t hs_interrupt(int irq, void *dev)
  547. {
  548. hs_socket_t *sp = dev;
  549. u_int events = 0;
  550. u_int cscr;
  551. cscr = hs_in(sp, CSCR);
  552. DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
  553. /* check for bus-related changes to be reported to Socket Services */
  554. if (cscr & HD64465_PCCCSCR_PCDC) {
  555. /* double-check for a 16-bit card, as we don't support CardBus */
  556. if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
  557. printk(KERN_NOTICE MODNAME
  558. ": socket %d, card not a supported card type or not inserted correctly\n",
  559. sp->number);
  560. /* Don't do the rest unless a card is present */
  561. cscr &= ~(HD64465_PCCCSCR_PCDC|
  562. HD64465_PCCCSCR_PRC|
  563. HD64465_PCCCSCR_PBW|
  564. HD64465_PCCCSCR_PBD|
  565. HD64465_PCCCSCR_PSC);
  566. } else {
  567. cscr &= ~HD64465_PCCCSCR_PCDC;
  568. events |= SS_DETECT; /* card insertion or removal */
  569. }
  570. }
  571. if (cscr & HD64465_PCCCSCR_PRC) {
  572. cscr &= ~HD64465_PCCCSCR_PRC;
  573. events |= SS_READY; /* ready signal changed */
  574. }
  575. if (cscr & HD64465_PCCCSCR_PBW) {
  576. cscr &= ~HD64465_PCCCSCR_PSC;
  577. events |= SS_BATWARN; /* battery warning */
  578. }
  579. if (cscr & HD64465_PCCCSCR_PBD) {
  580. cscr &= ~HD64465_PCCCSCR_PSC;
  581. events |= SS_BATDEAD; /* battery dead */
  582. }
  583. if (cscr & HD64465_PCCCSCR_PSC) {
  584. cscr &= ~HD64465_PCCCSCR_PSC;
  585. events |= SS_STSCHG; /* STSCHG (status changed) signal */
  586. }
  587. if (cscr & HD64465_PCCCSCR_PIREQ) {
  588. cscr &= ~HD64465_PCCCSCR_PIREQ;
  589. /* This should have been dealt with during irq demux */
  590. printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
  591. }
  592. hs_out(sp, cscr, CSCR);
  593. if (events)
  594. pcmcia_parse_events(&sp->socket, events);
  595. return IRQ_HANDLED;
  596. }
  597. /*============================================================*/
  598. static struct pccard_operations hs_operations = {
  599. .init = hs_init,
  600. .get_status = hs_get_status,
  601. .set_socket = hs_set_socket,
  602. .set_io_map = hs_set_io_map,
  603. .set_mem_map = hs_set_mem_map,
  604. };
  605. static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
  606. unsigned int ctrl_base)
  607. {
  608. unsigned short v;
  609. int i, err;
  610. memset(sp, 0, sizeof(*sp));
  611. sp->irq = irq;
  612. sp->mem_base = mem_base;
  613. sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
  614. sp->ctrl_base = ctrl_base;
  615. for (i=0 ; i<MAX_IO_WIN ; i++)
  616. sp->io_maps[i].map = i;
  617. for (i=0 ; i<MAX_WIN ; i++)
  618. sp->mem_maps[i].map = i;
  619. hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
  620. if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0)
  621. return err;
  622. if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
  623. sp->mem_base = 0;
  624. return -ENOMEM;
  625. }
  626. /* According to section 3.2 of the PCMCIA standard, low-voltage
  627. * capable cards must implement cold insertion, i.e. Vpp and
  628. * Vcc set to 0 before card is inserted.
  629. */
  630. /*hs_set_voltages(sp, 0, 0);*/
  631. /* hi-Z the outputs to the card and set 16MB map mode */
  632. v = hs_in(sp, GCR);
  633. v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
  634. hs_out(sp, v, GCR);
  635. v = hs_in(sp, GCR);
  636. v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
  637. hs_out(sp, v, GCR);
  638. v = hs_in(sp, GCR);
  639. v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
  640. hs_out(sp, v, GCR);
  641. v = hs_in(sp, GCR);
  642. /* lowest 16MB of Common */
  643. v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
  644. hs_out(sp, v, GCR);
  645. hs_reset_socket(sp, 1);
  646. printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
  647. i, sp->mem_base, sp->irq);
  648. return 0;
  649. }
  650. static void hs_exit_socket(hs_socket_t *sp)
  651. {
  652. unsigned short cscier, gcr;
  653. unsigned long flags;
  654. local_irq_save(flags);
  655. /* turn off interrupts in hardware */
  656. cscier = hs_in(sp, CSCIER);
  657. cscier = (cscier & IER_MASK) | IER_OFF;
  658. hs_out(sp, cscier, CSCIER);
  659. /* hi-Z the outputs to the card */
  660. gcr = hs_in(sp, GCR);
  661. gcr &= HD64465_PCCGCR_PDRV;
  662. hs_out(sp, gcr, GCR);
  663. /* power the card down */
  664. hs_set_voltages(sp, 0, 0);
  665. if (sp->mem_base != 0)
  666. release_mem_region(sp->mem_base, sp->mem_length);
  667. if (sp->irq != 0) {
  668. free_irq(sp->irq, hs_interrupt);
  669. hd64465_unregister_irq_demux(sp->irq);
  670. }
  671. local_irq_restore(flags);
  672. }
  673. static struct device_driver hd64465_driver = {
  674. .name = "hd64465-pcmcia",
  675. .bus = &platform_bus_type,
  676. .suspend = pcmcia_socket_dev_suspend,
  677. .resume = pcmcia_socket_dev_resume,
  678. };
  679. static struct platform_device hd64465_device = {
  680. .name = "hd64465-pcmcia",
  681. .id = 0,
  682. };
  683. static int __init init_hs(void)
  684. {
  685. int i;
  686. unsigned short v;
  687. /* hd64465_io_debug = 1; */
  688. if (driver_register(&hd64465_driver))
  689. return -EINVAL;
  690. /* Wake both sockets out of STANDBY mode */
  691. /* TODO: wait 15ms */
  692. v = inw(HD64465_REG_SMSCR);
  693. v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
  694. outw(v, HD64465_REG_SMSCR);
  695. /* keep power controller out of shutdown mode */
  696. v = inb(HD64465_REG_PCC0SCR);
  697. v |= HD64465_PCCSCR_SHDN;
  698. outb(v, HD64465_REG_PCC0SCR);
  699. /* use serial (TPS2206) power controller */
  700. v = inb(HD64465_REG_PCC0CSCR);
  701. v |= HD64465_PCCCSCR_PSWSEL;
  702. outb(v, HD64465_REG_PCC0CSCR);
  703. /*
  704. * Setup hs_sockets[] structures and request system resources.
  705. * TODO: on memory allocation failure, power down the socket
  706. * before quitting.
  707. */
  708. for (i=0; i<HS_MAX_SOCKETS; i++) {
  709. hs_set_voltages(&hs_sockets[i], 0, 0);
  710. hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
  711. hs_sockets[i].socket.resource_ops = &pccard_static_ops;
  712. hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
  713. hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
  714. hs_sockets[i].socket.owner = THIS_MODULE;
  715. hs_sockets[i].socket.ss_entry = &hs_operations;
  716. }
  717. i = hs_init_socket(&hs_sockets[0],
  718. HD64465_IRQ_PCMCIA0,
  719. HD64465_PCC0_BASE,
  720. HD64465_REG_PCC0ISR);
  721. if (i < 0) {
  722. unregister_driver(&hd64465_driver);
  723. return i;
  724. }
  725. i = hs_init_socket(&hs_sockets[1],
  726. HD64465_IRQ_PCMCIA1,
  727. HD64465_PCC1_BASE,
  728. HD64465_REG_PCC1ISR);
  729. if (i < 0) {
  730. unregister_driver(&hd64465_driver);
  731. return i;
  732. }
  733. /* hd64465_io_debug = 0; */
  734. platform_device_register(&hd64465_device);
  735. for (i=0; i<HS_MAX_SOCKETS; i++) {
  736. unsigned int ret;
  737. hs_sockets[i].socket.dev.parent = &hd64465_device.dev;
  738. hs_sockets[i].number = i;
  739. ret = pcmcia_register_socket(&hs_sockets[i].socket);
  740. if (ret && i)
  741. pcmcia_unregister_socket(&hs_sockets[0].socket);
  742. }
  743. return 0;
  744. }
  745. static void __exit exit_hs(void)
  746. {
  747. int i;
  748. for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
  749. pcmcia_unregister_socket(&hs_sockets[i].socket);
  750. hs_exit_socket(&hs_sockets[i]);
  751. }
  752. platform_device_unregister(&hd64465_device);
  753. unregister_driver(&hd64465_driver);
  754. }
  755. module_init(init_hs);
  756. module_exit(exit_hs);
  757. /*============================================================*/
  758. /*END*/