tsi108_eth.c 46 KB

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  1. /*******************************************************************************
  2. Copyright(c) 2006 Tundra Semiconductor Corporation.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. *******************************************************************************/
  15. /* This driver is based on the driver code originally developed
  16. * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  17. * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
  18. *
  19. * Currently changes from original version are:
  20. * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
  21. * - modifications to handle two ports independently and support for
  22. * additional PHY devices (alexandre.bounine@tundra.com)
  23. * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
  24. *
  25. */
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <linux/init.h>
  29. #include <linux/net.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/skbuff.h>
  33. #include <linux/slab.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/delay.h>
  36. #include <linux/crc32.h>
  37. #include <linux/mii.h>
  38. #include <linux/device.h>
  39. #include <linux/pci.h>
  40. #include <linux/rtnetlink.h>
  41. #include <linux/timer.h>
  42. #include <linux/platform_device.h>
  43. #include <linux/etherdevice.h>
  44. #include <asm/system.h>
  45. #include <asm/io.h>
  46. #include <asm/tsi108.h>
  47. #include "tsi108_eth.h"
  48. #define MII_READ_DELAY 10000 /* max link wait time in msec */
  49. #define TSI108_RXRING_LEN 256
  50. /* NOTE: The driver currently does not support receiving packets
  51. * larger than the buffer size, so don't decrease this (unless you
  52. * want to add such support).
  53. */
  54. #define TSI108_RXBUF_SIZE 1536
  55. #define TSI108_TXRING_LEN 256
  56. #define TSI108_TX_INT_FREQ 64
  57. /* Check the phy status every half a second. */
  58. #define CHECK_PHY_INTERVAL (HZ/2)
  59. static int tsi108_init_one(struct platform_device *pdev);
  60. static int tsi108_ether_remove(struct platform_device *pdev);
  61. struct tsi108_prv_data {
  62. void __iomem *regs; /* Base of normal regs */
  63. void __iomem *phyregs; /* Base of register bank used for PHY access */
  64. unsigned int phy; /* Index of PHY for this interface */
  65. unsigned int irq_num;
  66. unsigned int id;
  67. struct timer_list timer;/* Timer that triggers the check phy function */
  68. unsigned int rxtail; /* Next entry in rxring to read */
  69. unsigned int rxhead; /* Next entry in rxring to give a new buffer */
  70. unsigned int rxfree; /* Number of free, allocated RX buffers */
  71. unsigned int rxpending; /* Non-zero if there are still descriptors
  72. * to be processed from a previous descriptor
  73. * interrupt condition that has been cleared */
  74. unsigned int txtail; /* Next TX descriptor to check status on */
  75. unsigned int txhead; /* Next TX descriptor to use */
  76. /* Number of free TX descriptors. This could be calculated from
  77. * rxhead and rxtail if one descriptor were left unused to disambiguate
  78. * full and empty conditions, but it's simpler to just keep track
  79. * explicitly. */
  80. unsigned int txfree;
  81. unsigned int phy_ok; /* The PHY is currently powered on. */
  82. /* PHY status (duplex is 1 for half, 2 for full,
  83. * so that the default 0 indicates that neither has
  84. * yet been configured). */
  85. unsigned int link_up;
  86. unsigned int speed;
  87. unsigned int duplex;
  88. tx_desc *txring;
  89. rx_desc *rxring;
  90. struct sk_buff *txskbs[TSI108_TXRING_LEN];
  91. struct sk_buff *rxskbs[TSI108_RXRING_LEN];
  92. dma_addr_t txdma, rxdma;
  93. /* txlock nests in misclock and phy_lock */
  94. spinlock_t txlock, misclock;
  95. /* stats is used to hold the upper bits of each hardware counter,
  96. * and tmpstats is used to hold the full values for returning
  97. * to the caller of get_stats(). They must be separate in case
  98. * an overflow interrupt occurs before the stats are consumed.
  99. */
  100. struct net_device_stats stats;
  101. struct net_device_stats tmpstats;
  102. /* These stats are kept separate in hardware, thus require individual
  103. * fields for handling carry. They are combined in get_stats.
  104. */
  105. unsigned long rx_fcs; /* Add to rx_frame_errors */
  106. unsigned long rx_short_fcs; /* Add to rx_frame_errors */
  107. unsigned long rx_long_fcs; /* Add to rx_frame_errors */
  108. unsigned long rx_underruns; /* Add to rx_length_errors */
  109. unsigned long rx_overruns; /* Add to rx_length_errors */
  110. unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
  111. unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
  112. unsigned long mc_hash[16];
  113. u32 msg_enable; /* debug message level */
  114. struct mii_if_info mii_if;
  115. unsigned int init_media;
  116. };
  117. /* Structure for a device driver */
  118. static struct platform_driver tsi_eth_driver = {
  119. .probe = tsi108_init_one,
  120. .remove = tsi108_ether_remove,
  121. .driver = {
  122. .name = "tsi-ethernet",
  123. },
  124. };
  125. static void tsi108_timed_checker(unsigned long dev_ptr);
  126. static void dump_eth_one(struct net_device *dev)
  127. {
  128. struct tsi108_prv_data *data = netdev_priv(dev);
  129. printk("Dumping %s...\n", dev->name);
  130. printk("intstat %x intmask %x phy_ok %d"
  131. " link %d speed %d duplex %d\n",
  132. TSI_READ(TSI108_EC_INTSTAT),
  133. TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
  134. data->link_up, data->speed, data->duplex);
  135. printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
  136. data->txhead, data->txtail, data->txfree,
  137. TSI_READ(TSI108_EC_TXSTAT),
  138. TSI_READ(TSI108_EC_TXESTAT),
  139. TSI_READ(TSI108_EC_TXERR));
  140. printk("RX: head %d, tail %d, free %d, stat %x,"
  141. " estat %x, err %x, pending %d\n\n",
  142. data->rxhead, data->rxtail, data->rxfree,
  143. TSI_READ(TSI108_EC_RXSTAT),
  144. TSI_READ(TSI108_EC_RXESTAT),
  145. TSI_READ(TSI108_EC_RXERR), data->rxpending);
  146. }
  147. /* Synchronization is needed between the thread and up/down events.
  148. * Note that the PHY is accessed through the same registers for both
  149. * interfaces, so this can't be made interface-specific.
  150. */
  151. static DEFINE_SPINLOCK(phy_lock);
  152. static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
  153. {
  154. unsigned i;
  155. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  156. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  157. (reg << TSI108_MAC_MII_ADDR_REG));
  158. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
  159. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
  160. for (i = 0; i < 100; i++) {
  161. if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  162. (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
  163. break;
  164. udelay(10);
  165. }
  166. if (i == 100)
  167. return 0xffff;
  168. else
  169. return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN));
  170. }
  171. static void tsi108_write_mii(struct tsi108_prv_data *data,
  172. int reg, u16 val)
  173. {
  174. unsigned i = 100;
  175. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  176. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  177. (reg << TSI108_MAC_MII_ADDR_REG));
  178. TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
  179. while (i--) {
  180. if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  181. TSI108_MAC_MII_IND_BUSY))
  182. break;
  183. udelay(10);
  184. }
  185. }
  186. static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
  187. {
  188. struct tsi108_prv_data *data = netdev_priv(dev);
  189. return tsi108_read_mii(data, reg);
  190. }
  191. static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
  192. {
  193. struct tsi108_prv_data *data = netdev_priv(dev);
  194. tsi108_write_mii(data, reg, val);
  195. }
  196. static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
  197. int reg, u16 val)
  198. {
  199. unsigned i = 1000;
  200. TSI_WRITE(TSI108_MAC_MII_ADDR,
  201. (0x1e << TSI108_MAC_MII_ADDR_PHY)
  202. | (reg << TSI108_MAC_MII_ADDR_REG));
  203. TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
  204. while(i--) {
  205. if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
  206. return;
  207. udelay(10);
  208. }
  209. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  210. }
  211. static int mii_speed(struct mii_if_info *mii)
  212. {
  213. int advert, lpa, val, media;
  214. int lpa2 = 0;
  215. int speed;
  216. if (!mii_link_ok(mii))
  217. return 0;
  218. val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
  219. if ((val & BMSR_ANEGCOMPLETE) == 0)
  220. return 0;
  221. advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
  222. lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
  223. media = mii_nway_result(advert & lpa);
  224. if (mii->supports_gmii)
  225. lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
  226. speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
  227. (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
  228. return speed;
  229. }
  230. static void tsi108_check_phy(struct net_device *dev)
  231. {
  232. struct tsi108_prv_data *data = netdev_priv(dev);
  233. u32 mac_cfg2_reg, portctrl_reg;
  234. u32 duplex;
  235. u32 speed;
  236. unsigned long flags;
  237. /* Do a dummy read, as for some reason the first read
  238. * after a link becomes up returns link down, even if
  239. * it's been a while since the link came up.
  240. */
  241. spin_lock_irqsave(&phy_lock, flags);
  242. if (!data->phy_ok)
  243. goto out;
  244. tsi108_read_mii(data, MII_BMSR);
  245. duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
  246. data->init_media = 0;
  247. if (netif_carrier_ok(dev)) {
  248. speed = mii_speed(&data->mii_if);
  249. if ((speed != data->speed) || duplex) {
  250. mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
  251. portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
  252. mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
  253. if (speed == 1000) {
  254. mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
  255. portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
  256. } else {
  257. mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
  258. portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
  259. }
  260. data->speed = speed;
  261. if (data->mii_if.full_duplex) {
  262. mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
  263. portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
  264. data->duplex = 2;
  265. } else {
  266. mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
  267. portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
  268. data->duplex = 1;
  269. }
  270. TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
  271. TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
  272. if (data->link_up == 0) {
  273. /* The manual says it can take 3-4 usecs for the speed change
  274. * to take effect.
  275. */
  276. udelay(5);
  277. spin_lock(&data->txlock);
  278. if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
  279. netif_wake_queue(dev);
  280. data->link_up = 1;
  281. spin_unlock(&data->txlock);
  282. }
  283. }
  284. } else {
  285. if (data->link_up == 1) {
  286. netif_stop_queue(dev);
  287. data->link_up = 0;
  288. printk(KERN_NOTICE "%s : link is down\n", dev->name);
  289. }
  290. goto out;
  291. }
  292. out:
  293. spin_unlock_irqrestore(&phy_lock, flags);
  294. }
  295. static inline void
  296. tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
  297. unsigned long *upper)
  298. {
  299. if (carry & carry_bit)
  300. *upper += carry_shift;
  301. }
  302. static void tsi108_stat_carry(struct net_device *dev)
  303. {
  304. struct tsi108_prv_data *data = netdev_priv(dev);
  305. u32 carry1, carry2;
  306. spin_lock_irq(&data->misclock);
  307. carry1 = TSI_READ(TSI108_STAT_CARRY1);
  308. carry2 = TSI_READ(TSI108_STAT_CARRY2);
  309. TSI_WRITE(TSI108_STAT_CARRY1, carry1);
  310. TSI_WRITE(TSI108_STAT_CARRY2, carry2);
  311. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
  312. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  313. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
  314. TSI108_STAT_RXPKTS_CARRY,
  315. &data->stats.rx_packets);
  316. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
  317. TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
  318. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
  319. TSI108_STAT_RXMCAST_CARRY,
  320. &data->stats.multicast);
  321. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
  322. TSI108_STAT_RXALIGN_CARRY,
  323. &data->stats.rx_frame_errors);
  324. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
  325. TSI108_STAT_RXLENGTH_CARRY,
  326. &data->stats.rx_length_errors);
  327. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
  328. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  329. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
  330. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  331. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
  332. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  333. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
  334. TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
  335. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
  336. TSI108_STAT_RXDROP_CARRY,
  337. &data->stats.rx_missed_errors);
  338. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
  339. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  340. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
  341. TSI108_STAT_TXPKTS_CARRY,
  342. &data->stats.tx_packets);
  343. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
  344. TSI108_STAT_TXEXDEF_CARRY,
  345. &data->stats.tx_aborted_errors);
  346. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
  347. TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
  348. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
  349. TSI108_STAT_TXTCOL_CARRY,
  350. &data->stats.collisions);
  351. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
  352. TSI108_STAT_TXPAUSEDROP_CARRY,
  353. &data->tx_pause_drop);
  354. spin_unlock_irq(&data->misclock);
  355. }
  356. /* Read a stat counter atomically with respect to carries.
  357. * data->misclock must be held.
  358. */
  359. static inline unsigned long
  360. tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
  361. int carry_shift, unsigned long *upper)
  362. {
  363. int carryreg;
  364. unsigned long val;
  365. if (reg < 0xb0)
  366. carryreg = TSI108_STAT_CARRY1;
  367. else
  368. carryreg = TSI108_STAT_CARRY2;
  369. again:
  370. val = TSI_READ(reg) | *upper;
  371. /* Check to see if it overflowed, but the interrupt hasn't
  372. * been serviced yet. If so, handle the carry here, and
  373. * try again.
  374. */
  375. if (unlikely(TSI_READ(carryreg) & carry_bit)) {
  376. *upper += carry_shift;
  377. TSI_WRITE(carryreg, carry_bit);
  378. goto again;
  379. }
  380. return val;
  381. }
  382. static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
  383. {
  384. unsigned long excol;
  385. struct tsi108_prv_data *data = netdev_priv(dev);
  386. spin_lock_irq(&data->misclock);
  387. data->tmpstats.rx_packets =
  388. tsi108_read_stat(data, TSI108_STAT_RXPKTS,
  389. TSI108_STAT_CARRY1_RXPKTS,
  390. TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
  391. data->tmpstats.tx_packets =
  392. tsi108_read_stat(data, TSI108_STAT_TXPKTS,
  393. TSI108_STAT_CARRY2_TXPKTS,
  394. TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
  395. data->tmpstats.rx_bytes =
  396. tsi108_read_stat(data, TSI108_STAT_RXBYTES,
  397. TSI108_STAT_CARRY1_RXBYTES,
  398. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  399. data->tmpstats.tx_bytes =
  400. tsi108_read_stat(data, TSI108_STAT_TXBYTES,
  401. TSI108_STAT_CARRY2_TXBYTES,
  402. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  403. data->tmpstats.multicast =
  404. tsi108_read_stat(data, TSI108_STAT_RXMCAST,
  405. TSI108_STAT_CARRY1_RXMCAST,
  406. TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
  407. excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
  408. TSI108_STAT_CARRY2_TXEXCOL,
  409. TSI108_STAT_TXEXCOL_CARRY,
  410. &data->tx_coll_abort);
  411. data->tmpstats.collisions =
  412. tsi108_read_stat(data, TSI108_STAT_TXTCOL,
  413. TSI108_STAT_CARRY2_TXTCOL,
  414. TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
  415. data->tmpstats.collisions += excol;
  416. data->tmpstats.rx_length_errors =
  417. tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
  418. TSI108_STAT_CARRY1_RXLENGTH,
  419. TSI108_STAT_RXLENGTH_CARRY,
  420. &data->stats.rx_length_errors);
  421. data->tmpstats.rx_length_errors +=
  422. tsi108_read_stat(data, TSI108_STAT_RXRUNT,
  423. TSI108_STAT_CARRY1_RXRUNT,
  424. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  425. data->tmpstats.rx_length_errors +=
  426. tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
  427. TSI108_STAT_CARRY1_RXJUMBO,
  428. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  429. data->tmpstats.rx_frame_errors =
  430. tsi108_read_stat(data, TSI108_STAT_RXALIGN,
  431. TSI108_STAT_CARRY1_RXALIGN,
  432. TSI108_STAT_RXALIGN_CARRY,
  433. &data->stats.rx_frame_errors);
  434. data->tmpstats.rx_frame_errors +=
  435. tsi108_read_stat(data, TSI108_STAT_RXFCS,
  436. TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
  437. &data->rx_fcs);
  438. data->tmpstats.rx_frame_errors +=
  439. tsi108_read_stat(data, TSI108_STAT_RXFRAG,
  440. TSI108_STAT_CARRY1_RXFRAG,
  441. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  442. data->tmpstats.rx_missed_errors =
  443. tsi108_read_stat(data, TSI108_STAT_RXDROP,
  444. TSI108_STAT_CARRY1_RXDROP,
  445. TSI108_STAT_RXDROP_CARRY,
  446. &data->stats.rx_missed_errors);
  447. /* These three are maintained by software. */
  448. data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
  449. data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
  450. data->tmpstats.tx_aborted_errors =
  451. tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
  452. TSI108_STAT_CARRY2_TXEXDEF,
  453. TSI108_STAT_TXEXDEF_CARRY,
  454. &data->stats.tx_aborted_errors);
  455. data->tmpstats.tx_aborted_errors +=
  456. tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
  457. TSI108_STAT_CARRY2_TXPAUSE,
  458. TSI108_STAT_TXPAUSEDROP_CARRY,
  459. &data->tx_pause_drop);
  460. data->tmpstats.tx_aborted_errors += excol;
  461. data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
  462. data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
  463. data->tmpstats.rx_crc_errors +
  464. data->tmpstats.rx_frame_errors +
  465. data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
  466. spin_unlock_irq(&data->misclock);
  467. return &data->tmpstats;
  468. }
  469. static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
  470. {
  471. TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
  472. TSI108_EC_RXQ_PTRHIGH_VALID);
  473. TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
  474. | TSI108_EC_RXCTRL_QUEUE0);
  475. }
  476. static void tsi108_restart_tx(struct tsi108_prv_data * data)
  477. {
  478. TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
  479. TSI108_EC_TXQ_PTRHIGH_VALID);
  480. TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
  481. TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
  482. }
  483. /* txlock must be held by caller, with IRQs disabled, and
  484. * with permission to re-enable them when the lock is dropped.
  485. */
  486. static void tsi108_complete_tx(struct net_device *dev)
  487. {
  488. struct tsi108_prv_data *data = netdev_priv(dev);
  489. int tx;
  490. struct sk_buff *skb;
  491. int release = 0;
  492. while (!data->txfree || data->txhead != data->txtail) {
  493. tx = data->txtail;
  494. if (data->txring[tx].misc & TSI108_TX_OWN)
  495. break;
  496. skb = data->txskbs[tx];
  497. if (!(data->txring[tx].misc & TSI108_TX_OK))
  498. printk("%s: bad tx packet, misc %x\n",
  499. dev->name, data->txring[tx].misc);
  500. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  501. data->txfree++;
  502. if (data->txring[tx].misc & TSI108_TX_EOF) {
  503. dev_kfree_skb_any(skb);
  504. release++;
  505. }
  506. }
  507. if (release) {
  508. if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
  509. netif_wake_queue(dev);
  510. }
  511. }
  512. static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
  513. {
  514. struct tsi108_prv_data *data = netdev_priv(dev);
  515. int frags = skb_shinfo(skb)->nr_frags + 1;
  516. int i;
  517. if (!data->phy_ok && net_ratelimit())
  518. printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
  519. if (!data->link_up) {
  520. printk(KERN_ERR "%s: Transmit while link is down!\n",
  521. dev->name);
  522. netif_stop_queue(dev);
  523. return NETDEV_TX_BUSY;
  524. }
  525. if (data->txfree < MAX_SKB_FRAGS + 1) {
  526. netif_stop_queue(dev);
  527. if (net_ratelimit())
  528. printk(KERN_ERR "%s: Transmit with full tx ring!\n",
  529. dev->name);
  530. return NETDEV_TX_BUSY;
  531. }
  532. if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
  533. netif_stop_queue(dev);
  534. }
  535. spin_lock_irq(&data->txlock);
  536. for (i = 0; i < frags; i++) {
  537. int misc = 0;
  538. int tx = data->txhead;
  539. /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
  540. * the interrupt bit. TX descriptor-complete interrupts are
  541. * enabled when the queue fills up, and masked when there is
  542. * still free space. This way, when saturating the outbound
  543. * link, the tx interrupts are kept to a reasonable level.
  544. * When the queue is not full, reclamation of skbs still occurs
  545. * as new packets are transmitted, or on a queue-empty
  546. * interrupt.
  547. */
  548. if ((tx % TSI108_TX_INT_FREQ == 0) &&
  549. ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
  550. misc = TSI108_TX_INT;
  551. data->txskbs[tx] = skb;
  552. if (i == 0) {
  553. data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
  554. skb->len - skb->data_len, DMA_TO_DEVICE);
  555. data->txring[tx].len = skb->len - skb->data_len;
  556. misc |= TSI108_TX_SOF;
  557. } else {
  558. skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
  559. data->txring[tx].buf0 =
  560. dma_map_page(NULL, frag->page, frag->page_offset,
  561. frag->size, DMA_TO_DEVICE);
  562. data->txring[tx].len = frag->size;
  563. }
  564. if (i == frags - 1)
  565. misc |= TSI108_TX_EOF;
  566. if (netif_msg_pktdata(data)) {
  567. int i;
  568. printk("%s: Tx Frame contents (%d)\n", dev->name,
  569. skb->len);
  570. for (i = 0; i < skb->len; i++)
  571. printk(" %2.2x", skb->data[i]);
  572. printk(".\n");
  573. }
  574. data->txring[tx].misc = misc | TSI108_TX_OWN;
  575. data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
  576. data->txfree--;
  577. }
  578. tsi108_complete_tx(dev);
  579. /* This must be done after the check for completed tx descriptors,
  580. * so that the tail pointer is correct.
  581. */
  582. if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
  583. tsi108_restart_tx(data);
  584. spin_unlock_irq(&data->txlock);
  585. return NETDEV_TX_OK;
  586. }
  587. static int tsi108_complete_rx(struct net_device *dev, int budget)
  588. {
  589. struct tsi108_prv_data *data = netdev_priv(dev);
  590. int done = 0;
  591. while (data->rxfree && done != budget) {
  592. int rx = data->rxtail;
  593. struct sk_buff *skb;
  594. if (data->rxring[rx].misc & TSI108_RX_OWN)
  595. break;
  596. skb = data->rxskbs[rx];
  597. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  598. data->rxfree--;
  599. done++;
  600. if (data->rxring[rx].misc & TSI108_RX_BAD) {
  601. spin_lock_irq(&data->misclock);
  602. if (data->rxring[rx].misc & TSI108_RX_CRC)
  603. data->stats.rx_crc_errors++;
  604. if (data->rxring[rx].misc & TSI108_RX_OVER)
  605. data->stats.rx_fifo_errors++;
  606. spin_unlock_irq(&data->misclock);
  607. dev_kfree_skb_any(skb);
  608. continue;
  609. }
  610. if (netif_msg_pktdata(data)) {
  611. int i;
  612. printk("%s: Rx Frame contents (%d)\n",
  613. dev->name, data->rxring[rx].len);
  614. for (i = 0; i < data->rxring[rx].len; i++)
  615. printk(" %2.2x", skb->data[i]);
  616. printk(".\n");
  617. }
  618. skb->dev = dev;
  619. skb_put(skb, data->rxring[rx].len);
  620. skb->protocol = eth_type_trans(skb, dev);
  621. netif_receive_skb(skb);
  622. dev->last_rx = jiffies;
  623. }
  624. return done;
  625. }
  626. static int tsi108_refill_rx(struct net_device *dev, int budget)
  627. {
  628. struct tsi108_prv_data *data = netdev_priv(dev);
  629. int done = 0;
  630. while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
  631. int rx = data->rxhead;
  632. struct sk_buff *skb;
  633. data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2);
  634. if (!skb)
  635. break;
  636. skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */
  637. data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
  638. TSI108_RX_SKB_SIZE,
  639. DMA_FROM_DEVICE);
  640. /* Sometimes the hardware sets blen to zero after packet
  641. * reception, even though the manual says that it's only ever
  642. * modified by the driver.
  643. */
  644. data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
  645. data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
  646. data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
  647. data->rxfree++;
  648. done++;
  649. }
  650. if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
  651. TSI108_EC_RXSTAT_QUEUE0))
  652. tsi108_restart_rx(data, dev);
  653. return done;
  654. }
  655. static int tsi108_poll(struct net_device *dev, int *budget)
  656. {
  657. struct tsi108_prv_data *data = netdev_priv(dev);
  658. u32 estat = TSI_READ(TSI108_EC_RXESTAT);
  659. u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
  660. int total_budget = min(*budget, dev->quota);
  661. int num_received = 0, num_filled = 0, budget_used;
  662. intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  663. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
  664. TSI_WRITE(TSI108_EC_RXESTAT, estat);
  665. TSI_WRITE(TSI108_EC_INTSTAT, intstat);
  666. if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
  667. num_received = tsi108_complete_rx(dev, total_budget);
  668. /* This should normally fill no more slots than the number of
  669. * packets received in tsi108_complete_rx(). The exception
  670. * is when we previously ran out of memory for RX SKBs. In that
  671. * case, it's helpful to obey the budget, not only so that the
  672. * CPU isn't hogged, but so that memory (which may still be low)
  673. * is not hogged by one device.
  674. *
  675. * A work unit is considered to be two SKBs to allow us to catch
  676. * up when the ring has shrunk due to out-of-memory but we're
  677. * still removing the full budget's worth of packets each time.
  678. */
  679. if (data->rxfree < TSI108_RXRING_LEN)
  680. num_filled = tsi108_refill_rx(dev, total_budget * 2);
  681. if (intstat & TSI108_INT_RXERROR) {
  682. u32 err = TSI_READ(TSI108_EC_RXERR);
  683. TSI_WRITE(TSI108_EC_RXERR, err);
  684. if (err) {
  685. if (net_ratelimit())
  686. printk(KERN_DEBUG "%s: RX error %x\n",
  687. dev->name, err);
  688. if (!(TSI_READ(TSI108_EC_RXSTAT) &
  689. TSI108_EC_RXSTAT_QUEUE0))
  690. tsi108_restart_rx(data, dev);
  691. }
  692. }
  693. if (intstat & TSI108_INT_RXOVERRUN) {
  694. spin_lock_irq(&data->misclock);
  695. data->stats.rx_fifo_errors++;
  696. spin_unlock_irq(&data->misclock);
  697. }
  698. budget_used = max(num_received, num_filled / 2);
  699. *budget -= budget_used;
  700. dev->quota -= budget_used;
  701. if (budget_used != total_budget) {
  702. data->rxpending = 0;
  703. netif_rx_complete(dev);
  704. TSI_WRITE(TSI108_EC_INTMASK,
  705. TSI_READ(TSI108_EC_INTMASK)
  706. & ~(TSI108_INT_RXQUEUE0
  707. | TSI108_INT_RXTHRESH |
  708. TSI108_INT_RXOVERRUN |
  709. TSI108_INT_RXERROR |
  710. TSI108_INT_RXWAIT));
  711. /* IRQs are level-triggered, so no need to re-check */
  712. return 0;
  713. } else {
  714. data->rxpending = 1;
  715. }
  716. return 1;
  717. }
  718. static void tsi108_rx_int(struct net_device *dev)
  719. {
  720. struct tsi108_prv_data *data = netdev_priv(dev);
  721. /* A race could cause dev to already be scheduled, so it's not an
  722. * error if that happens (and interrupts shouldn't be re-masked,
  723. * because that can cause harmful races, if poll has already
  724. * unmasked them but not cleared LINK_STATE_SCHED).
  725. *
  726. * This can happen if this code races with tsi108_poll(), which masks
  727. * the interrupts after tsi108_irq_one() read the mask, but before
  728. * netif_rx_schedule is called. It could also happen due to calls
  729. * from tsi108_check_rxring().
  730. */
  731. if (netif_rx_schedule_prep(dev)) {
  732. /* Mask, rather than ack, the receive interrupts. The ack
  733. * will happen in tsi108_poll().
  734. */
  735. TSI_WRITE(TSI108_EC_INTMASK,
  736. TSI_READ(TSI108_EC_INTMASK) |
  737. TSI108_INT_RXQUEUE0
  738. | TSI108_INT_RXTHRESH |
  739. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
  740. TSI108_INT_RXWAIT);
  741. __netif_rx_schedule(dev);
  742. } else {
  743. if (!netif_running(dev)) {
  744. /* This can happen if an interrupt occurs while the
  745. * interface is being brought down, as the START
  746. * bit is cleared before the stop function is called.
  747. *
  748. * In this case, the interrupts must be masked, or
  749. * they will continue indefinitely.
  750. *
  751. * There's a race here if the interface is brought down
  752. * and then up in rapid succession, as the device could
  753. * be made running after the above check and before
  754. * the masking below. This will only happen if the IRQ
  755. * thread has a lower priority than the task brining
  756. * up the interface. Fixing this race would likely
  757. * require changes in generic code.
  758. */
  759. TSI_WRITE(TSI108_EC_INTMASK,
  760. TSI_READ
  761. (TSI108_EC_INTMASK) |
  762. TSI108_INT_RXQUEUE0 |
  763. TSI108_INT_RXTHRESH |
  764. TSI108_INT_RXOVERRUN |
  765. TSI108_INT_RXERROR |
  766. TSI108_INT_RXWAIT);
  767. }
  768. }
  769. }
  770. /* If the RX ring has run out of memory, try periodically
  771. * to allocate some more, as otherwise poll would never
  772. * get called (apart from the initial end-of-queue condition).
  773. *
  774. * This is called once per second (by default) from the thread.
  775. */
  776. static void tsi108_check_rxring(struct net_device *dev)
  777. {
  778. struct tsi108_prv_data *data = netdev_priv(dev);
  779. /* A poll is scheduled, as opposed to caling tsi108_refill_rx
  780. * directly, so as to keep the receive path single-threaded
  781. * (and thus not needing a lock).
  782. */
  783. if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
  784. tsi108_rx_int(dev);
  785. }
  786. static void tsi108_tx_int(struct net_device *dev)
  787. {
  788. struct tsi108_prv_data *data = netdev_priv(dev);
  789. u32 estat = TSI_READ(TSI108_EC_TXESTAT);
  790. TSI_WRITE(TSI108_EC_TXESTAT, estat);
  791. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
  792. TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
  793. if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
  794. u32 err = TSI_READ(TSI108_EC_TXERR);
  795. TSI_WRITE(TSI108_EC_TXERR, err);
  796. if (err && net_ratelimit())
  797. printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
  798. }
  799. if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
  800. spin_lock(&data->txlock);
  801. tsi108_complete_tx(dev);
  802. spin_unlock(&data->txlock);
  803. }
  804. }
  805. static irqreturn_t tsi108_irq(int irq, void *dev_id)
  806. {
  807. struct net_device *dev = dev_id;
  808. struct tsi108_prv_data *data = netdev_priv(dev);
  809. u32 stat = TSI_READ(TSI108_EC_INTSTAT);
  810. if (!(stat & TSI108_INT_ANY))
  811. return IRQ_NONE; /* Not our interrupt */
  812. stat &= ~TSI_READ(TSI108_EC_INTMASK);
  813. if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
  814. TSI108_INT_TXERROR))
  815. tsi108_tx_int(dev);
  816. if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  817. TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
  818. TSI108_INT_RXERROR))
  819. tsi108_rx_int(dev);
  820. if (stat & TSI108_INT_SFN) {
  821. if (net_ratelimit())
  822. printk(KERN_DEBUG "%s: SFN error\n", dev->name);
  823. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
  824. }
  825. if (stat & TSI108_INT_STATCARRY) {
  826. tsi108_stat_carry(dev);
  827. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
  828. }
  829. return IRQ_HANDLED;
  830. }
  831. static void tsi108_stop_ethernet(struct net_device *dev)
  832. {
  833. struct tsi108_prv_data *data = netdev_priv(dev);
  834. int i = 1000;
  835. /* Disable all TX and RX queues ... */
  836. TSI_WRITE(TSI108_EC_TXCTRL, 0);
  837. TSI_WRITE(TSI108_EC_RXCTRL, 0);
  838. /* ...and wait for them to become idle */
  839. while(i--) {
  840. if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
  841. break;
  842. udelay(10);
  843. }
  844. i = 1000;
  845. while(i--){
  846. if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
  847. return;
  848. udelay(10);
  849. }
  850. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  851. }
  852. static void tsi108_reset_ether(struct tsi108_prv_data * data)
  853. {
  854. TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
  855. udelay(100);
  856. TSI_WRITE(TSI108_MAC_CFG1, 0);
  857. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
  858. udelay(100);
  859. TSI_WRITE(TSI108_EC_PORTCTRL,
  860. TSI_READ(TSI108_EC_PORTCTRL) &
  861. ~TSI108_EC_PORTCTRL_STATRST);
  862. TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
  863. udelay(100);
  864. TSI_WRITE(TSI108_EC_TXCFG,
  865. TSI_READ(TSI108_EC_TXCFG) &
  866. ~TSI108_EC_TXCFG_RST);
  867. TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
  868. udelay(100);
  869. TSI_WRITE(TSI108_EC_RXCFG,
  870. TSI_READ(TSI108_EC_RXCFG) &
  871. ~TSI108_EC_RXCFG_RST);
  872. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  873. TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
  874. TSI108_MAC_MII_MGMT_RST);
  875. udelay(100);
  876. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  877. (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
  878. ~(TSI108_MAC_MII_MGMT_RST |
  879. TSI108_MAC_MII_MGMT_CLK)) | 0x07);
  880. }
  881. static int tsi108_get_mac(struct net_device *dev)
  882. {
  883. struct tsi108_prv_data *data = netdev_priv(dev);
  884. u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
  885. u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
  886. /* Note that the octets are reversed from what the manual says,
  887. * producing an even weirder ordering...
  888. */
  889. if (word2 == 0 && word1 == 0) {
  890. dev->dev_addr[0] = 0x00;
  891. dev->dev_addr[1] = 0x06;
  892. dev->dev_addr[2] = 0xd2;
  893. dev->dev_addr[3] = 0x00;
  894. dev->dev_addr[4] = 0x00;
  895. if (0x8 == data->phy)
  896. dev->dev_addr[5] = 0x01;
  897. else
  898. dev->dev_addr[5] = 0x02;
  899. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  900. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  901. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  902. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  903. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  904. } else {
  905. dev->dev_addr[0] = (word2 >> 16) & 0xff;
  906. dev->dev_addr[1] = (word2 >> 24) & 0xff;
  907. dev->dev_addr[2] = (word1 >> 0) & 0xff;
  908. dev->dev_addr[3] = (word1 >> 8) & 0xff;
  909. dev->dev_addr[4] = (word1 >> 16) & 0xff;
  910. dev->dev_addr[5] = (word1 >> 24) & 0xff;
  911. }
  912. if (!is_valid_ether_addr(dev->dev_addr)) {
  913. printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2);
  914. return -EINVAL;
  915. }
  916. return 0;
  917. }
  918. static int tsi108_set_mac(struct net_device *dev, void *addr)
  919. {
  920. struct tsi108_prv_data *data = netdev_priv(dev);
  921. u32 word1, word2;
  922. int i;
  923. if (!is_valid_ether_addr(addr))
  924. return -EINVAL;
  925. for (i = 0; i < 6; i++)
  926. /* +2 is for the offset of the HW addr type */
  927. dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
  928. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  929. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  930. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  931. spin_lock_irq(&data->misclock);
  932. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  933. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  934. spin_lock(&data->txlock);
  935. if (data->txfree && data->link_up)
  936. netif_wake_queue(dev);
  937. spin_unlock(&data->txlock);
  938. spin_unlock_irq(&data->misclock);
  939. return 0;
  940. }
  941. /* Protected by dev->xmit_lock. */
  942. static void tsi108_set_rx_mode(struct net_device *dev)
  943. {
  944. struct tsi108_prv_data *data = netdev_priv(dev);
  945. u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
  946. if (dev->flags & IFF_PROMISC) {
  947. rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
  948. rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
  949. goto out;
  950. }
  951. rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
  952. if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
  953. int i;
  954. struct dev_mc_list *mc = dev->mc_list;
  955. rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
  956. memset(data->mc_hash, 0, sizeof(data->mc_hash));
  957. while (mc) {
  958. u32 hash, crc;
  959. if (mc->dmi_addrlen == 6) {
  960. crc = ether_crc(6, mc->dmi_addr);
  961. hash = crc >> 23;
  962. __set_bit(hash, &data->mc_hash[0]);
  963. } else {
  964. printk(KERN_ERR
  965. "%s: got multicast address of length %d "
  966. "instead of 6.\n", dev->name,
  967. mc->dmi_addrlen);
  968. }
  969. mc = mc->next;
  970. }
  971. TSI_WRITE(TSI108_EC_HASHADDR,
  972. TSI108_EC_HASHADDR_AUTOINC |
  973. TSI108_EC_HASHADDR_MCAST);
  974. for (i = 0; i < 16; i++) {
  975. /* The manual says that the hardware may drop
  976. * back-to-back writes to the data register.
  977. */
  978. udelay(1);
  979. TSI_WRITE(TSI108_EC_HASHDATA,
  980. data->mc_hash[i]);
  981. }
  982. }
  983. out:
  984. TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
  985. }
  986. static void tsi108_init_phy(struct net_device *dev)
  987. {
  988. struct tsi108_prv_data *data = netdev_priv(dev);
  989. u32 i = 0;
  990. u16 phyval = 0;
  991. unsigned long flags;
  992. spin_lock_irqsave(&phy_lock, flags);
  993. tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
  994. while (i--){
  995. if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
  996. break;
  997. udelay(10);
  998. }
  999. if (i == 0)
  1000. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  1001. #if (TSI108_PHY_TYPE == PHY_BCM54XX) /* Broadcom BCM54xx PHY */
  1002. tsi108_write_mii(data, 0x09, 0x0300);
  1003. tsi108_write_mii(data, 0x10, 0x1020);
  1004. tsi108_write_mii(data, 0x1c, 0x8c00);
  1005. #endif
  1006. tsi108_write_mii(data,
  1007. MII_BMCR,
  1008. BMCR_ANENABLE | BMCR_ANRESTART);
  1009. while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
  1010. cpu_relax();
  1011. /* Set G/MII mode and receive clock select in TBI control #2. The
  1012. * second port won't work if this isn't done, even though we don't
  1013. * use TBI mode.
  1014. */
  1015. tsi108_write_tbi(data, 0x11, 0x30);
  1016. /* FIXME: It seems to take more than 2 back-to-back reads to the
  1017. * PHY_STAT register before the link up status bit is set.
  1018. */
  1019. data->link_up = 1;
  1020. while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
  1021. BMSR_LSTATUS)) {
  1022. if (i++ > (MII_READ_DELAY / 10)) {
  1023. data->link_up = 0;
  1024. break;
  1025. }
  1026. spin_unlock_irqrestore(&phy_lock, flags);
  1027. msleep(10);
  1028. spin_lock_irqsave(&phy_lock, flags);
  1029. }
  1030. printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
  1031. data->phy_ok = 1;
  1032. data->init_media = 1;
  1033. spin_unlock_irqrestore(&phy_lock, flags);
  1034. }
  1035. static void tsi108_kill_phy(struct net_device *dev)
  1036. {
  1037. struct tsi108_prv_data *data = netdev_priv(dev);
  1038. unsigned long flags;
  1039. spin_lock_irqsave(&phy_lock, flags);
  1040. tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
  1041. data->phy_ok = 0;
  1042. spin_unlock_irqrestore(&phy_lock, flags);
  1043. }
  1044. static int tsi108_open(struct net_device *dev)
  1045. {
  1046. int i;
  1047. struct tsi108_prv_data *data = netdev_priv(dev);
  1048. unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
  1049. unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
  1050. i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
  1051. if (i != 0) {
  1052. printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
  1053. data->id, data->irq_num);
  1054. return i;
  1055. } else {
  1056. dev->irq = data->irq_num;
  1057. printk(KERN_NOTICE
  1058. "tsi108_open : Port %d Assigned IRQ %d to %s\n",
  1059. data->id, dev->irq, dev->name);
  1060. }
  1061. data->rxring = dma_alloc_coherent(NULL, rxring_size,
  1062. &data->rxdma, GFP_KERNEL);
  1063. if (!data->rxring) {
  1064. printk(KERN_DEBUG
  1065. "TSI108_ETH: failed to allocate memory for rxring!\n");
  1066. return -ENOMEM;
  1067. } else {
  1068. memset(data->rxring, 0, rxring_size);
  1069. }
  1070. data->txring = dma_alloc_coherent(NULL, txring_size,
  1071. &data->txdma, GFP_KERNEL);
  1072. if (!data->txring) {
  1073. printk(KERN_DEBUG
  1074. "TSI108_ETH: failed to allocate memory for txring!\n");
  1075. pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
  1076. return -ENOMEM;
  1077. } else {
  1078. memset(data->txring, 0, txring_size);
  1079. }
  1080. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1081. data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
  1082. data->rxring[i].blen = TSI108_RXBUF_SIZE;
  1083. data->rxring[i].vlan = 0;
  1084. }
  1085. data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
  1086. data->rxtail = 0;
  1087. data->rxhead = 0;
  1088. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1089. struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN);
  1090. if (!skb) {
  1091. /* Bah. No memory for now, but maybe we'll get
  1092. * some more later.
  1093. * For now, we'll live with the smaller ring.
  1094. */
  1095. printk(KERN_WARNING
  1096. "%s: Could only allocate %d receive skb(s).\n",
  1097. dev->name, i);
  1098. data->rxhead = i;
  1099. break;
  1100. }
  1101. data->rxskbs[i] = skb;
  1102. /* Align the payload on a 4-byte boundary */
  1103. skb_reserve(skb, 2);
  1104. data->rxskbs[i] = skb;
  1105. data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
  1106. data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
  1107. }
  1108. data->rxfree = i;
  1109. TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
  1110. for (i = 0; i < TSI108_TXRING_LEN; i++) {
  1111. data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
  1112. data->txring[i].misc = 0;
  1113. }
  1114. data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
  1115. data->txtail = 0;
  1116. data->txhead = 0;
  1117. data->txfree = TSI108_TXRING_LEN;
  1118. TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
  1119. tsi108_init_phy(dev);
  1120. setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
  1121. mod_timer(&data->timer, jiffies + 1);
  1122. tsi108_restart_rx(data, dev);
  1123. TSI_WRITE(TSI108_EC_INTSTAT, ~0);
  1124. TSI_WRITE(TSI108_EC_INTMASK,
  1125. ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
  1126. TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
  1127. TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
  1128. TSI108_INT_SFN | TSI108_INT_STATCARRY));
  1129. TSI_WRITE(TSI108_MAC_CFG1,
  1130. TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
  1131. netif_start_queue(dev);
  1132. return 0;
  1133. }
  1134. static int tsi108_close(struct net_device *dev)
  1135. {
  1136. struct tsi108_prv_data *data = netdev_priv(dev);
  1137. netif_stop_queue(dev);
  1138. del_timer_sync(&data->timer);
  1139. tsi108_stop_ethernet(dev);
  1140. tsi108_kill_phy(dev);
  1141. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1142. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1143. /* Check for any pending TX packets, and drop them. */
  1144. while (!data->txfree || data->txhead != data->txtail) {
  1145. int tx = data->txtail;
  1146. struct sk_buff *skb;
  1147. skb = data->txskbs[tx];
  1148. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  1149. data->txfree++;
  1150. dev_kfree_skb(skb);
  1151. }
  1152. synchronize_irq(data->irq_num);
  1153. free_irq(data->irq_num, dev);
  1154. /* Discard the RX ring. */
  1155. while (data->rxfree) {
  1156. int rx = data->rxtail;
  1157. struct sk_buff *skb;
  1158. skb = data->rxskbs[rx];
  1159. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  1160. data->rxfree--;
  1161. dev_kfree_skb(skb);
  1162. }
  1163. dma_free_coherent(0,
  1164. TSI108_RXRING_LEN * sizeof(rx_desc),
  1165. data->rxring, data->rxdma);
  1166. dma_free_coherent(0,
  1167. TSI108_TXRING_LEN * sizeof(tx_desc),
  1168. data->txring, data->txdma);
  1169. return 0;
  1170. }
  1171. static void tsi108_init_mac(struct net_device *dev)
  1172. {
  1173. struct tsi108_prv_data *data = netdev_priv(dev);
  1174. TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
  1175. TSI108_MAC_CFG2_PADCRC);
  1176. TSI_WRITE(TSI108_EC_TXTHRESH,
  1177. (192 << TSI108_EC_TXTHRESH_STARTFILL) |
  1178. (192 << TSI108_EC_TXTHRESH_STOPFILL));
  1179. TSI_WRITE(TSI108_STAT_CARRYMASK1,
  1180. ~(TSI108_STAT_CARRY1_RXBYTES |
  1181. TSI108_STAT_CARRY1_RXPKTS |
  1182. TSI108_STAT_CARRY1_RXFCS |
  1183. TSI108_STAT_CARRY1_RXMCAST |
  1184. TSI108_STAT_CARRY1_RXALIGN |
  1185. TSI108_STAT_CARRY1_RXLENGTH |
  1186. TSI108_STAT_CARRY1_RXRUNT |
  1187. TSI108_STAT_CARRY1_RXJUMBO |
  1188. TSI108_STAT_CARRY1_RXFRAG |
  1189. TSI108_STAT_CARRY1_RXJABBER |
  1190. TSI108_STAT_CARRY1_RXDROP));
  1191. TSI_WRITE(TSI108_STAT_CARRYMASK2,
  1192. ~(TSI108_STAT_CARRY2_TXBYTES |
  1193. TSI108_STAT_CARRY2_TXPKTS |
  1194. TSI108_STAT_CARRY2_TXEXDEF |
  1195. TSI108_STAT_CARRY2_TXEXCOL |
  1196. TSI108_STAT_CARRY2_TXTCOL |
  1197. TSI108_STAT_CARRY2_TXPAUSE));
  1198. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
  1199. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1200. TSI_WRITE(TSI108_EC_RXCFG,
  1201. TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
  1202. TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
  1203. TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
  1204. TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1205. TSI108_EC_TXQ_CFG_SFNPORT));
  1206. TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
  1207. TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
  1208. TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1209. TSI108_EC_RXQ_CFG_SFNPORT));
  1210. TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
  1211. TSI108_EC_TXQ_BUFCFG_BURST256 |
  1212. TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1213. TSI108_EC_TXQ_BUFCFG_SFNPORT));
  1214. TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
  1215. TSI108_EC_RXQ_BUFCFG_BURST256 |
  1216. TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1217. TSI108_EC_RXQ_BUFCFG_SFNPORT));
  1218. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1219. }
  1220. static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1221. {
  1222. struct tsi108_prv_data *data = netdev_priv(dev);
  1223. return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
  1224. }
  1225. static int
  1226. tsi108_init_one(struct platform_device *pdev)
  1227. {
  1228. struct net_device *dev = NULL;
  1229. struct tsi108_prv_data *data = NULL;
  1230. hw_info *einfo;
  1231. int err = 0;
  1232. einfo = pdev->dev.platform_data;
  1233. if (NULL == einfo) {
  1234. printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
  1235. pdev->id);
  1236. return -ENODEV;
  1237. }
  1238. /* Create an ethernet device instance */
  1239. dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
  1240. if (!dev) {
  1241. printk("tsi108_eth: Could not allocate a device structure\n");
  1242. return -ENOMEM;
  1243. }
  1244. printk("tsi108_eth%d: probe...\n", pdev->id);
  1245. data = netdev_priv(dev);
  1246. pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
  1247. pdev->id, einfo->regs, einfo->phyregs,
  1248. einfo->phy, einfo->irq_num);
  1249. data->regs = ioremap(einfo->regs, 0x400);
  1250. if (NULL == data->regs) {
  1251. err = -ENOMEM;
  1252. goto regs_fail;
  1253. }
  1254. data->phyregs = ioremap(einfo->phyregs, 0x400);
  1255. if (NULL == data->phyregs) {
  1256. err = -ENOMEM;
  1257. goto regs_fail;
  1258. }
  1259. /* MII setup */
  1260. data->mii_if.dev = dev;
  1261. data->mii_if.mdio_read = tsi108_mdio_read;
  1262. data->mii_if.mdio_write = tsi108_mdio_write;
  1263. data->mii_if.phy_id = einfo->phy;
  1264. data->mii_if.phy_id_mask = 0x1f;
  1265. data->mii_if.reg_num_mask = 0x1f;
  1266. data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
  1267. data->phy = einfo->phy;
  1268. data->irq_num = einfo->irq_num;
  1269. data->id = pdev->id;
  1270. dev->open = tsi108_open;
  1271. dev->stop = tsi108_close;
  1272. dev->hard_start_xmit = tsi108_send_packet;
  1273. dev->set_mac_address = tsi108_set_mac;
  1274. dev->set_multicast_list = tsi108_set_rx_mode;
  1275. dev->get_stats = tsi108_get_stats;
  1276. dev->poll = tsi108_poll;
  1277. dev->do_ioctl = tsi108_do_ioctl;
  1278. dev->weight = 64; /* 64 is more suitable for GigE interface - klai */
  1279. /* Apparently, the Linux networking code won't use scatter-gather
  1280. * if the hardware doesn't do checksums. However, it's faster
  1281. * to checksum in place and use SG, as (among other reasons)
  1282. * the cache won't be dirtied (which then has to be flushed
  1283. * before DMA). The checksumming is done by the driver (via
  1284. * a new function skb_csum_dev() in net/core/skbuff.c).
  1285. */
  1286. dev->features = NETIF_F_HIGHDMA;
  1287. SET_MODULE_OWNER(dev);
  1288. spin_lock_init(&data->txlock);
  1289. spin_lock_init(&data->misclock);
  1290. tsi108_reset_ether(data);
  1291. tsi108_kill_phy(dev);
  1292. if ((err = tsi108_get_mac(dev)) != 0) {
  1293. printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
  1294. dev->name);
  1295. goto register_fail;
  1296. }
  1297. tsi108_init_mac(dev);
  1298. err = register_netdev(dev);
  1299. if (err) {
  1300. printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
  1301. dev->name);
  1302. goto register_fail;
  1303. }
  1304. printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: "
  1305. "%02x:%02x:%02x:%02x:%02x:%02x\n", dev->name,
  1306. dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
  1307. dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
  1308. #ifdef DEBUG
  1309. data->msg_enable = DEBUG;
  1310. dump_eth_one(dev);
  1311. #endif
  1312. return 0;
  1313. register_fail:
  1314. iounmap(data->regs);
  1315. iounmap(data->phyregs);
  1316. regs_fail:
  1317. free_netdev(dev);
  1318. return err;
  1319. }
  1320. /* There's no way to either get interrupts from the PHY when
  1321. * something changes, or to have the Tsi108 automatically communicate
  1322. * with the PHY to reconfigure itself.
  1323. *
  1324. * Thus, we have to do it using a timer.
  1325. */
  1326. static void tsi108_timed_checker(unsigned long dev_ptr)
  1327. {
  1328. struct net_device *dev = (struct net_device *)dev_ptr;
  1329. struct tsi108_prv_data *data = netdev_priv(dev);
  1330. tsi108_check_phy(dev);
  1331. tsi108_check_rxring(dev);
  1332. mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
  1333. }
  1334. static int tsi108_ether_init(void)
  1335. {
  1336. int ret;
  1337. ret = platform_driver_register (&tsi_eth_driver);
  1338. if (ret < 0){
  1339. printk("tsi108_ether_init: error initializing ethernet "
  1340. "device\n");
  1341. return ret;
  1342. }
  1343. return 0;
  1344. }
  1345. static int tsi108_ether_remove(struct platform_device *pdev)
  1346. {
  1347. struct net_device *dev = platform_get_drvdata(pdev);
  1348. struct tsi108_prv_data *priv = netdev_priv(dev);
  1349. unregister_netdev(dev);
  1350. tsi108_stop_ethernet(dev);
  1351. platform_set_drvdata(pdev, NULL);
  1352. iounmap(priv->regs);
  1353. iounmap(priv->phyregs);
  1354. free_netdev(dev);
  1355. return 0;
  1356. }
  1357. static void tsi108_ether_exit(void)
  1358. {
  1359. platform_driver_unregister(&tsi_eth_driver);
  1360. }
  1361. module_init(tsi108_ether_init);
  1362. module_exit(tsi108_ether_exit);
  1363. MODULE_AUTHOR("Tundra Semiconductor Corporation");
  1364. MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
  1365. MODULE_LICENSE("GPL");