sunlance.c 42 KB

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  1. /* $Id: sunlance.c,v 1.1.1.1 2007/06/12 07:27:10 eyryu Exp $
  2. * lance.c: Linux/Sparc/Lance driver
  3. *
  4. * Written 1995, 1996 by Miguel de Icaza
  5. * Sources:
  6. * The Linux depca driver
  7. * The Linux lance driver.
  8. * The Linux skeleton driver.
  9. * The NetBSD Sparc/Lance driver.
  10. * Theo de Raadt (deraadt@openbsd.org)
  11. * NCR92C990 Lan Controller manual
  12. *
  13. * 1.4:
  14. * Added support to run with a ledma on the Sun4m
  15. *
  16. * 1.5:
  17. * Added multiple card detection.
  18. *
  19. * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
  20. * (ecd@skynet.be)
  21. *
  22. * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
  23. * (ecd@skynet.be)
  24. *
  25. * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
  26. * (davem@caip.rutgers.edu)
  27. *
  28. * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
  29. * this disables auto carrier detection on sun4m. Eddie C. Dost
  30. * (ecd@skynet.be)
  31. *
  32. * 1.7:
  33. * 6/26/96: Bug fix for multiple ledmas, miguel.
  34. *
  35. * 1.8:
  36. * Stole multicast code from depca.c, fixed lance_tx.
  37. *
  38. * 1.9:
  39. * 8/21/96: Fixed the multicast code (Pedro Roque)
  40. *
  41. * 8/28/96: Send fake packet in lance_open() if auto_select is true,
  42. * so we can detect the carrier loss condition in time.
  43. * Eddie C. Dost (ecd@skynet.be)
  44. *
  45. * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
  46. * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
  47. *
  48. * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
  49. *
  50. * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
  51. * This was the sun4c killer. Shit, stupid bug.
  52. * (ecd@skynet.be)
  53. *
  54. * 1.10:
  55. * 1/26/97: Modularize driver. (ecd@skynet.be)
  56. *
  57. * 1.11:
  58. * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
  59. *
  60. * 1.12:
  61. * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
  62. * Anton Blanchard (anton@progsoc.uts.edu.au)
  63. * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
  64. * David S. Miller (davem@redhat.com)
  65. * 2.01:
  66. * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
  67. *
  68. */
  69. #undef DEBUG_DRIVER
  70. static char lancestr[] = "LANCE";
  71. #include <linux/module.h>
  72. #include <linux/kernel.h>
  73. #include <linux/types.h>
  74. #include <linux/fcntl.h>
  75. #include <linux/interrupt.h>
  76. #include <linux/ioport.h>
  77. #include <linux/in.h>
  78. #include <linux/slab.h>
  79. #include <linux/string.h>
  80. #include <linux/delay.h>
  81. #include <linux/init.h>
  82. #include <linux/crc32.h>
  83. #include <linux/errno.h>
  84. #include <linux/socket.h> /* Used for the temporal inet entries and routing */
  85. #include <linux/route.h>
  86. #include <linux/netdevice.h>
  87. #include <linux/etherdevice.h>
  88. #include <linux/skbuff.h>
  89. #include <linux/ethtool.h>
  90. #include <linux/bitops.h>
  91. #include <asm/system.h>
  92. #include <asm/io.h>
  93. #include <asm/dma.h>
  94. #include <asm/pgtable.h>
  95. #include <asm/byteorder.h> /* Used by the checksum routines */
  96. #include <asm/idprom.h>
  97. #include <asm/sbus.h>
  98. #include <asm/openprom.h>
  99. #include <asm/oplib.h>
  100. #include <asm/auxio.h> /* For tpe-link-test? setting */
  101. #include <asm/irq.h>
  102. #define DRV_NAME "sunlance"
  103. #define DRV_VERSION "2.02"
  104. #define DRV_RELDATE "8/24/03"
  105. #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
  106. static char version[] =
  107. DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  108. MODULE_VERSION(DRV_VERSION);
  109. MODULE_AUTHOR(DRV_AUTHOR);
  110. MODULE_DESCRIPTION("Sun Lance ethernet driver");
  111. MODULE_LICENSE("GPL");
  112. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  113. #ifndef LANCE_LOG_TX_BUFFERS
  114. #define LANCE_LOG_TX_BUFFERS 4
  115. #define LANCE_LOG_RX_BUFFERS 4
  116. #endif
  117. #define LE_CSR0 0
  118. #define LE_CSR1 1
  119. #define LE_CSR2 2
  120. #define LE_CSR3 3
  121. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  122. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  123. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  124. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  125. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  126. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  127. #define LE_C0_RINT 0x0400 /* Received interrupt */
  128. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  129. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  130. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  131. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  132. #define LE_C0_RXON 0x0020 /* Receiver on */
  133. #define LE_C0_TXON 0x0010 /* Transmitter on */
  134. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  135. #define LE_C0_STOP 0x0004 /* Stop the card */
  136. #define LE_C0_STRT 0x0002 /* Start the card */
  137. #define LE_C0_INIT 0x0001 /* Init the card */
  138. #define LE_C3_BSWP 0x4 /* SWAP */
  139. #define LE_C3_ACON 0x2 /* ALE Control */
  140. #define LE_C3_BCON 0x1 /* Byte control */
  141. /* Receive message descriptor 1 */
  142. #define LE_R1_OWN 0x80 /* Who owns the entry */
  143. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  144. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  145. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  146. #define LE_R1_CRC 0x08 /* CRC error */
  147. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  148. #define LE_R1_SOP 0x02 /* Start of packet */
  149. #define LE_R1_EOP 0x01 /* End of packet */
  150. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  151. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  152. #define LE_T1_ERR 0x40 /* Error summary */
  153. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  154. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  155. #define LE_T1_EDEF 0x04 /* Error: deferred */
  156. #define LE_T1_SOP 0x02 /* Start of packet */
  157. #define LE_T1_EOP 0x01 /* End of packet */
  158. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  159. #define LE_T3_BUF 0x8000 /* Buffer error */
  160. #define LE_T3_UFL 0x4000 /* Error underflow */
  161. #define LE_T3_LCOL 0x1000 /* Error late collision */
  162. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  163. #define LE_T3_RTY 0x0400 /* Error retry */
  164. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  165. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  166. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  167. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  168. #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
  169. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  170. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  171. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  172. #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
  173. #define PKT_BUF_SZ 1544
  174. #define RX_BUFF_SIZE PKT_BUF_SZ
  175. #define TX_BUFF_SIZE PKT_BUF_SZ
  176. struct lance_rx_desc {
  177. u16 rmd0; /* low address of packet */
  178. u8 rmd1_bits; /* descriptor bits */
  179. u8 rmd1_hadr; /* high address of packet */
  180. s16 length; /* This length is 2s complement (negative)!
  181. * Buffer length
  182. */
  183. u16 mblength; /* This is the actual number of bytes received */
  184. };
  185. struct lance_tx_desc {
  186. u16 tmd0; /* low address of packet */
  187. u8 tmd1_bits; /* descriptor bits */
  188. u8 tmd1_hadr; /* high address of packet */
  189. s16 length; /* Length is 2s complement (negative)! */
  190. u16 misc;
  191. };
  192. /* The LANCE initialization block, described in databook. */
  193. /* On the Sparc, this block should be on a DMA region */
  194. struct lance_init_block {
  195. u16 mode; /* Pre-set mode (reg. 15) */
  196. u8 phys_addr[6]; /* Physical ethernet address */
  197. u32 filter[2]; /* Multicast filter. */
  198. /* Receive and transmit ring base, along with extra bits. */
  199. u16 rx_ptr; /* receive descriptor addr */
  200. u16 rx_len; /* receive len and high addr */
  201. u16 tx_ptr; /* transmit descriptor addr */
  202. u16 tx_len; /* transmit len and high addr */
  203. /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
  204. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  205. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  206. u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  207. u8 pad[2]; /* align rx_buf for copy_and_sum(). */
  208. u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  209. };
  210. #define libdesc_offset(rt, elem) \
  211. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  212. #define libbuff_offset(rt, elem) \
  213. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
  214. struct lance_private {
  215. void __iomem *lregs; /* Lance RAP/RDP regs. */
  216. void __iomem *dregs; /* DMA controller regs. */
  217. struct lance_init_block __iomem *init_block_iomem;
  218. struct lance_init_block *init_block_mem;
  219. spinlock_t lock;
  220. int rx_new, tx_new;
  221. int rx_old, tx_old;
  222. struct net_device_stats stats;
  223. struct sbus_dma *ledma; /* If set this points to ledma */
  224. char tpe; /* cable-selection is TPE */
  225. char auto_select; /* cable-selection by carrier */
  226. char burst_sizes; /* ledma SBus burst sizes */
  227. char pio_buffer; /* init block in PIO space? */
  228. unsigned short busmaster_regval;
  229. void (*init_ring)(struct net_device *);
  230. void (*rx)(struct net_device *);
  231. void (*tx)(struct net_device *);
  232. char *name;
  233. dma_addr_t init_block_dvma;
  234. struct net_device *dev; /* Backpointer */
  235. struct sbus_dev *sdev;
  236. struct timer_list multicast_timer;
  237. };
  238. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  239. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  240. lp->tx_old - lp->tx_new-1)
  241. /* Lance registers. */
  242. #define RDP 0x00UL /* register data port */
  243. #define RAP 0x02UL /* register address port */
  244. #define LANCE_REG_SIZE 0x04UL
  245. #define STOP_LANCE(__lp) \
  246. do { void __iomem *__base = (__lp)->lregs; \
  247. sbus_writew(LE_CSR0, __base + RAP); \
  248. sbus_writew(LE_C0_STOP, __base + RDP); \
  249. } while (0)
  250. int sparc_lance_debug = 2;
  251. /* The Lance uses 24 bit addresses */
  252. /* On the Sun4c the DVMA will provide the remaining bytes for us */
  253. /* On the Sun4m we have to instruct the ledma to provide them */
  254. /* Even worse, on scsi/ether SBUS cards, the init block and the
  255. * transmit/receive buffers are addresses as offsets from absolute
  256. * zero on the lebuffer PIO area. -DaveM
  257. */
  258. #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
  259. /* Load the CSR registers */
  260. static void load_csrs(struct lance_private *lp)
  261. {
  262. u32 leptr;
  263. if (lp->pio_buffer)
  264. leptr = 0;
  265. else
  266. leptr = LANCE_ADDR(lp->init_block_dvma);
  267. sbus_writew(LE_CSR1, lp->lregs + RAP);
  268. sbus_writew(leptr & 0xffff, lp->lregs + RDP);
  269. sbus_writew(LE_CSR2, lp->lregs + RAP);
  270. sbus_writew(leptr >> 16, lp->lregs + RDP);
  271. sbus_writew(LE_CSR3, lp->lregs + RAP);
  272. sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
  273. /* Point back to csr0 */
  274. sbus_writew(LE_CSR0, lp->lregs + RAP);
  275. }
  276. /* Setup the Lance Rx and Tx rings */
  277. static void lance_init_ring_dvma(struct net_device *dev)
  278. {
  279. struct lance_private *lp = netdev_priv(dev);
  280. struct lance_init_block *ib = lp->init_block_mem;
  281. dma_addr_t aib = lp->init_block_dvma;
  282. __u32 leptr;
  283. int i;
  284. /* Lock out other processes while setting up hardware */
  285. netif_stop_queue(dev);
  286. lp->rx_new = lp->tx_new = 0;
  287. lp->rx_old = lp->tx_old = 0;
  288. /* Copy the ethernet address to the lance init block
  289. * Note that on the sparc you need to swap the ethernet address.
  290. */
  291. ib->phys_addr [0] = dev->dev_addr [1];
  292. ib->phys_addr [1] = dev->dev_addr [0];
  293. ib->phys_addr [2] = dev->dev_addr [3];
  294. ib->phys_addr [3] = dev->dev_addr [2];
  295. ib->phys_addr [4] = dev->dev_addr [5];
  296. ib->phys_addr [5] = dev->dev_addr [4];
  297. /* Setup the Tx ring entries */
  298. for (i = 0; i <= TX_RING_SIZE; i++) {
  299. leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
  300. ib->btx_ring [i].tmd0 = leptr;
  301. ib->btx_ring [i].tmd1_hadr = leptr >> 16;
  302. ib->btx_ring [i].tmd1_bits = 0;
  303. ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
  304. ib->btx_ring [i].misc = 0;
  305. }
  306. /* Setup the Rx ring entries */
  307. for (i = 0; i < RX_RING_SIZE; i++) {
  308. leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
  309. ib->brx_ring [i].rmd0 = leptr;
  310. ib->brx_ring [i].rmd1_hadr = leptr >> 16;
  311. ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
  312. ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
  313. ib->brx_ring [i].mblength = 0;
  314. }
  315. /* Setup the initialization block */
  316. /* Setup rx descriptor pointer */
  317. leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
  318. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  319. ib->rx_ptr = leptr;
  320. /* Setup tx descriptor pointer */
  321. leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
  322. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  323. ib->tx_ptr = leptr;
  324. }
  325. static void lance_init_ring_pio(struct net_device *dev)
  326. {
  327. struct lance_private *lp = netdev_priv(dev);
  328. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  329. u32 leptr;
  330. int i;
  331. /* Lock out other processes while setting up hardware */
  332. netif_stop_queue(dev);
  333. lp->rx_new = lp->tx_new = 0;
  334. lp->rx_old = lp->tx_old = 0;
  335. /* Copy the ethernet address to the lance init block
  336. * Note that on the sparc you need to swap the ethernet address.
  337. */
  338. sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
  339. sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
  340. sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
  341. sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
  342. sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
  343. sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
  344. /* Setup the Tx ring entries */
  345. for (i = 0; i <= TX_RING_SIZE; i++) {
  346. leptr = libbuff_offset(tx_buf, i);
  347. sbus_writew(leptr, &ib->btx_ring [i].tmd0);
  348. sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
  349. sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
  350. /* The ones required by tmd2 */
  351. sbus_writew(0xf000, &ib->btx_ring [i].length);
  352. sbus_writew(0, &ib->btx_ring [i].misc);
  353. }
  354. /* Setup the Rx ring entries */
  355. for (i = 0; i < RX_RING_SIZE; i++) {
  356. leptr = libbuff_offset(rx_buf, i);
  357. sbus_writew(leptr, &ib->brx_ring [i].rmd0);
  358. sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
  359. sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
  360. sbus_writew(-RX_BUFF_SIZE|0xf000,
  361. &ib->brx_ring [i].length);
  362. sbus_writew(0, &ib->brx_ring [i].mblength);
  363. }
  364. /* Setup the initialization block */
  365. /* Setup rx descriptor pointer */
  366. leptr = libdesc_offset(brx_ring, 0);
  367. sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
  368. &ib->rx_len);
  369. sbus_writew(leptr, &ib->rx_ptr);
  370. /* Setup tx descriptor pointer */
  371. leptr = libdesc_offset(btx_ring, 0);
  372. sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
  373. &ib->tx_len);
  374. sbus_writew(leptr, &ib->tx_ptr);
  375. }
  376. static void init_restart_ledma(struct lance_private *lp)
  377. {
  378. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  379. if (!(csr & DMA_HNDL_ERROR)) {
  380. /* E-Cache draining */
  381. while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  382. barrier();
  383. }
  384. csr = sbus_readl(lp->dregs + DMA_CSR);
  385. csr &= ~DMA_E_BURSTS;
  386. if (lp->burst_sizes & DMA_BURST32)
  387. csr |= DMA_E_BURST32;
  388. else
  389. csr |= DMA_E_BURST16;
  390. csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
  391. if (lp->tpe)
  392. csr |= DMA_EN_ENETAUI;
  393. else
  394. csr &= ~DMA_EN_ENETAUI;
  395. udelay(20);
  396. sbus_writel(csr, lp->dregs + DMA_CSR);
  397. udelay(200);
  398. }
  399. static int init_restart_lance(struct lance_private *lp)
  400. {
  401. u16 regval = 0;
  402. int i;
  403. if (lp->dregs)
  404. init_restart_ledma(lp);
  405. sbus_writew(LE_CSR0, lp->lregs + RAP);
  406. sbus_writew(LE_C0_INIT, lp->lregs + RDP);
  407. /* Wait for the lance to complete initialization */
  408. for (i = 0; i < 100; i++) {
  409. regval = sbus_readw(lp->lregs + RDP);
  410. if (regval & (LE_C0_ERR | LE_C0_IDON))
  411. break;
  412. barrier();
  413. }
  414. if (i == 100 || (regval & LE_C0_ERR)) {
  415. printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
  416. i, regval);
  417. if (lp->dregs)
  418. printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
  419. return -1;
  420. }
  421. /* Clear IDON by writing a "1", enable interrupts and start lance */
  422. sbus_writew(LE_C0_IDON, lp->lregs + RDP);
  423. sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
  424. if (lp->dregs) {
  425. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  426. csr |= DMA_INT_ENAB;
  427. sbus_writel(csr, lp->dregs + DMA_CSR);
  428. }
  429. return 0;
  430. }
  431. static void lance_rx_dvma(struct net_device *dev)
  432. {
  433. struct lance_private *lp = netdev_priv(dev);
  434. struct lance_init_block *ib = lp->init_block_mem;
  435. struct lance_rx_desc *rd;
  436. u8 bits;
  437. int len, entry = lp->rx_new;
  438. struct sk_buff *skb;
  439. for (rd = &ib->brx_ring [entry];
  440. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  441. rd = &ib->brx_ring [entry]) {
  442. /* We got an incomplete frame? */
  443. if ((bits & LE_R1_POK) != LE_R1_POK) {
  444. lp->stats.rx_over_errors++;
  445. lp->stats.rx_errors++;
  446. } else if (bits & LE_R1_ERR) {
  447. /* Count only the end frame as a rx error,
  448. * not the beginning
  449. */
  450. if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
  451. if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
  452. if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
  453. if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
  454. if (bits & LE_R1_EOP) lp->stats.rx_errors++;
  455. } else {
  456. len = (rd->mblength & 0xfff) - 4;
  457. skb = dev_alloc_skb(len + 2);
  458. if (skb == NULL) {
  459. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  460. dev->name);
  461. lp->stats.rx_dropped++;
  462. rd->mblength = 0;
  463. rd->rmd1_bits = LE_R1_OWN;
  464. lp->rx_new = RX_NEXT(entry);
  465. return;
  466. }
  467. lp->stats.rx_bytes += len;
  468. skb->dev = dev;
  469. skb_reserve(skb, 2); /* 16 byte align */
  470. skb_put(skb, len); /* make room */
  471. eth_copy_and_sum(skb,
  472. (unsigned char *)&(ib->rx_buf [entry][0]),
  473. len, 0);
  474. skb->protocol = eth_type_trans(skb, dev);
  475. netif_rx(skb);
  476. dev->last_rx = jiffies;
  477. lp->stats.rx_packets++;
  478. }
  479. /* Return the packet to the pool */
  480. rd->mblength = 0;
  481. rd->rmd1_bits = LE_R1_OWN;
  482. entry = RX_NEXT(entry);
  483. }
  484. lp->rx_new = entry;
  485. }
  486. static void lance_tx_dvma(struct net_device *dev)
  487. {
  488. struct lance_private *lp = netdev_priv(dev);
  489. struct lance_init_block *ib = lp->init_block_mem;
  490. int i, j;
  491. spin_lock(&lp->lock);
  492. j = lp->tx_old;
  493. for (i = j; i != lp->tx_new; i = j) {
  494. struct lance_tx_desc *td = &ib->btx_ring [i];
  495. u8 bits = td->tmd1_bits;
  496. /* If we hit a packet not owned by us, stop */
  497. if (bits & LE_T1_OWN)
  498. break;
  499. if (bits & LE_T1_ERR) {
  500. u16 status = td->misc;
  501. lp->stats.tx_errors++;
  502. if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
  503. if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
  504. if (status & LE_T3_CLOS) {
  505. lp->stats.tx_carrier_errors++;
  506. if (lp->auto_select) {
  507. lp->tpe = 1 - lp->tpe;
  508. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  509. dev->name, lp->tpe?"TPE":"AUI");
  510. STOP_LANCE(lp);
  511. lp->init_ring(dev);
  512. load_csrs(lp);
  513. init_restart_lance(lp);
  514. goto out;
  515. }
  516. }
  517. /* Buffer errors and underflows turn off the
  518. * transmitter, restart the adapter.
  519. */
  520. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  521. lp->stats.tx_fifo_errors++;
  522. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  523. dev->name);
  524. STOP_LANCE(lp);
  525. lp->init_ring(dev);
  526. load_csrs(lp);
  527. init_restart_lance(lp);
  528. goto out;
  529. }
  530. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  531. /*
  532. * So we don't count the packet more than once.
  533. */
  534. td->tmd1_bits = bits & ~(LE_T1_POK);
  535. /* One collision before packet was sent. */
  536. if (bits & LE_T1_EONE)
  537. lp->stats.collisions++;
  538. /* More than one collision, be optimistic. */
  539. if (bits & LE_T1_EMORE)
  540. lp->stats.collisions += 2;
  541. lp->stats.tx_packets++;
  542. }
  543. j = TX_NEXT(j);
  544. }
  545. lp->tx_old = j;
  546. out:
  547. if (netif_queue_stopped(dev) &&
  548. TX_BUFFS_AVAIL > 0)
  549. netif_wake_queue(dev);
  550. spin_unlock(&lp->lock);
  551. }
  552. static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
  553. {
  554. u16 *p16 = (u16 *) skb->data;
  555. u32 *p32;
  556. u8 *p8;
  557. void __iomem *pbuf = piobuf;
  558. /* We know here that both src and dest are on a 16bit boundary. */
  559. *p16++ = sbus_readw(pbuf);
  560. p32 = (u32 *) p16;
  561. pbuf += 2;
  562. len -= 2;
  563. while (len >= 4) {
  564. *p32++ = sbus_readl(pbuf);
  565. pbuf += 4;
  566. len -= 4;
  567. }
  568. p8 = (u8 *) p32;
  569. if (len >= 2) {
  570. p16 = (u16 *) p32;
  571. *p16++ = sbus_readw(pbuf);
  572. pbuf += 2;
  573. len -= 2;
  574. p8 = (u8 *) p16;
  575. }
  576. if (len >= 1)
  577. *p8 = sbus_readb(pbuf);
  578. }
  579. static void lance_rx_pio(struct net_device *dev)
  580. {
  581. struct lance_private *lp = netdev_priv(dev);
  582. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  583. struct lance_rx_desc __iomem *rd;
  584. unsigned char bits;
  585. int len, entry;
  586. struct sk_buff *skb;
  587. entry = lp->rx_new;
  588. for (rd = &ib->brx_ring [entry];
  589. !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
  590. rd = &ib->brx_ring [entry]) {
  591. /* We got an incomplete frame? */
  592. if ((bits & LE_R1_POK) != LE_R1_POK) {
  593. lp->stats.rx_over_errors++;
  594. lp->stats.rx_errors++;
  595. } else if (bits & LE_R1_ERR) {
  596. /* Count only the end frame as a rx error,
  597. * not the beginning
  598. */
  599. if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
  600. if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
  601. if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
  602. if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
  603. if (bits & LE_R1_EOP) lp->stats.rx_errors++;
  604. } else {
  605. len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
  606. skb = dev_alloc_skb(len + 2);
  607. if (skb == NULL) {
  608. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  609. dev->name);
  610. lp->stats.rx_dropped++;
  611. sbus_writew(0, &rd->mblength);
  612. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  613. lp->rx_new = RX_NEXT(entry);
  614. return;
  615. }
  616. lp->stats.rx_bytes += len;
  617. skb->dev = dev;
  618. skb_reserve (skb, 2); /* 16 byte align */
  619. skb_put(skb, len); /* make room */
  620. lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
  621. skb->protocol = eth_type_trans(skb, dev);
  622. netif_rx(skb);
  623. dev->last_rx = jiffies;
  624. lp->stats.rx_packets++;
  625. }
  626. /* Return the packet to the pool */
  627. sbus_writew(0, &rd->mblength);
  628. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  629. entry = RX_NEXT(entry);
  630. }
  631. lp->rx_new = entry;
  632. }
  633. static void lance_tx_pio(struct net_device *dev)
  634. {
  635. struct lance_private *lp = netdev_priv(dev);
  636. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  637. int i, j;
  638. spin_lock(&lp->lock);
  639. j = lp->tx_old;
  640. for (i = j; i != lp->tx_new; i = j) {
  641. struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
  642. u8 bits = sbus_readb(&td->tmd1_bits);
  643. /* If we hit a packet not owned by us, stop */
  644. if (bits & LE_T1_OWN)
  645. break;
  646. if (bits & LE_T1_ERR) {
  647. u16 status = sbus_readw(&td->misc);
  648. lp->stats.tx_errors++;
  649. if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
  650. if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
  651. if (status & LE_T3_CLOS) {
  652. lp->stats.tx_carrier_errors++;
  653. if (lp->auto_select) {
  654. lp->tpe = 1 - lp->tpe;
  655. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  656. dev->name, lp->tpe?"TPE":"AUI");
  657. STOP_LANCE(lp);
  658. lp->init_ring(dev);
  659. load_csrs(lp);
  660. init_restart_lance(lp);
  661. goto out;
  662. }
  663. }
  664. /* Buffer errors and underflows turn off the
  665. * transmitter, restart the adapter.
  666. */
  667. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  668. lp->stats.tx_fifo_errors++;
  669. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  670. dev->name);
  671. STOP_LANCE(lp);
  672. lp->init_ring(dev);
  673. load_csrs(lp);
  674. init_restart_lance(lp);
  675. goto out;
  676. }
  677. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  678. /*
  679. * So we don't count the packet more than once.
  680. */
  681. sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
  682. /* One collision before packet was sent. */
  683. if (bits & LE_T1_EONE)
  684. lp->stats.collisions++;
  685. /* More than one collision, be optimistic. */
  686. if (bits & LE_T1_EMORE)
  687. lp->stats.collisions += 2;
  688. lp->stats.tx_packets++;
  689. }
  690. j = TX_NEXT(j);
  691. }
  692. lp->tx_old = j;
  693. if (netif_queue_stopped(dev) &&
  694. TX_BUFFS_AVAIL > 0)
  695. netif_wake_queue(dev);
  696. out:
  697. spin_unlock(&lp->lock);
  698. }
  699. static irqreturn_t lance_interrupt(int irq, void *dev_id)
  700. {
  701. struct net_device *dev = dev_id;
  702. struct lance_private *lp = netdev_priv(dev);
  703. int csr0;
  704. sbus_writew(LE_CSR0, lp->lregs + RAP);
  705. csr0 = sbus_readw(lp->lregs + RDP);
  706. /* Acknowledge all the interrupt sources ASAP */
  707. sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
  708. lp->lregs + RDP);
  709. if ((csr0 & LE_C0_ERR) != 0) {
  710. /* Clear the error condition */
  711. sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  712. LE_C0_CERR | LE_C0_MERR),
  713. lp->lregs + RDP);
  714. }
  715. if (csr0 & LE_C0_RINT)
  716. lp->rx(dev);
  717. if (csr0 & LE_C0_TINT)
  718. lp->tx(dev);
  719. if (csr0 & LE_C0_BABL)
  720. lp->stats.tx_errors++;
  721. if (csr0 & LE_C0_MISS)
  722. lp->stats.rx_errors++;
  723. if (csr0 & LE_C0_MERR) {
  724. if (lp->dregs) {
  725. u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
  726. printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
  727. dev->name, csr0, addr & 0xffffff);
  728. } else {
  729. printk(KERN_ERR "%s: Memory error, status %04x\n",
  730. dev->name, csr0);
  731. }
  732. sbus_writew(LE_C0_STOP, lp->lregs + RDP);
  733. if (lp->dregs) {
  734. u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
  735. dma_csr |= DMA_FIFO_INV;
  736. sbus_writel(dma_csr, lp->dregs + DMA_CSR);
  737. }
  738. lp->init_ring(dev);
  739. load_csrs(lp);
  740. init_restart_lance(lp);
  741. netif_wake_queue(dev);
  742. }
  743. sbus_writew(LE_C0_INEA, lp->lregs + RDP);
  744. return IRQ_HANDLED;
  745. }
  746. /* Build a fake network packet and send it to ourselves. */
  747. static void build_fake_packet(struct lance_private *lp)
  748. {
  749. struct net_device *dev = lp->dev;
  750. int i, entry;
  751. entry = lp->tx_new & TX_RING_MOD_MASK;
  752. if (lp->pio_buffer) {
  753. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  754. u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
  755. struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
  756. for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
  757. sbus_writew(0, &packet[i]);
  758. for (i = 0; i < 6; i++) {
  759. sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
  760. sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
  761. }
  762. sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
  763. sbus_writew(0, &ib->btx_ring[entry].misc);
  764. sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  765. } else {
  766. struct lance_init_block *ib = lp->init_block_mem;
  767. u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
  768. struct ethhdr *eth = (struct ethhdr *) packet;
  769. memset(packet, 0, ETH_ZLEN);
  770. for (i = 0; i < 6; i++) {
  771. eth->h_dest[i] = dev->dev_addr[i];
  772. eth->h_source[i] = dev->dev_addr[i];
  773. }
  774. ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
  775. ib->btx_ring[entry].misc = 0;
  776. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
  777. }
  778. lp->tx_new = TX_NEXT(entry);
  779. }
  780. struct net_device *last_dev;
  781. static int lance_open(struct net_device *dev)
  782. {
  783. struct lance_private *lp = netdev_priv(dev);
  784. int status = 0;
  785. last_dev = dev;
  786. STOP_LANCE(lp);
  787. if (request_irq(dev->irq, &lance_interrupt, IRQF_SHARED,
  788. lancestr, (void *) dev)) {
  789. printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
  790. return -EAGAIN;
  791. }
  792. /* On the 4m, setup the ledma to provide the upper bits for buffers */
  793. if (lp->dregs) {
  794. u32 regval = lp->init_block_dvma & 0xff000000;
  795. sbus_writel(regval, lp->dregs + DMA_TEST);
  796. }
  797. /* Set mode and clear multicast filter only at device open,
  798. * so that lance_init_ring() called at any error will not
  799. * forget multicast filters.
  800. *
  801. * BTW it is common bug in all lance drivers! --ANK
  802. */
  803. if (lp->pio_buffer) {
  804. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  805. sbus_writew(0, &ib->mode);
  806. sbus_writel(0, &ib->filter[0]);
  807. sbus_writel(0, &ib->filter[1]);
  808. } else {
  809. struct lance_init_block *ib = lp->init_block_mem;
  810. ib->mode = 0;
  811. ib->filter [0] = 0;
  812. ib->filter [1] = 0;
  813. }
  814. lp->init_ring(dev);
  815. load_csrs(lp);
  816. netif_start_queue(dev);
  817. status = init_restart_lance(lp);
  818. if (!status && lp->auto_select) {
  819. build_fake_packet(lp);
  820. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  821. }
  822. return status;
  823. }
  824. static int lance_close(struct net_device *dev)
  825. {
  826. struct lance_private *lp = netdev_priv(dev);
  827. netif_stop_queue(dev);
  828. del_timer_sync(&lp->multicast_timer);
  829. STOP_LANCE(lp);
  830. free_irq(dev->irq, (void *) dev);
  831. return 0;
  832. }
  833. static int lance_reset(struct net_device *dev)
  834. {
  835. struct lance_private *lp = netdev_priv(dev);
  836. int status;
  837. STOP_LANCE(lp);
  838. /* On the 4m, reset the dma too */
  839. if (lp->dregs) {
  840. u32 csr, addr;
  841. printk(KERN_ERR "resetting ledma\n");
  842. csr = sbus_readl(lp->dregs + DMA_CSR);
  843. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  844. udelay(200);
  845. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  846. addr = lp->init_block_dvma & 0xff000000;
  847. sbus_writel(addr, lp->dregs + DMA_TEST);
  848. }
  849. lp->init_ring(dev);
  850. load_csrs(lp);
  851. dev->trans_start = jiffies;
  852. status = init_restart_lance(lp);
  853. return status;
  854. }
  855. static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
  856. {
  857. void __iomem *piobuf = dest;
  858. u32 *p32;
  859. u16 *p16;
  860. u8 *p8;
  861. switch ((unsigned long)src & 0x3) {
  862. case 0:
  863. p32 = (u32 *) src;
  864. while (len >= 4) {
  865. sbus_writel(*p32, piobuf);
  866. p32++;
  867. piobuf += 4;
  868. len -= 4;
  869. }
  870. src = (char *) p32;
  871. break;
  872. case 1:
  873. case 3:
  874. p8 = (u8 *) src;
  875. while (len >= 4) {
  876. u32 val;
  877. val = p8[0] << 24;
  878. val |= p8[1] << 16;
  879. val |= p8[2] << 8;
  880. val |= p8[3];
  881. sbus_writel(val, piobuf);
  882. p8 += 4;
  883. piobuf += 4;
  884. len -= 4;
  885. }
  886. src = (char *) p8;
  887. break;
  888. case 2:
  889. p16 = (u16 *) src;
  890. while (len >= 4) {
  891. u32 val = p16[0]<<16 | p16[1];
  892. sbus_writel(val, piobuf);
  893. p16 += 2;
  894. piobuf += 4;
  895. len -= 4;
  896. }
  897. src = (char *) p16;
  898. break;
  899. };
  900. if (len >= 2) {
  901. u16 val = src[0] << 8 | src[1];
  902. sbus_writew(val, piobuf);
  903. src += 2;
  904. piobuf += 2;
  905. len -= 2;
  906. }
  907. if (len >= 1)
  908. sbus_writeb(src[0], piobuf);
  909. }
  910. static void lance_piozero(void __iomem *dest, int len)
  911. {
  912. void __iomem *piobuf = dest;
  913. if ((unsigned long)piobuf & 1) {
  914. sbus_writeb(0, piobuf);
  915. piobuf += 1;
  916. len -= 1;
  917. if (len == 0)
  918. return;
  919. }
  920. if (len == 1) {
  921. sbus_writeb(0, piobuf);
  922. return;
  923. }
  924. if ((unsigned long)piobuf & 2) {
  925. sbus_writew(0, piobuf);
  926. piobuf += 2;
  927. len -= 2;
  928. if (len == 0)
  929. return;
  930. }
  931. while (len >= 4) {
  932. sbus_writel(0, piobuf);
  933. piobuf += 4;
  934. len -= 4;
  935. }
  936. if (len >= 2) {
  937. sbus_writew(0, piobuf);
  938. piobuf += 2;
  939. len -= 2;
  940. }
  941. if (len >= 1)
  942. sbus_writeb(0, piobuf);
  943. }
  944. static void lance_tx_timeout(struct net_device *dev)
  945. {
  946. struct lance_private *lp = netdev_priv(dev);
  947. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  948. dev->name, sbus_readw(lp->lregs + RDP));
  949. lance_reset(dev);
  950. netif_wake_queue(dev);
  951. }
  952. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  953. {
  954. struct lance_private *lp = netdev_priv(dev);
  955. int entry, skblen, len;
  956. skblen = skb->len;
  957. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  958. spin_lock_irq(&lp->lock);
  959. lp->stats.tx_bytes += len;
  960. entry = lp->tx_new & TX_RING_MOD_MASK;
  961. if (lp->pio_buffer) {
  962. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  963. sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
  964. sbus_writew(0, &ib->btx_ring[entry].misc);
  965. lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
  966. if (len != skblen)
  967. lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
  968. sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  969. } else {
  970. struct lance_init_block *ib = lp->init_block_mem;
  971. ib->btx_ring [entry].length = (-len) | 0xf000;
  972. ib->btx_ring [entry].misc = 0;
  973. memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen);
  974. if (len != skblen)
  975. memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
  976. ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  977. }
  978. lp->tx_new = TX_NEXT(entry);
  979. if (TX_BUFFS_AVAIL <= 0)
  980. netif_stop_queue(dev);
  981. /* Kick the lance: transmit now */
  982. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  983. /* Read back CSR to invalidate the E-Cache.
  984. * This is needed, because DMA_DSBL_WR_INV is set.
  985. */
  986. if (lp->dregs)
  987. sbus_readw(lp->lregs + RDP);
  988. spin_unlock_irq(&lp->lock);
  989. dev->trans_start = jiffies;
  990. dev_kfree_skb(skb);
  991. return 0;
  992. }
  993. static struct net_device_stats *lance_get_stats(struct net_device *dev)
  994. {
  995. struct lance_private *lp = netdev_priv(dev);
  996. return &lp->stats;
  997. }
  998. /* taken from the depca driver */
  999. static void lance_load_multicast(struct net_device *dev)
  1000. {
  1001. struct lance_private *lp = netdev_priv(dev);
  1002. struct dev_mc_list *dmi = dev->mc_list;
  1003. char *addrs;
  1004. int i;
  1005. u32 crc;
  1006. u32 val;
  1007. /* set all multicast bits */
  1008. if (dev->flags & IFF_ALLMULTI)
  1009. val = ~0;
  1010. else
  1011. val = 0;
  1012. if (lp->pio_buffer) {
  1013. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1014. sbus_writel(val, &ib->filter[0]);
  1015. sbus_writel(val, &ib->filter[1]);
  1016. } else {
  1017. struct lance_init_block *ib = lp->init_block_mem;
  1018. ib->filter [0] = val;
  1019. ib->filter [1] = val;
  1020. }
  1021. if (dev->flags & IFF_ALLMULTI)
  1022. return;
  1023. /* Add addresses */
  1024. for (i = 0; i < dev->mc_count; i++) {
  1025. addrs = dmi->dmi_addr;
  1026. dmi = dmi->next;
  1027. /* multicast address? */
  1028. if (!(*addrs & 1))
  1029. continue;
  1030. crc = ether_crc_le(6, addrs);
  1031. crc = crc >> 26;
  1032. if (lp->pio_buffer) {
  1033. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1034. u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
  1035. u16 tmp = sbus_readw(&mcast_table[crc>>4]);
  1036. tmp |= 1 << (crc & 0xf);
  1037. sbus_writew(tmp, &mcast_table[crc>>4]);
  1038. } else {
  1039. struct lance_init_block *ib = lp->init_block_mem;
  1040. u16 *mcast_table = (u16 *) &ib->filter;
  1041. mcast_table [crc >> 4] |= 1 << (crc & 0xf);
  1042. }
  1043. }
  1044. }
  1045. static void lance_set_multicast(struct net_device *dev)
  1046. {
  1047. struct lance_private *lp = netdev_priv(dev);
  1048. struct lance_init_block *ib_mem = lp->init_block_mem;
  1049. struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
  1050. u16 mode;
  1051. if (!netif_running(dev))
  1052. return;
  1053. if (lp->tx_old != lp->tx_new) {
  1054. mod_timer(&lp->multicast_timer, jiffies + 4);
  1055. netif_wake_queue(dev);
  1056. return;
  1057. }
  1058. netif_stop_queue(dev);
  1059. STOP_LANCE(lp);
  1060. lp->init_ring(dev);
  1061. if (lp->pio_buffer)
  1062. mode = sbus_readw(&ib_iomem->mode);
  1063. else
  1064. mode = ib_mem->mode;
  1065. if (dev->flags & IFF_PROMISC) {
  1066. mode |= LE_MO_PROM;
  1067. if (lp->pio_buffer)
  1068. sbus_writew(mode, &ib_iomem->mode);
  1069. else
  1070. ib_mem->mode = mode;
  1071. } else {
  1072. mode &= ~LE_MO_PROM;
  1073. if (lp->pio_buffer)
  1074. sbus_writew(mode, &ib_iomem->mode);
  1075. else
  1076. ib_mem->mode = mode;
  1077. lance_load_multicast(dev);
  1078. }
  1079. load_csrs(lp);
  1080. init_restart_lance(lp);
  1081. netif_wake_queue(dev);
  1082. }
  1083. static void lance_set_multicast_retry(unsigned long _opaque)
  1084. {
  1085. struct net_device *dev = (struct net_device *) _opaque;
  1086. lance_set_multicast(dev);
  1087. }
  1088. static void lance_free_hwresources(struct lance_private *lp)
  1089. {
  1090. if (lp->lregs)
  1091. sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
  1092. if (lp->init_block_iomem) {
  1093. sbus_iounmap(lp->init_block_iomem,
  1094. sizeof(struct lance_init_block));
  1095. } else if (lp->init_block_mem) {
  1096. sbus_free_consistent(lp->sdev,
  1097. sizeof(struct lance_init_block),
  1098. lp->init_block_mem,
  1099. lp->init_block_dvma);
  1100. }
  1101. }
  1102. /* Ethtool support... */
  1103. static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1104. {
  1105. struct lance_private *lp = netdev_priv(dev);
  1106. strcpy(info->driver, "sunlance");
  1107. strcpy(info->version, "2.02");
  1108. sprintf(info->bus_info, "SBUS:%d",
  1109. lp->sdev->slot);
  1110. }
  1111. static u32 sparc_lance_get_link(struct net_device *dev)
  1112. {
  1113. /* We really do not keep track of this, but this
  1114. * is better than not reporting anything at all.
  1115. */
  1116. return 1;
  1117. }
  1118. static const struct ethtool_ops sparc_lance_ethtool_ops = {
  1119. .get_drvinfo = sparc_lance_get_drvinfo,
  1120. .get_link = sparc_lance_get_link,
  1121. };
  1122. static int __devinit sparc_lance_probe_one(struct sbus_dev *sdev,
  1123. struct sbus_dma *ledma,
  1124. struct sbus_dev *lebuffer)
  1125. {
  1126. static unsigned version_printed;
  1127. struct net_device *dev;
  1128. struct lance_private *lp;
  1129. int i;
  1130. dev = alloc_etherdev(sizeof(struct lance_private) + 8);
  1131. if (!dev)
  1132. return -ENOMEM;
  1133. lp = netdev_priv(dev);
  1134. memset(lp, 0, sizeof(*lp));
  1135. if (sparc_lance_debug && version_printed++ == 0)
  1136. printk (KERN_INFO "%s", version);
  1137. spin_lock_init(&lp->lock);
  1138. /* Copy the IDPROM ethernet address to the device structure, later we
  1139. * will copy the address in the device structure to the lance
  1140. * initialization block.
  1141. */
  1142. for (i = 0; i < 6; i++)
  1143. dev->dev_addr[i] = idprom->id_ethaddr[i];
  1144. /* Get the IO region */
  1145. lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
  1146. LANCE_REG_SIZE, lancestr);
  1147. if (!lp->lregs) {
  1148. printk(KERN_ERR "SunLance: Cannot map registers.\n");
  1149. goto fail;
  1150. }
  1151. lp->sdev = sdev;
  1152. if (lebuffer) {
  1153. /* sanity check */
  1154. if (lebuffer->resource[0].start & 7) {
  1155. printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
  1156. goto fail;
  1157. }
  1158. lp->init_block_iomem =
  1159. sbus_ioremap(&lebuffer->resource[0], 0,
  1160. sizeof(struct lance_init_block), "lebuffer");
  1161. if (!lp->init_block_iomem) {
  1162. printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
  1163. goto fail;
  1164. }
  1165. lp->init_block_dvma = 0;
  1166. lp->pio_buffer = 1;
  1167. lp->init_ring = lance_init_ring_pio;
  1168. lp->rx = lance_rx_pio;
  1169. lp->tx = lance_tx_pio;
  1170. } else {
  1171. lp->init_block_mem =
  1172. sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
  1173. &lp->init_block_dvma);
  1174. if (!lp->init_block_mem || lp->init_block_dvma == 0) {
  1175. printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n");
  1176. goto fail;
  1177. }
  1178. lp->pio_buffer = 0;
  1179. lp->init_ring = lance_init_ring_dvma;
  1180. lp->rx = lance_rx_dvma;
  1181. lp->tx = lance_tx_dvma;
  1182. }
  1183. lp->busmaster_regval = prom_getintdefault(sdev->prom_node,
  1184. "busmaster-regval",
  1185. (LE_C3_BSWP | LE_C3_ACON |
  1186. LE_C3_BCON));
  1187. lp->name = lancestr;
  1188. lp->ledma = ledma;
  1189. lp->burst_sizes = 0;
  1190. if (lp->ledma) {
  1191. char prop[6];
  1192. unsigned int sbmask;
  1193. u32 csr;
  1194. /* Find burst-size property for ledma */
  1195. lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node,
  1196. "burst-sizes", 0);
  1197. /* ledma may be capable of fast bursts, but sbus may not. */
  1198. sbmask = prom_getintdefault(ledma->sdev->bus->prom_node,
  1199. "burst-sizes", DMA_BURSTBITS);
  1200. lp->burst_sizes &= sbmask;
  1201. /* Get the cable-selection property */
  1202. memset(prop, 0, sizeof(prop));
  1203. prom_getstring(ledma->sdev->prom_node, "cable-selection",
  1204. prop, sizeof(prop));
  1205. if (prop[0] == 0) {
  1206. int topnd, nd;
  1207. printk(KERN_INFO "SunLance: using auto-carrier-detection.\n");
  1208. /* Is this found at /options .attributes in all
  1209. * Prom versions? XXX
  1210. */
  1211. topnd = prom_getchild(prom_root_node);
  1212. nd = prom_searchsiblings(topnd, "options");
  1213. if (!nd)
  1214. goto no_link_test;
  1215. if (!prom_node_has_property(nd, "tpe-link-test?"))
  1216. goto no_link_test;
  1217. memset(prop, 0, sizeof(prop));
  1218. prom_getstring(nd, "tpe-link-test?", prop,
  1219. sizeof(prop));
  1220. if (strcmp(prop, "true")) {
  1221. printk(KERN_NOTICE "SunLance: warning: overriding option "
  1222. "'tpe-link-test?'\n");
  1223. printk(KERN_NOTICE "SunLance: warning: mail any problems "
  1224. "to ecd@skynet.be\n");
  1225. auxio_set_lte(AUXIO_LTE_ON);
  1226. }
  1227. no_link_test:
  1228. lp->auto_select = 1;
  1229. lp->tpe = 0;
  1230. } else if (!strcmp(prop, "aui")) {
  1231. lp->auto_select = 0;
  1232. lp->tpe = 0;
  1233. } else {
  1234. lp->auto_select = 0;
  1235. lp->tpe = 1;
  1236. }
  1237. lp->dregs = ledma->regs;
  1238. /* Reset ledma */
  1239. csr = sbus_readl(lp->dregs + DMA_CSR);
  1240. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  1241. udelay(200);
  1242. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  1243. } else
  1244. lp->dregs = NULL;
  1245. lp->dev = dev;
  1246. SET_MODULE_OWNER(dev);
  1247. SET_NETDEV_DEV(dev, &sdev->ofdev.dev);
  1248. dev->open = &lance_open;
  1249. dev->stop = &lance_close;
  1250. dev->hard_start_xmit = &lance_start_xmit;
  1251. dev->tx_timeout = &lance_tx_timeout;
  1252. dev->watchdog_timeo = 5*HZ;
  1253. dev->get_stats = &lance_get_stats;
  1254. dev->set_multicast_list = &lance_set_multicast;
  1255. dev->ethtool_ops = &sparc_lance_ethtool_ops;
  1256. dev->irq = sdev->irqs[0];
  1257. dev->dma = 0;
  1258. /* We cannot sleep if the chip is busy during a
  1259. * multicast list update event, because such events
  1260. * can occur from interrupts (ex. IPv6). So we
  1261. * use a timer to try again later when necessary. -DaveM
  1262. */
  1263. init_timer(&lp->multicast_timer);
  1264. lp->multicast_timer.data = (unsigned long) dev;
  1265. lp->multicast_timer.function = &lance_set_multicast_retry;
  1266. if (register_netdev(dev)) {
  1267. printk(KERN_ERR "SunLance: Cannot register device.\n");
  1268. goto fail;
  1269. }
  1270. dev_set_drvdata(&sdev->ofdev.dev, lp);
  1271. printk(KERN_INFO "%s: LANCE ", dev->name);
  1272. for (i = 0; i < 6; i++)
  1273. printk("%2.2x%c", dev->dev_addr[i],
  1274. i == 5 ? ' ': ':');
  1275. printk("\n");
  1276. return 0;
  1277. fail:
  1278. lance_free_hwresources(lp);
  1279. free_netdev(dev);
  1280. return -ENODEV;
  1281. }
  1282. /* On 4m, find the associated dma for the lance chip */
  1283. static struct sbus_dma * __devinit find_ledma(struct sbus_dev *sdev)
  1284. {
  1285. struct sbus_dma *p;
  1286. for_each_dvma(p) {
  1287. if (p->sdev == sdev)
  1288. return p;
  1289. }
  1290. return NULL;
  1291. }
  1292. #ifdef CONFIG_SUN4
  1293. #include <asm/sun4paddr.h>
  1294. #include <asm/machines.h>
  1295. /* Find all the lance cards on the system and initialize them */
  1296. static struct sbus_dev sun4_sdev;
  1297. static int __devinit sparc_lance_init(void)
  1298. {
  1299. if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
  1300. (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
  1301. memset(&sun4_sdev, 0, sizeof(struct sbus_dev));
  1302. sun4_sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
  1303. sun4_sdev.irqs[0] = 6;
  1304. return sparc_lance_probe_one(&sun4_sdev, NULL, NULL);
  1305. }
  1306. return -ENODEV;
  1307. }
  1308. static int __exit sunlance_sun4_remove(void)
  1309. {
  1310. struct lance_private *lp = dev_get_drvdata(&sun4_sdev.ofdev.dev);
  1311. struct net_device *net_dev = lp->dev;
  1312. unregister_netdev(net_dev);
  1313. lance_free_hwresources(lp);
  1314. free_netdev(net_dev);
  1315. dev_set_drvdata(&sun4_sdev.ofdev.dev, NULL);
  1316. return 0;
  1317. }
  1318. #else /* !CONFIG_SUN4 */
  1319. static int __devinit sunlance_sbus_probe(struct of_device *dev, const struct of_device_id *match)
  1320. {
  1321. struct sbus_dev *sdev = to_sbus_device(&dev->dev);
  1322. int err;
  1323. if (sdev->parent) {
  1324. struct of_device *parent = &sdev->parent->ofdev;
  1325. if (!strcmp(parent->node->name, "ledma")) {
  1326. struct sbus_dma *ledma = find_ledma(to_sbus_device(&parent->dev));
  1327. err = sparc_lance_probe_one(sdev, ledma, NULL);
  1328. } else if (!strcmp(parent->node->name, "lebuffer")) {
  1329. err = sparc_lance_probe_one(sdev, NULL, to_sbus_device(&parent->dev));
  1330. } else
  1331. err = sparc_lance_probe_one(sdev, NULL, NULL);
  1332. } else
  1333. err = sparc_lance_probe_one(sdev, NULL, NULL);
  1334. return err;
  1335. }
  1336. static int __devexit sunlance_sbus_remove(struct of_device *dev)
  1337. {
  1338. struct lance_private *lp = dev_get_drvdata(&dev->dev);
  1339. struct net_device *net_dev = lp->dev;
  1340. unregister_netdev(net_dev);
  1341. lance_free_hwresources(lp);
  1342. free_netdev(net_dev);
  1343. dev_set_drvdata(&dev->dev, NULL);
  1344. return 0;
  1345. }
  1346. static struct of_device_id sunlance_sbus_match[] = {
  1347. {
  1348. .name = "le",
  1349. },
  1350. {},
  1351. };
  1352. MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
  1353. static struct of_platform_driver sunlance_sbus_driver = {
  1354. .name = "sunlance",
  1355. .match_table = sunlance_sbus_match,
  1356. .probe = sunlance_sbus_probe,
  1357. .remove = __devexit_p(sunlance_sbus_remove),
  1358. };
  1359. /* Find all the lance cards on the system and initialize them */
  1360. static int __init sparc_lance_init(void)
  1361. {
  1362. return of_register_driver(&sunlance_sbus_driver, &sbus_bus_type);
  1363. }
  1364. #endif /* !CONFIG_SUN4 */
  1365. static void __exit sparc_lance_exit(void)
  1366. {
  1367. #ifdef CONFIG_SUN4
  1368. sunlance_sun4_remove();
  1369. #else
  1370. of_unregister_driver(&sunlance_sbus_driver);
  1371. #endif
  1372. }
  1373. module_init(sparc_lance_init);
  1374. module_exit(sparc_lance_exit);