smc911x.c 61 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327
  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/slab.h>
  59. #include <linux/delay.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/errno.h>
  62. #include <linux/ioport.h>
  63. #include <linux/crc32.h>
  64. #include <linux/device.h>
  65. #include <linux/platform_device.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/ethtool.h>
  68. #include <linux/mii.h>
  69. #include <linux/workqueue.h>
  70. #include <linux/irq.h>
  71. #include <linux/netdevice.h>
  72. #include <linux/etherdevice.h>
  73. #include <linux/skbuff.h>
  74. #include <asm/io.h>
  75. #include <asm/irq.h>
  76. #include "smc911x.h"
  77. /*
  78. * Transmit timeout, default 5 seconds.
  79. */
  80. static int watchdog = 5000;
  81. module_param(watchdog, int, 0400);
  82. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  83. static int tx_fifo_kb=8;
  84. module_param(tx_fifo_kb, int, 0400);
  85. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  86. MODULE_LICENSE("GPL");
  87. /*
  88. * The internal workings of the driver. If you are changing anything
  89. * here with the SMC stuff, you should have the datasheet and know
  90. * what you are doing.
  91. */
  92. #define CARDNAME "smc911x"
  93. /*
  94. * Use power-down feature of the chip
  95. */
  96. #define POWER_DOWN 1
  97. /* store this information for the driver.. */
  98. struct smc911x_local {
  99. /*
  100. * If I have to wait until the DMA is finished and ready to reload a
  101. * packet, I will store the skbuff here. Then, the DMA will send it
  102. * out and free it.
  103. */
  104. struct sk_buff *pending_tx_skb;
  105. /*
  106. * these are things that the kernel wants me to keep, so users
  107. * can find out semi-useless statistics of how well the card is
  108. * performing
  109. */
  110. struct net_device_stats stats;
  111. /* version/revision of the SMC911x chip */
  112. u16 version;
  113. u16 revision;
  114. /* FIFO sizes */
  115. int tx_fifo_kb;
  116. int tx_fifo_size;
  117. int rx_fifo_size;
  118. int afc_cfg;
  119. /* Contains the current active receive/phy mode */
  120. int ctl_rfduplx;
  121. int ctl_rspeed;
  122. u32 msg_enable;
  123. u32 phy_type;
  124. struct mii_if_info mii;
  125. /* work queue */
  126. struct work_struct phy_configure;
  127. int work_pending;
  128. int tx_throttle;
  129. spinlock_t lock;
  130. struct net_device *netdev;
  131. #ifdef SMC_USE_DMA
  132. /* DMA needs the physical address of the chip */
  133. u_long physaddr;
  134. int rxdma;
  135. int txdma;
  136. int rxdma_active;
  137. int txdma_active;
  138. struct sk_buff *current_rx_skb;
  139. struct sk_buff *current_tx_skb;
  140. struct device *dev;
  141. #endif
  142. };
  143. #if SMC_DEBUG > 0
  144. #define DBG(n, args...) \
  145. do { \
  146. if (SMC_DEBUG & (n)) \
  147. printk(args); \
  148. } while (0)
  149. #define PRINTK(args...) printk(args)
  150. #else
  151. #define DBG(n, args...) do { } while (0)
  152. #define PRINTK(args...) printk(KERN_DEBUG args)
  153. #endif
  154. #if SMC_DEBUG_PKTS > 0
  155. static void PRINT_PKT(u_char *buf, int length)
  156. {
  157. int i;
  158. int remainder;
  159. int lines;
  160. lines = length / 16;
  161. remainder = length % 16;
  162. for (i = 0; i < lines ; i ++) {
  163. int cur;
  164. for (cur = 0; cur < 8; cur++) {
  165. u_char a, b;
  166. a = *buf++;
  167. b = *buf++;
  168. printk("%02x%02x ", a, b);
  169. }
  170. printk("\n");
  171. }
  172. for (i = 0; i < remainder/2 ; i++) {
  173. u_char a, b;
  174. a = *buf++;
  175. b = *buf++;
  176. printk("%02x%02x ", a, b);
  177. }
  178. printk("\n");
  179. }
  180. #else
  181. #define PRINT_PKT(x...) do { } while (0)
  182. #endif
  183. /* this enables an interrupt in the interrupt mask register */
  184. #define SMC_ENABLE_INT(x) do { \
  185. unsigned int __mask; \
  186. unsigned long __flags; \
  187. spin_lock_irqsave(&lp->lock, __flags); \
  188. __mask = SMC_GET_INT_EN(); \
  189. __mask |= (x); \
  190. SMC_SET_INT_EN(__mask); \
  191. spin_unlock_irqrestore(&lp->lock, __flags); \
  192. } while (0)
  193. /* this disables an interrupt from the interrupt mask register */
  194. #define SMC_DISABLE_INT(x) do { \
  195. unsigned int __mask; \
  196. unsigned long __flags; \
  197. spin_lock_irqsave(&lp->lock, __flags); \
  198. __mask = SMC_GET_INT_EN(); \
  199. __mask &= ~(x); \
  200. SMC_SET_INT_EN(__mask); \
  201. spin_unlock_irqrestore(&lp->lock, __flags); \
  202. } while (0)
  203. /*
  204. * this does a soft reset on the device
  205. */
  206. static void smc911x_reset(struct net_device *dev)
  207. {
  208. unsigned long ioaddr = dev->base_addr;
  209. struct smc911x_local *lp = netdev_priv(dev);
  210. unsigned int reg, timeout=0, resets=1;
  211. unsigned long flags;
  212. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  213. /* Take out of PM setting first */
  214. if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
  215. /* Write to the bytetest will take out of powerdown */
  216. SMC_SET_BYTE_TEST(0);
  217. timeout=10;
  218. do {
  219. udelay(10);
  220. reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
  221. } while ( timeout-- && !reg);
  222. if (timeout == 0) {
  223. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  224. return;
  225. }
  226. }
  227. /* Disable all interrupts */
  228. spin_lock_irqsave(&lp->lock, flags);
  229. SMC_SET_INT_EN(0);
  230. spin_unlock_irqrestore(&lp->lock, flags);
  231. while (resets--) {
  232. SMC_SET_HW_CFG(HW_CFG_SRST_);
  233. timeout=10;
  234. do {
  235. udelay(10);
  236. reg = SMC_GET_HW_CFG();
  237. /* If chip indicates reset timeout then try again */
  238. if (reg & HW_CFG_SRST_TO_) {
  239. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  240. resets++;
  241. break;
  242. }
  243. } while ( timeout-- && (reg & HW_CFG_SRST_));
  244. }
  245. if (timeout == 0) {
  246. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  247. return;
  248. }
  249. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  250. timeout=1000;
  251. while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
  252. udelay(10);
  253. }
  254. if (timeout == 0){
  255. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  256. return;
  257. }
  258. /* Initialize interrupts */
  259. SMC_SET_INT_EN(0);
  260. SMC_ACK_INT(-1);
  261. /* Reset the FIFO level and flow control settings */
  262. SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
  263. //TODO: Figure out what appropriate pause time is
  264. SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
  265. SMC_SET_AFC_CFG(lp->afc_cfg);
  266. /* Set to LED outputs */
  267. SMC_SET_GPIO_CFG(0x70070000);
  268. /*
  269. * Deassert IRQ for 1*10us for edge type interrupts
  270. * and drive IRQ pin push-pull
  271. */
  272. SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
  273. /* clear anything saved */
  274. if (lp->pending_tx_skb != NULL) {
  275. dev_kfree_skb (lp->pending_tx_skb);
  276. lp->pending_tx_skb = NULL;
  277. lp->stats.tx_errors++;
  278. lp->stats.tx_aborted_errors++;
  279. }
  280. }
  281. /*
  282. * Enable Interrupts, Receive, and Transmit
  283. */
  284. static void smc911x_enable(struct net_device *dev)
  285. {
  286. unsigned long ioaddr = dev->base_addr;
  287. struct smc911x_local *lp = netdev_priv(dev);
  288. unsigned mask, cfg, cr;
  289. unsigned long flags;
  290. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  291. SMC_SET_MAC_ADDR(dev->dev_addr);
  292. /* Enable TX */
  293. cfg = SMC_GET_HW_CFG();
  294. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  295. cfg |= HW_CFG_SF_;
  296. SMC_SET_HW_CFG(cfg);
  297. SMC_SET_FIFO_TDA(0xFF);
  298. /* Update TX stats on every 64 packets received or every 1 sec */
  299. SMC_SET_FIFO_TSL(64);
  300. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  301. spin_lock_irqsave(&lp->lock, flags);
  302. SMC_GET_MAC_CR(cr);
  303. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  304. SMC_SET_MAC_CR(cr);
  305. SMC_SET_TX_CFG(TX_CFG_TX_ON_);
  306. spin_unlock_irqrestore(&lp->lock, flags);
  307. /* Add 2 byte padding to start of packets */
  308. SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
  309. /* Turn on receiver and enable RX */
  310. if (cr & MAC_CR_RXEN_)
  311. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  312. spin_lock_irqsave(&lp->lock, flags);
  313. SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
  314. spin_unlock_irqrestore(&lp->lock, flags);
  315. /* Interrupt on every received packet */
  316. SMC_SET_FIFO_RSA(0x01);
  317. SMC_SET_FIFO_RSL(0x00);
  318. /* now, enable interrupts */
  319. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  320. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  321. INT_EN_PHY_INT_EN_;
  322. if (IS_REV_A(lp->revision))
  323. mask|=INT_EN_RDFL_EN_;
  324. else {
  325. mask|=INT_EN_RDFO_EN_;
  326. }
  327. SMC_ENABLE_INT(mask);
  328. }
  329. /*
  330. * this puts the device in an inactive state
  331. */
  332. static void smc911x_shutdown(struct net_device *dev)
  333. {
  334. unsigned long ioaddr = dev->base_addr;
  335. struct smc911x_local *lp = netdev_priv(dev);
  336. unsigned cr;
  337. unsigned long flags;
  338. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  339. /* Disable IRQ's */
  340. SMC_SET_INT_EN(0);
  341. /* Turn of Rx and TX */
  342. spin_lock_irqsave(&lp->lock, flags);
  343. SMC_GET_MAC_CR(cr);
  344. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  345. SMC_SET_MAC_CR(cr);
  346. SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
  347. spin_unlock_irqrestore(&lp->lock, flags);
  348. }
  349. static inline void smc911x_drop_pkt(struct net_device *dev)
  350. {
  351. unsigned long ioaddr = dev->base_addr;
  352. unsigned int fifo_count, timeout, reg;
  353. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  354. fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
  355. if (fifo_count <= 4) {
  356. /* Manually dump the packet data */
  357. while (fifo_count--)
  358. SMC_GET_RX_FIFO();
  359. } else {
  360. /* Fast forward through the bad packet */
  361. SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
  362. timeout=50;
  363. do {
  364. udelay(10);
  365. reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
  366. } while ( timeout-- && reg);
  367. if (timeout == 0) {
  368. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  369. }
  370. }
  371. }
  372. /*
  373. * This is the procedure to handle the receipt of a packet.
  374. * It should be called after checking for packet presence in
  375. * the RX status FIFO. It must be called with the spin lock
  376. * already held.
  377. */
  378. static inline void smc911x_rcv(struct net_device *dev)
  379. {
  380. struct smc911x_local *lp = netdev_priv(dev);
  381. unsigned long ioaddr = dev->base_addr;
  382. unsigned int pkt_len, status;
  383. struct sk_buff *skb;
  384. unsigned char *data;
  385. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  386. dev->name, __FUNCTION__);
  387. status = SMC_GET_RX_STS_FIFO();
  388. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  389. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  390. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  391. if (status & RX_STS_ES_) {
  392. /* Deal with a bad packet */
  393. lp->stats.rx_errors++;
  394. if (status & RX_STS_CRC_ERR_)
  395. lp->stats.rx_crc_errors++;
  396. else {
  397. if (status & RX_STS_LEN_ERR_)
  398. lp->stats.rx_length_errors++;
  399. if (status & RX_STS_MCAST_)
  400. lp->stats.multicast++;
  401. }
  402. /* Remove the bad packet data from the RX FIFO */
  403. smc911x_drop_pkt(dev);
  404. } else {
  405. /* Receive a valid packet */
  406. /* Alloc a buffer with extra room for DMA alignment */
  407. skb=dev_alloc_skb(pkt_len+32);
  408. if (unlikely(skb == NULL)) {
  409. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  410. dev->name);
  411. lp->stats.rx_dropped++;
  412. smc911x_drop_pkt(dev);
  413. return;
  414. }
  415. /* Align IP header to 32 bits
  416. * Note that the device is configured to add a 2
  417. * byte padding to the packet start, so we really
  418. * want to write to the orignal data pointer */
  419. data = skb->data;
  420. skb_reserve(skb, 2);
  421. skb_put(skb,pkt_len-4);
  422. #ifdef SMC_USE_DMA
  423. {
  424. unsigned int fifo;
  425. /* Lower the FIFO threshold if possible */
  426. fifo = SMC_GET_FIFO_INT();
  427. if (fifo & 0xFF) fifo--;
  428. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  429. dev->name, fifo & 0xff);
  430. SMC_SET_FIFO_INT(fifo);
  431. /* Setup RX DMA */
  432. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  433. lp->rxdma_active = 1;
  434. lp->current_rx_skb = skb;
  435. SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
  436. /* Packet processing deferred to DMA RX interrupt */
  437. }
  438. #else
  439. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  440. SMC_PULL_DATA(data, pkt_len+2+3);
  441. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  442. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  443. dev->last_rx = jiffies;
  444. skb->dev = dev;
  445. skb->protocol = eth_type_trans(skb, dev);
  446. netif_rx(skb);
  447. lp->stats.rx_packets++;
  448. lp->stats.rx_bytes += pkt_len-4;
  449. #endif
  450. }
  451. }
  452. /*
  453. * This is called to actually send a packet to the chip.
  454. */
  455. static void smc911x_hardware_send_pkt(struct net_device *dev)
  456. {
  457. struct smc911x_local *lp = netdev_priv(dev);
  458. unsigned long ioaddr = dev->base_addr;
  459. struct sk_buff *skb;
  460. unsigned int cmdA, cmdB, len;
  461. unsigned char *buf;
  462. unsigned long flags;
  463. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
  464. BUG_ON(lp->pending_tx_skb == NULL);
  465. skb = lp->pending_tx_skb;
  466. lp->pending_tx_skb = NULL;
  467. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  468. /* cmdB {31:16] pkt tag [10:0] length */
  469. #ifdef SMC_USE_DMA
  470. /* 16 byte buffer alignment mode */
  471. buf = (char*)((u32)(skb->data) & ~0xF);
  472. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  473. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  474. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  475. skb->len;
  476. #else
  477. buf = (char*)((u32)skb->data & ~0x3);
  478. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  479. cmdA = (((u32)skb->data & 0x3) << 16) |
  480. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  481. skb->len;
  482. #endif
  483. /* tag is packet length so we can use this in stats update later */
  484. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  485. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  486. dev->name, len, len, buf, cmdA, cmdB);
  487. SMC_SET_TX_FIFO(cmdA);
  488. SMC_SET_TX_FIFO(cmdB);
  489. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  490. PRINT_PKT(buf, len <= 64 ? len : 64);
  491. /* Send pkt via PIO or DMA */
  492. #ifdef SMC_USE_DMA
  493. lp->current_tx_skb = skb;
  494. SMC_PUSH_DATA(buf, len);
  495. /* DMA complete IRQ will free buffer and set jiffies */
  496. #else
  497. SMC_PUSH_DATA(buf, len);
  498. dev->trans_start = jiffies;
  499. dev_kfree_skb(skb);
  500. #endif
  501. spin_lock_irqsave(&lp->lock, flags);
  502. if (!lp->tx_throttle) {
  503. netif_wake_queue(dev);
  504. }
  505. spin_unlock_irqrestore(&lp->lock, flags);
  506. SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  507. }
  508. /*
  509. * Since I am not sure if I will have enough room in the chip's ram
  510. * to store the packet, I call this routine which either sends it
  511. * now, or set the card to generates an interrupt when ready
  512. * for the packet.
  513. */
  514. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  515. {
  516. struct smc911x_local *lp = netdev_priv(dev);
  517. unsigned long ioaddr = dev->base_addr;
  518. unsigned int free;
  519. unsigned long flags;
  520. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  521. dev->name, __FUNCTION__);
  522. BUG_ON(lp->pending_tx_skb != NULL);
  523. free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
  524. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  525. /* Turn off the flow when running out of space in FIFO */
  526. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  527. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  528. dev->name, free);
  529. spin_lock_irqsave(&lp->lock, flags);
  530. /* Reenable when at least 1 packet of size MTU present */
  531. SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  532. lp->tx_throttle = 1;
  533. netif_stop_queue(dev);
  534. spin_unlock_irqrestore(&lp->lock, flags);
  535. }
  536. /* Drop packets when we run out of space in TX FIFO
  537. * Account for overhead required for:
  538. *
  539. * Tx command words 8 bytes
  540. * Start offset 15 bytes
  541. * End padding 15 bytes
  542. */
  543. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  544. printk("%s: No Tx free space %d < %d\n",
  545. dev->name, free, skb->len);
  546. lp->pending_tx_skb = NULL;
  547. lp->stats.tx_errors++;
  548. lp->stats.tx_dropped++;
  549. dev_kfree_skb(skb);
  550. return 0;
  551. }
  552. #ifdef SMC_USE_DMA
  553. {
  554. /* If the DMA is already running then defer this packet Tx until
  555. * the DMA IRQ starts it
  556. */
  557. spin_lock_irqsave(&lp->lock, flags);
  558. if (lp->txdma_active) {
  559. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  560. lp->pending_tx_skb = skb;
  561. netif_stop_queue(dev);
  562. spin_unlock_irqrestore(&lp->lock, flags);
  563. return 0;
  564. } else {
  565. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  566. lp->txdma_active = 1;
  567. }
  568. spin_unlock_irqrestore(&lp->lock, flags);
  569. }
  570. #endif
  571. lp->pending_tx_skb = skb;
  572. smc911x_hardware_send_pkt(dev);
  573. return 0;
  574. }
  575. /*
  576. * This handles a TX status interrupt, which is only called when:
  577. * - a TX error occurred, or
  578. * - TX of a packet completed.
  579. */
  580. static void smc911x_tx(struct net_device *dev)
  581. {
  582. unsigned long ioaddr = dev->base_addr;
  583. struct smc911x_local *lp = netdev_priv(dev);
  584. unsigned int tx_status;
  585. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  586. dev->name, __FUNCTION__);
  587. /* Collect the TX status */
  588. while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  589. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  590. dev->name,
  591. (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
  592. tx_status = SMC_GET_TX_STS_FIFO();
  593. lp->stats.tx_packets++;
  594. lp->stats.tx_bytes+=tx_status>>16;
  595. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  596. dev->name, (tx_status & 0xffff0000) >> 16,
  597. tx_status & 0x0000ffff);
  598. /* count Tx errors, but ignore lost carrier errors when in
  599. * full-duplex mode */
  600. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  601. !(tx_status & 0x00000306))) {
  602. lp->stats.tx_errors++;
  603. }
  604. if (tx_status & TX_STS_MANY_COLL_) {
  605. lp->stats.collisions+=16;
  606. lp->stats.tx_aborted_errors++;
  607. } else {
  608. lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  609. }
  610. /* carrier error only has meaning for half-duplex communication */
  611. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  612. !lp->ctl_rfduplx) {
  613. lp->stats.tx_carrier_errors++;
  614. }
  615. if (tx_status & TX_STS_LATE_COLL_) {
  616. lp->stats.collisions++;
  617. lp->stats.tx_aborted_errors++;
  618. }
  619. }
  620. }
  621. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  622. /*
  623. * Reads a register from the MII Management serial interface
  624. */
  625. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  626. {
  627. unsigned long ioaddr = dev->base_addr;
  628. unsigned int phydata;
  629. SMC_GET_MII(phyreg, phyaddr, phydata);
  630. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  631. __FUNCTION__, phyaddr, phyreg, phydata);
  632. return phydata;
  633. }
  634. /*
  635. * Writes a register to the MII Management serial interface
  636. */
  637. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  638. int phydata)
  639. {
  640. unsigned long ioaddr = dev->base_addr;
  641. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  642. __FUNCTION__, phyaddr, phyreg, phydata);
  643. SMC_SET_MII(phyreg, phyaddr, phydata);
  644. }
  645. /*
  646. * Finds and reports the PHY address (115 and 117 have external
  647. * PHY interface 118 has internal only
  648. */
  649. static void smc911x_phy_detect(struct net_device *dev)
  650. {
  651. unsigned long ioaddr = dev->base_addr;
  652. struct smc911x_local *lp = netdev_priv(dev);
  653. int phyaddr;
  654. unsigned int cfg, id1, id2;
  655. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  656. lp->phy_type = 0;
  657. /*
  658. * Scan all 32 PHY addresses if necessary, starting at
  659. * PHY#1 to PHY#31, and then PHY#0 last.
  660. */
  661. switch(lp->version) {
  662. case 0x115:
  663. case 0x117:
  664. cfg = SMC_GET_HW_CFG();
  665. if (cfg & HW_CFG_EXT_PHY_DET_) {
  666. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  667. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  668. SMC_SET_HW_CFG(cfg);
  669. udelay(10); /* Wait for clocks to stop */
  670. cfg |= HW_CFG_EXT_PHY_EN_;
  671. SMC_SET_HW_CFG(cfg);
  672. udelay(10); /* Wait for clocks to stop */
  673. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  674. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  675. SMC_SET_HW_CFG(cfg);
  676. udelay(10); /* Wait for clocks to stop */
  677. cfg |= HW_CFG_SMI_SEL_;
  678. SMC_SET_HW_CFG(cfg);
  679. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  680. /* Read the PHY identifiers */
  681. SMC_GET_PHY_ID1(phyaddr & 31, id1);
  682. SMC_GET_PHY_ID2(phyaddr & 31, id2);
  683. /* Make sure it is a valid identifier */
  684. if (id1 != 0x0000 && id1 != 0xffff &&
  685. id1 != 0x8000 && id2 != 0x0000 &&
  686. id2 != 0xffff && id2 != 0x8000) {
  687. /* Save the PHY's address */
  688. lp->mii.phy_id = phyaddr & 31;
  689. lp->phy_type = id1 << 16 | id2;
  690. break;
  691. }
  692. }
  693. }
  694. default:
  695. /* Internal media only */
  696. SMC_GET_PHY_ID1(1, id1);
  697. SMC_GET_PHY_ID2(1, id2);
  698. /* Save the PHY's address */
  699. lp->mii.phy_id = 1;
  700. lp->phy_type = id1 << 16 | id2;
  701. }
  702. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  703. dev->name, id1, id2, lp->mii.phy_id);
  704. }
  705. /*
  706. * Sets the PHY to a configuration as determined by the user.
  707. * Called with spin_lock held.
  708. */
  709. static int smc911x_phy_fixed(struct net_device *dev)
  710. {
  711. struct smc911x_local *lp = netdev_priv(dev);
  712. unsigned long ioaddr = dev->base_addr;
  713. int phyaddr = lp->mii.phy_id;
  714. int bmcr;
  715. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  716. /* Enter Link Disable state */
  717. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  718. bmcr |= BMCR_PDOWN;
  719. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  720. /*
  721. * Set our fixed capabilities
  722. * Disable auto-negotiation
  723. */
  724. bmcr &= ~BMCR_ANENABLE;
  725. if (lp->ctl_rfduplx)
  726. bmcr |= BMCR_FULLDPLX;
  727. if (lp->ctl_rspeed == 100)
  728. bmcr |= BMCR_SPEED100;
  729. /* Write our capabilities to the phy control register */
  730. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  731. /* Re-Configure the Receive/Phy Control register */
  732. bmcr &= ~BMCR_PDOWN;
  733. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  734. return 1;
  735. }
  736. /*
  737. * smc911x_phy_reset - reset the phy
  738. * @dev: net device
  739. * @phy: phy address
  740. *
  741. * Issue a software reset for the specified PHY and
  742. * wait up to 100ms for the reset to complete. We should
  743. * not access the PHY for 50ms after issuing the reset.
  744. *
  745. * The time to wait appears to be dependent on the PHY.
  746. *
  747. */
  748. static int smc911x_phy_reset(struct net_device *dev, int phy)
  749. {
  750. struct smc911x_local *lp = netdev_priv(dev);
  751. unsigned long ioaddr = dev->base_addr;
  752. int timeout;
  753. unsigned long flags;
  754. unsigned int reg;
  755. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  756. spin_lock_irqsave(&lp->lock, flags);
  757. reg = SMC_GET_PMT_CTRL();
  758. reg &= ~0xfffff030;
  759. reg |= PMT_CTRL_PHY_RST_;
  760. SMC_SET_PMT_CTRL(reg);
  761. spin_unlock_irqrestore(&lp->lock, flags);
  762. for (timeout = 2; timeout; timeout--) {
  763. msleep(50);
  764. spin_lock_irqsave(&lp->lock, flags);
  765. reg = SMC_GET_PMT_CTRL();
  766. spin_unlock_irqrestore(&lp->lock, flags);
  767. if (!(reg & PMT_CTRL_PHY_RST_)) {
  768. /* extra delay required because the phy may
  769. * not be completed with its reset
  770. * when PHY_BCR_RESET_ is cleared. 256us
  771. * should suffice, but use 500us to be safe
  772. */
  773. udelay(500);
  774. break;
  775. }
  776. }
  777. return reg & PMT_CTRL_PHY_RST_;
  778. }
  779. /*
  780. * smc911x_phy_powerdown - powerdown phy
  781. * @dev: net device
  782. * @phy: phy address
  783. *
  784. * Power down the specified PHY
  785. */
  786. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  787. {
  788. unsigned long ioaddr = dev->base_addr;
  789. unsigned int bmcr;
  790. /* Enter Link Disable state */
  791. SMC_GET_PHY_BMCR(phy, bmcr);
  792. bmcr |= BMCR_PDOWN;
  793. SMC_SET_PHY_BMCR(phy, bmcr);
  794. }
  795. /*
  796. * smc911x_phy_check_media - check the media status and adjust BMCR
  797. * @dev: net device
  798. * @init: set true for initialisation
  799. *
  800. * Select duplex mode depending on negotiation state. This
  801. * also updates our carrier state.
  802. */
  803. static void smc911x_phy_check_media(struct net_device *dev, int init)
  804. {
  805. struct smc911x_local *lp = netdev_priv(dev);
  806. unsigned long ioaddr = dev->base_addr;
  807. int phyaddr = lp->mii.phy_id;
  808. unsigned int bmcr, cr;
  809. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  810. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  811. /* duplex state has changed */
  812. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  813. SMC_GET_MAC_CR(cr);
  814. if (lp->mii.full_duplex) {
  815. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  816. bmcr |= BMCR_FULLDPLX;
  817. cr |= MAC_CR_RCVOWN_;
  818. } else {
  819. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  820. bmcr &= ~BMCR_FULLDPLX;
  821. cr &= ~MAC_CR_RCVOWN_;
  822. }
  823. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  824. SMC_SET_MAC_CR(cr);
  825. }
  826. }
  827. /*
  828. * Configures the specified PHY through the MII management interface
  829. * using Autonegotiation.
  830. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  831. * If RPC ANEG bit is set, the media selection is dependent purely on
  832. * the selection by the MII (either in the MII BMCR reg or the result
  833. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  834. * is controlled by the RPC SPEED and RPC DPLX bits.
  835. */
  836. static void smc911x_phy_configure(struct work_struct *work)
  837. {
  838. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  839. phy_configure);
  840. struct net_device *dev = lp->netdev;
  841. unsigned long ioaddr = dev->base_addr;
  842. int phyaddr = lp->mii.phy_id;
  843. int my_phy_caps; /* My PHY capabilities */
  844. int my_ad_caps; /* My Advertised capabilities */
  845. int status;
  846. unsigned long flags;
  847. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  848. /*
  849. * We should not be called if phy_type is zero.
  850. */
  851. if (lp->phy_type == 0)
  852. goto smc911x_phy_configure_exit_nolock;
  853. if (smc911x_phy_reset(dev, phyaddr)) {
  854. printk("%s: PHY reset timed out\n", dev->name);
  855. goto smc911x_phy_configure_exit_nolock;
  856. }
  857. spin_lock_irqsave(&lp->lock, flags);
  858. /*
  859. * Enable PHY Interrupts (for register 18)
  860. * Interrupts listed here are enabled
  861. */
  862. SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  863. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  864. PHY_INT_MASK_LINK_DOWN_);
  865. /* If the user requested no auto neg, then go set his request */
  866. if (lp->mii.force_media) {
  867. smc911x_phy_fixed(dev);
  868. goto smc911x_phy_configure_exit;
  869. }
  870. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  871. SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
  872. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  873. printk(KERN_INFO "Auto negotiation NOT supported\n");
  874. smc911x_phy_fixed(dev);
  875. goto smc911x_phy_configure_exit;
  876. }
  877. /* CSMA capable w/ both pauses */
  878. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  879. if (my_phy_caps & BMSR_100BASE4)
  880. my_ad_caps |= ADVERTISE_100BASE4;
  881. if (my_phy_caps & BMSR_100FULL)
  882. my_ad_caps |= ADVERTISE_100FULL;
  883. if (my_phy_caps & BMSR_100HALF)
  884. my_ad_caps |= ADVERTISE_100HALF;
  885. if (my_phy_caps & BMSR_10FULL)
  886. my_ad_caps |= ADVERTISE_10FULL;
  887. if (my_phy_caps & BMSR_10HALF)
  888. my_ad_caps |= ADVERTISE_10HALF;
  889. /* Disable capabilities not selected by our user */
  890. if (lp->ctl_rspeed != 100)
  891. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  892. if (!lp->ctl_rfduplx)
  893. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  894. /* Update our Auto-Neg Advertisement Register */
  895. SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
  896. lp->mii.advertising = my_ad_caps;
  897. /*
  898. * Read the register back. Without this, it appears that when
  899. * auto-negotiation is restarted, sometimes it isn't ready and
  900. * the link does not come up.
  901. */
  902. udelay(10);
  903. SMC_GET_PHY_MII_ADV(phyaddr, status);
  904. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  905. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  906. /* Restart auto-negotiation process in order to advertise my caps */
  907. SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  908. smc911x_phy_check_media(dev, 1);
  909. smc911x_phy_configure_exit:
  910. spin_unlock_irqrestore(&lp->lock, flags);
  911. smc911x_phy_configure_exit_nolock:
  912. lp->work_pending = 0;
  913. }
  914. /*
  915. * smc911x_phy_interrupt
  916. *
  917. * Purpose: Handle interrupts relating to PHY register 18. This is
  918. * called from the "hard" interrupt handler under our private spinlock.
  919. */
  920. static void smc911x_phy_interrupt(struct net_device *dev)
  921. {
  922. struct smc911x_local *lp = netdev_priv(dev);
  923. unsigned long ioaddr = dev->base_addr;
  924. int phyaddr = lp->mii.phy_id;
  925. int status;
  926. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  927. if (lp->phy_type == 0)
  928. return;
  929. smc911x_phy_check_media(dev, 0);
  930. /* read to clear status bits */
  931. SMC_GET_PHY_INT_SRC(phyaddr,status);
  932. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  933. dev->name, status & 0xffff);
  934. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  935. dev->name, SMC_GET_AFC_CFG());
  936. }
  937. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  938. /*
  939. * This is the main routine of the driver, to handle the device when
  940. * it needs some attention.
  941. */
  942. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  943. {
  944. struct net_device *dev = dev_id;
  945. unsigned long ioaddr = dev->base_addr;
  946. struct smc911x_local *lp = netdev_priv(dev);
  947. unsigned int status, mask, timeout;
  948. unsigned int rx_overrun=0, cr, pkts;
  949. unsigned long flags;
  950. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  951. spin_lock_irqsave(&lp->lock, flags);
  952. /* Spurious interrupt check */
  953. if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  954. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  955. spin_unlock_irqrestore(&lp->lock, flags);
  956. return IRQ_NONE;
  957. }
  958. mask = SMC_GET_INT_EN();
  959. SMC_SET_INT_EN(0);
  960. /* set a timeout value, so I don't stay here forever */
  961. timeout = 8;
  962. do {
  963. status = SMC_GET_INT();
  964. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  965. dev->name, status, mask, status & ~mask);
  966. status &= mask;
  967. if (!status)
  968. break;
  969. /* Handle SW interrupt condition */
  970. if (status & INT_STS_SW_INT_) {
  971. SMC_ACK_INT(INT_STS_SW_INT_);
  972. mask &= ~INT_EN_SW_INT_EN_;
  973. }
  974. /* Handle various error conditions */
  975. if (status & INT_STS_RXE_) {
  976. SMC_ACK_INT(INT_STS_RXE_);
  977. lp->stats.rx_errors++;
  978. }
  979. if (status & INT_STS_RXDFH_INT_) {
  980. SMC_ACK_INT(INT_STS_RXDFH_INT_);
  981. lp->stats.rx_dropped+=SMC_GET_RX_DROP();
  982. }
  983. /* Undocumented interrupt-what is the right thing to do here? */
  984. if (status & INT_STS_RXDF_INT_) {
  985. SMC_ACK_INT(INT_STS_RXDF_INT_);
  986. }
  987. /* Rx Data FIFO exceeds set level */
  988. if (status & INT_STS_RDFL_) {
  989. if (IS_REV_A(lp->revision)) {
  990. rx_overrun=1;
  991. SMC_GET_MAC_CR(cr);
  992. cr &= ~MAC_CR_RXEN_;
  993. SMC_SET_MAC_CR(cr);
  994. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  995. lp->stats.rx_errors++;
  996. lp->stats.rx_fifo_errors++;
  997. }
  998. SMC_ACK_INT(INT_STS_RDFL_);
  999. }
  1000. if (status & INT_STS_RDFO_) {
  1001. if (!IS_REV_A(lp->revision)) {
  1002. SMC_GET_MAC_CR(cr);
  1003. cr &= ~MAC_CR_RXEN_;
  1004. SMC_SET_MAC_CR(cr);
  1005. rx_overrun=1;
  1006. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  1007. lp->stats.rx_errors++;
  1008. lp->stats.rx_fifo_errors++;
  1009. }
  1010. SMC_ACK_INT(INT_STS_RDFO_);
  1011. }
  1012. /* Handle receive condition */
  1013. if ((status & INT_STS_RSFL_) || rx_overrun) {
  1014. unsigned int fifo;
  1015. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  1016. fifo = SMC_GET_RX_FIFO_INF();
  1017. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  1018. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  1019. dev->name, pkts, fifo & 0xFFFF );
  1020. if (pkts != 0) {
  1021. #ifdef SMC_USE_DMA
  1022. unsigned int fifo;
  1023. if (lp->rxdma_active){
  1024. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1025. "%s: RX DMA active\n", dev->name);
  1026. /* The DMA is already running so up the IRQ threshold */
  1027. fifo = SMC_GET_FIFO_INT() & ~0xFF;
  1028. fifo |= pkts & 0xFF;
  1029. DBG(SMC_DEBUG_RX,
  1030. "%s: Setting RX stat FIFO threshold to %d\n",
  1031. dev->name, fifo & 0xff);
  1032. SMC_SET_FIFO_INT(fifo);
  1033. } else
  1034. #endif
  1035. smc911x_rcv(dev);
  1036. }
  1037. SMC_ACK_INT(INT_STS_RSFL_);
  1038. }
  1039. /* Handle transmit FIFO available */
  1040. if (status & INT_STS_TDFA_) {
  1041. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  1042. SMC_SET_FIFO_TDA(0xFF);
  1043. lp->tx_throttle = 0;
  1044. #ifdef SMC_USE_DMA
  1045. if (!lp->txdma_active)
  1046. #endif
  1047. netif_wake_queue(dev);
  1048. SMC_ACK_INT(INT_STS_TDFA_);
  1049. }
  1050. /* Handle transmit done condition */
  1051. #if 1
  1052. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  1053. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  1054. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  1055. dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
  1056. smc911x_tx(dev);
  1057. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1058. SMC_ACK_INT(INT_STS_TSFL_);
  1059. SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
  1060. }
  1061. #else
  1062. if (status & INT_STS_TSFL_) {
  1063. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  1064. smc911x_tx(dev);
  1065. SMC_ACK_INT(INT_STS_TSFL_);
  1066. }
  1067. if (status & INT_STS_GPT_INT_) {
  1068. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1069. dev->name,
  1070. SMC_GET_IRQ_CFG(),
  1071. SMC_GET_FIFO_INT(),
  1072. SMC_GET_RX_CFG());
  1073. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1074. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1075. dev->name,
  1076. (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
  1077. SMC_GET_RX_FIFO_INF() & 0xffff,
  1078. SMC_GET_RX_STS_FIFO_PEEK());
  1079. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1080. SMC_ACK_INT(INT_STS_GPT_INT_);
  1081. }
  1082. #endif
  1083. /* Handle PHY interupt condition */
  1084. if (status & INT_STS_PHY_INT_) {
  1085. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1086. smc911x_phy_interrupt(dev);
  1087. SMC_ACK_INT(INT_STS_PHY_INT_);
  1088. }
  1089. } while (--timeout);
  1090. /* restore mask state */
  1091. SMC_SET_INT_EN(mask);
  1092. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1093. dev->name, 8-timeout);
  1094. spin_unlock_irqrestore(&lp->lock, flags);
  1095. DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
  1096. return IRQ_HANDLED;
  1097. }
  1098. #ifdef SMC_USE_DMA
  1099. static void
  1100. smc911x_tx_dma_irq(int dma, void *data)
  1101. {
  1102. struct net_device *dev = (struct net_device *)data;
  1103. struct smc911x_local *lp = netdev_priv(dev);
  1104. struct sk_buff *skb = lp->current_tx_skb;
  1105. unsigned long flags;
  1106. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1107. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1108. /* Clear the DMA interrupt sources */
  1109. SMC_DMA_ACK_IRQ(dev, dma);
  1110. BUG_ON(skb == NULL);
  1111. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1112. dev->trans_start = jiffies;
  1113. dev_kfree_skb_irq(skb);
  1114. lp->current_tx_skb = NULL;
  1115. if (lp->pending_tx_skb != NULL)
  1116. smc911x_hardware_send_pkt(dev);
  1117. else {
  1118. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1119. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1120. spin_lock_irqsave(&lp->lock, flags);
  1121. lp->txdma_active = 0;
  1122. if (!lp->tx_throttle) {
  1123. netif_wake_queue(dev);
  1124. }
  1125. spin_unlock_irqrestore(&lp->lock, flags);
  1126. }
  1127. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1128. "%s: TX DMA irq completed\n", dev->name);
  1129. }
  1130. static void
  1131. smc911x_rx_dma_irq(int dma, void *data)
  1132. {
  1133. struct net_device *dev = (struct net_device *)data;
  1134. unsigned long ioaddr = dev->base_addr;
  1135. struct smc911x_local *lp = netdev_priv(dev);
  1136. struct sk_buff *skb = lp->current_rx_skb;
  1137. unsigned long flags;
  1138. unsigned int pkts;
  1139. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1140. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1141. /* Clear the DMA interrupt sources */
  1142. SMC_DMA_ACK_IRQ(dev, dma);
  1143. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1144. BUG_ON(skb == NULL);
  1145. lp->current_rx_skb = NULL;
  1146. PRINT_PKT(skb->data, skb->len);
  1147. dev->last_rx = jiffies;
  1148. skb->dev = dev;
  1149. skb->protocol = eth_type_trans(skb, dev);
  1150. netif_rx(skb);
  1151. lp->stats.rx_packets++;
  1152. lp->stats.rx_bytes += skb->len;
  1153. spin_lock_irqsave(&lp->lock, flags);
  1154. pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
  1155. if (pkts != 0) {
  1156. smc911x_rcv(dev);
  1157. }else {
  1158. lp->rxdma_active = 0;
  1159. }
  1160. spin_unlock_irqrestore(&lp->lock, flags);
  1161. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1162. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1163. dev->name, pkts);
  1164. }
  1165. #endif /* SMC_USE_DMA */
  1166. #ifdef CONFIG_NET_POLL_CONTROLLER
  1167. /*
  1168. * Polling receive - used by netconsole and other diagnostic tools
  1169. * to allow network i/o with interrupts disabled.
  1170. */
  1171. static void smc911x_poll_controller(struct net_device *dev)
  1172. {
  1173. disable_irq(dev->irq);
  1174. smc911x_interrupt(dev->irq, dev);
  1175. enable_irq(dev->irq);
  1176. }
  1177. #endif
  1178. /* Our watchdog timed out. Called by the networking layer */
  1179. static void smc911x_timeout(struct net_device *dev)
  1180. {
  1181. struct smc911x_local *lp = netdev_priv(dev);
  1182. unsigned long ioaddr = dev->base_addr;
  1183. int status, mask;
  1184. unsigned long flags;
  1185. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1186. spin_lock_irqsave(&lp->lock, flags);
  1187. status = SMC_GET_INT();
  1188. mask = SMC_GET_INT_EN();
  1189. spin_unlock_irqrestore(&lp->lock, flags);
  1190. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1191. dev->name, status, mask);
  1192. /* Dump the current TX FIFO contents and restart */
  1193. mask = SMC_GET_TX_CFG();
  1194. SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1195. /*
  1196. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1197. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1198. * which calls schedule(). Hence we use a work queue.
  1199. */
  1200. if (lp->phy_type != 0) {
  1201. if (schedule_work(&lp->phy_configure)) {
  1202. lp->work_pending = 1;
  1203. }
  1204. }
  1205. /* We can accept TX packets again */
  1206. dev->trans_start = jiffies;
  1207. netif_wake_queue(dev);
  1208. }
  1209. /*
  1210. * This routine will, depending on the values passed to it,
  1211. * either make it accept multicast packets, go into
  1212. * promiscuous mode (for TCPDUMP and cousins) or accept
  1213. * a select set of multicast packets
  1214. */
  1215. static void smc911x_set_multicast_list(struct net_device *dev)
  1216. {
  1217. struct smc911x_local *lp = netdev_priv(dev);
  1218. unsigned long ioaddr = dev->base_addr;
  1219. unsigned int multicast_table[2];
  1220. unsigned int mcr, update_multicast = 0;
  1221. unsigned long flags;
  1222. /* table for flipping the order of 5 bits */
  1223. static const unsigned char invert5[] =
  1224. {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
  1225. 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
  1226. 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
  1227. 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
  1228. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1229. spin_lock_irqsave(&lp->lock, flags);
  1230. SMC_GET_MAC_CR(mcr);
  1231. spin_unlock_irqrestore(&lp->lock, flags);
  1232. if (dev->flags & IFF_PROMISC) {
  1233. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1234. mcr |= MAC_CR_PRMS_;
  1235. }
  1236. /*
  1237. * Here, I am setting this to accept all multicast packets.
  1238. * I don't need to zero the multicast table, because the flag is
  1239. * checked before the table is
  1240. */
  1241. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1242. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1243. mcr |= MAC_CR_MCPAS_;
  1244. }
  1245. /*
  1246. * This sets the internal hardware table to filter out unwanted
  1247. * multicast packets before they take up memory.
  1248. *
  1249. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1250. * address are the offset into the table. If that bit is 1, then the
  1251. * multicast packet is accepted. Otherwise, it's dropped silently.
  1252. *
  1253. * To use the 6 bits as an offset into the table, the high 1 bit is
  1254. * the number of the 32 bit register, while the low 5 bits are the bit
  1255. * within that register.
  1256. */
  1257. else if (dev->mc_count) {
  1258. int i;
  1259. struct dev_mc_list *cur_addr;
  1260. /* Set the Hash perfec mode */
  1261. mcr |= MAC_CR_HPFILT_;
  1262. /* start with a table of all zeros: reject all */
  1263. memset(multicast_table, 0, sizeof(multicast_table));
  1264. cur_addr = dev->mc_list;
  1265. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1266. int position;
  1267. /* do we have a pointer here? */
  1268. if (!cur_addr)
  1269. break;
  1270. /* make sure this is a multicast address -
  1271. shouldn't this be a given if we have it here ? */
  1272. if (!(*cur_addr->dmi_addr & 1))
  1273. continue;
  1274. /* only use the low order bits */
  1275. position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
  1276. /* do some messy swapping to put the bit in the right spot */
  1277. multicast_table[invert5[position&0x1F]&0x1] |=
  1278. (1<<invert5[(position>>1)&0x1F]);
  1279. }
  1280. /* be sure I get rid of flags I might have set */
  1281. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1282. /* now, the table can be loaded into the chipset */
  1283. update_multicast = 1;
  1284. } else {
  1285. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1286. dev->name);
  1287. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1288. /*
  1289. * since I'm disabling all multicast entirely, I need to
  1290. * clear the multicast list
  1291. */
  1292. memset(multicast_table, 0, sizeof(multicast_table));
  1293. update_multicast = 1;
  1294. }
  1295. spin_lock_irqsave(&lp->lock, flags);
  1296. SMC_SET_MAC_CR(mcr);
  1297. if (update_multicast) {
  1298. DBG(SMC_DEBUG_MISC,
  1299. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1300. dev->name, multicast_table[0], multicast_table[1]);
  1301. SMC_SET_HASHL(multicast_table[0]);
  1302. SMC_SET_HASHH(multicast_table[1]);
  1303. }
  1304. spin_unlock_irqrestore(&lp->lock, flags);
  1305. }
  1306. /*
  1307. * Open and Initialize the board
  1308. *
  1309. * Set up everything, reset the card, etc..
  1310. */
  1311. static int
  1312. smc911x_open(struct net_device *dev)
  1313. {
  1314. struct smc911x_local *lp = netdev_priv(dev);
  1315. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1316. /*
  1317. * Check that the address is valid. If its not, refuse
  1318. * to bring the device up. The user must specify an
  1319. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1320. */
  1321. if (!is_valid_ether_addr(dev->dev_addr)) {
  1322. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1323. return -EINVAL;
  1324. }
  1325. /* reset the hardware */
  1326. smc911x_reset(dev);
  1327. /* Configure the PHY, initialize the link state */
  1328. smc911x_phy_configure(&lp->phy_configure);
  1329. /* Turn on Tx + Rx */
  1330. smc911x_enable(dev);
  1331. netif_start_queue(dev);
  1332. return 0;
  1333. }
  1334. /*
  1335. * smc911x_close
  1336. *
  1337. * this makes the board clean up everything that it can
  1338. * and not talk to the outside world. Caused by
  1339. * an 'ifconfig ethX down'
  1340. */
  1341. static int smc911x_close(struct net_device *dev)
  1342. {
  1343. struct smc911x_local *lp = netdev_priv(dev);
  1344. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1345. netif_stop_queue(dev);
  1346. netif_carrier_off(dev);
  1347. /* clear everything */
  1348. smc911x_shutdown(dev);
  1349. if (lp->phy_type != 0) {
  1350. /* We need to ensure that no calls to
  1351. * smc911x_phy_configure are pending.
  1352. * flush_scheduled_work() cannot be called because we
  1353. * are running with the netlink semaphore held (from
  1354. * devinet_ioctl()) and the pending work queue
  1355. * contains linkwatch_event() (scheduled by
  1356. * netif_carrier_off() above). linkwatch_event() also
  1357. * wants the netlink semaphore.
  1358. */
  1359. while (lp->work_pending)
  1360. schedule();
  1361. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1362. }
  1363. if (lp->pending_tx_skb) {
  1364. dev_kfree_skb(lp->pending_tx_skb);
  1365. lp->pending_tx_skb = NULL;
  1366. }
  1367. return 0;
  1368. }
  1369. /*
  1370. * Get the current statistics.
  1371. * This may be called with the card open or closed.
  1372. */
  1373. static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
  1374. {
  1375. struct smc911x_local *lp = netdev_priv(dev);
  1376. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1377. return &lp->stats;
  1378. }
  1379. /*
  1380. * Ethtool support
  1381. */
  1382. static int
  1383. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1384. {
  1385. struct smc911x_local *lp = netdev_priv(dev);
  1386. unsigned long ioaddr = dev->base_addr;
  1387. int ret, status;
  1388. unsigned long flags;
  1389. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1390. cmd->maxtxpkt = 1;
  1391. cmd->maxrxpkt = 1;
  1392. if (lp->phy_type != 0) {
  1393. spin_lock_irqsave(&lp->lock, flags);
  1394. ret = mii_ethtool_gset(&lp->mii, cmd);
  1395. spin_unlock_irqrestore(&lp->lock, flags);
  1396. } else {
  1397. cmd->supported = SUPPORTED_10baseT_Half |
  1398. SUPPORTED_10baseT_Full |
  1399. SUPPORTED_TP | SUPPORTED_AUI;
  1400. if (lp->ctl_rspeed == 10)
  1401. cmd->speed = SPEED_10;
  1402. else if (lp->ctl_rspeed == 100)
  1403. cmd->speed = SPEED_100;
  1404. cmd->autoneg = AUTONEG_DISABLE;
  1405. if (lp->mii.phy_id==1)
  1406. cmd->transceiver = XCVR_INTERNAL;
  1407. else
  1408. cmd->transceiver = XCVR_EXTERNAL;
  1409. cmd->port = 0;
  1410. SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
  1411. cmd->duplex =
  1412. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1413. DUPLEX_FULL : DUPLEX_HALF;
  1414. ret = 0;
  1415. }
  1416. return ret;
  1417. }
  1418. static int
  1419. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1420. {
  1421. struct smc911x_local *lp = netdev_priv(dev);
  1422. int ret;
  1423. unsigned long flags;
  1424. if (lp->phy_type != 0) {
  1425. spin_lock_irqsave(&lp->lock, flags);
  1426. ret = mii_ethtool_sset(&lp->mii, cmd);
  1427. spin_unlock_irqrestore(&lp->lock, flags);
  1428. } else {
  1429. if (cmd->autoneg != AUTONEG_DISABLE ||
  1430. cmd->speed != SPEED_10 ||
  1431. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1432. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1433. return -EINVAL;
  1434. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1435. ret = 0;
  1436. }
  1437. return ret;
  1438. }
  1439. static void
  1440. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1441. {
  1442. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1443. strncpy(info->version, version, sizeof(info->version));
  1444. strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
  1445. }
  1446. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1447. {
  1448. struct smc911x_local *lp = netdev_priv(dev);
  1449. int ret = -EINVAL;
  1450. unsigned long flags;
  1451. if (lp->phy_type != 0) {
  1452. spin_lock_irqsave(&lp->lock, flags);
  1453. ret = mii_nway_restart(&lp->mii);
  1454. spin_unlock_irqrestore(&lp->lock, flags);
  1455. }
  1456. return ret;
  1457. }
  1458. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1459. {
  1460. struct smc911x_local *lp = netdev_priv(dev);
  1461. return lp->msg_enable;
  1462. }
  1463. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1464. {
  1465. struct smc911x_local *lp = netdev_priv(dev);
  1466. lp->msg_enable = level;
  1467. }
  1468. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1469. {
  1470. /* System regs + MAC regs + PHY regs */
  1471. return (((E2P_CMD - ID_REV)/4 + 1) +
  1472. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1473. }
  1474. static void smc911x_ethtool_getregs(struct net_device *dev,
  1475. struct ethtool_regs* regs, void *buf)
  1476. {
  1477. unsigned long ioaddr = dev->base_addr;
  1478. struct smc911x_local *lp = netdev_priv(dev);
  1479. unsigned long flags;
  1480. u32 reg,i,j=0;
  1481. u32 *data = (u32*)buf;
  1482. regs->version = lp->version;
  1483. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1484. data[j++] = SMC_inl(ioaddr,i);
  1485. }
  1486. for(i=MAC_CR;i<=WUCSR;i++) {
  1487. spin_lock_irqsave(&lp->lock, flags);
  1488. SMC_GET_MAC_CSR(i, reg);
  1489. spin_unlock_irqrestore(&lp->lock, flags);
  1490. data[j++] = reg;
  1491. }
  1492. for(i=0;i<=31;i++) {
  1493. spin_lock_irqsave(&lp->lock, flags);
  1494. SMC_GET_MII(i, lp->mii.phy_id, reg);
  1495. spin_unlock_irqrestore(&lp->lock, flags);
  1496. data[j++] = reg & 0xFFFF;
  1497. }
  1498. }
  1499. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1500. {
  1501. unsigned long ioaddr = dev->base_addr;
  1502. unsigned int timeout;
  1503. int e2p_cmd;
  1504. e2p_cmd = SMC_GET_E2P_CMD();
  1505. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1506. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1507. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1508. dev->name, __FUNCTION__);
  1509. return -EFAULT;
  1510. }
  1511. mdelay(1);
  1512. e2p_cmd = SMC_GET_E2P_CMD();
  1513. }
  1514. if (timeout == 0) {
  1515. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1516. dev->name, __FUNCTION__);
  1517. return -ETIMEDOUT;
  1518. }
  1519. return 0;
  1520. }
  1521. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1522. int cmd, int addr)
  1523. {
  1524. unsigned long ioaddr = dev->base_addr;
  1525. int ret;
  1526. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1527. return ret;
  1528. SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
  1529. ((cmd) & (0x7<<28)) |
  1530. ((addr) & 0xFF));
  1531. return 0;
  1532. }
  1533. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1534. u8 *data)
  1535. {
  1536. unsigned long ioaddr = dev->base_addr;
  1537. int ret;
  1538. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1539. return ret;
  1540. *data = SMC_GET_E2P_DATA();
  1541. return 0;
  1542. }
  1543. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1544. u8 data)
  1545. {
  1546. unsigned long ioaddr = dev->base_addr;
  1547. int ret;
  1548. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1549. return ret;
  1550. SMC_SET_E2P_DATA(data);
  1551. return 0;
  1552. }
  1553. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1554. struct ethtool_eeprom *eeprom, u8 *data)
  1555. {
  1556. u8 eebuf[SMC911X_EEPROM_LEN];
  1557. int i, ret;
  1558. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1559. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1560. return ret;
  1561. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1562. return ret;
  1563. }
  1564. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1565. return 0;
  1566. }
  1567. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1568. struct ethtool_eeprom *eeprom, u8 *data)
  1569. {
  1570. int i, ret;
  1571. /* Enable erase */
  1572. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1573. return ret;
  1574. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1575. /* erase byte */
  1576. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1577. return ret;
  1578. /* write byte */
  1579. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1580. return ret;
  1581. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1582. return ret;
  1583. }
  1584. return 0;
  1585. }
  1586. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1587. {
  1588. return SMC911X_EEPROM_LEN;
  1589. }
  1590. static const struct ethtool_ops smc911x_ethtool_ops = {
  1591. .get_settings = smc911x_ethtool_getsettings,
  1592. .set_settings = smc911x_ethtool_setsettings,
  1593. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1594. .get_msglevel = smc911x_ethtool_getmsglevel,
  1595. .set_msglevel = smc911x_ethtool_setmsglevel,
  1596. .nway_reset = smc911x_ethtool_nwayreset,
  1597. .get_link = ethtool_op_get_link,
  1598. .get_regs_len = smc911x_ethtool_getregslen,
  1599. .get_regs = smc911x_ethtool_getregs,
  1600. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1601. .get_eeprom = smc911x_ethtool_geteeprom,
  1602. .set_eeprom = smc911x_ethtool_seteeprom,
  1603. };
  1604. /*
  1605. * smc911x_findirq
  1606. *
  1607. * This routine has a simple purpose -- make the SMC chip generate an
  1608. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1609. */
  1610. static int __init smc911x_findirq(unsigned long ioaddr)
  1611. {
  1612. int timeout = 20;
  1613. unsigned long cookie;
  1614. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1615. cookie = probe_irq_on();
  1616. /*
  1617. * Force a SW interrupt
  1618. */
  1619. SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
  1620. /*
  1621. * Wait until positive that the interrupt has been generated
  1622. */
  1623. do {
  1624. int int_status;
  1625. udelay(10);
  1626. int_status = SMC_GET_INT_EN();
  1627. if (int_status & INT_EN_SW_INT_EN_)
  1628. break; /* got the interrupt */
  1629. } while (--timeout);
  1630. /*
  1631. * there is really nothing that I can do here if timeout fails,
  1632. * as autoirq_report will return a 0 anyway, which is what I
  1633. * want in this case. Plus, the clean up is needed in both
  1634. * cases.
  1635. */
  1636. /* and disable all interrupts again */
  1637. SMC_SET_INT_EN(0);
  1638. /* and return what I found */
  1639. return probe_irq_off(cookie);
  1640. }
  1641. /*
  1642. * Function: smc911x_probe(unsigned long ioaddr)
  1643. *
  1644. * Purpose:
  1645. * Tests to see if a given ioaddr points to an SMC911x chip.
  1646. * Returns a 0 on success
  1647. *
  1648. * Algorithm:
  1649. * (1) see if the endian word is OK
  1650. * (1) see if I recognize the chip ID in the appropriate register
  1651. *
  1652. * Here I do typical initialization tasks.
  1653. *
  1654. * o Initialize the structure if needed
  1655. * o print out my vanity message if not done so already
  1656. * o print out what type of hardware is detected
  1657. * o print out the ethernet address
  1658. * o find the IRQ
  1659. * o set up my private data
  1660. * o configure the dev structure with my subroutines
  1661. * o actually GRAB the irq.
  1662. * o GRAB the region
  1663. */
  1664. static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
  1665. {
  1666. struct smc911x_local *lp = netdev_priv(dev);
  1667. int i, retval;
  1668. unsigned int val, chip_id, revision;
  1669. const char *version_string;
  1670. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1671. /* First, see if the endian word is recognized */
  1672. val = SMC_GET_BYTE_TEST();
  1673. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1674. if (val != 0x87654321) {
  1675. printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
  1676. retval = -ENODEV;
  1677. goto err_out;
  1678. }
  1679. /*
  1680. * check if the revision register is something that I
  1681. * recognize. These might need to be added to later,
  1682. * as future revisions could be added.
  1683. */
  1684. chip_id = SMC_GET_PN();
  1685. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1686. for(i=0;chip_ids[i].id != 0; i++) {
  1687. if (chip_ids[i].id == chip_id) break;
  1688. }
  1689. if (!chip_ids[i].id) {
  1690. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1691. retval = -ENODEV;
  1692. goto err_out;
  1693. }
  1694. version_string = chip_ids[i].name;
  1695. revision = SMC_GET_REV();
  1696. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1697. /* At this point I'll assume that the chip is an SMC911x. */
  1698. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1699. /* Validate the TX FIFO size requested */
  1700. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1701. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1702. retval = -EINVAL;
  1703. goto err_out;
  1704. }
  1705. /* fill in some of the fields */
  1706. dev->base_addr = ioaddr;
  1707. lp->version = chip_ids[i].id;
  1708. lp->revision = revision;
  1709. lp->tx_fifo_kb = tx_fifo_kb;
  1710. /* Reverse calculate the RX FIFO size from the TX */
  1711. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1712. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1713. /* Set the automatic flow control values */
  1714. switch(lp->tx_fifo_kb) {
  1715. /*
  1716. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1717. * AFC_LO is AFC_HI/2
  1718. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1719. */
  1720. case 2:/* 13440 Rx Data Fifo Size */
  1721. lp->afc_cfg=0x008C46AF;break;
  1722. case 3:/* 12480 Rx Data Fifo Size */
  1723. lp->afc_cfg=0x0082419F;break;
  1724. case 4:/* 11520 Rx Data Fifo Size */
  1725. lp->afc_cfg=0x00783C9F;break;
  1726. case 5:/* 10560 Rx Data Fifo Size */
  1727. lp->afc_cfg=0x006E374F;break;
  1728. case 6:/* 9600 Rx Data Fifo Size */
  1729. lp->afc_cfg=0x0064328F;break;
  1730. case 7:/* 8640 Rx Data Fifo Size */
  1731. lp->afc_cfg=0x005A2D7F;break;
  1732. case 8:/* 7680 Rx Data Fifo Size */
  1733. lp->afc_cfg=0x0050287F;break;
  1734. case 9:/* 6720 Rx Data Fifo Size */
  1735. lp->afc_cfg=0x0046236F;break;
  1736. case 10:/* 5760 Rx Data Fifo Size */
  1737. lp->afc_cfg=0x003C1E6F;break;
  1738. case 11:/* 4800 Rx Data Fifo Size */
  1739. lp->afc_cfg=0x0032195F;break;
  1740. /*
  1741. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1742. * AFC_LO is AFC_HI/2
  1743. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1744. */
  1745. case 12:/* 3840 Rx Data Fifo Size */
  1746. lp->afc_cfg=0x0024124F;break;
  1747. case 13:/* 2880 Rx Data Fifo Size */
  1748. lp->afc_cfg=0x0015073F;break;
  1749. case 14:/* 1920 Rx Data Fifo Size */
  1750. lp->afc_cfg=0x0006032F;break;
  1751. default:
  1752. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1753. dev->name);
  1754. break;
  1755. }
  1756. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1757. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1758. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1759. spin_lock_init(&lp->lock);
  1760. #if defined(CONFIG_MACH_SMDK6410) || defined(CONFIG_MACH_SMDK2450)
  1761. dev->dev_addr[0] = 0x00;
  1762. dev->dev_addr[1] = 0x09;
  1763. dev->dev_addr[2] = 0xc0;
  1764. dev->dev_addr[3] = 0xff;
  1765. dev->dev_addr[4] = 0xec;
  1766. dev->dev_addr[5] = 0x48;
  1767. SMC_SET_MAC_ADDR(dev->dev_addr);
  1768. #endif
  1769. /* Get the MAC address */
  1770. SMC_GET_MAC_ADDR(dev->dev_addr);
  1771. /* now, reset the chip, and put it into a known state */
  1772. smc911x_reset(dev);
  1773. /*
  1774. * If dev->irq is 0, then the device has to be banged on to see
  1775. * what the IRQ is.
  1776. *
  1777. * Specifying an IRQ is done with the assumption that the user knows
  1778. * what (s)he is doing. No checking is done!!!!
  1779. */
  1780. if (dev->irq < 1) {
  1781. int trials;
  1782. trials = 3;
  1783. while (trials--) {
  1784. dev->irq = smc911x_findirq(ioaddr);
  1785. if (dev->irq)
  1786. break;
  1787. /* kick the card and try again */
  1788. smc911x_reset(dev);
  1789. }
  1790. }
  1791. if (dev->irq == 0) {
  1792. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1793. dev->name);
  1794. retval = -ENODEV;
  1795. goto err_out;
  1796. }
  1797. dev->irq = irq_canonicalize(dev->irq);
  1798. /* Fill in the fields of the device structure with ethernet values. */
  1799. ether_setup(dev);
  1800. dev->open = smc911x_open;
  1801. dev->stop = smc911x_close;
  1802. dev->hard_start_xmit = smc911x_hard_start_xmit;
  1803. dev->tx_timeout = smc911x_timeout;
  1804. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1805. dev->get_stats = smc911x_query_statistics;
  1806. dev->set_multicast_list = smc911x_set_multicast_list;
  1807. dev->ethtool_ops = &smc911x_ethtool_ops;
  1808. #ifdef CONFIG_NET_POLL_CONTROLLER
  1809. dev->poll_controller = smc911x_poll_controller;
  1810. #endif
  1811. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1812. lp->mii.phy_id_mask = 0x1f;
  1813. lp->mii.reg_num_mask = 0x1f;
  1814. lp->mii.force_media = 0;
  1815. lp->mii.full_duplex = 0;
  1816. lp->mii.dev = dev;
  1817. lp->mii.mdio_read = smc911x_phy_read;
  1818. lp->mii.mdio_write = smc911x_phy_write;
  1819. /*
  1820. * Locate the phy, if any.
  1821. */
  1822. smc911x_phy_detect(dev);
  1823. /* Set default parameters */
  1824. lp->msg_enable = NETIF_MSG_LINK;
  1825. lp->ctl_rfduplx = 1;
  1826. lp->ctl_rspeed = 100;
  1827. /* Grab the IRQ */
  1828. retval = request_irq(dev->irq, &smc911x_interrupt, IRQF_SHARED, dev->name, dev);
  1829. if (retval)
  1830. goto err_out;
  1831. set_irq_type(dev->irq, IRQT_FALLING);
  1832. #ifdef SMC_USE_DMA
  1833. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1834. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1835. lp->rxdma_active = 0;
  1836. lp->txdma_active = 0;
  1837. dev->dma = lp->rxdma;
  1838. #endif
  1839. retval = register_netdev(dev);
  1840. if (retval == 0) {
  1841. /* now, print out the card info, in a short format.. */
  1842. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1843. dev->name, version_string, lp->revision,
  1844. dev->base_addr, dev->irq);
  1845. #ifdef SMC_USE_DMA
  1846. if (lp->rxdma != -1)
  1847. printk(" RXDMA %d ", lp->rxdma);
  1848. if (lp->txdma != -1)
  1849. printk("TXDMA %d", lp->txdma);
  1850. #endif
  1851. printk("\n");
  1852. if (!is_valid_ether_addr(dev->dev_addr)) {
  1853. printk("%s: Invalid ethernet MAC address. Please "
  1854. "set using ifconfig\n", dev->name);
  1855. } else {
  1856. /* Print the Ethernet address */
  1857. printk("%s: Ethernet addr: ", dev->name);
  1858. for (i = 0; i < 5; i++)
  1859. printk("%2.2x:", dev->dev_addr[i]);
  1860. printk("%2.2x\n", dev->dev_addr[5]);
  1861. }
  1862. if (lp->phy_type == 0) {
  1863. PRINTK("%s: No PHY found\n", dev->name);
  1864. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1865. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1866. } else {
  1867. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1868. }
  1869. }
  1870. err_out:
  1871. #ifdef SMC_USE_DMA
  1872. if (retval) {
  1873. if (lp->rxdma != -1) {
  1874. SMC_DMA_FREE(dev, lp->rxdma);
  1875. }
  1876. if (lp->txdma != -1) {
  1877. SMC_DMA_FREE(dev, lp->txdma);
  1878. }
  1879. }
  1880. #endif
  1881. return retval;
  1882. }
  1883. /*
  1884. * smc911x_init(void)
  1885. *
  1886. * Output:
  1887. * 0 --> there is a device
  1888. * anything else, error
  1889. */
  1890. static int smc911x_drv_probe(struct platform_device *pdev)
  1891. {
  1892. struct net_device *ndev;
  1893. struct resource *res;
  1894. struct smc911x_local *lp;
  1895. unsigned int *addr;
  1896. int ret;
  1897. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1898. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1899. if (!res) {
  1900. ret = -ENODEV;
  1901. goto out;
  1902. }
  1903. /*
  1904. * Request the regions.
  1905. */
  1906. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1907. ret = -EBUSY;
  1908. goto out;
  1909. }
  1910. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1911. if (!ndev) {
  1912. printk("%s: could not allocate device.\n", CARDNAME);
  1913. ret = -ENOMEM;
  1914. goto release_1;
  1915. }
  1916. SET_MODULE_OWNER(ndev);
  1917. SET_NETDEV_DEV(ndev, &pdev->dev);
  1918. ndev->dma = (unsigned char)-1;
  1919. ndev->irq = platform_get_irq(pdev, 0);
  1920. lp = netdev_priv(ndev);
  1921. lp->netdev = ndev;
  1922. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1923. if (!addr) {
  1924. ret = -ENOMEM;
  1925. goto release_both;
  1926. }
  1927. platform_set_drvdata(pdev, ndev);
  1928. ret = smc911x_probe(ndev, (unsigned long)addr);
  1929. if (ret != 0) {
  1930. platform_set_drvdata(pdev, NULL);
  1931. iounmap(addr);
  1932. release_both:
  1933. free_netdev(ndev);
  1934. release_1:
  1935. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1936. out:
  1937. printk("%s: not found (%d).\n", CARDNAME, ret);
  1938. }
  1939. #ifdef SMC_USE_DMA
  1940. else {
  1941. lp->physaddr = res->start;
  1942. lp->dev = &pdev->dev;
  1943. }
  1944. #endif
  1945. return ret;
  1946. }
  1947. static int smc911x_drv_remove(struct platform_device *pdev)
  1948. {
  1949. struct net_device *ndev = platform_get_drvdata(pdev);
  1950. struct resource *res;
  1951. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1952. platform_set_drvdata(pdev, NULL);
  1953. unregister_netdev(ndev);
  1954. free_irq(ndev->irq, ndev);
  1955. #ifdef SMC_USE_DMA
  1956. {
  1957. struct smc911x_local *lp = netdev_priv(ndev);
  1958. if (lp->rxdma != -1) {
  1959. SMC_DMA_FREE(dev, lp->rxdma);
  1960. }
  1961. if (lp->txdma != -1) {
  1962. SMC_DMA_FREE(dev, lp->txdma);
  1963. }
  1964. }
  1965. #endif
  1966. iounmap((void *)ndev->base_addr);
  1967. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1968. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1969. free_netdev(ndev);
  1970. return 0;
  1971. }
  1972. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1973. {
  1974. struct net_device *ndev = platform_get_drvdata(dev);
  1975. unsigned long ioaddr = ndev->base_addr;
  1976. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1977. if (ndev) {
  1978. if (netif_running(ndev)) {
  1979. netif_device_detach(ndev);
  1980. smc911x_shutdown(ndev);
  1981. #if POWER_DOWN
  1982. /* Set D2 - Energy detect only setting */
  1983. SMC_SET_PMT_CTRL(2<<12);
  1984. #endif
  1985. }
  1986. }
  1987. return 0;
  1988. }
  1989. static int smc911x_drv_resume(struct platform_device *dev)
  1990. {
  1991. struct net_device *ndev = platform_get_drvdata(dev);
  1992. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1993. if (ndev) {
  1994. struct smc911x_local *lp = netdev_priv(ndev);
  1995. if (netif_running(ndev)) {
  1996. smc911x_reset(ndev);
  1997. smc911x_enable(ndev);
  1998. if (lp->phy_type != 0)
  1999. smc911x_phy_configure(&lp->phy_configure);
  2000. netif_device_attach(ndev);
  2001. }
  2002. }
  2003. return 0;
  2004. }
  2005. static struct platform_driver smc911x_driver = {
  2006. .probe = smc911x_drv_probe,
  2007. .remove = smc911x_drv_remove,
  2008. .suspend = smc911x_drv_suspend,
  2009. .resume = smc911x_drv_resume,
  2010. .driver = {
  2011. .name = CARDNAME,
  2012. },
  2013. };
  2014. static int __init smc911x_init(void)
  2015. {
  2016. return platform_driver_register(&smc911x_driver);
  2017. }
  2018. static void __exit smc911x_cleanup(void)
  2019. {
  2020. platform_driver_unregister(&smc911x_driver);
  2021. }
  2022. module_init(smc911x_init);
  2023. module_exit(smc911x_cleanup);